Asynchronous execution method and system for ATE test machine
By employing an asynchronous execution method in the ATE test machine, test item interface instructions are converted into multiple tasks and stored in the task heap, enabling asynchronous parallel processing of modules. This solves the problems of resource waste and low efficiency caused by serial execution between modules, and improves the system's resource utilization and testing efficiency.
Patent Information
- Application Number
- CN202511366556.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-24
- Publication Date
- 2025-10-28
- Estimated Expiration
- 2045-09-24
AI Technical Summary
Existing ATE test machines suffer from resource waste and inefficiency due to serial execution between modules, failing to fully utilize the processing power of each module.
An asynchronous execution method is adopted, which converts the test item interface instructions issued by the host computer into multiple executable tasks and stores them in the task heap. The SDK module polls to determine the executability of the tasks and distributes them to the appropriate processing modules, so as to realize the asynchronous parallel work of the SDK module, ATOS module and FPGA module. The task heap manages the dependencies of the tasks to ensure the correct execution order.
It improved system resource utilization, reduced overall testing time, enhanced the testing efficiency of the ATE test machine and the system's fault tolerance, simplified the coupling structure between modules, and improved the system's maintainability and scalability.
Smart Images

Figure CN120847597A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of automated testing equipment for integrated circuits, and in particular to an asynchronous execution method and system for ATE testing machines. Background Art
[0002] With the explosive growth of my country's integrated circuit industry, the demand for automated test equipment (ATE) in the chip packaging and testing field is booming. For ATE test machines, time efficiency has become a key competitive factor. The shorter the time it takes for the same ATE test machine to test the same chip, the more competitive the test machine will be in the market, and the more time and labor costs will be reduced for chip packaging and testing manufacturers.
[0003] Existing ATE (Automatic Test Equipment) architectures typically consist of multiple functional modules that execute sequentially. In this architecture, when a traditional ATE test machine executes a test item, test instructions must be passed sequentially from the host computer to each execution module at each level, and the execution results must also return along the same path. This unidirectional execution flow prevents modules with different processing capabilities from working simultaneously. For example, when a lower-level module is executing a task, even if an upper-level module is capable of handling other unrelated tasks, it can only wait for the hardware module to complete its work. This model not only wastes system resources but also fails to fully utilize the processing power of each module. Summary of the Invention
[0004] The purpose of this invention is to provide an asynchronous execution method and system for ATE test machines, in order to solve the problems of resource waste and low efficiency caused by the serial execution of existing ATE test machines.
[0005] To address the aforementioned technical problems, this invention provides an asynchronous execution method and system for an ATE test machine. The asynchronous execution method for an ATE test machine includes: The SDK module generates multiple executable tasks from the test item interface instructions issued by the host computer and stores them in the task stack. The SDK module polls the tasks in the task heap to determine the executability of the tasks and the processing module. If the task is executable, the SDK module further determines whether the lower-level module should participate; Based on the judgment result, the SDK module will process the task itself, or distribute the task to the ATOS module for processing, or distribute the task to the FPGA module through the ATOS module for processing. The SDK module, the ATOS module, and the FPGA module will process the assigned task asynchronously at the same time. After the task is completed, the processing result will be returned to the task stack. Once all subtasks of the current test item are completed, the SDK module loads the task for the next test item, until all test items are completed.
[0006] Furthermore, the module for determining the executability and processing of the task includes: Based on task dependencies, determine whether the task meets the execution conditions; If a task does not meet the execution conditions, it will be kept in the task heap and wait. If the task meets the execution conditions, the task is determined to be executable, and the task's processing module is further determined.
[0007] Furthermore, if the task is executable, the SDK module further determines whether the lower-level module is involved, including: If the involvement of lower-level modules is not required, the SDK module will handle the task itself; If the participation of lower-level modules is required, the task will be distributed to the ATOS module. After receiving the task, the ATOS module further determines whether the FPGA module needs to participate.
[0008] Furthermore, the further determination of whether the FPGA module needs to be involved includes: If the FPGA module is not required, the ATOS module will handle the process itself. If the FPGA module is required to participate, the ATOS module will assign the task to the FPGA module for processing.
[0009] Furthermore, the process of returning the processing result to the task heap includes: When the SDK module processes a task, the processing result is directly returned to the task stack via the SDK module.
[0010] Furthermore, the process of returning the processing result to the task heap also includes: When the ATOS module processes a task, the processing result is returned to the task stack via the ATOS module and the SDK module in sequence.
[0011] Furthermore, the process of returning the processing result to the task heap also includes: When the FPGA module processes a task, the processing result is returned to the task stack via the FPGA module, the ATOS module, and the SDK module in sequence.
[0012] Furthermore, the tasks in the task stack include interdependent tasks and independent tasks. Interdependent tasks are executed in the order of their dependencies, while independent tasks can be executed in parallel.
[0013] An asynchronous execution system for an ATE test machine, operating using the aforementioned asynchronous execution method for an ATE test machine, includes: The SDK module connects to the host computer via a data bus. It is used to receive test item interface instructions from the host computer, manage the task heap, schedule and distribute tasks, and execute tasks that do not require the participation of lower-level modules. The ATOS module connects to the SDK module via a communication interface and is used to execute tasks distributed by the SDK module, and decide whether to further distribute the tasks to the FPGA module based on the tasks. The FPGA module is connected to the ATOS module via a communication interface and is used to execute tasks distributed by the ATOS module; The task heap is used to store and manage various tasks formed by test item interface instructions, their dependencies, and execution results.
[0014] Compared with the prior art, the present invention has at least the following beneficial effects: The asynchronous execution method for ATE test machines proposed in this invention converts test item interface instructions issued by the host computer into multiple executable tasks and stores them in a task heap. The SDK module polls to determine the executability of each task and distributes them to appropriate processing modules based on their characteristics. This enables asynchronous parallel operation of the SDK module, ATOS module, and FPGA module, allowing each module to handle different test tasks simultaneously, avoiding inter-module waiting and significantly improving system resource utilization. Furthermore, by managing task dependencies in the task heap, tasks without dependencies can execute in parallel, reducing overall test time and improving the testing efficiency of the ATE test machine. Attached Figure Description
[0015] Figure 1 This is a flowchart of an asynchronous execution method for an ATE test machine according to an embodiment of the present invention; Figure 2 This is a flowchart of a specific embodiment of the present invention; Figure 3 This is a flowchart of the asynchronous execution phase of a task in a specific embodiment of the present invention; Figure 4 This is a schematic diagram of the structure of an asynchronous execution system for an ATE test machine according to an embodiment of the present invention. Detailed Implementation
[0016] Based on the teachings of this specification, those skilled in the art can form new technical solutions by combining different implementation methods without creating technical contradictions. Such variations should be considered to fall within the protection scope of this patent.
[0017] The following will describe in more detail an asynchronous execution method and system for an ATE test machine according to the present invention, with reference to the accompanying diagrams, which illustrate preferred embodiments of the invention. It should be understood that those skilled in the art can modify the invention described herein while still achieving its advantageous effects. Therefore, the following description should be understood as being of general knowledge to those skilled in the art and is not intended to limit the invention.
[0018] The invention is described more specifically by way of example in the following paragraphs with reference to the accompanying drawings. The advantages and features of the invention will become clearer from the following description. It should be noted that the drawings are in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the invention.
[0019] Example 1 like Figure 1 As shown in the figure, this embodiment of the invention proposes an asynchronous execution method for an ATE test machine, including: First, the SDK module transforms the test item interface instructions issued by the host computer into multiple executable tasks and stores them in the task heap. Specifically, after receiving the test item interface instructions from the host computer module, the SDK module parses and processes them, decomposing a single test item into multiple independent executable tasks. These tasks include different types of operations such as test parameter setting, signal generation, data acquisition, and result analysis. The SDK module encapsulates these tasks according to a predefined format and stores them in the task storage area of the task heap for subsequent processing. This task decomposition mechanism can break down complex test items into multiple simple sub-tasks, facilitating parallel processing and improving the system's processing efficiency and resource utilization.
[0020] Then, the SDK module polls the tasks in the task heap to determine the executability of the tasks and the processing module. During the polling process, the SDK module checks the status of each task in the task heap in turn. This polling mechanism enables real-time monitoring of task status, allowing executable tasks to be discovered and assigned in a timely manner, avoiding long-term task delays; it also enables the system to intelligently select the most suitable execution order based on the current status.
[0021] Furthermore, if the task is executable, the SDK module further determines whether lower-level modules should participate. In this step, the SDK module determines the execution path of the task based on its type and complexity, thereby assigning the task to the most suitable processing module. Simple tasks are handled directly by higher-level modules, while complex tasks are distributed to dedicated hardware modules, avoiding waste of processing power and resource misallocation. By selecting the execution path most suitable for the task characteristics, the task completion time is shortened, and the system's processing efficiency is improved.
[0022] Next, based on the judgment result, the SDK module either processes the task itself, distributes the task to the ATOS module for processing, or distributes the task to the FPGA module through the ATOS module. The SDK module, ATOS module, and FPGA module process the assigned tasks asynchronously, and return the processing result to the task stack upon completion. During task distribution, the system selects the most suitable execution module based on the characteristics of the task, fully utilizing the strengths of each module. For example, for purely software logic processing tasks, such as simple data conversion and comparison operations, the SDK module can handle them directly without calling lower-level modules. For tasks requiring underlying operating system resources, such as device driver control and hardware configuration, the ATOS module handles them. For tasks requiring hardware acceleration, such as high-speed signal generation and acquisition, and complex waveform processing, the FPGA module ultimately executes them. This flexible task distribution strategy allows the system to automatically select the most suitable processing module based on task characteristics, improving processing efficiency and resource utilization.
[0023] Secondly, asynchronous parallel execution breaks the serial processing limitations of traditional testing systems. The three modules can work simultaneously without waiting for each other, significantly improving the overall processing capacity and response speed of the system. All processing results are ultimately aggregated into the task stack, ensuring data integrity and facilitating subsequent analysis and report generation. Furthermore, this approach enhances the system's fault tolerance and maintainability. The loose coupling between modules ensures that the failure of a single module will not cause the entire system to crash, and it also facilitates module-level upgrades and optimizations, providing the system with long-term technical adaptability.
[0024] Finally, after all subtasks of the current test item are completed, the SDK module loads the task of the next test item until all test items are completed, thereby maintaining the integrity and continuity of the test, supporting the automated processing of batch test items, and facilitating the integration and analysis of results at the test item level, thus improving the automation level of the testing process and the efficiency of data management.
[0025] In this embodiment, the task executability determination and processing module includes determining whether a task meets execution conditions based on task dependencies; if a task does not meet execution conditions, it is kept in the task heap to wait; if a task meets execution conditions, it is determined to be executable, and the task processing module is further determined. This dependency-based task scheduling mechanism ensures that test tasks are executed in the correct logical order, preventing inaccurate test results or system anomalies caused by incorrect execution order; and the system will not attempt to execute tasks whose preconditions are not met, reducing invalid operations.
[0026] In this embodiment, if the task is executable, the SDK module further determines whether the lower-level module needs to participate. If the lower-level module's participation is not required, the SDK module will handle the task itself; if the lower-level module's participation is required, the task will be distributed to the ATOS module. After receiving the task, the ATOS module further determines whether the FPGA module's participation is needed. This task distribution mechanism not only establishes a clear hierarchical structure for task processing, forming a top-down task allocation path from the SDK module to the ATOS module and then to the FPGA module, making the system architecture clearer and more explicit, but also optimizes the decision-making process. Higher-level modules first make simple judgments, and decisions are only delegated to lower-level modules when necessary, reducing decision delays and unnecessary inter-module communication. Furthermore, this design improves the system's maintainability and scalability. Each module has clearly defined responsibilities and boundaries, facilitating independent optimization or functional expansion for specific levels while maintaining the overall system's stability and consistency, providing a solid architectural foundation for the long-term evolution of complex testing systems.
[0027] In this embodiment, the further determination of whether the FPGA module needs to participate includes: if the FPGA module does not need to participate, the ATOS module handles the task itself; if the FPGA module needs to participate, the ATOS module assigns the task to the FPGA module for processing. This task-characteristic-based FPGA call decision mechanism achieves efficient allocation of hardware resources. Only complex tasks that truly require FPGA hardware acceleration are assigned to the FPGA module, avoiding waste of hardware resources. The ATOS module, as an intermediate layer, clarifies the system's hierarchical structure. It can independently handle system-level tasks and also serve as the control interface for the FPGA module, simplifying the overall system architecture.
[0028] In this embodiment, the process of returning the processing result to the task heap includes: when the SDK module processes a task, the processing result is directly returned to the task heap via the SDK module; when the ATOS module processes a task, the processing result is returned to the task heap sequentially via the ATOS module and the SDK module; when the FPGA module processes a task, the processing result is returned to the task heap sequentially via the FPGA module, the ATOS module, and the SDK module. This result return mechanism establishes a clear and consistent data backflow path. Regardless of the level at which a task is processed, the result ultimately needs to be returned to the task heap via the SDK module, making the data flow standardized and traceable. As the manager of the task heap, the SDK module can fully grasp the execution status and results of all tasks, which is beneficial for subsequent data analysis and test evaluation, improves the maintainability and data management efficiency of the system, and provides a reliable guarantee for high-quality test result reports.
[0029] In this embodiment, the tasks in the task stack include interdependent tasks and independent tasks. Interdependent tasks are executed sequentially according to their dependencies, while independent tasks can be executed in parallel. For example, if subtask 2 depends on the execution result of subtask 1, the system will execute subtask 1 first. Only after subtask 1 completes and stores its result in the result storage area can subtask 2 be determined to be executable. As for independent tasks, such as subtasks 3 and 4 which have no dependency relationship, they can be simultaneously assigned to different processing modules for parallel execution, greatly improving the system's processing efficiency.
[0030] Example 2 like Figure 4 As shown, this embodiment proposes an asynchronous execution system for an ATE test machine, which operates using the method described in Embodiment 1. The asynchronous execution system includes an SDK module, an ATOS module, an FPGA module, and a task stack.
[0031] Specifically, the SDK module, as the upper layer of the system and the core control module of the system, is connected to the host computer through the data bus. It is used to receive test item interface instructions from the host computer, manage the task heap, schedule and distribute tasks, and execute tasks that do not require the participation of lower-level modules.
[0032] The ATOS module, as an intermediate layer control module, is connected to the SDK module through a communication interface. It is used to execute tasks distributed by the SDK module and decide whether to further distribute the tasks to the FPGA module based on the tasks.
[0033] The FPGA module, as the underlying hardware execution module, connects to the ATOS module via a communication interface to execute tasks distributed by the ATOS module. The FPGA module has a programmable logic array, enabling parallel data processing, and is particularly suitable for executing complex testing tasks requiring hardware acceleration.
[0034] The task heap is the system's data hub, directly connected to the SDK modules. It stores and manages various tasks generated by test item interface instructions, their dependencies, and execution results. The task heap employs an efficient data structure design, comprising a task storage area and a result storage area. The task storage area stores tasks to be executed and their dependencies, while the result storage area records the processing results of completed tasks. This design enables the system to efficiently manage a large number of parallel tasks and ensures that tasks are executed in the correct dependency order.
[0035] Example 3 like Figures 2-3 As shown, this embodiment is a specific implementation based on Embodiment 1 and Embodiment 2.
[0036] In this embodiment, the host computer inputs tasks to the system via the CPU. The task stack generates four subtasks: subtask 1 is "running pattern 1, chip transmit / receive storage," subtask 2 is "error data processing," subtask 3 is "running pattern 2, chip transmit / receive storage," and subtask 4 is "temperature measurement." The execution of subtask 2 depends on subtask 1. The resources and modules to be executed for subtasks 2, 3, and 4 are independent of each other; therefore, subtasks 2, 3, and 4 are processed asynchronously.
[0037] Subtask 1 is processed by the FPGA module because pattern execution and chip transmission / reception storage require hardware acceleration and direct chip control, which suits the hardware processing capabilities of the FPGA module. Subtask 2 is processed by the SDK module because data processing mainly involves logical calculations and analysis, making direct processing by the SDK suitable. Subtask 3 is executed by the FPGA module, similar to subtask 1, requiring hardware-level chip interaction capabilities. Subtask 4 is executed by the ATOS module because temperature monitoring is a system resource call task, making processing at the ATOS operating system level most appropriate.
[0038] In the initial state, the SDK module, the ATOS module, and the FPGA module are all in an idle state, and subtask 1 is pushed as the first task to enter the judgment process.
[0039] While subtask 1 is being executed by the FPGA module, subtask 2 is pushed out and its executable status is determined. Since subtask 2 depends on the completion of subtask 1, subtask 2 is in an unexecutable state and returns to the task stack to continue waiting.
[0040] Once subtask 1 has finished executing, it is marked as "completed". Subtask 2 is then pushed for evaluation. At this point, subtask 2 is in an executable state and is assigned to the SDK module for processing.
[0041] While subtask 2 is being executed by the SDK module, subtask 3 is pushed to the module and determined to be executable. After being judged by the SDK module, subtask 3 is pushed to the ATOS module for further evaluation. Finally, subtask 3 is processed by the FPGA module.
[0042] While subtasks 2 and 3 are being processed within their respective modules, the system continues to push subtask 4 for evaluation. Once the system determines that subtask 4 is executable, it travels through the SDK module to the ATOS module for processing.
[0043] Specifically, such as Figure 3As shown, subtasks 2, 3, and 4 are executed asynchronously in different modules. Specifically, the SDK module processes subtask 2, the FPGA module processes subtask 3, and the ATOS module processes subtask 4. At this time, subtasks 2, 3, and 4 are all in the "running" state.
[0044] After the SDK module finishes processing subtask 2, the execution result is returned to the task heap and the status is updated.
[0045] After the FPGA module finishes processing subtask 3, the execution result is returned to the ATOS module, then to the SDK module, and finally to the task stack via the SDK module, where the status is updated.
[0046] After the ATOS module finishes processing subtask 4, the execution result is returned to the SDK module, and finally sent to the task heap through the SDK module, and the status is updated.
[0047] Once all tasks are completed, the subtasks in the task pile are cleared, and the system is ready to receive the next test item task.
[0048] In summary, the asynchronous execution method for ATE test machines proposed in this invention converts test item interface instructions issued by the host computer into multiple executable tasks and stores them in a task heap. The SDK module polls to determine the executability of each task and distributes them to appropriate processing modules based on their characteristics. This enables asynchronous parallel operation of the SDK module, ATOS module, and FPGA module, allowing each module to handle different test tasks simultaneously, avoiding mutual waiting between modules, and significantly improving system resource utilization. Furthermore, by managing task dependencies in the task heap, tasks without dependencies can be executed in parallel, reducing overall test time and improving the testing efficiency of the ATE test machine.
[0049] Obviously, those skilled in the art may make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if such changes and modifications fall within the scope of the claims and their equivalents, the present invention is intended to include such changes and modifications.
Claims
1. An asynchronous execution method for an ATE test machine, characterized in that, include: The SDK module generates multiple executable tasks from the test item interface instructions issued by the host computer and stores them in the task stack. The SDK module polls the tasks in the task heap to determine the executability of the tasks and the processing module. If the task is executable, the SDK module further determines whether the lower-level module should participate; Based on the judgment result, the SDK module will process the task itself, or distribute the task to the ATOS module for processing, or distribute the task to the FPGA module through the ATOS module for processing. The SDK module, the ATOS module, and the FPGA module will process the assigned task asynchronously at the same time. After the task is completed, the processing result will be returned to the task stack. Once all subtasks of the current test item are completed, the SDK module loads the task for the next test item, until all test items are completed.
2. The asynchronous execution method for an ATE test machine as described in claim 1, characterized in that, The module for determining the executability and processing of the task includes: Based on task dependencies, determine whether the task meets the execution conditions; If a task does not meet the execution conditions, it will be kept in the task heap and wait. If the task meets the execution conditions, the task is determined to be executable, and the task's processing module is further determined.
3. The asynchronous execution method for an ATE test machine as described in claim 1, characterized in that, If the task is executable, the SDK module further determines whether the lower-level module is involved, including: If the involvement of lower-level modules is not required, the SDK module will handle the task itself; If the participation of lower-level modules is required, the task will be distributed to the ATOS module. After receiving the task, the ATOS module further determines whether the FPGA module needs to participate.
4. The asynchronous execution method for an ATE test machine as described in claim 3, characterized in that, The further determination of whether the FPGA module needs to be involved includes: If the FPGA module is not required, the ATOS module will handle the process itself. If the FPGA module is required to participate, the ATOS module will assign the task to the FPGA module for processing.
5. The asynchronous execution method for an ATE test machine as described in claim 1, characterized in that, The process of returning the processing result to the task heap includes: When the SDK module processes a task, the processing result is directly returned to the task stack via the SDK module.
6. The asynchronous execution method for an ATE test machine as described in claim 5, characterized in that, The process of returning the processing result to the task heap also includes: When the ATOS module processes a task, the processing result is returned to the task stack via the ATOS module and the SDK module in sequence.
7. The asynchronous execution method for an ATE test machine as described in claim 6, characterized in that, The process of returning the processing result to the task heap also includes: When the FPGA module processes a task, the processing result is returned to the task stack via the FPGA module, the ATOS module, and the SDK module in sequence.
8. The asynchronous execution method for an ATE test machine as described in claim 1, characterized in that, The tasks in the task stack include interdependent tasks and independent tasks. Interdependent tasks are executed in the order of their dependencies, while independent tasks can be executed in parallel.
9. An asynchronous execution system for an ATE test machine, operating using the asynchronous execution method for an ATE test machine as described in any one of claims 1-8, characterized in that, include: The SDK module connects to the host computer via a data bus. It is used to receive test item interface instructions from the host computer, manage the task heap, schedule and distribute tasks, and execute tasks that do not require the participation of lower-level modules. The ATOS module connects to the SDK module via a communication interface and is used to execute tasks distributed by the SDK module, and decide whether to further distribute the tasks to the FPGA module based on the tasks. The FPGA module is connected to the ATOS module via a communication interface and is used to execute tasks distributed by the ATOS module; The task heap is used to store and manage various tasks formed by test item interface instructions, their dependencies, and execution results.
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