Chip internal multifunctional control circuit

Abstract

The invention provides a chip internal multifunctional control circuit, which comprises a current module, a shutdown module and a state control module, and is characterized in that the current module is connected with the shutdown module and the state control module through a pin A; the shutdown module is configured to output a first control signal when the voltage of the pin A is smaller than a first voltage V1, so that the chip enters a shutdown mode, and output a second control signal when the voltage of the pin A is larger than the first voltage V1; the state control module is configured to enable the chip to enter a standby mode when the shutdown module outputs a second control signal and the voltage of the pin A is larger than the first voltage V1 and smaller than the second voltage V2, control the chip to enter a soft start mode when the shutdown module outputs the second control signal and the voltage of the pin A is larger than the second voltage V2, and control the chip to enter a soft start mode when the soft start mode is finished. And enabling the chip to enter a normal operation mode. According to the invention, accurate switching of multiple modes of shutdown, standby, soft start and normal operation is realized through a single pin.

Description

Technical Field

[0001] This invention relates to the field of chip control technology, and in particular to a multifunctional control circuit inside a chip. Background Technology

[0002] In existing technologies, control chips typically possess multiple operating modes, such as power-off, standby, soft-start, and normal operation. To achieve these different operating modes, current control chips generally receive different voltage signals through multiple external pins to control their respective functional modules. For example, some chips switch between power-off and standby modes by controlling the voltage of pin 1, trigger the soft-start process by controlling the voltage of pin 2, and control the entry into normal operation by controlling the voltage of pin 3. However, since each mode requires independent pin control, this design not only increases the number of pins on the chip but also increases the complexity of the peripheral circuitry and occupies a larger chip area. This structure is not conducive to improving chip integration and is difficult to meet the current trend of miniaturization and integration in electronic devices. Summary of the Invention

[0003] The purpose of this invention is to provide a multi-functional control circuit inside a chip, which can achieve unified control of multiple operating modes of the chip through a single pin, thereby simplifying pin design and reducing chip area.

[0004] According to a first aspect of the present invention, a multi-functional control circuit for an internal chip is provided, including a current module, a power-off module, and a state control module, wherein the current module is connected to the power-off module and the state control module via pin A; The power-off module is configured to output a first control signal when the voltage of pin A is less than the first voltage V1, so that the chip enters the power-off mode, and to output a second control signal when the voltage of pin A is greater than the first voltage V1. The state control module is configured to cause the chip to enter standby mode when the power-off module outputs the second control signal and the voltage of pin A is greater than the first voltage V1 and less than the second voltage V2; to control the chip to enter soft-start mode when the power-off module outputs the second control signal and the voltage of pin A is greater than the second voltage V2; and to cause the chip to enter normal operation mode after the soft-start mode ends.

[0005] Optionally, in the state control module, the power supply voltage VCC is grounded sequentially through a first transistor Q1, a first resistor R1, and a first controllable current source G1. The base of the first transistor Q1 is connected to pin A, and both the positive and negative control terminals of the first controllable current source G1 are connected to the current module. The power supply voltage is also grounded sequentially through a second controllable current source G2 and a first switch M1. The control terminal of the first switch M1 is connected to a first node B between the first resistor R1 and the first controllable current source G1, and both the positive and negative control terminals of the second controllable current source G2 are connected to the current module. The state control module includes a first capacitor C1, with a first end of the first capacitor C1 connected to pin A and a second end of the first capacitor C1 grounded. The state control module further includes a voltage regulation unit, which is connected to the second node C between the second controllable current source G2 and the first switching transistor M1. The output terminal of the voltage regulation unit is connected to the external power circuit of the chip. The voltage regulation unit is configured to regulate the voltage of the second node C in the soft start mode until the voltage of the second node C stabilizes at a first preset value, thereby ending the soft start mode.

[0006] Optionally, the state control module further includes: The second switch M2 has its current input terminal connected to the second node C, its current output terminal grounded, and its control terminal connected to the reference voltage VR. The first preset value is the sum of the voltage difference VGS and the reference voltage VR, where the voltage difference VGS is the voltage difference between the control terminal and the current input terminal of the second switch M2.

[0007] Optionally, in the voltage regulation unit, the power supply voltage VCC is grounded in sequence through the second resistor R2, the third switch M3 and the third controllable current source G3, and the control terminal of the third switch M3 is connected to the second node C; The power supply voltage VCC is also grounded in sequence through the third resistor R3, the fourth switch M4 and the third controllable current source G3. The positive control terminal and the negative control terminal of the third controllable current source G3 are both connected to the current module. The power supply voltage VCC is also grounded sequentially through the fourth controllable current source G4 and the fifth switch M5. The control terminal of the fifth switch M5 is connected to the voltage VS, which is the output detection voltage of the external power circuit of the chip. The magnitude of the voltage VS is proportional to the output current or voltage of the external power circuit of the chip. The control terminal of the fourth switch M4 is connected to the third node D between the fourth controllable current source G4 and the fifth switch M5. Both the positive and negative control terminals of the fourth controllable current source G4 are connected to the current module. The power supply voltage VCC is also grounded in sequence through the fifth controllable current source G5 and the fourth resistor R4. The positive control terminal of the fifth controllable current source is connected to the power supply voltage VCC, and the negative control terminal is connected to the current input terminal of the fourth switch M4. The power supply voltage VCC is also grounded in sequence through the sixth controllable current source G6 and the seventh controllable current source G7. The positive control terminal of the sixth controllable current source G6 is connected to the power supply voltage VCC, the negative control terminal of the sixth controllable current source G6 is connected to the current input terminal of the third switch M3, the positive control terminal of the seventh controllable current source G7 is connected to the first terminal of the fourth resistor R4, and the negative control terminal of the seventh controllable current source G7 is connected to the second terminal of the fourth resistor R4. The fourth node E between the sixth controllable current source G6 and the seventh controllable current source G7 serves as the output terminal of the voltage regulation unit.

[0008] Optionally, the second resistor R2 has the same resistance value as the third resistor R3, the current coefficients of the fifth controllable current source G5, the sixth controllable current source G6, and the seventh controllable current source G7 are equal, and the parameters of the first switch M1, the second switch M2, and the fifth switch M5 are the same.

[0009] Optionally, in the current module, the power supply voltage VCC is grounded through the fifth resistor R5 and the first current source B1 in sequence; The power supply voltage VCC is also grounded in sequence through the eighth controllable current source G8, the second transistor Q2 and the sixth resistor R6. The positive control terminal of the eighth controllable current source G8 is connected to the first terminal of the fifth resistor R5, and the negative control terminal of the eighth controllable current source G8 is connected to the second terminal of the fifth resistor R5. The power supply voltage VCC is also grounded in sequence through the ninth controllable current source G9, the third transistor Q3 and the seventh resistor R7. The positive control terminal of the ninth controllable current source G9 is connected to the first terminal of the fifth resistor R5, and the negative control terminal of the ninth controllable current source G9 is connected to the second terminal of the fifth resistor R5. The base of the third transistor Q3 is connected to the base of the second transistor Q2, and the base of the third transistor Q3 is also connected to the collector of the third transistor Q3. The power supply voltage VCC is also grounded in sequence through the eighth resistor R8, the sixth switch M6 and the seventh resistor R7. The control terminal of the sixth switch M6 is connected to the collector of the second transistor Q2.

[0010] Optionally, the ratio of the number of the second transistor Q2 to the number of the third transistor Q3 is 1:N, where N is greater than 1, the current coefficients of the eighth controllable current source G8 and the ninth controllable current source G9 are equal, and the resistance values ​​of the sixth resistor R6 and the seventh resistor R7 are the same.

[0011] Optionally, in the current module, the power supply voltage VCC is also grounded in sequence through the tenth controllable current source G10 and the ninth resistor R9. The positive control terminal of the tenth controllable current source G10 is connected to the first terminal of the eighth resistor R8, and the negative control terminal of the tenth controllable current source G10 is connected to the second terminal of the eighth resistor R8. The power supply voltage VCC is also grounded sequentially through the tenth resistor R10 and the eleventh controllable current source G11. The positive control terminal of the eleventh controllable current source G11 is connected to the first terminal of the ninth resistor R9, and the negative control terminal of the eleventh controllable current source G11 is connected to the second terminal of the ninth resistor R9. The positive control terminal of the eleventh controllable current source G11 is connected to the positive control terminals of the first controllable current source G1 and the third controllable current source G3, and the negative control terminal of the eleventh controllable current source G11 is connected to the negative control terminals of the first controllable current source G1 and the third controllable current source G3. The power supply voltage VCC is also connected to pin A through the twelfth controllable current source G12. The positive control terminal of the twelfth controllable current source G12 is connected to the first terminal of the tenth resistor R10, and the negative control terminal of the twelfth controllable current source G12 is connected to the second terminal of the tenth resistor R10. The positive control terminal of the twelfth controllable current source G12 is connected to the positive control terminals of the second controllable current source G2 and the fourth controllable current source G4, and the negative control terminal of the twelfth controllable current source G12 is connected to the negative control terminals of the second controllable current source G2 and the fourth controllable current source G4.

[0012] Optionally, the current coefficients of the first controllable current source G1, the tenth controllable current source G10, the eleventh controllable current source G11, and the twelfth controllable current source G12 are all 1.

[0013] Optionally, the formula for the second voltage V2 is: ; Wherein, VBE1 is the voltage difference between the base and emitter of the first transistor Q1.

[0014] Optionally, in the shutdown module, the power supply voltage VCC is grounded sequentially through the thirteenth controllable current source G13, the seventh switch M7, and the eleventh resistor R11. The positive control terminal of the thirteenth controllable current source G13 is connected to the first terminal of the tenth resistor R10, the negative control terminal of the thirteenth controllable current source G13 is connected to the second terminal of the tenth resistor R10, and the control terminal of the seventh switch M7 is connected to pin A. The power supply voltage VCC is also grounded in sequence through the thirteenth controllable current source G13, the eighth switch M8 and the twelfth resistor R12. The control terminal of the eighth switch M8 is connected to the first voltage V1. The power supply voltage VCC is also grounded in sequence through the thirteenth resistor R13 and the fourteenth controllable current source G14. The positive control terminal of the fourteenth controllable current source G14 is connected to the first terminal of the twelfth resistor R12, and the negative control terminal of the fourteenth controllable current source G14 is connected to the second terminal of the twelfth resistor R12. The power supply voltage VCC is also grounded sequentially through the fifteenth controllable current source G15 and the sixteenth controllable current source G16. The positive control terminal of the fifteenth controllable current source G15 is connected to the first terminal of the thirteenth resistor R13, and the negative control terminal of the fifteenth controllable current source G15 is connected to the second terminal of the thirteenth resistor R13. The positive control terminal of the sixteenth controllable current source G16 is connected to the first terminal of the eleventh resistor R11, and the negative control terminal of the sixteenth controllable current source G16 is connected to the second terminal of the eleventh resistor R11. The fifth node F between the fifteenth controllable current source G15 and the sixteenth controllable current source G16 serves as the output terminal of the shutdown module.

[0015] Optionally, the current coefficients of the fourteenth controllable current source G14, the fifteenth controllable current source G15, and the sixteenth controllable current source G16 are equal.

[0016] According to the present invention, by integrating multiple functional modules inside the chip and controlling different operating states of the chip by combining the voltage changes of a single pin, precise switching between multiple modes such as power off, standby, soft start, and normal operation can be achieved. This avoids the structural design of multi-pin distributed control in traditional solutions, significantly simplifies the chip's peripheral circuitry, reduces circuit complexity, and thus effectively reduces chip size and improves system integration. Furthermore, the multi-functional control circuit inside the chip provided in this application, through a single state control module, achieves both soft start control of the circuit and steady-state output adjustment capability after the circuit enters normal operating state, improving module utilization efficiency and overall control performance.

[0017] Furthermore, by rationally designing key circuit parameters, the second voltage V2 achieves zero temperature drift, effectively offsetting the impact of temperature changes on circuit operation. This design not only improves the stability of the control logic, preventing malfunctions or logic errors caused by the second voltage V2 falling below the first voltage V1 due to temperature drift, but also ensures that the chip maintains consistent startup behavior across the entire temperature range, thereby significantly enhancing the system's reliability and environmental adaptability.

[0018] Furthermore, by rationally configuring key current sources, resistors, and switching devices in each module, stable output of the control signal and suppression of temperature drift are effectively ensured, enhancing the consistency and reliability of the chip under different temperature environments. Simultaneously, this control circuit simplifies the configuration of peripheral circuits, reduces system complexity, effectively shrinks the chip size, and improves the overall system integration level and engineering applicability.

[0019] The above description is merely an overview of the technical solution of the present invention. In order to better understand the technical means of the present invention and to implement it in accordance with the contents of the specification, the preferred embodiments of the present invention are described in detail below. Attached Figure Description

[0020] Figure 1 A schematic diagram of the structure of a multi-functional control circuit inside a chip according to an embodiment of the present invention is shown; Figure 2 A circuit topology diagram of a current module 100 and a state control module 300 according to an embodiment of the present invention is shown; Figure 3 It shows Figure 2 The waveform of the voltage VC at the second node C changes over time after the first transistor Q1 is turned on; Figure 4 A circuit topology diagram of a shutdown module 200 according to an embodiment of the present invention is shown. Detailed Implementation

[0021] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application will be described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the scope of this application. Furthermore, it should be noted that, for ease of description, only the parts relevant to this application are shown in the accompanying drawings, not the entire structure. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without inventive effort are within the scope of protection of this application.

[0022] The terms “comprising” and “having”, and any variations thereof, used in this application are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the steps or units listed, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to such process, method, product, or apparatus.

[0023] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0024] Figure 1 A schematic diagram of a multi-functional control circuit inside a chip according to an embodiment of the present invention is shown. Figure 1 As shown, the internal multi-functional control circuit of the chip includes a current module 100, a power-off module 200, and a state control module 300. The current module 100 is connected to the power-off module 200 and the state control module 300 via pin A. The power-off module 200 is configured to output a first control signal when the voltage at pin A is less than a first voltage V1, causing the chip to enter a power-off mode, and to output a second control signal when the voltage at pin A is greater than the first voltage V1. The state control module is configured to cause the chip to enter a standby mode when the power-off module outputs the second control signal and the voltage at pin A is greater than the first voltage V1 and less than the second voltage V2; and to control the chip to enter a soft-start mode when the power-off module outputs the second control signal and the voltage at pin A is greater than the second voltage V2. After the soft-start mode ends, the chip enters a normal operating mode.

[0025] Specifically, when the chip is operating normally, pin A is not externally connected to a voltage. Under the coordinated action of the current module 100 and the state control module 300, the voltage of pin A is greater than the second voltage V2, that is, the voltage of pin A is greater than the first voltage V1. At this point, the shutdown module 200 outputs a second control signal, and the chip first enters a soft-start mode, and then enters the normal operating mode after the soft-start process is completed. When the external voltage of pin A is less than the first voltage V1, the shutdown module 200 outputs a first control signal, causing the chip to enter a shutdown mode. When the external voltage of pin A is between the first voltage V1 and the second voltage V2, the shutdown module 200 outputs a second control signal, and together with the state control module 300, controls the chip to enter a standby mode. Therefore, it can be seen that by simply setting the voltage range of pin A, the switching control of multiple operating modes of the chip can be achieved.

[0026] According to the above embodiments, this invention integrates multiple functional modules within the chip and controls different operating states of the chip by combining the voltage changes of a single pin. This enables precise switching between multiple modes such as power-off, standby, soft-start, and normal operation, avoiding the distributed control structure of multiple pins in traditional solutions. This significantly simplifies the chip's peripheral circuitry, reduces circuit complexity, effectively shrinks the chip size, and improves system integration. Furthermore, the multi-functional control circuit within the chip provided in this application, through a single state control module 300, achieves both soft-start control of the circuit and steady-state output adjustment capability after the circuit enters normal operating mode, improving module utilization efficiency and overall control performance.

[0027] Figure 2 A circuit topology diagram of a current module 100 and a state control module 300 according to an embodiment of the present invention is shown. Figure 2 As shown, in the current module 100, the power supply voltage VCC is grounded sequentially through the fifth resistor R5 and the first current source B1. The power supply voltage VCC is also grounded sequentially through the eighth controllable current source G8, the second transistor Q2, and the sixth resistor R6. The positive control terminal of the eighth controllable current source G8 is connected to the first terminal of the fifth resistor R5, and the negative control terminal of the eighth controllable current source G8 is connected to the second terminal of the fifth resistor R5. The power supply voltage VCC is also grounded sequentially through the ninth controllable current source G9, the third transistor Q3, and the seventh resistor R7. The positive control terminal of the ninth controllable current source G9 is connected to the first terminal of the fifth resistor R5, and the negative control terminal of the ninth controllable current source G9 is connected to the second terminal of the fifth resistor R5. The base of the third transistor Q3 is connected to the base of the second transistor Q2, and the base of the third transistor Q3 is also connected to the collector of the third transistor Q3. The power supply voltage VCC is also grounded in sequence through the eighth resistor R8, the sixth switch M6 and the seventh resistor R7. The control terminal of the sixth switch M6 is connected to the collector of the second transistor Q2.

[0028] In one embodiment, the ratio of the number of second transistors Q2 to the number of third transistors Q3 is 1:N, where N is greater than 1, the current coefficients of the eighth controllable current source G8 and the ninth controllable current source G9 are equal, and the resistance values ​​of the sixth resistor R6 and the seventh resistor R7 are the same.

[0029] In one embodiment, reference Figure 2In the current module 100, the power supply voltage VCC is also grounded sequentially through the tenth controllable current source G10 and the ninth resistor R9. The positive control terminal of the tenth controllable current source G10 is connected to the first terminal of the eighth resistor R8, and the negative control terminal of the tenth controllable current source G10 is connected to the second terminal of the eighth resistor R8. The power supply voltage VCC is also grounded sequentially through the tenth resistor R10 and the eleventh controllable current source G11. The positive control terminal of the eleventh controllable current source G11 is connected to the first terminal of the ninth resistor R9, and the negative control terminal of the eleventh controllable current source G11 is connected to the second terminal of the ninth resistor R9. The positive control terminal of the eleventh controllable current source G11 is also connected to the positive control terminals of the first controllable current source G1 and the third controllable current source G3, and the negative control terminal of the eleventh controllable current source G11 is also connected to the negative control terminals of the first controllable current source G1 and the third controllable current source G3. The power supply voltage VCC is also connected to pin A through the twelfth controllable current source G12. The positive control terminal of the twelfth controllable current source G12 is connected to the first terminal of the tenth resistor R10, and the negative control terminal of the twelfth controllable current source G12 is connected to the second terminal of the tenth resistor R10. The positive control terminal of the twelfth controllable current source G12 is connected to the positive control terminals of the second controllable current source G2 and the fourth controllable current source G4, and the negative control terminal of the twelfth controllable current source G12 is connected to the negative control terminals of the second controllable current source G2 and the fourth controllable current source G4.

[0030] In one embodiment, the current coefficients of the first controllable current source G1, the tenth controllable current source G10, the eleventh controllable current source G11, and the twelfth controllable current source G12 are all 1.

[0031] According to the above embodiment, the working principle of the current module 100 is as follows: After the circuit is powered on, current is generated in the first current source B1. This current flows through the fifth resistor R5, generating a voltage drop across it. The eighth controllable current source G8 and the ninth controllable current source G9 generate the first current I1 and the second current I2 respectively based on this voltage drop. Since the current coefficients of the eighth controllable current source G8 and the ninth controllable current source G9 are equal, the first current I1 is equal to the second current I2. At this time, the ninth controllable current source G9 pulls up the base voltage of the second transistor Q2 and the third transistor Q3, making them conduct. Since the sixth switch M6 is not conducting when the circuit is first powered on, the first current I1 and the second current I2 flow entirely into the second transistor Q2 and the third transistor Q3, respectively. Since the resistances of the sixth resistor R6 and the seventh resistor R7 are equal, the voltage difference between the base and emitter of the second transistor Q2 is equal to the voltage difference between the base and emitter of the third transistor Q3, i.e., VBE2 = VBE3. However, since the ratio of the number of second transistors Q2 to the number of third transistors Q3 is 1:N (N>1), when the current flowing through the second transistors Q2 and Q3 is the same, the voltage difference VBE2 required for the second transistor Q2 must be greater than the voltage difference VBE3 required for the third transistor Q3. Furthermore, since the base voltage of the second transistor Q2 and the third transistor Q3 is determined by the third transistor Q3, the actual voltage difference VBE2 obtained by the second transistor Q2 is less than the turn-on voltage required for the first current I1 to flow. This results in the actual current flowing through the second transistor Q2 being less than the first current I1, thereby raising the control terminal voltage of the sixth switch M6 and turning it on. When the sixth switch M6 is turned on, current flows into the seventh resistor R7 from the branch formed by the eighth resistor R8 and the sixth switch M6. The voltage across the seventh resistor R7 (i.e., the emitter voltage of the third transistor Q3) is gradually increased. Since the current flowing through the third transistor Q3 is still the second current I2, the voltage difference between the base and emitter of the third transistor Q3 remains unchanged. Therefore, as the voltage across the seventh resistor R7 gradually increases, i.e., the emitter voltage of the third transistor Q3 gradually increases, its base voltage also gradually increases, i.e., the base voltage of the second transistor Q2 also gradually increases. In this process, if the current flowing through the second transistor Q2 remains unchanged, but the voltage difference between the base and emitter of the second transistor Q2 increases, then there is a contradiction; if the current flowing through the second transistor Q2 decreases, but the voltage difference between the base and emitter of the second transistor Q2 increases, then there is also a contradiction. Therefore, as the base voltage of the second transistor Q2 gradually increases, its conduction capability strengthens, and the current flowing through the second transistor Q2 gradually increases. When the current flowing through the second transistor Q2 increases to exceed the first current I1, the sixth switch M6 turns off. After the sixth switch M6 turns off, the base voltage of the second transistor Q2 decreases, the current flowing through the second transistor Q2 decreases, and the sixth switch M6 turns back on.This process is repeated until the circuit reaches a stable state. At this point, the current flowing through the second transistor Q2 is equal to the first current I1, and the sixth switch M6 remains on. Let I0 be the current generated in the branch consisting of the eighth resistor R8 and the sixth switch M6. Since I1=I2 and R6=R7, we can obtain .

[0032] Subsequently, current I0 flows through the eighth resistor R8, creating a voltage drop across it. This voltage drop causes the tenth controllable current source G10 to generate a current equal to the magnitude of current I0. This current flows into the ninth resistor R9, causing the eleventh controllable current source G11 to generate a current equal to the magnitude of current I0. This current continues to flow through the tenth resistor R10, causing the twelfth controllable current source G12 to generate a charging current IC equal to the magnitude of current I0. .

[0033] In one embodiment, reference Figure 2 In the state control module 300, the power supply voltage VCC is grounded sequentially through a first transistor Q1, a first resistor R1, and a first controllable current source G1. The base of the first transistor Q1 is connected to pin A. The power supply voltage is also grounded sequentially through a second controllable current source G2 and a first switch M1. The control terminal of the first switch M1 is connected to a first node B between the first resistor R1 and the first controllable current source G1. The state control module 300 includes a first capacitor C1, with its first terminal connected to pin A and its second terminal grounded. The state control module 300 also includes a voltage regulation unit 310, which is connected to a second node C between the second controllable current source G2 and the first switch M1. The output terminal of the voltage regulation unit 310 is connected to an external power circuit. The voltage regulation unit 310 is configured to regulate the voltage of the second node C in soft-start mode until the voltage of the second node C stabilizes at a first preset value, thus ending the soft-start mode.

[0034] In one embodiment, reference Figure 2 The state control module 300 also includes a second switching transistor M2, whose current input terminal is connected to the second node C, its current output terminal is grounded, and its control terminal is connected to the reference voltage VR. The first preset value is the sum of the voltage difference VGS and the reference voltage VR, where the voltage difference VGS is the voltage difference between the control terminal and the current input terminal of the second switching transistor M2.

[0035] In one embodiment, reference Figure 2In the voltage regulation unit 310, the power supply voltage VCC is grounded sequentially through the second resistor R2, the third switch M3, and the third controllable current source G3. The control terminal of the third switch M3 is connected to the second node C. The power supply voltage VCC is also grounded sequentially through the third resistor R3, the fourth switch M4, and the third controllable current source G3. The power supply voltage VCC is also grounded sequentially through the fourth controllable current source G4 and the fifth switch M5. The control terminal of the fifth switch M5 is connected to voltage VS, which is the output detection voltage of the external power circuit. The magnitude of voltage VS is proportional to the output current or voltage of the external power circuit. The control terminal of the fourth switch M4 is connected to the third node D between the fourth controllable current source G4 and the fifth switch M5. The power supply voltage VCC is also grounded sequentially through the fifth controllable current source G5 and the fourth resistor R4. The positive control terminal of the fifth controllable current source is connected to the power supply voltage VCC, and the negative control terminal is connected to the current input terminal of the fourth switch M4. The power supply voltage VCC is also grounded sequentially through the sixth controllable current source G6 and the seventh controllable current source G7. The positive control terminal of the sixth controllable current source G6 is connected to the power supply voltage VCC, and the negative control terminal of the sixth controllable current source G6 is connected to the current input terminal of the third switching transistor M3. The positive control terminal of the seventh controllable current source G7 is connected to the first terminal of the fourth resistor R4, and the negative control terminal of the seventh controllable current source G7 is connected to the second terminal of the fourth resistor R4. The fourth node E between the sixth controllable current source G6 and the seventh controllable current source G7 serves as the output terminal of the voltage regulation unit 310.

[0036] In one embodiment, the second resistor R2 and the third resistor R3 have the same resistance value, and the current coefficients of the fifth controllable current source G5, the sixth controllable current source G6, and the seventh controllable current source G7 are equal, preferably 1. The parameters of the first switch M1, the second switch M2, and the fifth switch M5 are the same, preferably MOSFETs, so the gate-source voltage difference of the first switch M1, the second switch M2, and the fifth switch M5 after conduction is VGS.

[0037] According to the above embodiment, the working principle of the state control module 300 is as follows: After the charging current IC is generated, it charges the first capacitor C1, causing the voltage at pin A to gradually rise to the second voltage V2. When the voltage at pin A reaches the second voltage V2, the first transistor Q1 is turned on. Since current has already flowed through the ninth resistor R9, both the first controllable current source G1 and the third controllable current source G3 remain on, and the voltage at the first node B is pulled to ground potential (GND). During the conduction of the first transistor Q1, a conduction current ID equal to the current I0 is generated in the first controllable current source G1. This conduction current ID flows sequentially through the first transistor Q1 and the first resistor R1. Therefore, the second voltage V2 satisfies the formula... VBE1 represents the voltage difference between the base and emitter of the first transistor Q1. Given that VBE1 has the opposite temperature coefficient to the thermal voltage VT, and that the seventh resistor R7 has the same temperature coefficient as the first resistor R1, zero temperature drift of the second voltage V2 can be achieved through proper parameter design. This design significantly improves the reliability of the chip's internal multi-functional control circuit, avoiding control logic anomalies caused by the second voltage V2 falling below the first voltage V1 due to temperature drift, while ensuring consistent startup characteristics of the chip across the entire temperature range.

[0038] Meanwhile, since current has already flowed through the tenth resistor R10, both the second controllable current source G2 and the fourth controllable current source G4 remain on. The current input voltages of the first switch M1 and the second switch M2 are pulled up to the power supply voltage by the on-state second controllable current source G2, while the voltage VB of the first node B is pulled to GND. However, when the first transistor Q1 is just turned on, the voltage VB of the first node B is lower than the reference voltage VR, so the first switch M1 is turned on. At this time, the gate-source voltage difference of the on-state first switch M1 is VGS, so the voltage VC of the second node C can be expressed as VC = VB + VGS. Since the voltage difference between the voltage VA of pin A and the voltage VB of the first node B is always maintained at the second voltage V2, as the charging current IC continues to charge the first capacitor C1, the voltage VA of pin A gradually increases, while the voltage VB of the first node B gradually increases from GND. When the voltage VB of the first node B rises above the reference voltage VR, the first switch M1 turns off, and the second switch M2 turns on. At this time, the voltage VC at the second node C remains at VR + VGS.

[0039] When the circuit is first powered on, the output of the external power circuit is 0, so the output detection voltage VS of the external power circuit is 0. Simultaneously, the fourth controllable current source G4 turns on, pulling up the input voltage of the fifth switch M5, causing it to turn on. Since the gate-source voltage difference of the fifth switch M5 after it turns on is VGS, the voltage VD at the third node D satisfies VD = VS + VGS. At this time, the current output voltages of the third switch M3 and the fourth switch M4 are pulled down by the turned-on third controllable current source G3. Therefore, when the voltage VC at the second node C is higher than VGS, the third switch M3 turns on, and when the voltage VD at the third node D exceeds VGS, the fourth switch M4 turns on.

[0040] As analyzed above, when the first transistor Q1 is turned on, the voltage VB at the first node B gradually increases from GND, causing the voltage VC at the second node C to be greater than VGS, thus turning on the third switch M3. At this time, current is generated in the second resistor R2, forming a voltage drop across it, which turns on the sixth controllable current source G6, thereby raising the first output signal voltage VG1 of the control circuit. This signal controls the external power circuit of the chip to start working, causing the output detection voltage VS of the external power circuit to gradually increase, thus making the voltage VD at the third node D greater than VGS, turning on the fourth switch M4. Therefore, current flows through the third resistor R3, and a voltage drop is generated across it, turning on the fifth controllable current source G5. At the same time, current flows through the fourth resistor R4, thus generating current in the seventh controllable current source G7. Since the current coefficients of the fifth controllable current source G5, the sixth controllable current source G6, and the seventh controllable current source G7 are all 1, the current flowing through the sixth controllable current source G6 is equal to the current flowing through the third switch M3, and the current flowing through the seventh controllable current source G7 is equal to the current flowing through the fourth switch M4. Therefore, when the output detection voltage VS of the external power circuit rises to a level where the voltage VD of the third node D is greater than the voltage VC of the second node C, the current flowing through the fourth switch M4 is greater than the current flowing through the third switch M3, thereby pulling down the first output signal voltage VG1 of the control circuit. The external power circuit stops working, and the output detection voltage VS of the external power circuit decreases accordingly. Subsequently, the voltage VD of the third node D drops below the voltage VC of the second node C, the external power circuit restarts, and the output detection voltage VS of the external power circuit rises again. Therefore, under the control of the state control module 300, the output detection voltage VS of the external power circuit is controlled by the voltage VC of the second node C, thus achieving effective regulation of the output voltage or output current of the external power circuit by the voltage VC of the second node C.

[0041] In summary, when the voltage at pin A is charged to the second voltage V2, the first transistor Q1 turns on, and the voltage at pin A begins to rise from the second voltage V2. The voltage at the first node B rises from 0 along with the voltage at pin A, and the voltage at the second node C rises from VGS along with the voltage at the first node B. When the voltage at the second node C rises to VR+VGS, the voltage VC at the second node C stabilizes at VR+VGS. During the gradual increase of the voltage at the second node C, the output detection voltage VS of the external power circuit is always controlled by the voltage VC at the second node C (which can also be understood as indirectly controlled by the voltage VB at the first node B or the voltage VA at pin A). That is, the output voltage or output current of the external power circuit is controlled by the voltage VC at the second node C. Therefore, the output voltage or output current of the external power circuit gradually increases from 0 along with the voltage at the second node C, achieving a smooth start-up. When the voltage of the second node C rises to VR+VGS, the soft-start process is completed. After that, the external power circuit of the chip enters the normal operation mode. The state control module 300 dynamically adjusts the output voltage or output current of the external power circuit according to the set value of the reference voltage VR to ensure stable and reliable system operation.

[0042] Figure 3 It shows Figure 2 The waveform of the voltage VC at the second node C after the first transistor Q1 is turned on reflects the voltage change at the second node C during the soft-start phase. Since the output of the external power circuit is controlled by the voltage at this second node C, the trend of its output voltage or output current changes is similar to... Figure 3 The waveforms shown are consistent.

[0043] Figure 4 A circuit topology diagram of a shutdown module 200 according to an embodiment of the present invention is shown. Figure 4As shown, in the shutdown module 200, the power supply voltage VCC is grounded sequentially through the thirteenth controllable current source G13, the seventh switch M7, and the eleventh resistor R11. The positive control terminal of the thirteenth controllable current source G13 is connected to the first terminal of the tenth resistor R10, and the negative control terminal of the thirteenth controllable current source G13 is connected to the second terminal of the tenth resistor R10. The control terminal of the seventh switch M7 is connected to pin A. The power supply voltage VCC is also grounded sequentially through the thirteenth controllable current source G13, the eighth switch M8, and the twelfth resistor R12. The control terminal of the eighth switch M8 is connected to the first voltage V1. The power supply voltage VCC is also grounded sequentially through the thirteenth resistor R13 and the fourteenth controllable current source G14. The positive control terminal of the fourteenth controllable current source G14 is connected to the first terminal of the twelfth resistor R12, and the negative control terminal of the fourteenth controllable current source G14 is connected to the second terminal of the twelfth resistor R12. The power supply voltage VCC is also grounded sequentially through the fifteenth controllable current source G15 and the sixteenth controllable current source G16. The positive control terminal of the fifteenth controllable current source G15 is connected to the first terminal of the thirteenth resistor R13, and the negative control terminal of the fifteenth controllable current source G15 is connected to the second terminal of the thirteenth resistor R13. The positive control terminal of the sixteenth controllable current source G16 is connected to the first terminal of the eleventh resistor R11, and the negative control terminal of the sixteenth controllable current source G16 is connected to the second terminal of the eleventh resistor R11. The fifth node F between the fifteenth controllable current source G15 and the sixteenth controllable current source G16 serves as the output terminal of the shutdown module 200.

[0044] In this embodiment, the shutdown module 200 operates as follows: When the chip is in normal working condition, pin A has no external voltage. At this time, under the combined action of the current module 100 and the state control module 300, the voltage of pin A is greater than the second voltage V2, that is, the voltage of pin A is greater than the first voltage V1. Therefore, the shutdown module 200 outputs a high-level second output signal voltage VG2. This high-level output signal voltage VG2 corresponds to the second control signal output by the shutdown module 200, and the low-level output signal voltage VG2 corresponds to the first control signal output by the shutdown module 200. Simultaneously, under the control of the state control module 300, the external power circuit of the chip completes the soft-start process. Afterward, the external power circuit enters normal operating mode, adjusting the output voltage or output current according to the magnitude of the reference voltage VR.

[0045] When an input voltage less than the first voltage V1 is applied to the chip pin, i.e., when the voltage at pin A is less than the first voltage V1, the gate-source voltage difference of the seventh switch M7 is greater than that of the eighth switch M8. Therefore, the current flowing through the eleventh resistor R11 is greater than the current flowing through the twelfth resistor R12. Simultaneously, since the current coefficients of the fourteenth controllable current source G14, the fifteenth controllable current source G15, and the sixteenth controllable current source G16 are equal, combined with... Figure 4 As shown in the circuit structure, the current flowing through the eleventh resistor R11 is equal to the current generated by the sixteenth controllable current source G16, and the current flowing through the twelfth resistor R12 is equal to the current generated by the fifteenth controllable current source G15. Therefore, when an input voltage less than the first voltage V1 is applied to the chip pin, the current generated by the sixteenth controllable current source G16 is greater than the current generated by the fifteenth controllable current source G15, thereby pulling down the second output signal voltage VG2 of the control circuit. The chip is in shutdown mode according to this low-level second output signal.

[0046] When an input voltage greater than the first voltage V1 and less than the second voltage V2 is applied to the chip pin, that is, when the voltage at pin A is greater than the first voltage V1, the gate-source voltage difference of the seventh switch M7 is less than the gate-source voltage difference of the eighth switch M8, and the current flowing through the eleventh resistor R11 is less than the current flowing through the twelfth resistor R12. Therefore, at this time, the current generated in the sixteenth controllable current source G16 is less than the current generated in the fifteenth controllable current source G15, thereby pulling up the second output signal voltage VG2 of the control circuit. Simultaneously, because the voltage at pin A is less than the second voltage V2, the... Figure 2 As shown in the circuit structure and related principle analysis, the first transistor Q1 is in the off state at this time. Therefore, the voltage of the first node B is always pulled down to GND, so that the output detection voltage VS of the external power circuit of the chip is always 0, that is, to ensure that the external power circuit of the chip has no output voltage or output current. In other words, the chip is in standby mode at this time.

[0047] According to embodiments of the present invention, by rationally configuring key current sources, resistors, and switching devices in each module, stable output of control signals and suppression of temperature drift are effectively ensured, enhancing the consistency and reliability of the chip under different temperature environments. Simultaneously, this control circuit simplifies the configuration of peripheral circuits, reduces system complexity, effectively shrinks chip size, and improves the overall system integration level and engineering applicability.

[0048] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0049] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.

Claims

1. A multi-functional control circuit inside a chip, characterized in that, It includes a current module, a shutdown module, and a status control module, wherein the current module is connected to the shutdown module and the status control module via pin A; The power-off module is configured to output a first control signal when the voltage of pin A is less than the first voltage V1, so that the chip enters the power-off mode, and to output a second control signal when the voltage of pin A is greater than the first voltage V1. The state control module is configured to cause the chip to enter standby mode when the power-off module outputs the second control signal and the voltage of pin A is greater than the first voltage V1 and less than the second voltage V2; to control the chip to enter soft-start mode when the power-off module outputs the second control signal and the voltage of pin A is greater than the second voltage V2; and to cause the chip to enter normal operation mode after the soft-start mode ends.

2. The multi-functional control circuit inside the chip according to claim 1, characterized in that, In the state control module, the power supply voltage VCC is grounded in sequence through the first transistor Q1, the first resistor R1 and the first controllable current source G1. The base of the first transistor Q1 is connected to the pin A, and the positive control terminal and the negative control terminal of the first controllable current source G1 are both connected to the current module. The power supply voltage is also grounded through the second controllable current source G2 and the first switch M1 in sequence. The control terminal of the first switch M1 is connected to the first node B between the first resistor R1 and the first controllable current source G1. The positive control terminal and the negative control terminal of the second controllable current source G2 are both connected to the current module. The state control module includes a first capacitor C1, with a first end of the first capacitor C1 connected to pin A and a second end of the first capacitor C1 grounded. The state control module further includes a voltage regulation unit, which is connected to the second node C between the second controllable current source G2 and the first switching transistor M1. The output terminal of the voltage regulation unit is connected to the external power circuit of the chip. The voltage regulation unit is configured to regulate the voltage of the second node C in the soft start mode until the voltage of the second node C stabilizes at a first preset value, thereby ending the soft start mode.

3. The multi-functional control circuit inside the chip according to claim 2, characterized in that, The status control module also includes: The second switch M2 has its current input terminal connected to the second node C, its current output terminal grounded, and its control terminal connected to the reference voltage VR. The first preset value is the sum of the voltage difference VGS and the reference voltage VR, where the voltage difference VGS is the voltage difference between the control terminal and the current input terminal of the second switch M2.

4. The multi-functional control circuit inside the chip according to claim 3, characterized in that, In the voltage regulation unit, the power supply voltage VCC is grounded in sequence through the second resistor R2, the third switch M3 and the third controllable current source G3, and the control terminal of the third switch M3 is connected to the second node C; The power supply voltage VCC is also grounded in sequence through the third resistor R3, the fourth switch M4 and the third controllable current source G3. The positive control terminal and the negative control terminal of the third controllable current source G3 are both connected to the current module. The power supply voltage VCC is also grounded sequentially through the fourth controllable current source G4 and the fifth switch M5. The control terminal of the fifth switch M5 is connected to the voltage VS, which is the output detection voltage of the external power circuit of the chip. The magnitude of the voltage VS is proportional to the output current or voltage of the external power circuit of the chip. The control terminal of the fourth switch M4 is connected to the third node D between the fourth controllable current source G4 and the fifth switch M5. Both the positive and negative control terminals of the fourth controllable current source G4 are connected to the current module. The power supply voltage VCC is also grounded in sequence through the fifth controllable current source G5 and the fourth resistor R4. The positive control terminal of the fifth controllable current source is connected to the power supply voltage VCC, and the negative control terminal is connected to the current input terminal of the fourth switch M4. The power supply voltage VCC is also grounded in sequence through the sixth controllable current source G6 and the seventh controllable current source G7. The positive control terminal of the sixth controllable current source G6 is connected to the power supply voltage VCC, the negative control terminal of the sixth controllable current source G6 is connected to the current input terminal of the third switch M3, the positive control terminal of the seventh controllable current source G7 is connected to the first terminal of the fourth resistor R4, and the negative control terminal of the seventh controllable current source G7 is connected to the second terminal of the fourth resistor R4. The fourth node E between the sixth controllable current source G6 and the seventh controllable current source G7 serves as the output terminal of the voltage regulation unit.

5. The multi-functional control circuit inside the chip according to claim 4, characterized in that, The second resistor R2 has the same resistance value as the third resistor R3. The current coefficients of the fifth controllable current source G5, the sixth controllable current source G6, and the seventh controllable current source G7 are equal. The parameters of the first switch M1, the second switch M2, and the fifth switch M5 are the same.

6. The multi-functional control circuit inside the chip according to claim 5, characterized in that, In the current module, the power supply voltage VCC is grounded through the fifth resistor R5 and the first current source B1 in sequence; The power supply voltage VCC is also grounded in sequence through the eighth controllable current source G8, the second transistor Q2 and the sixth resistor R6. The positive control terminal of the eighth controllable current source G8 is connected to the first terminal of the fifth resistor R5, and the negative control terminal of the eighth controllable current source G8 is connected to the second terminal of the fifth resistor R5. The power supply voltage VCC is also grounded in sequence through the ninth controllable current source G9, the third transistor Q3 and the seventh resistor R7. The positive control terminal of the ninth controllable current source G9 is connected to the first terminal of the fifth resistor R5, and the negative control terminal of the ninth controllable current source G9 is connected to the second terminal of the fifth resistor R5. The base of the third transistor Q3 is connected to the base of the second transistor Q2, and the base of the third transistor Q3 is also connected to the collector of the third transistor Q3. The power supply voltage VCC is also grounded in sequence through the eighth resistor R8, the sixth switch M6 and the seventh resistor R7. The control terminal of the sixth switch M6 is connected to the collector of the second transistor Q2.

7. The multi-functional control circuit inside the chip according to claim 6, characterized in that, The ratio of the number of the second transistor Q2 to the number of the third transistor Q3 is 1:N, where N is greater than 1. The current coefficients of the eighth controllable current source G8 and the ninth controllable current source G9 are equal, and the resistance values ​​of the sixth resistor R6 and the seventh resistor R7 are the same.

8. The multi-functional control circuit inside the chip according to claim 7, characterized in that, In the current module, the power supply voltage VCC is also grounded in sequence through the tenth controllable current source G10 and the ninth resistor R9. The positive control terminal of the tenth controllable current source G10 is connected to the first terminal of the eighth resistor R8, and the negative control terminal of the tenth controllable current source G10 is connected to the second terminal of the eighth resistor R8. The power supply voltage VCC is also grounded sequentially through the tenth resistor R10 and the eleventh controllable current source G11. The positive control terminal of the eleventh controllable current source G11 is connected to the first terminal of the ninth resistor R9, and the negative control terminal of the eleventh controllable current source G11 is connected to the second terminal of the ninth resistor R9. The positive control terminal of the eleventh controllable current source G11 is connected to the positive control terminals of the first controllable current source G1 and the third controllable current source G3, and the negative control terminal of the eleventh controllable current source G11 is connected to the negative control terminals of the first controllable current source G1 and the third controllable current source G3. The power supply voltage VCC is also connected to pin A through the twelfth controllable current source G12. The positive control terminal of the twelfth controllable current source G12 is connected to the first terminal of the tenth resistor R10, and the negative control terminal of the twelfth controllable current source G12 is connected to the second terminal of the tenth resistor R10. The positive control terminal of the twelfth controllable current source G12 is connected to the positive control terminals of the second controllable current source G2 and the fourth controllable current source G4, and the negative control terminal of the twelfth controllable current source G12 is connected to the negative control terminals of the second controllable current source G2 and the fourth controllable current source G4.

9. The multi-functional control circuit inside the chip according to claim 8, characterized in that, The current coefficients of the first controllable current source G1, the tenth controllable current source G10, the eleventh controllable current source G11, and the twelfth controllable current source G12 are all 1.

10. The multi-functional control circuit inside the chip according to claim 9, characterized in that, The formula for the second voltage V2 is: ； Wherein, VBE1 is the voltage difference between the base and emitter of the first transistor Q1.

11. The multi-functional control circuit inside the chip according to claim 10, characterized in that, In the shutdown module, the power supply voltage VCC is grounded sequentially through the thirteenth controllable current source G13, the seventh switch M7, and the eleventh resistor R11. The positive control terminal of the thirteenth controllable current source G13 is connected to the first terminal of the tenth resistor R10, and the negative control terminal of the thirteenth controllable current source G13 is connected to the second terminal of the tenth resistor R10. The control terminal of the seventh switch M7 is connected to pin A. The power supply voltage VCC is also grounded in sequence through the thirteenth controllable current source G13, the eighth switch M8 and the twelfth resistor R12. The control terminal of the eighth switch M8 is connected to the first voltage V1. The power supply voltage VCC is also grounded in sequence through the thirteenth resistor R13 and the fourteenth controllable current source G14. The positive control terminal of the fourteenth controllable current source G14 is connected to the first terminal of the twelfth resistor R12, and the negative control terminal of the fourteenth controllable current source G14 is connected to the second terminal of the twelfth resistor R12. The power supply voltage VCC is also grounded sequentially through the fifteenth controllable current source G15 and the sixteenth controllable current source G16. The positive control terminal of the fifteenth controllable current source G15 is connected to the first terminal of the thirteenth resistor R13, and the negative control terminal of the fifteenth controllable current source G15 is connected to the second terminal of the thirteenth resistor R13. The positive control terminal of the sixteenth controllable current source G16 is connected to the first terminal of the eleventh resistor R11, and the negative control terminal of the sixteenth controllable current source G16 is connected to the second terminal of the eleventh resistor R11. The fifth node F between the fifteenth controllable current source G15 and the sixteenth controllable current source G16 serves as the output terminal of the shutdown module.

12. The multi-functional control circuit inside the chip according to claim 11, characterized in that, The current coefficients of the fourteenth controllable current source G14, the fifteenth controllable current source G15, and the sixteenth controllable current source G16 are equal.

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