An LDO, chip and circuit suitable for a car-grade high-voltage BCD process

Abstract

The application relates to an LDO, a chip and a circuit suitable for a vehicle-grade high-voltage BCD process, the LDO comprising: an input module, a driving module, a gain module, a compensation module and an output module which are electrically connected with each other; a first response path and a second response path are formed to perform double-path response, adjust the current of a node in a high-voltage domain and drive a power tube HV_Power_MOS. The application provides a bidirectional fast transient response function, performs double-path voltage fast adjustment, and in the case that the internal load capacitance range of the vehicle-grade chip is 10 pF-1 uF, the bidirectional current change speed that can be provided is 0-(50-200) mA / 1 us, and the maximum change of the output voltage should not exceed + / -10%.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of intelligent chips, and particularly relates to an LDO, a chip and a circuit suitable for a vehicle-grade high-voltage BCD process. BACKGROUND

[0002] As a core component of power management chips, low-dropout linear regulator LDO has been widely used in various electronic systems for a long time, and its core task is to provide stable and clean low-voltage power supply for sensitive circuits such as MCU kernel, sensors and radio frequency modules. The traditional LDO design performs well when facing fixed and known range of load conditions, but its performance will be severely challenged in complex environments with severe load changes or unknown range of load capacitance.

[0003] With the development of automotive electronics towards intelligence and networking, the application scenarios of vehicle-grade chips are increasingly complex and severe. For example, in the engine control unit, body controller, intelligent cockpit and automatic driving domain controller, a single SoC or MCU may integrate dozens of functional modules, and its working state will be dynamically switched according to task scheduling, resulting in a huge step of tens or even hundreds of milliamperes of power supply load current in microseconds. At the same time, due to the limitations of board-level space and the need for electromagnetic interference resistance, the load end may be connected to a wide range of capacitors from tens of pico farads to several micro farads, which puts unprecedented requirements on the full load range stability of the LDO.

[0004] In the prior art, the frequency compensation network of the LDO is usually optimized for a specific load capacitance. When the actual capacitance deviates significantly from the design value, the loop phase margin will decrease sharply, leading to system oscillation. In addition, traditional transient response enhancement techniques such as increasing bandwidth or increasing static current often have limited effect and sacrifice power consumption and efficiency, making it difficult to meet the dual requirements of low power consumption and high dynamic performance in automotive electronics. In the process of the development of automotive electronics towards intelligence and networking, the core architecture of traditional low-dropout linear regulator (LDO) has exposed a series of inherent contradictions that are difficult to reconcile. These contradictions result from the fundamental mismatch between the basic design and the extreme requirements of automotive applications, making the traditional solution inadequate when faced with the complex working environment of modern automotive electronics. More importantly, automotive electronics must work in high-voltage transient environments such as Load Dump with voltages up to 40V, which means that the input stage of the LDO must be manufactured using high-voltage BCD technology. However, the inherent low gain and large parasitic parameters of high-voltage devices make it extremely difficult to design a high-precision, fast-response control loop. In terms of transient response, traditional LDOs face even more severe challenges. Microcontrollers and intelligent processors in automotive chips will switch between working states within nanoseconds, causing a dramatic change in load current up to 200mA / μs. Traditional solutions improve response speed by increasing bandwidth or increasing static current, but this approach comes at an unacceptable cost in the automotive field. High-voltage application scenarios further exacerbate these contradictions. Automotive electronics must withstand Load Dump transient voltages above 40V, which requires LDOs to be manufactured using high-voltage BCD technology. Therefore, an innovative LDO design solution is urgently needed to address three major issues: first, reliable circuit design on a high-voltage BCD technology platform; second, unconditional stability under a full range of load capacitances from 10pF to 1uF; and third, providing extremely fast and accurate voltage response to sudden changes in load. Based on the above problems, the present application provides a bidirectional fast transient response function, which performs fast voltage regulation through a double-path, and can provide a bidirectional current change speed of 0~(50-200)mA / 1us when the load capacitance range of the automotive chip is between 10pF~1uF, and the maximum change in output voltage should not exceed ±10%. SUMMARY

[0005] To solve the above problems in the prior art, the present application provides an LDO suitable for a high-voltage BCD process for automotive applications, which comprises:

[0006] an input module, a drive module, a gain module, a compensation module, and an output module electrically connected to each other;

[0007] The input module accesses the low-voltage always-on power supply VDD_LV inside the chip; the feedback voltage VFB is clamped at the reference voltage VREF; the feedback voltage VFB passes through the VOP1 node and the VO2 node in turn, and then returns to the original position to form a negative feedback; the input module comprises an error amplifier and a load current mirror; the error amplifier compares the reference voltage VREF with the feedback voltage VFB to generate an error signal; the load current mirror converts the active load and the error signal to convert the current error signal into a voltage signal at the VON1 node, and then converts it into a current signal at the VOP1 node through the resistor R2 between the VON1 node and the VOP1 node; the error signal from the VOP1 node and the VON1 node is amplified by the input module and then transmitted to the VO2 node in the high-voltage domain;

[0008] The driving module receives the high-voltage power supply VDD_HV from the vehicle battery to perform high-voltage driving, and forms a second response path with the gain module to reduce the discharge current of the VO2 node when the load current changes slightly; when the load current changes greatly, the charging current of the VO2 node is reduced;

[0009] The gain module connects the input module working in the low-voltage domain and the driving module working in the high-voltage domain to realize the transition between the high-voltage domain and the low-voltage domain; a first response path is provided to increase the charging current of the VO2 node when the load current changes slightly; when the load current changes greatly, the discharge current of the VO2 node is increased;

[0010] The compensation module ensures that the LDO remains stable within the range of a first load smaller than a standard load and a second load larger than a reference load through frequency compensation; one end of the first compensation capacitor Cc1 in the compensation module is connected to the VON1 node, and the other end is connected to the feedback voltage VFB, which is coupled to output the load change;

[0011] The output module comprises a driving power tube, the gate of the driving power tube is connected to the VO2 node, the source is connected to the VDD_HV, and the drain is connected to the LDO output, which is used to provide a large current driving output.

[0012] Further, the first load ≤ the reference load ≤ the second load, and the first load, the reference load, and the second load are preset values.

[0013] Further, in the 5V~40V high-voltage BCD process, the voltage swing range of the VO2 node is 3V~38V.

[0014] Further, the chip is a vehicle-grade chip connected to the LDO.

[0015] Further, the double-path response is performed through the first response path and the second response path, the current of the VO2 node in the high-voltage domain is adjusted, the power tube HV_Power_MOS is driven, and bidirectional fast transient response is provided; the double-path voltage fast adjustment can be performed through the first response path and the second response path, in the case that the internal load capacitance of the vehicle-grade chip ranges from 10 pF to 1 uF, the bidirectional current change speed provided is 0~[50-200] mA / 1us, and the maximum change of the output voltage is not more than ±10%;

[0016] When the load current mutation is large, in the first response path, the current is coupled to the VON1 node through the compensation module, signal amplification is performed through the input module, and the discharge current of the VO2 node is increased; in the second response path, amplification is performed through the driving module and the input module, the charging current of the VO2 node is reduced, and finally the VO2 node potential is reduced, and the driving power tube current of the output module is increased.

[0017] When the load current mutation is small, the current is coupled to the VON1 through the compensation module; in the first response path, signal amplification is performed through the input module, and the discharge current of the VO2 node is reduced; in the second response path, the charging current of the VO2 is increased through the input module, the VO2 node potential is increased, and the driving power tube current of the output module is reduced.

[0018] Further, the VON1 node is a negative output node of the first-stage differential output; the VOP1 node is a positive output node of the first-stage differential output; the VOP1 node and the VON1 node cooperate to complete error signal extraction and amplification; and the VO2 node is a second-stage gain output node.

[0019] An LDO chip suitable for a vehicle-grade high-voltage BCD process, characterized in that the chip is used to realize the above-mentioned LDO suitable for the vehicle-grade high-voltage BCD process.

[0020] An LDO circuit suitable for a vehicle-grade high-voltage BCD process, characterized in that the circuit is used to realize the above-mentioned LDO suitable for the vehicle-grade high-voltage BCD process.

[0021] The beneficial effects of the present application include:

[0022] (1) LDO can accept any size capacitor load, through the optimization of frequency compensation structure, under any load, LDO stability can meet the requirements so that it can be applied in high voltage BCD process; Provide two-way fast transient response function, double path voltage fast regulation, this push-pull structure ensures that even in the most stringent load step conditions, the fluctuation of output voltage can be strictly limited within ± 10%, there is a car chip internal load capacitor range of 10pF~1uF, the two-way current change speed provided is 0~(50-200)mA / 1us, the maximum change of output voltage should not exceed ± 10%; Significantly improve the dynamic performance and reliability of the system;

[0023] (2) Four LDMOS devices are used to build a transition module, which safely and efficiently connects the precise input stage working in the low voltage domain with the gain stage and the drive stage working in the high voltage domain; Make LDO can make full use of the voltage advantage of high voltage BCD process, while retaining the high precision, low noise characteristics of low voltage CMOS process, solve the traditional problem that the precision and reliability of analog circuit design are difficult to be compatible in high voltage environment. BRIEF DESCRIPTION OF DRAWINGS

[0024] The drawings described herein are used to provide further understanding of the present application, constitute a part of this application, but do not constitute improper limitation on the present application, in the drawings:

[0025] Figure 1 A LDO structure suitable for car high voltage BCD process is provided.

[0026] Figure 2 A LDO circuit suitable for car high voltage BCD process is provided. DETAILED DESCRIPTION

[0027] The present application will be described in detail below in conjunction with the drawings and specific embodiments, wherein the illustrative embodiments and the description are only used to explain the present application, but not as a limitation on the present application.

[0028] The present application provides a LDO suitable for car high voltage BCD process, as shown in the accompanying Figure 1 The LDO includes: input module, drive module, gain module, compensation module and output module which are electrically connected to each other.

[0029] The input module accesses low-voltage constant-on power VDD_LV from inside the chip; the feedback voltage VFB is clamped at the reference voltage VREF; the feedback voltage VFB passes through the VOP1 node and the VO2 node in turn, and then returns to the original position to form negative feedback; the input module includes an error amplifier and a load current mirror; the error amplifier is used to compare the reference voltage VREF with the feedback voltage VFB to generate an error signal; the load current mirror is used to convert the active load and the error signal, and convert the current error signal generated by the error amplifier into a voltage signal at the VON1 node, and then convert it into a current signal existing at the VOP1 node through the resistance R2 between the VON1 node and the VOP1 node ); the error signal from the VOP1 node and the VON1 node is transmitted to the VO2 node in the high-voltage domain after being amplified by the input module to adapt to the load change; wherein: the VON1 node is the negative output node of the first differential output; the VOP1 node is the positive output node of the first differential output; the VOP1 node and the VON1 node cooperate to complete the extraction and amplification of the error signal; the VO2 node is the second gain output node;

[0030] Preferably: in the 5V~40V high-voltage BCD process, the VO2 node voltage swing range is 3V~38V;

[0031] The driving module is used to accept the high-voltage power VDD_HV input from the vehicle-mounted battery for high-voltage driving, and at the same time, together with the gain module, forms a second response path, which reduces the discharge current of the VO2 node when the load current mutation is small, and reduces the charging current of the VO2 node when the load current mutation is large;

[0032] The gain module is used to connect the input module working in the low-voltage domain with the driving module working in the high-voltage domain, to realize the transition between the high-voltage domain and the low-voltage domain; to provide a first response path, which increases the charging current of the VO2 node when the load current mutation is small, and increases the discharge current of the VO2 node when the load current mutation is large;

[0033] The compensation module is used to ensure that the LDO remains stable within the range of a first load smaller than a standard load and a second load larger than a reference load through frequency compensation; one end of the first compensation capacitor Cc1 in the compensation module is connected to the VON1 node, and the other end is connected to the feedback voltage VFB, which is coupled to output the load change;

[0034] The first load is a light load condition smaller than the standard load, and the value is between 1pF and 10nF. When the load is light, the loop bandwidth increases, the internal high-frequency pole falls into the gain bandwidth, and the phase margin decreases or even oscillates. A high-frequency zero point or split pole point is introduced through Cc2 / Cc3 capacitors to suppress high-frequency oscillation. The reference load has a value between 10nF and 100nF, which is the center or reference point of the LDO stability design. Under this load, the loop response is optimized to the best state. It is the calibration point of the compensation network parameters. The second load is a heavy load condition greater than the reference load, and the value is between 100nF and 10uF. When the load is heavy, the output pole frequency decreases to become the main pole. A low-frequency zero point is introduced through the nested Miller compensation formed by Cc4 and R3 to compensate the output pole, and the main pole position is stabilized under heavy load.

[0035] The output module includes a driving power tube HV_POWER_MOS, the gate of the driving power tube is connected to the VO2 node, the source is connected to VDD_HV, and the drain is connected to the LDO output, for providing large current driving output;

[0036] Through the first response path and the second response path, the current of the VO2 node in the high-voltage domain is adjusted, the driving power tube HV_Power_MOS is driven, and a bidirectional fast transient response function is provided. Through the first response path and the second response path, the voltage can be adjusted quickly in double paths. In the case that the internal load capacitance of the automotive chip is between 10pF and 1uF, the bidirectional current change speed that can be provided is 0~(50-200)mA / 1us, and the maximum change of the output voltage should not exceed ±10%;

[0037] When the load current mutation is large, in the first response path, the current is coupled to the VON1 node through the compensation module, amplified by the input module, and the discharge current of the VO2 node is increased. In the second response path, the current is amplified by the driving module and the input module, the charging current of the VO2 node is reduced, and finally the VO2 node potential is reduced and the driving power tube current of the output module is increased.

[0038] When the load current mutation is small, the current is coupled to the VON1 through the compensation module. In the first response path, the signal is amplified by the input module, and the discharge current of the VO2 node is reduced. In the second response path, the charging current of the VO2 is increased by the input module, the VO2 node potential is finally increased, and the driving power tube current of the output module is reduced.

[0039] A specific structure circuit structure is shown in the accompanying Figure 2 The LDO includes an input module, a driving module, a gain module, a compensation module, and an output module.

[0040] The gain module is used to connect the input module working in the low voltage domain and the driving module working in the high voltage domain, and realize the transition between the high voltage domain and the low voltage domain; it comprises: 2 NMOS tubes MN7_LD and MN8_LD, 2 PMOS tubes MP7_LD and MP8_LD; specifically: the gates of the 2 NMOS tubes are interconnected and connected to the VBNC_HV node; the gates of the 2 PMOS tubes are interconnected and connected to the VBNC_HV node; the gate of MP7_LD is connected to the VBPC_HV node, the source is connected to the drain of MP9, and the drain is connected to the drain of MN7_LD; the gate of MP8_LD is connected to the VBNC_HV node, the drain is connected to the VO2 node, and the source is connected to the NET1 node; the gate of MN7_LD is connected to the VBNC_HV node, the drain is connected to the VBP_HV node, and the source is connected to the drain of MN5; the gate of MN8_LD is connected to the VBNC_HV node, the drain is connected to the VO2 node, and the source is connected to the NET2 node; the error signals from the VOP1 node and the VON1 node are transmitted to the high voltage domain VO2 through the sources of MN7_LD and MN8_LD flowing to the drains and then shifting, the current of the VO2 node in the high voltage domain is adjusted, the power tube HV_Power_MOS is driven, when the load suddenly changes, the input module quickly transmits the error signal to the high voltage domain through MN7_LD and MN8_LD, MP7_LD / MP8_LD adjusts the driving current, and the transient response is optimized; since the gate bias of MN7_LD / MN8_LD is provided by the low voltage domain, the conversion linearity can be improved; it has current amplification function, after recognizing the change of the load current, it quickly responds and adjusts the VO2 node voltage, and stabilizes the output voltage;

[0041] Preferably: MN7_LD / MN8_LD and MP7_LD / MP8_LD are LDMOS devices, which ensure that the signal transmission delay is minimal, meet the requirements of vehicle-grade transient state, for example: 0~200mA / 1µs;

[0042] Preferably: when the power supply is connected for a vehicle-grade chip, Cc4=6.25pF, R3=8Kohm, Cc3=3pF, Cc1=6pF, and Cc2=15pF;

[0043] The driving module is used for receiving high-voltage power VDD_HV input from the vehicle-mounted battery to drive the LDO circuit; it comprises: 2 PMOS tubes MP9 and MP10; wherein: the gates of MP9 and MP10 are connected to the VBPC_HV node; the drain of MP9 is connected to the MN7_LD source, and the source is connected to VDD_HV; the drain of MP10 is connected to the NET1 node, and the source is connected to VDD_HV; wherein: VBPC_HV is the bias of the high-voltage domain common-source common-gate cascode PMOS tube; in the high-voltage domain, a static bias voltage is provided for the gate of the cascode NMOS tube; VBNC_HV is the bias of the high-voltage domain cascode NMOS tube;

[0044] The output module is used for large-current driving LDO output and voltage feedback output; it comprises 2 NMOS tubes MN5, MN6 and an output driving power tube HV_POWER_MOS; wherein: the gate of MN5 is connected to the VON1 node, the drain is connected to the MN7_LD source, and the source is connected to the ground GND; the gate of MN6 is connected to the VOP1 node, the drain is connected to the NET2 node, and the source is connected to the ground GND;

[0045] Preferably: the current amplification factor between MP9 and MP10 is 1:N; N = 1~10, used for small-range current regulation or signal replication;

[0046] The compensation module includes four compensation capacitors Cc1, Cc2, Cc3, Cc4 and a resistor R3; for ensuring the stability of the LDO under any reasonable load capacitance through frequency compensation; one end of the first compensation capacitor Cc1 is connected to the output VON1 of the input module, the other end is connected to the LDO output, and the feedback voltage VFB is coupled to output the load change; one end of the second compensation capacitor Cc2 is connected to the LDO output, the other end is connected to the NET2 node; the NET2 node is located between the MN8_LD source and the MN6 drain; one end of the third compensation capacitor Cc3 is connected to the LDO output, the other end is connected to the NET1 node; the NET1 node is located between the MP10 drain and the MP8_LD source; one end of the fourth compensation capacitor Cc4 is connected in series with R3, the other end is connected to the VO2 node; the VO2 node is located between the MP8_LD drain and the MN8_LD drain, and is connected to the gate of the output driving power tube HV_POWER_MOS; the resistor R3 is connected between the fourth compensation capacitor Cc4 and the gate-drain of the output driving power tube HV_POWER_MOS; Cc4 and R3 constitute a nested Miller compensation to adapt to different load capacitances CLOAD; Cc1 and Cc4 constitute a nested compensation module; Cc2 and Cc3 constitute a cascade compensation module; the five compensation elements jointly ensure the stability of the LDO under any load capacitance; when the load capacitance CLOAD is small, Cc4 dominates the compensation and suppresses high-frequency oscillation; when the load capacitance CLOAD is large, the zero point compensation introduced by R3 causes the output pole to drift;

[0047] Preferably, the reasonable load capacitance range is 10 pF~1 μF;

[0048] Preferably, Cc1 introduces a main pole at the output end VON1 node of the error amplifier, reduces the low-frequency gain roll-off slope, such as -20dB / dec, and ensures the stability of the loop; the main pole frequency , wherein: The output impedance of the output end VON1 node, is the capacitance of the compensation capacitor ; Cc2 / Cc3 introduces a zero point at the high-frequency VO2 to offset the gate pole; the zero point frequency , wherein: The on-resistance of the output end VO2 node, is the capacitance of the compensation capacitor ;

[0049] Preferably, the high-frequency band is above 1MHz;

[0050] Preferably, Cc1-Cc4 adopt MIM (metal-insulator-metal) or MOS capacitors, which are compatible with BCD technology;

[0051] The input module comprises input pair transistors MP5 / MP6, bias current mirrors MP1-MP4, active loads MN1-MN4, and R1; the input pair transistors detect the differential voltage between VREF and VFB; the active loads generate differential outputs; and the bias current mirrors provide bias currents;

[0052] The input pair transistors MP5 / MP6 are used to accept VREF and VFB signals, detect a differential voltage, convert the differential voltage into a current error signal, and stabilize the common-mode level of the differential pair to avoid output drift; specifically, the gate of MP5 is connected to a reference voltage VREF, the source is connected to the drain of MP3, and the drain is connected to the VON1 node; the gate of MP6 is connected to a feedback voltage VFB, the source is connected to the drain of MP4, and the drain is connected to the VOP1 node; the sources of MP5 and MP6 are connected through the resistor R1; MP5 / MP6 can become the secondary current mirror of MP3 / MP4, and the bias accuracy is improved through hierarchical adjustment to reduce the direct interference of noise on the bias;

[0053] The bias current mirrors MP1-MP4 provide constant currents for the first response path and the second response path, perform active load and error conversion, and ensure that the currents of the first response path and the second response path are the same; specifically, the sources of MP1 / MP2 are commonly connected to the power supply VDD_LV of the vehicle-mounted battery, the gates are connected in pair, and the drains are respectively connected to the sources of MP3 and MP4; used for converting the current error signal into a voltage signal VON1 node and providing high gain; the gates of MP3 / MP4 are connected in pair, the sources are respectively connected to the drains of MP1 and MP2, the drains are connected to the resistor R1, and the sources are respectively connected to the sources of MP5 and MP6;

[0054] The active load MN1-MN4 converts the current error signal into a differential voltage and outputs it; the error current generated by the differential voltage between VREF and VFB first flows through R1, and the voltage drop on R1 is approximately equal to the input differential voltage; the error current flows through R2, and the voltage drop on R2 is the output differential voltage, so the gain of the input module is approximately R2 / R1; the active load compares the reference voltage VREF and the feedback voltage VFB to generate a current error signal; specifically, the gate of MN1 is interconnected with the gate of MN2; the drain of MN1 is connected to the VON1 node, and the source is connected to the drain of MN3; the drain of MN2 is connected to the VOP1 node, and the source is connected to the drain of MN4; the gates of MN3 and MN4 are interconnected and connected to the VON1 node, the source of MN3 is connected to GND, and the drain is connected to the source of MN1; the source of MN4 is connected to GND, and the drain is connected to the source of MN2; the voltage signal at the VON1 node is converted into a current signal VON1 / R2 at the VOP1 node through the resistor R2, which drives the source of MN2; the current flows from the sources of MN1 and MN2 to the drains of MN3 and MN4; if VFB is less than VREF, the current of MN1 increases, the current of MN2 decreases, and the error signal is output to the load current mirror through the drains of MN1 and MN2;

[0055] Preferably, the resistor R1 is used together with R3 of the compensation module to control the gain, and the generated gain is approximately R3 / R1.

[0056] Mechanism one: when the load current mutates greatly, the current is coupled to VON1 through Cc1; 1) the transimpedance amplifier composed of MN4 and R2 amplifies through MN4 again, which increases the discharge current of the VO2 node; 2) the current amplifier composed of MN5 / MP9 / MP10 reduces the charging current of VO2; the above two mechanisms can quickly reduce the VO2 node potential and increase the driving tube current. Mechanism two: when the load current mutates slightly, the current is coupled to VON1 through Cc1; 1) the transimpedance amplifier composed of MN4 and R2 amplifies through MN4 again, which reduces the discharge current of the VO2 node; 2) the current amplifier composed of MN5 / MP9 / MP10 increases the charging current of VO2; the above two mechanisms can quickly increase the VO2 node potential and reduce the driving tube current.

[0057] The preferred: when the engine ignition voltage fluctuation is transmitted to the ECU control unit, it can adjust the output instantly, ensure that the MCU processor and CAN bus transceiver always get stable 3.3V or 5V power supply. Even if the sudden work of the oil nozzle causes 50mA to 200mA current mutation, it can complete the adjustment within 1 microsecond, and control the voltage fluctuation within 10%; It can be applied to the input voltage range of 5V to 40V, with a transient voltage resistance of 60V, which overcomes the voltage surge that may occur when the car starts and stops. Even in extreme temperature environments of minus 40 degrees to 125 degrees, it can still maintain stable output; When used in car infotainment systems, it can power SoC and display screen driving IC, suppress screen flicker or audio noise caused by power supply ripple, and effectively avoid picture flicker or sound distortion caused by power supply noise;

[0058] Embodiment 1:

[0059] For use in vehicle electronic systems, the front stage is a high-voltage DC-DC converter, and the rear stage is an MCU or CAN FD transceiver; The load switch is used for power sequence control; Wherein: the high-voltage DC-DC converter is a Buck, which reduces 12V to 5V, and the rear stage can be NXP S32K or TI TCAN1042; The load switch uses TPS22965; In the event of load mutation, the response time is ≤1µs, and the output voltage fluctuation is <±10%;

[0060] A computer program (also known as a program, software, software application, script, or code) can be written in any form of programming language, including compiled or interpreted languages, declarative or procedural languages, and it can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, object, or other unit suitable for use in a computing environment. A computer program can, but need not, correspond to a file in a file system. A program can be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files that store one or more modules, sub programs, or code portions). A computer program can be deployed to be executed on one computer or on multiple computers that are located at one site or distributed across multiple sites and interconnected by a communication network.

[0061] Those skilled in the art will appreciate that embodiments of the present application can be provided as methods, systems, or computer program products. Accordingly, the present application can take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application can take the form of a computer program product implemented on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROMs, optical storage, etc.) containing computer usable program code.

[0062] The computer program instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart block or blocks. Figure 1 one or more flowcharts and / or blocks Figure 1 means for functionally implementing the steps of the flowchart block or blocks

[0063] These computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture including instructions which implement the flowchart block or blocks. Figure 1 one or more flowcharts and / or blocks Figure 1 means for functionally implementing the steps of the flowchart block or blocks

[0064] The computer program instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart block or blocks. Figure 1 one or more flowcharts and / or blocks Figure 1 means for functionally implementing the steps of the flowchart block or blocks

[0065] Finally, it should be noted that the above-mentioned embodiments are merely intended to illustrate the technical solutions of the present application, rather than limit the technical solutions of the present application. Although the present application has been described in detail with reference to the above-mentioned embodiments, those skilled in the art should understand that the specific embodiments of the present application can be modified or replaced equivalently without departing from the spirit and scope of the present application, and any modification or equivalent replacement without departing from the spirit and scope of the present application should be covered in the protection scope of the claims of the present application.

Claims

1. An LDO suitable for a car-gauge high-voltage BCD process, characterized in that, Comprise: input module, drive module, gain module, compensation module and output module are electrically connected to each other; The input module accesses the low-voltage always-on power supply VDD_LV inside the chip;The feedback voltage VFB is clamped at the reference voltage VREF;The feedback voltage VFB passes through the VOP1 node and the VO2 node in turn, and then returns to the original position to form a negative feedback;It includes an error amplifier and a load current mirror;The error amplifier compares the reference voltage VREF with the feedback voltage VFB to generate an error signal; The load current mirror converts the active load and the error signal to convert the current error signal into a voltage signal at the VON1 node, and then converts it into a current signal at the VOP1 node through the resistor R2 between the VON1 node and the VOP1 node;The error signal from the VOP1 node and the VON1 node is amplified by the input module and then transmitted to the VO2 node in the high-voltage domain; The drive module receives the high-voltage power supply VDD_HV input from the vehicle battery for high-voltage driving, and forms a second response path with the gain module to reduce the discharge current of the VO2 node when the load current changes little;When the load current changes greatly, the charging current of the VO2 node is reduced; The gain module connects the input module working in the low-voltage domain and the drive module working in the high-voltage domain to realize the transition between the high-voltage domain and the low-voltage domain;It provides a first response path to increase the charging current of the VO2 node when the load current changes little;When the load current changes greatly, the discharge current of the VO2 node is increased; The compensation module ensures that the LDO remains stable within the range of a first load smaller than a standard load and a second load larger than a reference load through frequency compensation;One end of the first compensation capacitor Cc1 in the compensation module is connected to the VON1 node, and the other end is connected to the feedback voltage VFB, which couples the output load change; The output module includes a drive power tube, the gate of which is connected to the VO2 node, the source is connected to the VDD_HV, and the drain is connected to the LDO output, which is used to provide large current drive output. The VON1 node is the negative output node of the first differential output;The VOP1 node is the positive output node of the first differential output;The VOP1 node and the VON1 node cooperate to complete the extraction and amplification of the error signal;The VO2 node is the second gain output node.

2. The LDO suitable for automotive high voltage BCD process according to claim 1, characterized in that, The first load ≤ the reference load ≤ the second load, and the first load, the reference load and the second load are preset values.

3. The LDO suitable for automotive high voltage BCD process according to claim 2, characterized in that, In the 5V~40V high-voltage BCD process, the VO2 node voltage swing range is 3V~38V.

4. The LDO suitable for automotive high voltage BCD process according to claim 3, characterized in that, The chip is an LDO connected to a vehicle chip.

5. The LDO suitable for automotive high voltage BCD process according to claim 4, characterized in that, Through the first response path and the second response path, the current of the VO2 node in the high-voltage domain is adjusted to drive the drive power tube, providing bidirectional fast transient response;Through the first response path and the second response path, the voltage is quickly adjusted in double-path, and in the case that the internal load capacitance of the vehicle chip is between 10pF and 1uF, the bidirectional current change speed is 0~[50-200]mA / 1us, and the maximum output voltage change is not more than ±10%. When the load current mutation is large, in the first response path, the current is coupled to the VON1 node through the compensation module, amplified by the input module, and the discharge current of the VO2 node is increased; in the second response path, the current is amplified by the driving module and the input module, the charging current of the VO2 node is reduced, and finally the VO2 node potential is reduced, and the driving power tube current of the output module is increased; When the load current mutation is small, the current is coupled to the VON1 node through the compensation module; in the first response path, the signal is amplified by the input module, and the discharge current of the VO2 node is reduced; in the second response path, the input module increases the charging current of the VO2 node, the VO2 node potential is increased, and the driving power tube current of the output module is reduced.

6. An LDO chip suitable for automotive high voltage BCD process, characterized in that, The chip is used to realize the LDO suitable for the vehicle regulation high-voltage BCD process in any one of claims 1-5.

7. An LDO circuit suitable for automotive high voltage BCD process, characterized in that, The circuit is used to realize the LDO suitable for the vehicle regulation high-voltage BCD process in any one of claims 1-5.

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