A TEC chip packaging crimping method

Abstract

The application relates to the technical field of chip packaging, and provides a TEC chip packaging crimping method. The TEC chip packaging crimping method comprises the following steps: the TEC workpiece and a jig enter a plasma cleaning area, and a plasma cleaning step is performed; the TEC workpiece and the jig enter a formic acid cleaning area, and a formic acid cleaning step is performed; the TEC workpiece and the jig enter a preheating area, and a preheating step is performed; the TEC workpiece and the jig enter a crimping area, and a crimping step is performed; the TEC workpiece and the jig enter a first cooling area, and a first cooling step is performed; and the TEC workpiece and the jig enter a second cooling area, and a second cooling step is performed. The TEC packaging quality is improved.

Description

Technical Field

[0001] This invention relates to the field of chip packaging technology, and in particular to a TEC chip packaging crimping method. Background Technology

[0002] A thermoelectric temperature controller (TEC) is an electronic device that utilizes the Peltier effect of semiconductor materials to both cool and heat. The Peltier effect refers to the phenomenon where, when a direct current passes through a thermocouple composed of two semiconductor materials, one end absorbs heat while the other releases heat. When the cooling and heating capacity of the TEC is sufficiently large, the current flowing through the TEC can be adjusted to maintain a constant temperature at one end within a certain range. TECs are widely used in applications with limited space and high reliability requirements due to their advantages such as small size, fast response, high precision, no vibration or noise, no moving parts, no wear, and flexible control. Examples include temperature control for lasers, PCR (polymerase chain reaction) devices, and even LEDs. However, the packaging quality of existing TEC chips is relatively low. Summary of the Invention

[0003] This invention provides a TEC chip packaging and pressing method to solve the problem of low TEC packaging quality in the prior art.

[0004] A TEC chip packaging crimping method includes:

[0005] TEC workpieces and fixtures enter the plasma cleaning area and undergo plasma cleaning procedures.

[0006] TEC workpieces and fixtures enter the formic acid cleaning area and undergo formic acid cleaning procedures.

[0007] TEC workpieces and fixtures enter the preheating zone and undergo the preheating process;

[0008] The TEC workpiece and fixture enter the crimping area and the crimping process is performed.

[0009] The TEC workpiece and fixture enter the first cooling zone and undergo the first cooling step.

[0010] The TEC workpiece and fixture enter the second cooling zone for the second cooling step.

[0011] According to the TEC chip packaging and pressing method of the present invention, the plasma cleaning step includes:

[0012] Evacuate the plasma cleaning area to the first vacuum level;

[0013] Fill with argon and hydrogen in ratio A;

[0014] The ion cleaning holding time is T1, which is 115-125 seconds.

[0015] According to the TEC chip packaging and pressing method of the present invention, the formic acid cleaning step includes:

[0016] The formic acid concentration is set to the first formic acid concentration, and the formic acid cleaning zone cavity is pressurized in stages;

[0017] The first formic acid cleaning pressure is increased to the second formic acid cleaning pressure, and the pressure is increased at the first rate for the first time.

[0018] The second formic acid cleaning pressure is increased to the third formic acid cleaning pressure, and the second pressure increase rate is maintained for the second pressure increase time.

[0019] The formic acid cleaning pressure is increased from the third formic acid cleaning pressure to the fourth formic acid cleaning pressure, and the pressure is increased at the third rate for the third duration.

[0020] According to the TEC chip packaging crimping method of the present invention, the first boost rate is greater than the second boost rate, and the second boost rate is greater than the third boost rate.

[0021] According to the TEC chip packaging crimping method of the present invention, the preheating step includes:

[0022] Set up segmented preheating for TEC workpieces and fixtures;

[0023] First preheating temperature kept constant for first preheating time;

[0024] The temperature is increased from the first preheating temperature to the second preheating temperature at the first preheating rate.

[0025] The second preheating temperature is maintained at a constant temperature for a second preheating time;

[0026] The temperature is increased from the second preheating temperature to the third preheating temperature, and the temperature is increased at the second preheating rate.

[0027] The third preheating temperature is maintained at a constant temperature for the third preheating time.

[0028] According to the TEC chip packaging crimping method of the present invention, the crimping step includes:

[0029] Set to apply pressure in stages;

[0030] The first pressing pressure is increased to the second pressing pressure, and the first pressing rate is maintained for a first pressing time, while the pressing head temperature is set to the first pressing head temperature.

[0031] The second pressing pressure is increased to the third pressing pressure, and the third pressing time is maintained at the second pressing rate, while the pressing head temperature is set to the second pressing head temperature.

[0032] The third pressing pressure is increased to the fourth pressing pressure, and the fourth pressing time is maintained at the third pressing rate, while the pressing head temperature is set to the third pressing head temperature.

[0033] The fourth pressing pressure is constant for the first constant pressure time, and the pressing head temperature is set to the fourth pressing head temperature;

[0034] The fourth pressing pressure is reduced to the fifth pressing pressure, and the first pressing pressure is maintained at the first pressing pressure rate for the first pressing time, while the pressing head temperature is set to the fourth pressing head temperature.

[0035] According to the TEC chip packaging press-fit method of the present invention, the first cooling step includes:

[0036] Set to rapid cooling in stages;

[0037] The fourth pressure head temperature is cooled to the first cooling temperature, and the temperature is reduced at the first cooling rate, with the cooling medium set to supercritical CO2 micro-mist.

[0038] The temperature is cooled from the first cooling temperature to the second cooling temperature, and the second cooling rate is used to cool the medium, which is liquid nitrogen vaporized nitrogen.

[0039] The temperature is cooled from the second cooling temperature to the third cooling temperature, and the temperature is reduced at the third cooling rate, with the cooling medium set to low-temperature nitrogen.

[0040] The third cooling temperature is maintained at the same constant temperature as the first cooling temperature for the same period of time.

[0041] According to the TEC chip packaging press-fit method of the present invention, the first cooling rate is greater than twice the second cooling rate.

[0042] According to the TEC chip packaging press-fit method of the present invention, the second cooling step includes:

[0043] Set to slow, step-by-step cooling;

[0044] The temperature is cooled from the third cooling temperature to the fourth cooling temperature, and then cooled at the fourth cooling rate.

[0045] The temperature is cooled from the fourth cooling temperature to the fifth cooling temperature, and then cooled at the fifth cooling rate.

[0046] The fifth cooling temperature is reduced to room temperature, and then the temperature is reduced at the sixth cooling rate.

[0047] An online vacuum pressure sintering furnace is provided for performing the method described in any of the preceding claims. The online vacuum pressure sintering furnace includes a plasma cleaning zone, a formic acid cleaning zone, a preheating zone, a pressing zone, a first cooling zone, multiple gate valves, and a second cooling zone. The plasma cleaning zone, formic acid cleaning zone, preheating zone, pressing zone, first cooling zone, and second cooling zone are provided with vacuum isolation by the gate valves.

[0048] This invention removes oxides from the TEC surface through plasma cleaning, reduces TeO2 with hydrogen to generate water and Te, thus avoiding a high-resistivity layer at the solder interface; surface activation improves solder spreadability. This encapsulation and pressing process improves the TEC packaging quality. Attached Figure Description

[0049] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0050] 1. Figure 1 This is a schematic diagram of the TEC chip packaging and pressing method.

[0051] 2. Figure 2 This is a schematic diagram of the plasma cleaning process.

[0052] 3. Figure 3 A schematic diagram of the formic acid cleaning process;

[0053] 4. Figure 4 This is a flowchart illustrating the preheating process.

[0054] 5. Figure 5 This is a flowchart illustrating the crimping process;

[0055] 6. Figure 6 This is a schematic diagram of the first cooling step.

[0056] 7. Figure 7 This is a schematic diagram of the second cooling step. Detailed Implementation

[0057] The embodiments of the present invention will be described in further detail below with reference to the accompanying drawings and examples. The following examples are for illustrative purposes only and should not be construed as limiting the scope of the invention.

[0058] In the description of the embodiments of the present invention, it should be noted that the terms "center," "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing the embodiments of the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of the present invention. In addition, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0059] In the description of the embodiments of the present invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "connected" and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium. Those skilled in the art can understand the specific meaning of the above terms in the embodiments of the present invention based on the specific circumstances.

[0060] In embodiments of the present invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0061] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or at least one embodiment or example. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0062] The following is combined with Figure 1-7 An embodiment of the present invention describes a TEC chip packaging press-fit method, comprising:

[0063] S101, TEC workpieces and fixtures enter the plasma cleaning area and undergo plasma cleaning procedures;

[0064] S102, TEC workpieces and fixtures enter the formic acid cleaning area and undergo formic acid cleaning procedures;

[0065] S103, TEC workpieces and fixtures enter the preheating zone and perform the preheating step;

[0066] S104, TEC workpieces and fixtures enter the crimping area and perform the crimping step;

[0067] S105, TEC workpieces and fixtures enter the first cooling zone and perform the first cooling step;

[0068] S106, TEC workpieces and fixtures enter the second cooling zone and undergo the second cooling step.

[0069] In some embodiments, the plasma cleaning step includes:

[0070] S201. Evacuate the plasma cleaning zone to a first vacuum level; the first vacuum level is preferably less than 0.5 Pa.

[0071] S202, fill with argon and hydrogen in ratio A; the preferred ratio A is 9:1, that is, 90% argon and 10% hydrogen.

[0072] S203, Ion cleaning holding time T1. The preferred time T1 is 100-120s.

[0073] Remove oxides from the TEC surface, reduce TeO2 with hydrogen to generate water and Te, thus avoiding a high-resistivity layer at the solder interface; surface activation improves solder spreadability.

[0074] In some embodiments, the formic acid cleaning step includes:

[0075] 301. Set the formic acid concentration to the first formic acid concentration, and increase the pressure and temperature of the formic acid cleaning zone cavity in stages; the first formic acid concentration is preferably 2%.

[0076] 302. The first formic acid cleaning pressure is increased to the second formic acid cleaning pressure, and the pressure is increased at the first rate for the first time. During the initial pressure increase phase, the temperature is raised from room temperature to 70-80℃ at a rate of 20-25℃ / min, quickly crossing the low-temperature condensation zone (below 60℃) to prevent the formation of formic acid droplets. The second formic acid cleaning pressure is preferably 0.6-0.8 atm, and the first pressure increase rate is preferably 2-3 atm / min to avoid sudden pressure changes that could cause gas turbulence and prevent acid mist from being adsorbed by eddies at the edge of the TEC (Transient Temperature Coefficient).

[0077] 303. The second formic acid cleaning pressure is increased to the third formic acid cleaning pressure, and the second pressure increase rate is maintained for the second time. The temperature is increased from 70-80℃ to 100-105℃ at a rate of 3-3.5℃ / min. This heating rate is the optimal rate, matching the activation energy of the formic acid reduction reaction to achieve simultaneous decomposition of the oxide layer. The third formic acid cleaning pressure is preferably 0.9-1.0 atm, and the second pressure increase rate is preferably 1.2-1.5 atm / min. Reducing the rate allows for uniform vapor diffusion and eliminates low-pressure areas in the corners of the substrate.

[0078] 304. The formic acid cleaning pressure is increased from the third to the fourth formic acid cleaning pressure, and maintained at the third pressure increase rate for the third time. The temperature is increased from 100-105℃ to 108-110℃ at a rate of 0.5-0.6℃ / min. When approaching the target temperature, the temperature is increased very slowly to avoid local overheating of Bi2Te3. The equilibrium holding temperature is 108-110℃ for 45 seconds to maintain the dynamic equilibrium of formic acid decomposition and reduction. The fourth formic acid cleaning pressure is preferably 1.05-1.06 atm, and the third pressure increase rate is preferably 0.5-0.6 atm / min. When approaching the target pressure, the pressure is increased very slowly to suppress micro-condensation.

[0079] In some embodiments, the first boost rate is greater than the second boost rate, and the second boost rate is greater than the third boost rate.

[0080] In some embodiments, the preheating step includes:

[0081] S401, Set up segmented preheating for TEC workpieces and fixtures;

[0082] S402, First preheating temperature is kept constant for first preheating time; the first preheating temperature is preferably 108-110℃, and the first preheating time is preferably 85-95 seconds, to eliminate the temperature difference between cavities and homogenize the thermal inertia of the fixture.

[0083] S403, the first preheating temperature is raised to the second preheating temperature at the first preheating rate; the second preheating temperature is preferably 120-130℃, and the first preheating rate is preferably 1.6-2℃ / min, the purpose of which is to activate the CTE growth rate of the AIN substrate and match the CTE change of Bi2Te3.

[0084] S404, the second preheating temperature is kept constant for the second preheating time; the second preheating time is preferably 115-125 seconds, driving the pre-diffusion of solder atoms to remove the sub-nanometer oxide film (requires 120-130℃ thermodynamic activation energy).

[0085] S405. The second preheating temperature is raised to the third preheating temperature at the second preheating rate. The third preheating temperature is preferably 145-155℃, and the second preheating rate is preferably 0.75-0.85℃ / min, which is close to the liquidus line of the solder to avoid premature melting.

[0086] S406. Maintain the third preheating temperature at a constant temperature for a third preheating time. The third preheating time is preferably 55-65 seconds, waiting for the welding zone to be ready, and maintaining the P / N junction temperature difference ≤0.3℃.

[0087] In some embodiments, the crimping step includes:

[0088] S501, set to step-by-step pressurization;

[0089] S502, the first pressing pressure is increased to the second pressing pressure, and the first pressing rate is maintained for a first pressing time, while the pressing head temperature is set to the first pressing head temperature; the second pressing pressure is preferably 0.045-0.055MPa, the first pressing rate is preferably 0.015-0.025MPa / s, the pressing head temperature is 150℃, the pre-TEC gap of the pressing head is eliminated, and impact displacement is avoided.

[0090] S503, the second pressing pressure is increased to the third pressing pressure, and the second pressing rate is maintained for the third pressing time, while the pressing head temperature is set to the second pressing head temperature; the third pressing pressure is preferably 0.115-0.125MPa, the second pressing rate is 0.025-0.035MPa / s, and the second pressing head temperature is 155℃, driving the molten solder to spread along the interface and removing microbubbles.

[0091] S504, the third pressing pressure is increased to the fourth pressing pressure, and the pressing is continued at the third pressing rate for the fourth pressing time, and the pressing head temperature is set to the third pressing head temperature; the fourth pressing pressure is preferably 0.175-0.185MPa, the third pressing rate is preferably 0.005-0.015MPa / s, and the third pressing head temperature is 158℃, to offset the expansion difference between the ALN or alumina substrate and Bi2Te3.

[0092] S505, the fourth pressing pressure is constant for the first constant pressure time and the pressing head temperature is set to the fourth pressing head temperature; the fourth pressing temperature is 160℃ to maintain the uniform growth of IMC (Cu6Sn5) and suppress Kirkendall voids.

[0093] S506, the fourth crimping pressure is reduced to the fifth crimping pressure, maintained at a first decompression rate for a first decompression time, and the pressure head temperature is set to the fourth pressure head temperature. The fifth crimping pressure is preferably 0.015-0.025 MPa. The first decompression rate is preferably 0.0045-0.0055 MPa / s, which slowly releases residual pressure and prevents solder solidification microcracks. This pressurization step prevents warping.

[0094] In some embodiments, the first cooling step includes:

[0095] S601, set to rapid cooling in a step-by-step manner;

[0096] S602, the fourth pressure head temperature is cooled to the first cooling temperature, and the cooling medium is set to supercritical CO2 micro-mist; the first cooling temperature is preferably 143-147℃, the first cooling rate is preferably 45-55℃ / s, and the cooling medium is supercritical CO2 micro-mist, the purpose of which is to instantly skip the solder grain coarsening zone and refine the solder grain to 2-5 micrometers.

[0097] S603, the first cooling temperature is cooled to the second cooling temperature, the second cooling rate is lowered, and the cooling medium is set to liquid nitrogen vaporization nitrogen gas; the second cooling temperature is preferably 95-105℃, the second cooling rate is preferably 21-25℃ / s, the cooling medium is liquid nitrogen vaporization nitrogen gas gas (-60℃), and the Bi2Te3 cleavage surface brittle fracture zone is passed through with minimal residence time, avoiding thermal shock cracks.

[0098] S604, the second cooling temperature is cooled to the third cooling temperature, the third cooling rate is cooled, and the cooling medium is set to low-temperature nitrogen; the third cooling temperature is preferably 75-85℃, the third cooling rate is preferably 6-10℃ / s, and the cooling medium is low-temperature nitrogen (-30℃) to avoid the low-temperature phase transition point of Bi2Te3 and prevent lattice reconstruction stress.

[0099] S605, the third cooling temperature is maintained at the first cooling constant temperature for 15-25 seconds, the purpose of which is to allow thermal strain energy to relax (stress release greater than 90%).

[0100] In some embodiments, the first cooling rate is greater than twice the second cooling rate.

[0101] In some embodiments, the second cooling step includes:

[0102] S701 is configured for slow, step-by-step cooling.

[0103] S702, cool from the third cooling temperature to the fourth cooling temperature, and cool at the fourth cooling rate; the fourth cooling temperature is preferably 55-65℃, and the fourth cooling rate is preferably 1-1.4℃ / min, avoiding the Bi2Te3 lattice reconstruction point (65℃) to prevent carrier imbalance.

[0104] S703, cool from the fourth cooling temperature to the fifth cooling temperature, and cool at the fifth cooling rate; the fifth cooling temperature is preferably 35-45℃, and the fifth cooling rate is preferably 0.3-0.5℃ / min, releasing 99% of the welding residual stress.

[0105] S704, the fifth cooling temperature is cooled to room temperature, and then cooled at a sixth cooling rate. The sixth cooling rate is preferably 0.1-0.2℃ / min.

[0106] An online vacuum pressure sintering furnace is provided for performing the above-mentioned method. The online vacuum pressure sintering furnace includes a plasma cleaning zone, a formic acid cleaning zone, a preheating zone, a pressing zone, a first cooling zone, multiple gate valves, and a second cooling zone. The plasma cleaning zone, formic acid cleaning zone, preheating zone, pressing zone, first cooling zone, and second cooling zone are provided with vacuum isolation by the gate valves.

[0107] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for crimping and packaging a TEC chip, characterized in that, include: TEC workpieces and fixtures enter the plasma cleaning area and undergo plasma cleaning procedures. TEC workpieces and fixtures enter the formic acid cleaning area and undergo formic acid cleaning procedures. TEC workpieces and fixtures enter the preheating zone and undergo the preheating process; The TEC workpiece and fixture enter the crimping area and the crimping process is performed. The TEC workpiece and fixture enter the first cooling zone and undergo the first cooling step. The TEC workpiece and fixture enter the second cooling zone and undergo the second cooling step. The formic acid cleaning step includes: The formic acid concentration is set as the first formic acid concentration, and the formic acid cleaning zone cavity is pressurized in stages, with the first formic acid concentration being 2%. The first formic acid cleaning pressure is increased to the second formic acid cleaning pressure, and the pressure is increased at the first rate for the first time. The second formic acid cleaning pressure is 0.6-0.8 atm, and the first pressure increase rate is 2-3 atm / min. The second formic acid cleaning pressure is increased to the third formic acid cleaning pressure, and the second pressure increase rate is maintained for the second time. The third formic acid cleaning pressure is 0.9-1.0 atm, and the second pressure increase rate is 1.2-1.5 atm / min. The formic acid cleaning pressure is increased from the third formic acid cleaning pressure to the fourth formic acid cleaning pressure, and the pressure is increased at the third rate for the third duration. The fourth formic acid cleaning pressure is 1.05-1.06 atm, and the third pressure increase rate is 0.5-0.6 atm / min.

2. The TEC chip packaging and pressing method according to claim 1, characterized in that, The plasma cleaning step includes: Evacuate the plasma cleaning area to the first vacuum level; Fill with argon and hydrogen in ratio A, where the ratio of A is 9:1; The ion cleaning holding time is T1, which is 100-120 seconds.

3. The TEC chip packaging and pressing method according to claim 1, characterized in that, The preheating process includes: Set up segmented preheating for TEC workpieces and fixtures; The first preheating temperature is kept constant for a first preheating time of 85-95 seconds. The first preheating temperature is 108-110℃. The temperature is increased from the first preheating temperature to the second preheating temperature at the first preheating rate. The second preheating temperature is 120-130℃ and the first preheating rate is 1.6-2℃ / min. The second preheating temperature is maintained at a constant temperature for a second preheating time; The temperature is increased from the second preheating temperature to the third preheating temperature at the second preheating rate. The third preheating temperature is 145-155℃, and the second preheating rate is 0.75-0.85℃ / min. The third preheating temperature is maintained at a constant temperature for the third preheating time.

4. The TEC chip packaging and pressing method according to claim 1, characterized in that, The crimping step includes: Set to apply pressure in stages; The first pressing pressure is applied to the second pressing pressure, and the first pressing rate is maintained for a first pressing time while the pressing head temperature is set to the first pressing head temperature. The second pressing pressure is 0.045-0.055MPa, the first pressing rate is 0.015-0.025MPa / s, and the first pressing head temperature is 150℃. The second pressing pressure is increased to the third pressing pressure, and the second pressing rate is maintained for the third pressing time while the pressing head temperature is set to the second pressing head temperature. The third pressing pressure is 0.115-0.125MPa, the second pressing rate is 0.025-0.035MPa / s, and the second pressing head temperature is 155℃. The third pressing pressure is increased to the fourth pressing pressure, and the third pressing rate is maintained for the fourth pressing time while the pressing head temperature is set to the third pressing head temperature. The fourth pressing pressure is 0.175-0.185MPa, the third pressing rate is 0.005-0.015MPa / s, and the third pressing head temperature is 158℃. The fourth pressing pressure is constant for the first constant pressure time, and the pressing head temperature is set to the fourth pressing head temperature, which is 160℃. The pressure is reduced from the fourth pressing pressure to the fifth pressing pressure, and the pressure is reduced at the first pressure reduction rate for the first pressure reduction time, while the pressure head temperature is set to the fourth pressure head temperature. The fifth pressing pressure is 0.015-0.025 MPa, and the first pressure reduction rate is 0.0045-0.0055 MPa / s.

5. The TEC chip packaging and pressing method according to claim 4, characterized in that, The first cooling step includes: Set to rapid cooling in stages; The fourth pressure head temperature is cooled to the first cooling temperature, and the temperature is reduced at the first cooling rate. The cooling medium is set to supercritical CO2 micro-mist, and the first cooling temperature is 143-147℃. The temperature is cooled from the first cooling temperature to the second cooling temperature, and the second cooling rate is used to cool the medium, which is set to liquid nitrogen vaporized nitrogen. The second cooling temperature is 95-105℃. The temperature is cooled from the second cooling temperature to the third cooling temperature, and the cooling rate is set to the third cooling rate. The cooling medium is low-temperature nitrogen. The third cooling temperature is 75-85℃ and the third cooling rate is 6-10℃ / s. The third cooling temperature is maintained at the same constant temperature as the first cooling temperature for the same period of time.

6. The TEC chip packaging and pressing method according to claim 5, characterized in that, The first cooling rate is greater than twice the second cooling rate.

7. The TEC chip packaging and pressing method according to claim 5, characterized in that, The second cooling step includes: Set to slow, step-by-step cooling; The temperature is cooled from the third cooling temperature to the fourth cooling temperature at the fourth cooling rate. The fourth cooling temperature is 55-65℃ and the fourth cooling rate is 1-1.4℃ / min. The temperature is cooled from the fourth cooling temperature to the fifth cooling temperature at the fifth cooling rate. The fifth cooling temperature is 35-45℃ and the fifth cooling rate is 0.3-0.5℃ / min. The fifth cooling temperature is reduced to room temperature, and the temperature is further reduced at a sixth cooling rate of 0.1-0.2℃ / min.

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