Low-defect-density semi-polar GaN-based optoelectronic device structure and preparation method thereof

Abstract

The invention discloses a low-defect-density semi-polar GaN-based optoelectronic device structure and a preparation method thereof, the low-defect-density semi-polar GaN-based optoelectronic device structure comprises a periodic patterned sapphire substrate, the patterned sapphire substrate is provided with a groove array with a crystal growth surface, semi-polar GaN which is located above the patterned sapphire substrate and has combined patterned features grows on the crystal growth surface, and the patterned GaN is provided with a groove array. And a micro optoelectronic device is prepared after a superlattice layer is deposited in a low-defect-density area of the semi-polar GaN or on the surface of the semi-polar GaN. According to the invention, the QCSE can be effectively inhibited, the radiative recombination efficiency is improved, and the defect density is lower, so that the semipolar () GaN can still maintain high quantum efficiency under low current density, thereby obtaining a high-efficiency, high-brightness and low-power-consumption green / yellow / red miniature optoelectronic device.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor optoelectronic device technology, specifically relating to a low-defect-density semi-polar GaN-based optoelectronic device structure. This invention also relates to a method for fabricating the low-defect-density semi-polar GaN-based optoelectronic device structure. Background Technology

[0002] Due to its relatively mature technology, relatively low cost, and ample supply, the mainstream GaN currently on the market is polar (c-plane) GaN grown on c-plane (0001) sapphire substrates. However, traditional polar GaN-based optoelectronic devices suffer from strong spontaneous polarization and piezoelectric polarization effects, leading to the quantum confinement Stark effect (QCSE), which significantly reduces radiative recombination efficiency, especially in the green-yellow light band. As the driving current increases, the electric field shielding effect within the quantum well induces a significant blue shift, resulting in wavelength instability and difficulty meeting the color accuracy requirements of microdisplays. To eliminate the polarization electric field, non-polar and semi-polar GaN technologies have been developed, but their high defect density leads to device leakage and premature aging.

[0003] Semi-polar GaN, through controllable tilting of the lattice, partially cancels polarization effects, effectively suppressing QCSE and improving radiative recombination efficiency. It shows great potential for improving the efficiency of long-wavelength (green, yellow, red) InGaN quantum wells. Simultaneously, certain specific semi-polar surfaces (such as...) Semipolar GaN can be grown on specific substrates (such as m-plane sapphire and patterned substrates) to produce GaN with relatively good material quality and lower defect density, which has important application value in the field of high-efficiency, high-brightness, and low-power optoelectronic devices. For micro-optoelectronic devices with stringent requirements for efficiency, wavelength stability, and low operating current, semipolar GaN shows great potential. However, semipolar GaN faces challenges such as difficulty in stress control and high-density crystal defects. Summary of the Invention

[0004] The purpose of this invention is to provide a low-defect-density semi-polar GaN-based optoelectronic device structure, which solves the problem of high defect density in existing polar GaN.

[0005] Another objective of this invention is to provide a method for fabricating a low-defect-density semi-polar GaN-based optoelectronic device structure.

[0006] The first technical solution adopted in this invention is: a low defect density semi-polar GaN-based optoelectronic device structure, including a periodically patterned sapphire substrate, an array of trenches with crystal growth surfaces formed on the patterned sapphire substrate, and a semi-polar GaN with patterned features merged and located above the patterned sapphire substrate grown on the crystal growth surface.

[0007] The first technical solution of the present invention is further characterized in that, The region above the crystal growth surface of semi-polar GaN is a high defect density region, while the remaining region is a low defect density region. Micro-optoelectronic devices are disposed on the surface of the low defect density region.

[0008] The lateral width of the high defect density region is ≤2µm.

[0009] A superlattice layer is deposited on a semi-polar GaN, a bulk GaN capping layer is deposited on the superlattice layer, and a micro optoelectronic device is disposed on the surface of the bulk GaN capping layer.

[0010] The superlattice layer consists of a first superlattice material layer and a second superlattice material layer that are periodically grown alternately, with a period of 5 to 10.

[0011] The superlattice layer consists of GaN sublayers and AlGaN sublayers that are periodically and alternately grown. The thickness of the GaN sublayer in a single period is 1 nm to 5 nm, and the thickness of the AlGaN sublayer is 1 nm to 5 nm. Alternatively, it consists of AlN sublayers and GaN sublayers that are periodically and alternately grown. The thickness of the AlN sublayer in a single period is 1 nm to 5 nm, and the thickness of the GaN sublayer is 1 nm to 10 nm.

[0012] The trench period T of the patterned sapphire substrate is 4um to 50um, preferably 4um to 10um; the trench depth D is 50nm to 2um.

[0013] The absolute value of the angle difference between the crystal growth surface and the sapphire (0001) surface is within 5°.

[0014] A mask material, which is an oxide or nitride, is deposited on the upper surface of the patterned sapphire substrate outside the crystal growth surface, with a thickness of 20 nm to 500 nm.

[0015] The second technical solution adopted in this invention is: a method for fabricating a low-defect-density semi-polar GaN-based optoelectronic device structure, comprising the following steps: Step 1: Prepare a patterned sapphire substrate with a surface consisting of a periodic trench array; Step 2: Deposit mask material on patterned sapphire substrate, and then remove the mask material from the crystal growth surface by photolithography etching; Step 3: First, a buffer layer is grown on the crystal growth surface at different locations using a low-temperature GaN or low-temperature AlN buffer layer process. Then, semi-polar GaN is grown at high temperature until a wavy merging layer is formed on the surface. Finally, the wavy surface is polished flat. Step 4: Fabricate micro-optoelectronic devices directly in the low defect density region of the polished surface or after depositing a superlattice layer on the polished surface.

[0016] The beneficial effects of this invention are: the low defect density semi-polar GaN-based optoelectronic device structure and its fabrication method, and the semi-polarity ( GaN, through its controllable tilted lattice partially offsetting polarization effects, can effectively suppress QCSE and improve radiative recombination efficiency, showing great potential for improving the efficiency of long-wavelength (green, yellow, and red) InGaN quantum wells; simultaneously, the semi-polar ( GaN materials have relatively good quality, allowing for the creation of regions with lower defect density. Furthermore, defect density can be further reduced by growing superlattices, resulting in half-polarity (…). GaN can maintain high quantum efficiency even at low current density, thus enabling the development of efficient, high-brightness, and low-power green / yellow / red micro-optoelectronic devices. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the patterned sapphire substrate of the present invention; Figure 2 This is a partial magnified view of the crystal growth surface position of the patterned sapphire substrate of the present invention; Figure 3 This invention describes the growth of semi-polar (S) on a patterned sapphire substrate. Schematic diagram of the structure after GaN; Figure 4 This is a cross-sectional schematic diagram of the fabrication of micro optoelectronic devices in a low defect density region according to the present invention; Figure 5 This is a top view schematic diagram of the fabrication of micro optoelectronic devices in a low defect density region according to the present invention; Figure 6 This invention is based on semi-polarity ( A cross-sectional schematic diagram of a micro-optoelectronic device fabricated after depositing a superlattice layer on GaN; Figure 7 This invention is based on semi-polarity ( A top view of a micro-optoelectronic device fabricated after depositing a superlattice layer on GaN; Figure 8 This invention grows semi-polar ( ) on a patterned sapphire substrate. Electron micrograph of GaN.

[0018] In the figure, 110. Patterned sapphire substrate, 115. Crystal growth surface, 120. Mask material, 130. Semi-polar GaN, 131. Low defect density region, 132. High defect density region, 133. Micro-optoelectronic device, 140. Superlattice layer, 141. First superlattice material layer, 142. Second superlattice material layer, 150. Bulk GaN capping layer. Detailed Implementation

[0019] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments.

[0020] This invention provides a low-defect-density semi-polar GaN-based optoelectronic device structure, such as... Figure 1 and Figure 2 As shown, the top surface of the patterned sapphire substrate 110 is adjacent to the sapphire ( The patterned sapphire substrate 110, with its approximately parallel surface, includes an array of trenches with crystal growth surfaces 115. The crystal growth surfaces 115 are approximately parallel to the sapphire c-plane (0001), and the absolute value of the angle difference between the crystal growth surfaces 115 and the sapphire c-plane is within 5°. This results in the c-plane of the patterned sapphire substrate 110 forming an angle with the top surface (unlike conventional polar GaN sapphire substrates where the c-plane is parallel to the top surface), thus partially offsetting the polarization effect. Other surfaces of the patterned sapphire substrate besides the crystal growth surface 115, i.e., amorphous growth surfaces, are coated with a mask material 120 to prevent crystal growth from the sapphire.

[0021] The trench period T of the patterned sapphire substrate 110 is in the range of 4 μm to 50 μm, preferably T ≤ 10 μm; and the trench depth D is 50 nm to 2 μm. The mask material 120 is an oxide or nitride formed by high-temperature deposition, and its thickness is 20 nm to 500 nm.

[0022] This invention provides a semi-polar ( GaN structure, such as Figure 3 and Figure 8 As shown, semi-polar ( GaN 130 is grown on a patterned sapphire substrate 110, and grown to a semi-polar GaN ( The patterned features of 130 on the sapphire substrate 110 merge to form a wavy top surface. Semi-polar ( The GaN 130 consists of alternating low-defect-density regions 131 and high-defect-density regions 132. The high-defect-density region 132 is formed near the crystal growth surface 115. Due to radial forces causing dislocations during growth, high and low defect-density regions are formed. The interface between the high and low defect-density regions forms an angle of approximately 15° with the normal to the crystal surface. Therefore, the high-defect-density region 132 corresponds to the area above the trench recess in the patterned sapphire substrate 110, while the low-defect-density region 131 corresponds to the step region. Regardless of the period T of the patterned sapphire substrate 110, the lateral width of the high-defect-density region 132 is approximately 2 μm.

[0023] Figure 4 Is Figure 3 Based on this, chemical mechanical polishing (CMP) was performed to transform the semi-polar ( The wavy top surface of GaN is planarized, such as... Figure 4 and Figure 5 As shown, a micro-optoelectronic device 133 can then be fabricated in the low defect density region 131. The micro-optoelectronic device 133 is one of a micro-LED, a micro-laser, a light-emitting diode, or an electronic transistor.

[0024] like Figure 6 and Figure 7 As shown, semi-polar ( After the top surface of GaN is planarized, a superlattice layer 140 can be deposited. The superlattice layer 140 is composed of two thin layers of different materials, a first superlattice material layer 141 and a second superlattice material layer 142, which are grown alternately to form a GaN / AlGaN superlattice or an AlN / GaN superlattice. A bulk GaN capping layer 150 is deposited on the superlattice layer 140. Finally, a micro optoelectronic device 133 is fabricated on the bulk GaN capping layer 150.

[0025] If superlattice layer 140 is a GaN / AlGaN superlattice, it consists of periodically alternating GaN and AlGaN sublayers with a period of 5–10. Within a single period, the thickness of the GaN sublayer is 1 nm–5 nm, and the thickness of the AlGaN sublayer is 1 nm–5 nm. If superlattice layer 140 is an AlN / GaN superlattice, its structure consists of periodically alternating AlN and GaN sublayers with a period of 5–10. Within a single period, the thickness of the AlN sublayer is 1 nm–5 nm, and the thickness of the GaN sublayer 142 is 1 nm–10 nm.

[0026] This invention relates to a low-defect-density semi-polar GaN-based optoelectronic device structure, semi-polar ( GaN, through its controllable tilted lattice partially offsetting polarization effects, can effectively suppress QCSE and improve radiative recombination efficiency, showing great potential for improving the efficiency of long-wavelength (green, yellow, and red) InGaN quantum wells; simultaneously, the semi-polar ( GaN materials have relatively good quality and contain low defect density regions with even lower defect density131, resulting in half-polarity ( GaN can maintain high quantum efficiency even at low current density, thus enabling the development of efficient, high-brightness, and low-power green / yellow / red micro-optoelectronic devices.

[0027] Furthermore, growing superlattices on semi-polar GaN can alleviate stress caused by lattice mismatch, change the direction of dislocation propagation, block the propagation of most penetrating dislocations caused by substrate-epitaxy layer mismatch, reduce dislocation density, thereby effectively reducing defect density in materials and devices, and thus improving material performance, providing a foundation for the fabrication of devices such as high-brightness green Micro-LEDs, high-power radio frequency chips, and visible light communication lasers.

[0028] This invention also provides a method for fabricating a low-defect-density semi-polar GaN-based optoelectronic device structure, comprising the following steps: First, a patterned sapphire substrate 110 is fabricated. Planar sapphire substrate ( The top surface of the substrate is approximately parallel to the top surface of the substrate. Photoresist is coated on the top surface of the substrate, exposed, and developed to form a pattern. Then, a dry etching process is used to etch the sapphire substrate, and after etching, a patterned sapphire substrate 110 with a periodic trench array on the top surface is formed. The substrate surface is cleaned with an organic solvent to remove the remaining photoresist.

[0029] Next, a mask material 120 for inhibiting GaN growth is prepared. Oxides or nitrides are deposited by plasma chemical vapor deposition (PECVD) or atomic layer deposition (ALD); then photoresist is coated on the surface and the crystal growth surface 115 is exposed by photolithography; then the mask material on the crystal growth surface 115 is removed by wet or dry etching process.

[0030] Then, growth semi-polar ( GaN 130. First, a buffer layer is grown from the crystal growth surface 115 at different locations on the patterned sapphire substrate 110 using a low-temperature GaN or low-temperature AlN buffer layer process to form an integrated circuit-grade quality semi-polar GaN or AlN at a low temperature of 450℃ to 600℃. Then, the semi-polar GaN is grown at a high temperature until a wavy merging layer is formed on the surface at a high temperature of 900℃ to 1100℃. Finally, the surface of the semi-polar GaN 130 is polished using CMP.

[0031] Finally, a micro-optoelectronic device 133 is fabricated in the low defect density region 131; alternatively, a superlattice layer 140 structure is grown, i.e., a first superlattice material layer 141 is deposited first, followed by a second superlattice material layer 142, and this process is repeated several times until the periodic superlattice layer 140 is fabricated. Next, a bulk GaN capping layer 150 is deposited on the superlattice layer 140, and the micro-optoelectronic device 133 is fabricated on the bulk GaN capping layer 150.

[0032] Example 1 This invention provides a low-defect-density semi-polar GaN-based optoelectronic device structure, comprising a periodically patterned sapphire substrate 110 and a semi-polar ( GaN 130; half-polar ( GaN 130 is divided into a low defect density region 131 and a high defect density region 132, and the micro optoelectronic device 133 is distributed in the low defect density region 131.

[0033] The periodically patterned sapphire substrate 110 includes an array of trenches with crystal growth surfaces 115, and a mask material 120 is deposited on the amorphous growth surfaces to suppress crystal growth from the sapphire. The trench period T of the patterned sapphire substrate 110 is 10 μm, and the trench depth D is 1 μm. The mask material 120 is an oxide (such as SiO2) formed by PECVD deposition, with a thickness of 30 nm.

[0034] semi-polar ( GaN 130 is grown on a patterned sapphire substrate 110, and grown to a semi-polar GaN ( The patterned features of 130 on the sapphire substrate 110 are merged to form a wavy top surface. Through CMP, the semi-polar ( The wavy top surface of GaN 130 is planarized, which is divided into a low defect density region 131 and a high defect density region 132. A microlaser is fabricated in the low defect density region 131.

[0035] This invention also provides a method for fabricating a low-defect-density semi-polar GaN-based optoelectronic device structure, comprising the following steps: First, a patterned sapphire substrate 110 is fabricated. Planar sapphire substrate ( The top surface of the substrate is approximately parallel to the top surface of the substrate. Photoresist is coated on the top surface of the substrate, exposed, and developed to form a pattern. Then, a dry etching process is used to etch the sapphire substrate, and after etching, a patterned sapphire substrate 110 with a periodic trench array on the top surface is formed. The substrate surface is cleaned with an organic solvent to remove the remaining photoresist.

[0036] Next, a mask material 120 for inhibiting GaN growth is prepared. An oxide is deposited by plasma chemical vapor deposition (PECVD); then a photoresist is coated on the surface and the crystal growth surface 115 is exposed by photolithography; then the mask material on the crystal growth surface 115 is removed by wet or dry etching process.

[0037] Then, growth semi-polar ( GaN 130. First, a buffer layer is grown from the crystal growth surface 115 at different locations on the patterned sapphire substrate 110 using a low-temperature AlN buffer layer process to form integrated circuit-grade quality semi-polar AlN at a low temperature of 450°C; then, semi-polar GaN is grown at a high temperature until a wavy merging layer is formed on the surface at a high temperature of 900°C; finally, CMP is used to bond the semi-polar ( The GaN130 surface is polished.

[0038] Finally, a microlaser was fabricated in the low defect density region 131.

[0039] Example 2 This invention provides a low-defect-density semi-polar GaN-based optoelectronic device structure, comprising, from bottom to top, a periodically patterned sapphire substrate 110, a semi-polar ( A microlaser is fabricated on the bulk GaN capping layer 150, consisting of a GaN layer 130, a superlattice layer 140, and a bulk GaN capping layer 150.

[0040] The periodically patterned sapphire substrate 110 includes an array of trenches with crystal growth surfaces 115, and a mask material 120 is deposited on the amorphous growth surfaces to suppress crystal growth from the sapphire. The trench period T of the patterned sapphire substrate 110 is 10 μm, and the trench depth D is 1 μm. The mask material 120 is an oxide (such as SiO2) formed by PECVD deposition, with a thickness of 30 nm.

[0041] semi-polar ( GaN 130 is grown on a patterned sapphire substrate 110, and grown to a semi-polar GaN ( The patterned features of 130 on the sapphire substrate 110 are merged to form a wavy top surface, and the semi-polarity is integrated by CMP. The wavy top surface of GaN 130 is planarized.

[0042] Superlattice layer 140 is deposited on a semi-polar ( On top of GaN 130, thin layers of two different materials are formed, namely GaN sublayers and AlGaN sublayers that are periodically grown alternately, with a period of 7. A bulk GaN capping layer 150 is deposited on the superlattice layer 140, and finally a microlaser is fabricated on the bulk GaN capping layer 150.

[0043] This invention also provides a method for fabricating a low-defect-density semi-polar GaN-based optoelectronic device structure, comprising the following steps: First, a patterned sapphire substrate 110 is fabricated. Planar sapphire substrate ( The top surface of the substrate is approximately parallel to the top surface of the substrate. Photoresist is coated on the top surface of the substrate, exposed, and developed to form a pattern. Then, a dry etching process is used to etch the sapphire substrate, and after etching, a patterned sapphire substrate 110 with a periodic trench array on the top surface is formed. The substrate surface is cleaned with an organic solvent to remove the remaining photoresist.

[0044] Next, a mask material 120 for inhibiting GaN growth is prepared. An oxide is deposited by plasma chemical vapor deposition (PECVD); then a photoresist is coated on the surface and the crystal growth surface 115 is exposed by photolithography; then the mask material on the crystal growth surface 115 is removed by wet or dry etching process.

[0045] Then, growth semi-polar ( GaN 130. First, a buffer layer is grown from the crystal growth surface 115 at different locations on the patterned sapphire substrate 110 using a low-temperature AlN buffer layer process to form integrated circuit-grade quality semi-polar AlN at a low temperature of 450°C; then, semi-polar GaN is grown at a high temperature until a wavy merging layer is formed on the surface at a high temperature of 900°C; finally, CMP is used to bond the semi-polar ( The GaN130 surface is polished.

[0046] Finally, a superlattice layer 140 structure is grown. First, a GaN sublayer is deposited, then an AlGaN sublayer is deposited, and this process is repeated seven times until the periodic superlattice layer 140 is fabricated. Next, a bulk GaN capping layer 150 is deposited on the superlattice layer 140, and a microlaser is fabricated on the bulk GaN capping layer 150.

[0047] Example 3 This invention provides a low-defect-density semi-polar GaN-based optoelectronic device structure, comprising a periodically patterned sapphire substrate 110 and a semi-polar ( GaN 130; half-polar ( GaN 130 is divided into a low defect density region 131 and a high defect density region 132, and the micro optoelectronic device 133 is distributed in the low defect density region 131.

[0048] The periodically patterned sapphire substrate 110 includes an array of trenches with crystal growth surfaces 115, and a mask material 120 is deposited on the amorphous growth surfaces to suppress crystal growth from the sapphire. The trench period T of the patterned sapphire substrate 110 is 4 μm, and the trench depth D is 50 nm. The mask material 120 is a nitride (such as SiN) formed by ALD deposition, and its thickness is 20 nm.

[0049] semi-polar ( GaN 130 is grown on a patterned sapphire substrate 110, and grown to a semi-polar GaN ( The patterned features of 130 on the sapphire substrate 110 are merged to form a wavy top surface. The semi-polar ( ) The wavy top surface of GaN 130 is planarized, which is divided into a low defect density region 131 and a high defect density region 132. Micro LEDs are fabricated in the low defect density region 131.

[0050] This invention also provides a method for fabricating a low-defect-density semi-polar GaN-based optoelectronic device structure, comprising the following steps: First, a patterned sapphire substrate 110 is fabricated. Planar sapphire substrate ( The top surface of the substrate is approximately parallel to the top surface of the substrate. Photoresist is coated on the top surface of the substrate, exposed, and developed to form a pattern. Then, a dry etching process is used to etch the sapphire substrate, and after etching, a patterned sapphire substrate 110 with a periodic trench array on the top surface is formed. The substrate surface is cleaned with an organic solvent to remove the remaining photoresist.

[0051] Next, a mask material 120 for inhibiting GaN growth is prepared. Nitrides are deposited using atomic layer deposition (ALD); then photoresist is coated on the surface and the crystal growth surface 115 is exposed using a photolithography scheme; finally, the mask material on the crystal growth surface 115 is removed using a wet or dry etching process.

[0052] Then, growth semi-polar ( GaN 130. First, a buffer layer is grown from the crystal growth surface 115 at different locations on the patterned sapphire substrate 110 using a low-temperature GaN buffer layer process to form integrated circuit-grade quality semi-polar GaN at a low temperature of 600°C; then, the semi-polar GaN is grown at a high temperature until a wavy merging layer is formed on the surface, at a high temperature of 1100°C; finally, CMP is used to bond the semi-polar GaN ( The GaN130 surface is polished.

[0053] Finally, micro-LEDs were fabricated in the low defect density region 131.

[0054] Example 4 This invention provides a low-defect-density semi-polar GaN-based optoelectronic device structure, comprising, from bottom to top, a periodically patterned sapphire substrate 110, a semi-polar ( A micro LED is fabricated on a bulk GaN capping layer 150, consisting of a GaN layer 130, a superlattice layer 140, and a bulk GaN capping layer 150.

[0055] The periodically patterned sapphire substrate 110 includes an array of trenches with crystal growth surfaces 115, and a mask material 120 is deposited on the amorphous growth surfaces to suppress crystal growth from the sapphire. The trench period T of the patterned sapphire substrate 110 is 4 μm, and the trench depth D is 50 nm. The mask material 120 is a nitride (such as SiN) formed by ALD deposition, and its thickness is 20 nm.

[0056] semi-polar ( GaN 130 is grown on a patterned sapphire substrate 110, and grown to a semi-polar GaN ( The patterned features of 130 on the sapphire substrate 110 are merged to form a wavy top surface, and the semi-polarity is integrated by CMP. The wavy top surface of GaN 130 is planarized.

[0057] Superlattice layer 140 is deposited on a semi-polar ( On top of GaN 130, thin layers of two different materials are formed, namely periodically alternating AlN sublayers and GaN sublayers, with a period of 5. A bulk GaN capping layer 150 is deposited on the superlattice layer 140, and finally a micro LED is fabricated on the bulk GaN capping layer 150.

[0058] This invention also provides a method for fabricating a low-defect-density semi-polar GaN-based optoelectronic device structure, comprising the following steps: First, a patterned sapphire substrate 110 is fabricated. Planar sapphire substrate ( The top surface of the substrate is approximately parallel to the top surface of the substrate. Photoresist is coated on the top surface of the substrate, exposed, and developed to form a pattern. Then, a dry etching process is used to etch the sapphire substrate, and after etching, a patterned sapphire substrate 110 with a periodic trench array on the top surface is formed. The substrate surface is cleaned with an organic solvent to remove the remaining photoresist.

[0059] Next, a mask material 120 for inhibiting GaN growth is prepared. Nitrides are deposited using atomic layer deposition (ALD); then photoresist is coated on the surface and the crystal growth surface 115 is exposed using a photolithography scheme; finally, the mask material on the crystal growth surface 115 is removed using a wet or dry etching process.

[0060] Then, growth semi-polar ( GaN 130. First, a buffer layer is grown from the crystal growth surface 115 at different locations on the patterned sapphire substrate 110 using a low-temperature GaN buffer layer process to form integrated circuit-grade quality semi-polar GaN at a low temperature of 600°C; then, the semi-polar GaN is grown at a high temperature until a wavy merging layer is formed on the surface, at a high temperature of 1100°C; finally, CMP is used to bond the semi-polar GaN ( The GaN130 surface is polished.

[0061] Finally, a superlattice layer 140 structure is grown. An AlN sublayer is deposited first, followed by a GaN sublayer, and this process is repeated five times until the periodic superlattice layer 140 is fabricated. Next, a bulk GaN capping layer 150 is deposited on the superlattice layer 140, and a micro-LED is fabricated on the bulk GaN capping layer 150.

[0062] Example 5 This invention provides a low-defect-density semi-polar GaN-based optoelectronic device structure, comprising a periodically patterned sapphire substrate 110 and a semi-polar ( GaN 130; half-polar ( GaN 130 is divided into a low defect density region 131 and a high defect density region 132, and the micro optoelectronic device 133 is distributed in the low defect density region 131.

[0063] The periodically patterned sapphire substrate 110 includes an array of trenches with crystal growth surfaces 115, and a mask material 120 is deposited on the amorphous growth surfaces to suppress crystal growth from the sapphire. The trench period T of the patterned sapphire substrate 110 is 50 μm, and the trench depth D is 2 μm. The mask material 120 is an oxide (such as SiO2) formed by ALD deposition, with a thickness of 500 nm.

[0064] semi-polar ( GaN 130 is grown on a patterned sapphire substrate 110, and grown to a semi-polar GaN ( The patterned features of 130 on the sapphire substrate 110 are merged to form a wavy top surface. Through CMP, the semi-polar ( The wavy top surface of GaN 130 is planarized, which is divided into a low defect density region 131 and a high defect density region 132. Electronic transistors are fabricated in the low defect density region 131.

[0065] This invention also provides a method for fabricating a low-defect-density semi-polar GaN-based optoelectronic device structure, comprising the following steps: First, a patterned sapphire substrate 110 is fabricated. Planar sapphire substrate ( The top surface of the substrate is approximately parallel to the top surface of the substrate. Photoresist is coated on the top surface of the substrate, exposed, and developed to form a pattern. Then, a dry etching process is used to etch the sapphire substrate, and after etching, a patterned sapphire substrate 110 with a periodic trench array on the top surface is formed. The substrate surface is cleaned with an organic solvent to remove the remaining photoresist.

[0066] Next, a mask material 120 for inhibiting GaN growth is prepared. An oxide is deposited using atomic layer deposition (ALD); then photoresist is coated on the surface and the crystal growth surface 115 is exposed using a photolithography scheme; finally, the mask material on the crystal growth surface 115 is removed using a wet or dry etching process.

[0067] Then, growth semi-polar ( GaN 130. First, a buffer layer is grown from the crystal growth surface 115 at different locations on the patterned sapphire substrate 110 using a low-temperature GaN buffer layer process to form integrated circuit-grade quality semi-polar GaN at a low temperature of 500°C; then, the semi-polar GaN is grown at a high temperature until a wavy merging layer is formed on the surface, at a high temperature of 1000°C; finally, CMP is used to bond the semi-polar GaN ( The GaN130 surface is polished.

[0068] Finally, electronic transistors are fabricated in the low defect density region 131.

[0069] Example 6 This invention provides a low-defect-density semi-polar GaN-based optoelectronic device structure, comprising, from bottom to top, a periodically patterned sapphire substrate 110, a semi-polar ( A micro LED is fabricated on a bulk GaN capping layer 150, consisting of a GaN layer 130, a superlattice layer 140, and a bulk GaN capping layer 150.

[0070] The periodically patterned sapphire substrate 110 includes an array of trenches with crystal growth surfaces 115, and a mask material 120 is deposited on the amorphous growth surfaces to suppress crystal growth from the sapphire. The trench period T of the patterned sapphire substrate 110 is 50 μm, and the trench depth D is 2 μm. The mask material 120 is an oxide (such as SiO2) formed by ALD deposition, with a thickness of 500 nm.

[0071] semi-polar ( GaN 130 is grown on a patterned sapphire substrate 110, and grown to a semi-polar GaN ( The patterned features of 130 on the sapphire substrate 110 are merged to form a wavy top surface, and the semi-polarity is integrated by CMP. The wavy top surface of GaN 130 is planarized.

[0072] Superlattice layer 140 is deposited on a semi-polar ( On top of GaN 130, thin layers of two different materials are formed, namely periodically alternating AlN sublayers and GaN sublayers, with a period of 10. A bulk GaN capping layer 150 is deposited on the superlattice layer 140, and finally a micro LED is fabricated on the bulk GaN capping layer 150.

[0073] This invention also provides a method for fabricating a low-defect-density semi-polar GaN-based optoelectronic device structure, comprising the following steps: First, a patterned sapphire substrate 110 is fabricated. Planar sapphire substrate ( The top surface of the substrate is approximately parallel to the top surface of the substrate. Photoresist is coated on the top surface of the substrate, exposed, and developed to form a pattern. Then, a dry etching process is used to etch the sapphire substrate, and after etching, a patterned sapphire substrate 110 with a periodic trench array on the top surface is formed. The substrate surface is cleaned with an organic solvent to remove the remaining photoresist.

[0074] Next, a mask material 120 for inhibiting GaN growth is prepared. Nitrides are deposited using atomic layer deposition (ALD); then photoresist is coated on the surface and the crystal growth surface 115 is exposed using a photolithography scheme; finally, the mask material on the crystal growth surface 115 is removed using a wet or dry etching process.

[0075] Then, growth semi-polar ( GaN 130. First, a buffer layer is grown from the crystal growth surface 115 at different locations on the patterned sapphire substrate 110 using a low-temperature GaN buffer layer process to form integrated circuit-grade quality semi-polar GaN at a low temperature of 500°C; then, the semi-polar GaN is grown at a high temperature until a wavy merging layer is formed on the surface, at a high temperature of 1000°C; finally, CMP is used to bond the semi-polar GaN ( The GaN130 surface is polished.

[0076] Finally, a superlattice layer 140 structure is grown. An AlN sublayer is deposited first, followed by a GaN sublayer, and this process is repeated 10 times until the periodic superlattice layer 140 is fabricated. Next, a bulk GaN capping layer 150 is deposited on the superlattice layer 140, and a micro-LED is fabricated on the bulk GaN capping layer 150.

Claims

1. A low-defect-density semi-polar GaN-based optoelectronic device structure, characterized in that, It includes a periodically patterned sapphire substrate (110), on which a trench array with a crystal growth surface (115) is formed, and on the crystal growth surface (115) a semi-polar GaN (130) is grown above the patterned sapphire substrate (110) and the patterned features are merged.

2. The low defect density semi-polar GaN-based optoelectronic device structure as described in claim 1, characterized in that, The semi-polar GaN (130) is located in a high defect density region (132) above the crystal growth surface (115), and the remaining region is a low defect density region (131). A micro optoelectronic device (133) is disposed on the surface of the low defect density region (131).

3. The low defect density semi-polar GaN-based optoelectronic device structure as described in claim 2, characterized in that, The lateral width of the high defect density region (132) is ≤2um.

4. The low defect density semi-polar GaN-based optoelectronic device structure as described in claim 1, characterized in that, A superlattice layer (140) is deposited on the semi-polar GaN (130), a bulk GaN capping layer (150) is deposited on the superlattice layer (140), and a micro optoelectronic device (133) is disposed on the surface of the bulk GaN capping layer (150).

5. The superlattice structure based on semi-polar GaN as described in claim 4, characterized in that, The superlattice layer (140) is composed of a first superlattice material layer (141) and a second superlattice material layer (142) that are periodically grown alternately, with a period of 5 to 10.

6. The superlattice structure based on semi-polar GaN as described in claim 5, characterized in that, The superlattice layer (140) is composed of GaN sublayers and AlGaN sublayers that are periodically and alternately grown. The thickness of the GaN sublayer in a single period is 1 nm to 5 nm, and the thickness of the AlGaN sublayer is 1 nm to 5 nm; or, it is composed of AlN sublayers and GaN sublayers that are periodically and alternately grown. The thickness of the AlN sublayer in a single period is 1 nm to 5 nm, and the thickness of the GaN sublayer is 1 nm to 10 nm.

7. The low defect density semi-polar GaN-based optoelectronic device structure as described in claim 1, characterized in that, The trench period T of the patterned sapphire substrate (110) is 4um to 50um, preferably 4um to 10um; the trench depth D is 50nm to 2um.

8. The low defect density semi-polar GaN-based optoelectronic device structure as described in claim 1, characterized in that, The absolute value of the angle difference between the crystal growth surface (115) and the sapphire 0001 surface is within 5°.

9. The low defect density semi-polar GaN-based optoelectronic device structure as described in claim 1, characterized in that, A mask material (120) is deposited on the upper surface of the patterned sapphire substrate (110) at a position outside the crystal growth surface (115). The mask material (120) is an oxide or nitride with a thickness of 20 nm to 500 nm.

10. The method for fabricating a low-defect-density semi-polar GaN-based optoelectronic device structure as described in claim 1, characterized in that, Includes the following steps: Step 1: Prepare a patterned sapphire substrate with a surface consisting of a periodic trench array; Step 2: Deposit mask material on patterned sapphire substrate, and then remove the mask material from the crystal growth surface by photolithography etching; Step 3: First, a buffer layer is grown on the crystal growth surface at different locations using a low-temperature GaN or low-temperature AlN buffer layer process. Then, semi-polar GaN is grown at high temperature until a wavy merging layer is formed on the surface. Finally, the wavy surface is polished flat. Step 4: Fabricate micro-optoelectronic devices directly in the low defect density region of the polished surface or after depositing a superlattice layer on the polished surface.

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