Light emitting diode with improved toughness and preparation method thereof

Abstract

The invention provides a toughness-improved light emitting diode and a preparation method thereof, and belongs to the technical field of photoelectron manufacturing. The light-emitting diode comprises an epitaxial layer and two bonding pads, and the two bonding pads are located on the first surface of the epitaxial layer and arranged on the two sides of the first surface at intervals; the ratio of the length to the width of the first surface ranges from 2: 1 to 5: 1, the area of the first surface ranges from 60 mil2 to 70 mil2, and the distance between the two bonding pads of the light-emitting diodes with different ratios of the length to the width of the first surface is the same. The toughness of the light-emitting diode can be improved, and the light-emitting diode is prevented from being easily bent or broken due to external force impact.

Description

Technical Field

[0001] This disclosure relates to the field of optoelectronic manufacturing technology, and in particular to a light-emitting diode with improved toughness and a method for its fabrication. Background Technology

[0002] Light-emitting diodes (LEDs) are highly influential new products in the optoelectronics industry. They are characterized by small size, long lifespan, rich and colorful colors, and low energy consumption. They are widely used in lighting, displays, signal lights, backlights, toys and other fields.

[0003] In related technologies, light-emitting diodes (LEDs) typically include a substrate and an epitaxial layer stacked sequentially. Pads are also provided on the surface of the epitaxial layer, allowing electrical connection between the pads and the epitaxial layer. Current is injected into the epitaxial layer through the pads to control the LED's emission.

[0004] However, to avoid the pads blocking light, the pads are usually placed away from the central area of ​​the epitaxial layer. Therefore, the pads are distributed at the edges of the epitaxial layer, resulting in a smaller pad area. LEDs with smaller pads are also less flexible, making them prone to deformation, bending, or brittle fracture when subjected to bending or external impact. Summary of the Invention

[0005] This disclosure provides an improved toughness light-emitting diode (LED) and its fabrication method, which can improve the toughness of the LED and prevent it from easily bending or breaking due to external impact. The technical solution is as follows:

[0006] On one hand, this disclosure provides a light-emitting diode (LED) comprising: an epitaxial layer and two pads, the two pads being located on a first surface of the epitaxial layer and arranged at intervals on both sides of the first surface; the length-to-width ratio of the first surface is 2:1 to 5:1, and the area of ​​the first surface is 60 mil. 2 Up to 70mil 2 The distance between the two pads of the light-emitting diodes with different length-to-width ratios on the first surface is the same.

[0007] In one implementation of this disclosure, the ratio of the area of ​​the orthographic projection of the two pads onto the first surface to the area of ​​the first surface is 25% to 45%.

[0008] In another implementation of this disclosure, when the length-to-width ratio of the first surface is 2:1, the ratio of the area of ​​the orthographic projection of the two pads on the first surface to the area of ​​the first surface is 29%; when the length-to-width ratio of the first surface is 3:1, the ratio of the area of ​​the orthographic projection of the two pads on the first surface to the area of ​​the first surface is 35%; when the length-to-width ratio of the first surface is 4:1, the ratio of the area of ​​the orthographic projection of the two pads on the first surface to the area of ​​the first surface is 41%; and when the length-to-width ratio of the first surface is 5:1, the ratio of the area of ​​the orthographic projection of the two pads on the first surface to the area of ​​the first surface is 44%.

[0009] In another implementation of this disclosure, the welding tensile strength of the pad is 131g to 149g, and the welding tensile strength of the pad is proportional to the ratio of the length to the width of the first surface.

[0010] In another implementation of this disclosure, when the length-to-width ratio of the first surface is 2:1, the welding tensile strength of the pad is 131g; when the length-to-width ratio of the first surface is 3:1, the welding tensile strength of the pad is 142g; when the length-to-width ratio of the first surface is 4:1, the welding tensile strength of the pad is 145g; and when the length-to-width ratio of the first surface is 5:1, the welding tensile strength of the pad is 149g.

[0011] In another implementation of the present disclosure, the thermal resistance of the light-emitting diode is 7.9°C / W to 9.3°C / W, and the thermal resistance of the light-emitting diode is inversely proportional to the ratio of the length to the width of the first surface.

[0012] In another implementation of this disclosure, when the length-to-width ratio of the first surface is 2:1, the thermal resistance of the light-emitting diode is 9.3°C / W; when the length-to-width ratio of the first surface is 3:1, the thermal resistance of the light-emitting diode is 8.2°C / W; when the length-to-width ratio of the first surface is 4:1, the thermal resistance of the light-emitting diode is 8.1°C / W; and when the length-to-width ratio of the first surface is 5:1, the thermal resistance of the light-emitting diode is 7.9°C / W.

[0013] In another implementation of the embodiments of this disclosure, the spacing between the two pads is 110 μm to 130 μm.

[0014] On the other hand, embodiments of this disclosure provide a method for fabricating a light-emitting diode, the method comprising: fabricating an epitaxial layer on a substrate, wherein a first surface of the epitaxial layer is located away from the substrate, the length-to-width ratio of the first surface is 2:1 to 5:1, and the area of ​​the first surface is 60 mil. 2 Up to 70mil 2 Pads are formed on the first surface of the epitaxial layer. Two pads are located on the first surface of the epitaxial layer and are spaced apart on both sides of the first surface. The distance between the two pads of the light-emitting diodes with different length-to-width ratios of the first surface is the same.

[0015] In another implementation of the present disclosure, after forming pads on the first surface of the epitaxial layer, the method further includes: mounting the prepared plurality of light-emitting diodes on a long circuit board to form a light-emitting strip; wrapping the light-emitting strip around a test rod for a set time; and detecting whether each light-emitting diode of the light-emitting strip is damaged.

[0016] The beneficial effects of the technical solutions provided in this disclosure include at least the following:

[0017] The first surface of the epitaxial layer of the light-emitting diode (LED) provided in this embodiment has two spaced-apart pads. The length-to-width ratio of the first surface on the epitaxial layer used for mounting the pads is limited to 2:1 to 5:1, while the area of ​​the first surface is fixed. Furthermore, the distance between the two pads is the same for LEDs with different length-to-width ratios on the first surface. This is equivalent to lengthening the epitaxial layer while maintaining a constant area. With a constant pad distance, the pads can extend towards the edge of the epitaxial layer, thereby increasing the pad area. The increased pad area enhances the heat dissipation capacity of the LED and improves its toughness, thus increasing its impact resistance. Therefore, the LED is less prone to pad breakage or detachment during packaging due to thermal stress concentration or mechanical vibration. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a top view of a light-emitting diode provided in an embodiment of this disclosure;

[0020] Figure 2 This is a top view of a light-emitting diode provided in an embodiment of this disclosure;

[0021] Figure 3 This is a top view of a light-emitting diode provided in an embodiment of this disclosure;

[0022] Figure 4 This is a top view of a light-emitting diode provided in an embodiment of this disclosure;

[0023] Figure 5 This is a flowchart of a method for fabricating a light-emitting diode according to an embodiment of this disclosure.

[0024] The markings in the diagram are explained as follows:

[0025] 10. Substrate;

[0026] 20. Epitaxial layer; 21. First surface;

[0027] 30. Electrode;

[0028] 40. Solder pads. Detailed Implementation

[0029] To make the objectives, technical solutions, and advantages of this disclosure clearer, the embodiments of this disclosure will be described in further detail below with reference to the accompanying drawings.

[0030] Unless otherwise defined, the technical or scientific terms used herein shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” “third,” and similar terms used in this patent application specification and claims do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an” or “a” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “comprising” or “including” and similar terms mean that the elements or objects preceding “comprising” or “including” encompass the elements or objects listed following “comprising” or “including” and their equivalents, and do not exclude other elements or objects. The terms “connected” or “linked” and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms “upper,” “lower,” “left,” “right,” “top,” and “bottom,” etc., are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described objects changes.

[0031] Figure 1 This is a top view of a light-emitting diode provided in an embodiment of this disclosure. Figure 2 This is a top view of a light-emitting diode provided in an embodiment of this disclosure. Figure 3 This is a top view of a light-emitting diode provided in an embodiment of this disclosure. Figure 4 This is a top view of a light-emitting diode provided in an embodiment of this disclosure. Figures 1 to 4 As shown, the light-emitting diode includes an epitaxial layer 20 and two pads 40, which are located on the first surface 21 of the epitaxial layer 20 and are arranged at intervals on both sides of the first surface 21.

[0032] Figure 1 This illustration shows a light-emitting diode with a length H to width h ratio of 2:1 on the first surface 21. Figure 2 This illustration shows a light-emitting diode with a length H to width h ratio of 3:1 on the first surface 21. Figure 3 This illustration shows a light-emitting diode with a length H to width h ratio of 4:1 on the first surface 21. Figure 4 This illustration shows a light-emitting diode with a length H to width h ratio of 5:1 on the first surface 21. For example... Figures 1 to 4 As shown, the distance L between the two pads 40 of the light-emitting diodes with different length-to-width ratios on the first surface 21 is the same.

[0033] In this embodiment, the length-to-width ratio of the first surface 21 is 2:1 to 5:1, and the area of ​​the first surface 21 is 60 mil. 2 Up to 70mil 2 .

[0034] The epitaxial layer 20 of the light-emitting diode provided in this embodiment has two spaced-apart pads 40 on its first surface 21. The length-to-width ratio of the first surface 21 on the epitaxial layer 20 for mounting the pads 40 is limited to 2:1 to 5:1, while the area of ​​the first surface 21 is fixed. Furthermore, the distance between the two pads 40 of light-emitting diodes with different length-to-width ratios of the first surface 21 is the same. This is equivalent to lengthening the size of the epitaxial layer 20 while keeping the area constant. With the pads 40 distance constant, the pads 40 can extend towards the edge of the epitaxial layer 20, thereby increasing the area of ​​the pads 40. The increased area of ​​the pads 40 enhances the heat dissipation capacity of the light-emitting diode and improves its toughness, thus enhancing its impact resistance. Therefore, the light-emitting diode is less prone to pad breakage or detachment during the packaging process due to thermal stress concentration or mechanical vibration.

[0035] Optionally, such as Figures 1 to 4 As shown, the spacing between the two pads 40 is 110μm to 130μm.

[0036] For example, the distance between the two pads 40 is 120 μm. This ensures that the distance between the two pads 40 of the light-emitting diode with different length-to-width ratios of the first surface 21 is the same, leaving sufficient space for the epitaxial layer 20 to emit light. This avoids the pads 40 from blocking light and absorbing too much light after the size of the pads 40 is increased, which would affect the light-emitting effect of the light-emitting diode.

[0037] Optionally, the ratio of the area of ​​the orthographic projection of the two pads 40 onto the first surface 21 to the area of ​​the first surface 21 is 25% to 45%.

[0038] In this embodiment, by elongating the epitaxial layer 20, the pad 40 can extend towards the edge of the epitaxial layer 20, thereby increasing the area of ​​the pad 40. Furthermore, after the area of ​​the pad 40 is increased, controlling the area of ​​the pad 40 to be no less than 25% of the first surface 21 ensures that the area of ​​the pad 40 is not too small, thus failing to improve the heat dissipation capacity and toughness of the light-emitting diode. Simultaneously, controlling the area of ​​the pad 40 to not exceed 45% prevents the pad 40 from covering most of the first surface 21, thereby preventing the pad 40 from blocking too much light and absorbing a large amount of light, ensuring the light-emitting effect of the light-emitting diode.

[0039] Optionally, such as Figure 1 As shown, when the ratio of the length to the width of the first surface 21 is 2:1, the ratio of the area of ​​the orthographic projection of the two pads 40 on the first surface 21 to the area of ​​the first surface 21 is 29%.

[0040] When the length-to-width ratio of the first surface 21 is 2:1, the ratio of the area of ​​the pad 40 to the area of ​​the epitaxial layer 20 is 29%. This ratio improves the heat dissipation and toughness of the LED, mitigating the problem of overheating caused by inefficient heat transfer. Simultaneously, the increased area of ​​the pad 40 balances its tensile strength and thermal stress distribution, enhancing its resistance to peeling.

[0041] Optionally, such as Figure 2 As shown, when the length-to-width ratio of the first surface 21 is 3:1, the ratio of the area of ​​the orthographic projection of the two pads 40 onto the first surface 21 to the area of ​​the first surface 21 is 35%.

[0042] When the length-to-width ratio of the first surface 21 is 3:1, the ratio of the area of ​​the pad 40 to the area of ​​the epitaxial layer 20 can be increased to 35%. This further improves the heat dissipation of the light-emitting diode, thereby extending its lifespan.

[0043] Furthermore, when the length-to-width ratio of the first surface 21 is 3:1, the length of the pad 40 is also increased. This extends the heat dissipation path, allowing heat to be distributed more evenly on the surface of the pad 40. Combined with the 35% area ratio of the pad 40, sufficient heat dissipation area is ensured while avoiding the risk of bridging caused by insufficient spacing between adjacent pads 40 due to an excessively large pad 40.

[0044] Optionally, when the length-to-width ratio of the first surface 21 is 4:1, the ratio of the area of ​​the orthographic projection of the two pads 40 onto the first surface 21 to the area of ​​the first surface 21 is 41%.

[0045] When the length-to-width ratio of the first surface 21 is 4:1, the ratio of the area of ​​the pad 40 to the area of ​​the epitaxial layer 20 can be increased to 41%. This further improves the heat dissipation of the LED, thereby extending its lifespan.

[0046] Furthermore, when the length-to-width ratio of the first surface 21 is 4:1, by increasing the heat diffusion area along the length of the pad 40, heat can be conducted more efficiently from the pad 40 to the edge region of the epitaxial layer 20. This design reduces thermal stress concentration and decreases the risk of pad 40 cracking due to temperature cycling. The 41% area ratio of the pad 40 ensures sufficient metal area to carry high current while avoiding heat accumulation due to excessive space occupation.

[0047] Optionally, when the length-to-width ratio of the first surface 21 is 5:1, the ratio of the area of ​​the orthographic projection of the two pads 40 onto the first surface 21 to the area of ​​the first surface 21 is 44%.

[0048] When the length-to-width ratio of the first surface 21 is 5:1, the ratio of the area of ​​the pad 40 to the area of ​​the epitaxial layer 20 can be increased to 44%. This further improves the heat dissipation of the LED, thereby extending its lifespan.

[0049] Furthermore, when the length-to-width ratio of the first surface 21 is 5:1, by increasing the heat diffusion area along the length of the pad 40, heat can be conducted more efficiently from the pad 40 to the edge region of the epitaxial layer 20. This design can reduce thermal stress concentration and decrease the risk of the pad 40 cracking due to temperature cycling.

[0050] Optionally, the soldering pull strength of the pad 40 is 131g to 149g, and the soldering pull strength of the pad 40 is proportional to the ratio of the length to the width of the first surface 21.

[0051] The welding pull strength of the solder pad 40 refers to the maximum value of the mechanical stress (such as shear force and pull-out force) that the solder pad 40 can withstand during use.

[0052] In this embodiment of the disclosure, after the epitaxial layer 20 is stretched, the area of ​​the pad 40 is also increased, which increases the mechanical stress that the pad 40 can withstand. Therefore, the larger the ratio of the length to the width of the first surface 21, the stronger the welding tensile strength of the pad 40.

[0053] The length-to-width ratio of the first surface 21 is in the range of 2:1 to 5:1, which enables the solder pad 40 to achieve a solder tensile strength of 131g to 149g. The high tensile strength indicates that the bonding force between the solder pad 40 and the epitaxial layer 20 is stronger, and it can effectively resist the damage caused by external mechanical stress (such as vibration and impact) and thermal stress (such as temperature cycling).

[0054] Optionally, when the length-to-width ratio of the first surface 21 is 2:1, the welding tensile strength of the pad 40 is 131g.

[0055] When the length-to-width ratio of the first surface 21 is 2:1, the welding tensile strength of the pad 40 can reach 131g. This aspect ratio of the light-emitting diode makes the bonding force between the pad 40 and the epitaxial layer 20 stronger, effectively resisting damage from external mechanical and thermal stresses.

[0056] Optionally, when the length-to-width ratio of the first surface 21 is 3:1, the welding tensile strength of the pad 40 is 142g.

[0057] When the length-to-width ratio of the first surface 21 is 3:1, the welding pull strength of the pad 40 can be increased from 131g to 142g. This aspect ratio of the light-emitting diode further enhances the bonding force between the pad 40 and the epitaxial layer 20, making it more effective in resisting damage from external mechanical and thermal stresses.

[0058] Optionally, when the length-to-width ratio of the first surface 21 is 4:1, the welding tensile strength of the pad 40 is 145g.

[0059] When the length-to-width ratio of the first surface 21 is 4:1, the welding pull strength of the pad 40 can be increased from 142g to 145g. For this aspect ratio of the light-emitting diode, the increase in the bonding force between the pad 40 and the epitaxial layer 20 is smaller than the increase in the bonding force between the pad 40 and the epitaxial layer 20 when the aspect ratio is increased from 2:1 to 3:1. Therefore, this indicates that after the length-to-width ratio of the first surface 21 exceeds 3:1, the increase in the welding pull strength of the pad 40 is already very small, and further increasing the length-to-width ratio of the first surface 21 can no longer significantly enhance the light-emitting diode's resistance to mechanical stress.

[0060] Optionally, when the length-to-width ratio of the first surface 21 is 5:1, the welding tensile strength of the pad 40 is 149g.

[0061] When the length-to-width ratio of the first surface 21 is 5:1, the welding pull strength of the pad 40 can be increased from 145g to 149g. For this type of LED with a length-to-width ratio, the increase in the bonding force between the pad 40 and the epitaxial layer 20 is relatively small, indicating that once the length-to-width ratio of the first surface 21 exceeds 3:1, the increase in the welding pull strength of the pad 40 becomes very small, and further increasing the length-to-width ratio of the first surface 21 can no longer significantly enhance the LED's resistance to mechanical stress.

[0062] Optionally, the thermal resistance of the light-emitting diode is from 7.9°C / W to 9.3°C / W, and the thermal resistance of the light-emitting diode is inversely proportional to the ratio of the length to the width of the first surface 21.

[0063] Thermal resistance refers to the ratio of the temperature difference between two points on a heat flow path to the power dissipated on the path.

[0064] For example, the thermal resistance of a light-emitting diode typically refers to the thermal resistance from the PN junction to the pad 40. The lower the thermal resistance value, the faster heat is transferred from the chip to the external environment, and the higher the heat dissipation efficiency.

[0065] In this embodiment of the disclosure, after the epitaxial layer 20 is stretched, the area of ​​the pad 40 is also increased, thereby increasing the area where the light-emitting diode can effectively dissipate heat. Therefore, the larger the length-to-width ratio of the first surface 21, the lower the thermal resistance.

[0066] The length-to-width ratio of the first surface 21 is in the range of 2:1 to 5:1, resulting in a thermal resistance of 7.9℃ / W to 9.3℃ / W. Lower thermal resistance means that the heat generated by the LED chip can be conducted to the external environment more quickly, thus significantly reducing the operating temperature of the core components. Within this thermal resistance range, the temperature rise is controlled within a reasonable range, effectively mitigating problems such as aging of the epitaxial layer 20 and packaging materials, and improving overall reliability.

[0067] Optionally, when the length-to-width ratio of the first surface 21 is 2:1, the thermal resistance of the light-emitting diode is 9.3℃ / W.

[0068] When the length-to-width ratio of the first surface 21 is 2:1, the thermal resistance of the light-emitting diode is 9.3℃ / W. This aspect ratio results in a relatively short heat dissipation path and moderate thermal resistance, reducing stress problems caused by differences in material expansion coefficients and lowering the risk of package failure.

[0069] Optionally, when the length-to-width ratio of the first surface 21 is 3:1, the thermal resistance of the light-emitting diode is 8.2℃ / W.

[0070] When the length-to-width ratio of the first surface 21 is 3:1, the thermal resistance of the light-emitting diode drops to 8.2℃ / W. Compared to a 2:1 ratio, this aspect ratio reduces the thermal resistance by approximately 12%, thus improving the heat dissipation performance of the light-emitting diode.

[0071] Optionally, when the length-to-width ratio of the first surface 21 is 4:1, the thermal resistance of the light-emitting diode is 8.1℃ / W.

[0072] When the length-to-width ratio of the first surface 21 is 4:1, the thermal resistance of the light-emitting diode drops to 8.1℃ / W. This aspect ratio of light-emitting diode provides optimal heat dissipation performance and low thermal resistance, making it suitable for high-power applications, supporting higher drive currents, and offering better junction temperature control.

[0073] Optionally, when the length-to-width ratio of the first surface 21 is 5:1, the thermal resistance of the light-emitting diode is 7.9℃ / W.

[0074] When the length-to-width ratio of the first surface 21 is 5:1, the thermal resistance of the light-emitting diode drops to 7.9℃ / W. This aspect ratio of light-emitting diode results in good heat dissipation performance.

[0075] Optionally, the light-emitting diode also includes a substrate 10, with an epitaxial layer 20 located on the surface of the substrate 10.

[0076] For example, the substrate is a sapphire substrate. Sapphire substrates have high light transmittance, meaning they are transparent. Furthermore, sapphire material is relatively hard and chemically stable, giving the light-emitting diode (LED) good luminous efficacy and stability.

[0077] In this embodiment of the present disclosure, the epitaxial layer 20 includes a first semiconductor layer, a multiple quantum well layer and a second semiconductor layer sequentially stacked on a substrate, and the surface of the second semiconductor layer has a groove exposing the first semiconductor layer.

[0078] In this embodiment of the disclosure, one of the first semiconductor layer and the second semiconductor layer is a p-type layer, and the other of the first semiconductor layer and the second semiconductor layer is an n-type layer.

[0079] For example, the first semiconductor layer is an n-type layer and the second semiconductor layer is a p-type layer.

[0080] In this embodiment, the first semiconductor layer is Al. x Ga (1-x) N is a material layer, where X is greater than or equal to 0 and less than or equal to 1.

[0081] For example, when X is 0, the first semiconductor layer is a GaN layer. For instance, the first semiconductor layer is a silicon-doped n-type GaN layer. The thickness of the n-type GaN layer can be from 0.5 μm to 3 μm.

[0082] Optionally, the multi-quantum-well layer includes alternating InGaN quantum well layers and GaN quantum barrier layers. Specifically, the multi-quantum-well layer may include 3 to 8 alternating stacked InGaN quantum well layers and GaN quantum barrier layers.

[0083] As an example, in an embodiment of this disclosure, the multi-quantum-well layer includes five alternating stacked InGaN quantum-well layers and GaN quantum-barrier layers.

[0084] Optionally, the thickness of the multi-quantum well layer can be from 150 nm to 200 nm.

[0085] Optionally, the second semiconductor layer is a magnesium-doped p-type GaN layer. The thickness of the p-type GaN layer can be from 0.5 μm to 3 μm.

[0086] Optionally, the second semiconductor layer has a groove that exposes the first semiconductor layer.

[0087] Optionally, the light-emitting diode further includes a passivation layer and an electrode 30, wherein the passivation layer is located on the surface of the epitaxial layer 20 and within a groove.

[0088] The passivation layer has through holes on its surface that expose the first semiconductor layer and the second semiconductor layer. The electrode 30 is located on the surface of the passivation layer and is connected to the first semiconductor layer and the second semiconductor layer through the through holes, respectively.

[0089] For example, the passivation layer may be a silicon oxide layer.

[0090] For example, the thickness of the passivation layer is 4,000 to 6,000 angstroms.

[0091] For example, electrode 30 may include at least one of Al layer, Ag layer, Ni layer, Pt layer, Au layer and AlCu layer.

[0092] For example, electrode 30 may include Al layer, Ti layer, Ni layer, Pt layer and Au layer stacked sequentially.

[0093] For example, the thickness of the Al layer is 1500 angstroms to 2500 angstroms.

[0094] For example, the thickness of the Ti layer is 300 to 700 angstroms.

[0095] For example, the thickness of the Ni layer is 800 angstroms to 1200 angstroms.

[0096] For example, the thickness of the Pt layer is 1500 angstroms to 2500 angstroms.

[0097] For example, the thickness of the Au layer is 6,000 angstroms to 10,000 angstroms.

[0098] Optionally, such as Figure 2 As shown, the light-emitting diode may further include an insulating layer located on the surface of the passivation layer and covering the electrode 30. The insulating layer has through-holes exposing the electrode 30, and pads 40 are located on the surface of the insulating layer away from the epitaxial layer 20. The pads 40 are electrically connected to the electrode 30 through the through-holes.

[0099] For example, the insulating layer includes an aluminum oxide layer. The aluminum oxide layer has good insulating properties.

[0100] Optionally, the thickness of the insulating layer is 3 μm to 4 μm.

[0101] Optionally, the pad 40 includes at least one of a Ti layer, an Al layer, a Pt layer, a Ni layer, and an Au layer.

[0102] The aforementioned metallic materials have excellent heat dissipation properties. Therefore, the pads 40 prepared using these materials also have excellent heat dissipation properties, which can improve the heat dissipation effect of the light-emitting diode.

[0103] Optionally, the pad 40 includes a first Ti layer, an Al layer, a second Ti layer, a Pt layer, a Ni layer, and an Au layer stacked sequentially.

[0104] For example, the thickness of the first Ti layer is 20 to 100 angstroms. For instance, the thickness of the first Ti layer is 50 angstroms.

[0105] For example, the thickness of the Al layer is between 10,000 and 20,000 angstroms. For instance, the thickness of the Al layer is 15,000 angstroms.

[0106] For example, the thickness of the second Ti layer is 500 angstroms to 1500 angstroms. For instance, the thickness of the second Ti layer is 1000 angstroms.

[0107] For example, the thickness of the Pt layer is between 500 angstroms and 1500 angstroms. For instance, the thickness of the Pt layer is 1000 angstroms.

[0108] For example, the thickness of the Ni layer is between 60,000 and 80,000 angstroms. For instance, the thickness of the Ni layer is 70,000 angstroms.

[0109] For example, the thickness of the Au layer is between 1500 angstroms and 2500 angstroms. For instance, the thickness of the Au layer is 2000 angstroms.

[0110] Figure 5 This is a flowchart illustrating a method for fabricating a light-emitting diode according to an embodiment of this disclosure. Figure 5 As shown, the preparation method includes:

[0111] S11: Prepare an epitaxial layer on the substrate.

[0112] The first surface of the epitaxial layer is far from the substrate, and the length-to-width ratio of the first surface is 2:1 to 5:1. The area of ​​the first surface is 60 mil. 2 Up to 70mil 2 .

[0113] S12: A pad is formed on the first surface of the epitaxial layer.

[0114] The two pads are located on the first surface of the epitaxial layer and are arranged at intervals on both sides of the first surface. The two pads of the light-emitting diodes with different length-to-width ratios on the first surface are equidistant.

[0115] The epitaxial layer prepared by the method provided in this embodiment has two spaced-apart pads on its first surface. The length-to-width ratio of the first surface on the epitaxial layer used for mounting the pads is limited to 2:1 to 5:1, while the area of ​​the first surface is fixed. Furthermore, the distance between the two pads of LEDs with different length-to-width ratios on the first surface is the same. This is equivalent to elongating the size of the epitaxial layer while keeping the area constant. With a constant pad distance, the pads can extend towards the edge of the epitaxial layer, thereby increasing the pad area. The increased pad area enhances the heat dissipation capacity of the LED and improves its toughness, thus increasing its impact resistance. Therefore, the LED is less prone to pad breakage or detachment during packaging due to thermal stress concentration or mechanical vibration.

[0116] The process of preparing the epitaxial layer in step S11 may include the following steps:

[0117] First, a substrate is provided.

[0118] The substrate can be a sapphire substrate, a silicon substrate, or a silicon carbide substrate. The substrate can be a flat substrate or a patterned substrate.

[0119] As an example, in this embodiment of the disclosure, the substrate is a sapphire substrate. Sapphire substrates are a commonly used substrate, with mature technology and low cost. Specifically, it can be a patterned sapphire substrate or a flat sapphire substrate.

[0120] The sapphire substrate can be pretreated by placing it in an MOCVD (Metal-organic Chemical Vapor Deposition) reaction chamber and baking it for 12 to 18 minutes. As an example, in this embodiment, the sapphire substrate is baked for 15 minutes.

[0121] Specifically, the baking temperature can be from 1000℃ to 1200℃, and the pressure inside the MOCVD reaction chamber during baking can be from 100mbar to 200mbar.

[0122] Growing an epitaxial layer on a substrate can include: sequentially forming a first semiconductor layer, a multiple quantum well layer, and a second semiconductor layer on a sapphire substrate using MOCVD technology.

[0123] The first semiconductor layer is an n-type layer, and the second semiconductor layer is a p-type layer.

[0124] Optionally, the first semiconductor layer is a silicon-doped n-type GaN layer. The thickness of the n-type GaN layer can be from 0.5 μm to 3 μm.

[0125] The growth temperature of the n-type GaN layer can be from 1000℃ to 1100℃, and the growth pressure of the n-type GaN layer can be from 100 torr to 300 torr.

[0126] Optionally, the multi-quantum-well layer includes alternating InGaN quantum well layers and GaN quantum barrier layers. Specifically, the multi-quantum-well layer may include 3 to 8 alternating stacked InGaN quantum well layers and GaN quantum barrier layers.

[0127] When growing multiple quantum well layers, the MOCVD reaction chamber pressure is controlled at 200 torr. When growing InGaN quantum well layers, the reaction chamber temperature is 760℃ to 780℃. When growing GaN quantum barrier layers, the reaction chamber temperature is 860℃ to 890℃.

[0128] As an example, in an embodiment of this disclosure, the multi-quantum-well layer includes five alternating stacked InGaN quantum-well layers and GaN quantum-barrier layers.

[0129] Optionally, the thickness of the multi-quantum well layer can be from 150 nm to 200 nm.

[0130] Optionally, the second semiconductor layer is a magnesium-doped p-type GaN layer. The thickness of the p-type GaN layer can be from 0.5 μm to 3 μm.

[0131] When growing p-type GaN layers, the growth pressure of p-type GaN layers can be from 200 Torr to 600 Torr, and the growth temperature of p-type GaN layers can be from 800℃ to 1000℃.

[0132] Then, the second semiconductor layer is etched to form a groove that exposes the first semiconductor layer.

[0133] After preparing the epitaxial layer, the following steps may also be included:

[0134] First, a passivation layer is formed on the surface of the epitaxial layer and within the groove.

[0135] Next, through-holes exposing the first and second semiconductor layers are formed on the surface of the passivation layer by photolithography.

[0136] For example, the passivation layer may be a silicon oxide layer.

[0137] For example, the thickness of the passivation layer is 4,000 to 6,000 angstroms.

[0138] Then, electrodes are formed on the surface of the passivation layer, and the electrodes are connected to the first semiconductor layer and the second semiconductor layer through vias, respectively.

[0139] Then, an insulating layer is formed on the surface of the passivation layer, so that the insulating layer covers the electrode.

[0140] For example, the insulating layer is a DBR layer, which includes multiple silicon oxide layers and multiple titanium oxide layers. The thickness of the DBR layer is 3 μm to 4 μm.

[0141] Then, the insulating layer is etched to form through holes on the surface of the insulating layer that expose the electrodes.

[0142] Next, pads are formed on the surface of the insulating layer away from the epitaxial layer, and the pads are electrically connected to the electrodes through vias.

[0143] Optionally, the pad layer includes a first Ti layer, an Al layer, a second Ti layer, a Pt layer, a Ni layer, and an Au layer stacked sequentially.

[0144] For example, the thickness of the first Ti layer is 20 to 100 angstroms. For instance, the thickness of the first Ti layer is 50 angstroms.

[0145] For example, the thickness of the Al layer is between 10,000 and 20,000 angstroms. For instance, the thickness of the Al layer is 15,000 angstroms.

[0146] For example, the thickness of the second Ti layer is 500 angstroms to 1500 angstroms. For instance, the thickness of the second Ti layer is 1000 angstroms.

[0147] For example, the thickness of the Pt layer is between 500 angstroms and 1500 angstroms. For instance, the thickness of the Pt layer is 1000 angstroms.

[0148] For example, the thickness of the Ni layer is 6,000 to 8,000 angstroms. For instance, the thickness of the Ni layer is 7,000 angstroms.

[0149] For example, the thickness of the Au layer is between 1500 angstroms and 2500 angstroms. For instance, the thickness of the Au layer is 2000 angstroms.

[0150] Optionally, after forming pads on the first surface of the epitaxial layer, the process further includes: first, mounting the prepared plurality of light-emitting diodes onto a long circuit board to form a light-emitting strip. Then, wrapping the light-emitting strip around a test rod for a set time. Finally, checking whether each light-emitting diode in the light-emitting strip is damaged.

[0151] Specifically, this may include: bonding LED chips onto COB light strips, then wrapping the light strips around smooth metal rods of different thicknesses, and testing the light strips for 24 hours to see if any LED chips are dead.

[0152] The above testing method can determine the degree of bending strain resistance of LED chips. If there are damaged LED chips on the wrapped light strip, the damage rate and yield rate can be calculated. The yield rate is determined as the bending strain coefficient of the light-emitting diode.

[0153] The experimental data of the light-emitting diodes provided in the embodiments of this disclosure are shown in Table 1 below:

[0154] Table 1

[0155]

[0156] According to the test results in Table 1, when the aspect ratio of the first surface of the light-emitting diode provided in this embodiment is 3:1, the LED chip exhibits the best resistance to bending strain, superior welding tensile strength, and lower thermal resistance. A 3:1 aspect ratio of the first surface significantly improves the welding reliability and mechanical toughness of the LED chip, while also enhancing heat dissipation performance.

[0157] The above description is merely an optional embodiment of this disclosure and is not intended to limit this disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the protection scope of this disclosure.

Claims

1. A light-emitting diode, characterized in that, The light-emitting diode includes an epitaxial layer (20) and two pads (40), the two pads (40) being located on a first surface (21) of the epitaxial layer (20) and arranged at intervals on both sides of the first surface (21); The length-to-width ratio of the first surface (21) is 2:1 to 5:1, and the area of ​​the first surface (21) is 60 mil. 2 Up to 70mil 2 The distance between the two pads (40) of the light-emitting diodes with different length-to-width ratios on the first surface (21) is the same.

2. The light-emitting diode according to claim 1, characterized in that, The ratio of the area of ​​the orthographic projection of the two pads (40) onto the first surface (21) to the area of ​​the first surface (21) is 25% to 45%.

3. The light-emitting diode according to claim 2, characterized in that, When the length-to-width ratio of the first surface (21) is 2:1, the ratio of the area of ​​the orthographic projection of the two pads (40) onto the first surface (21) to the area of ​​the first surface (21) is 29%. When the length-to-width ratio of the first surface (21) is 3:1, the ratio of the area of ​​the orthographic projection of the two pads (40) onto the first surface (21) to the area of ​​the first surface (21) is 35%. When the length-to-width ratio of the first surface (21) is 4:1, the ratio of the area of ​​the orthographic projection of the two pads (40) onto the first surface (21) to the area of ​​the first surface (21) is 41%. When the length-to-width ratio of the first surface (21) is 5:1, the ratio of the area of ​​the orthographic projection of the two pads (40) onto the first surface (21) to the area of ​​the first surface (21) is 44%.

4. The light-emitting diode according to claim 1, characterized in that, The welding tensile strength of the pad (40) is 131g to 149g, and the welding tensile strength of the pad (40) is proportional to the ratio of the length to the width of the first surface (21).

5. The light-emitting diode according to claim 4, characterized in that, When the length-to-width ratio of the first surface (21) is 2:1, the welding tensile strength of the pad (40) is 131g; When the length-to-width ratio of the first surface (21) is 3:1, the welding tensile strength of the pad (40) is 142g; When the length-to-width ratio of the first surface (21) is 4:1, the welding tensile strength of the pad (40) is 145g; When the length-to-width ratio of the first surface (21) is 5:1, the welding tensile strength of the pad (40) is 149g.

6. The light-emitting diode according to claim 1, characterized in that, The thermal resistance of the light-emitting diode is 7.9℃ / W to 9.3℃ / W, and the thermal resistance of the light-emitting diode is inversely proportional to the ratio of the length to the width of the first surface (21).

7. The light-emitting diode according to claim 6, characterized in that, When the length-to-width ratio of the first surface (21) is 2:1, the thermal resistance of the light-emitting diode is 9.3℃ / W; When the length-to-width ratio of the first surface (21) is 3:1, the thermal resistance of the light-emitting diode is 8.2℃ / W; When the length-to-width ratio of the first surface (21) is 4:1, the thermal resistance of the light-emitting diode is 8.1℃ / W; When the length-to-width ratio of the first surface (21) is 5:1, the thermal resistance of the light-emitting diode is 7.9℃ / W.

8. The light-emitting diode according to any one of claims 1 to 7, characterized in that, The spacing between the two pads (40) is 110 μm to 130 μm.

9. A method for fabricating a light-emitting diode, characterized in that, The preparation method includes: An epitaxial layer is fabricated on a substrate, wherein a first surface of the epitaxial layer is located away from the substrate, the length-to-width ratio of the first surface is between 2:1 and 5:1, and the area of ​​the first surface is 60 mil. 2 Up to 70mil 2 ; Pads are formed on the first surface of the epitaxial layer. Two pads are located on the first surface of the epitaxial layer and are spaced apart on both sides of the first surface. The distance between the two pads of the light-emitting diodes with different length-to-width ratios of the first surface is the same.

10. The preparation method according to claim 9, characterized in that, After forming pads on the first surface of the epitaxial layer, the method further includes: Multiple light-emitting diodes are mounted on a long circuit board to form a light-emitting strip; The light strip is wrapped around the test rod for a set time; Check whether each light-emitting diode of the light strip is damaged.

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