Network-on-chip routing method and device, routing node, equipment, medium and product

Abstract

The invention discloses a network-on-chip routing method and device, routing nodes, equipment, a medium and a product, and relates to the technical field of network-on-chip, and the method comprises the steps: firstly, screening the routing nodes through employing the input direction of a message, and limiting the selection range of the next-hop routing node; the relative position of the target routing node relative to the current routing node is determined, the routing nodes are further screened according to the relative position, and candidate routing nodes are determined; and determining a next-hop routing node according to the cache capacity and the input direction of the candidate routing node, and transmitting the message to be transmitted to the next-hop routing node to complete routing. The problem that the routing of the network-on-chip is easy to cause network message blockage or link failure of the network-on-chip can be solved. According to the method, an input direction is adopted to limit a selection range of a next-hop routing node, a relative position is adopted to determine candidate routing nodes, the next-hop routing node is determined in the candidate routing nodes based on cache capacity, and self-adaptive deadlock-free routing is realized.

Description

Technical Field

[0001] This invention relates to the field of on-chip network technology, specifically to an on-chip network routing method, apparatus, routing node, device, medium, and product. Background Technology

[0002] Network on Chip (NoC) is a novel communication model that combines the interconnection concepts of parallel computing to improve network communication efficiency. NoC can meet the high-efficiency communication needs between multi-core processors. NoC consists of routing nodes, link channels, and a network interface (NI). With the increasing communication demands of multi-core systems and the growing scale of NoC, current routing methods for routing nodes in NoC are prone to deadlock or livelock. Deadlock and livelock can occupy routing node caches for extended periods, causing regional network congestion, consuming energy, and reducing NoC performance. Furthermore, increasing the cache resources of routing nodes to improve NoC performance further increases the NoC's area and power consumption.

[0003] Therefore, the routing of related technologies can easily lead to network packet congestion or link failures in on-chip networks. Summary of the Invention

[0004] In view of this, the present invention provides an on-chip network routing method, apparatus, routing node, device, medium and product to solve the problem that on-chip network routing can easily lead to network packet congestion or link failure.

[0005] In a first aspect, this application provides an on-chip network routing method, the method comprising: Upon receiving a message to be transmitted, the input direction, current node address, and destination node address of the message to be transmitted are determined. The input direction is the direction in which the message to be transmitted enters the current routing node, and the input direction is used to limit the selection range of the next-hop routing node. The relative position of the target routing node with respect to the current routing node is determined based on the current node address and the target node address; Based on the input direction, candidate route nodes are determined from the route nodes associated with their relative positions; Based on the buffer capacity and input direction of the candidate routing nodes, the next-hop routing node is determined from the candidate routing nodes, and the message to be transmitted is transmitted to the next-hop routing node.

[0006] Secondly, this application provides a routing node, which includes: an arbitration module, a flow control module, a virtual channel module, and a crossbar switch module; The flow control module is connected to the virtual channel module and is used to receive messages to be transmitted and store the messages to be transmitted in the virtual channel module. The arbitration module is used to determine the input direction, current node address, and target node address of the message to be transmitted. Based on the current node address and target node address, it determines the relative position of the target routing node with respect to the current routing node. Based on the input direction, it determines the candidate routing node among the routing nodes associated with the relative position. The input direction is the direction in which the message to be transmitted is input to the current routing node. The input direction is used to limit the selection range of the next-hop routing node. The arbitration module is used to obtain the cache capacity of the candidate routing nodes and determine the next-hop routing node from among the candidate routing nodes based on the cache capacity and input direction. The crossbar switch module is used to transmit the message to be transmitted to the next-hop routing node.

[0007] Thirdly, this application provides an on-chip network routing device, the device comprising: The first determining module is used to determine the input direction, current node address and target node address of the message to be transmitted when a message to be transmitted is received. The input direction is the direction in which the message to be transmitted enters the current routing node, and the input direction is used to limit the selection range of the next-hop routing node. The second determining module is used to determine the relative position of the target routing node with respect to the current routing node based on the current node address and the target node address; The third determination module is used to determine candidate routing nodes among the routing nodes associated with relative positions based on the input direction; The message transmission module is used to determine the next-hop routing node among the candidate routing nodes based on the buffer capacity and input direction of the candidate routing nodes, and to transmit the message to be transmitted to the next-hop routing node.

[0008] Fourthly, this application provides a computer device, including: a memory and a processor, which are communicatively connected to each other. The memory stores computer instructions, and the processor executes the computer instructions to perform the on-chip network routing method of the first aspect or any corresponding embodiment described above.

[0009] Fifthly, this application provides a computer-readable storage medium storing computer instructions for causing a computer to execute the on-chip network routing method of the first aspect or any corresponding embodiment described above.

[0010] In a sixth aspect, this application provides a computer program product, including computer instructions for causing a computer to execute the on-chip network routing method of the first aspect or any corresponding embodiment thereof.

[0011] This embodiment provides an on-chip network routing method that determines the input direction, current node address, and target node address of the packet to be transmitted. First, it filters routing nodes using the input direction to limit the selection range of next-hop routing nodes. Then, it determines the relative position of the target routing node with respect to the current routing node and further filters the routing nodes based on the relative position to determine candidate routing nodes. Finally, based on the buffer capacity of the candidate routing nodes and the input direction, it determines the next-hop routing node from among the candidate routing nodes and transmits the packet to the next-hop routing node, completing the routing. This method can solve the problem that routing in on-chip networks can easily lead to network packet congestion or link failures. This method uses the input direction to limit the selection range of next-hop routing nodes and uses relative position to determine candidate routing nodes, and determines the next-hop routing node from among the candidate routing nodes based on buffer capacity, achieving adaptive, deadlock-free routing. Attached Figure Description

[0012] To more clearly illustrate the technical solutions in the specific embodiments or related technologies of this application, the drawings used in the description of the specific embodiments or related technologies will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0013] Figure 1 This is a flowchart illustrating an on-chip network routing method according to an embodiment of this application; Figure 2 This is a schematic diagram of the routing node network and routing node ports according to an embodiment of this application; Figure 3 This is a schematic diagram of the XY turning restriction rules according to an embodiment of this application; Figure 4 This is a schematic diagram of a possible transmission path after a restricted turn, according to an embodiment of this application; Figure 5 This is a schematic diagram of a routing algorithm according to an embodiment of this application; Figure 6 This is a schematic diagram of another routing algorithm according to an embodiment of this application; Figure 7 This is a schematic diagram of the structure of a routing node according to an embodiment of this application; Figure 8 This is a structural block diagram of an on-chip network routing device according to an embodiment of this application; Figure 9 This is a schematic diagram of the hardware structure of a computer device according to an embodiment of this application. Detailed Implementation

[0014] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0015] Employing on-chip multi-core processors leverages their coarser-grained thread-level and data-level parallelism to improve chip performance while reducing system design complexity, power consumption, and cost. Efficient communication between multi-core processors is crucial, currently requiring the use of a shared bus architecture in traditional Systems-on-Chip (SoC) to facilitate collaboration among processing elements (PEs) such as the CPU, memory, and peripherals. However, the bus interconnect structure of traditional SoCs suffers from significant conflicts, high power consumption, high latency, and poor scalability. On-chip networking, as a novel communication mode, incorporates the interconnection concepts from parallel computing, significantly improving network communication efficiency.

[0016] A NoC network consists of routing nodes, link channels, and network interfaces. The routing node is the core of the NoC architecture, responsible for local packet transmission and reception, and network packet forwarding. The design of the routing node directly affects the network's latency, throughput, power consumption, and area. The link channel consists of two physical unidirectional channels to achieve full-duplex communication, allowing bidirectional data flow without collisions. The NI interface is used to interconnect local PE units, asynchronously receive data messages uploaded to the network by the PE and package them into NoC-recognizable fragmented packets, or unpack packets downloaded from the network.

[0017] As the communication demands of multi-core systems increase and the scale of NoCs grows, problems such as network packet congestion or link failures become increasingly severe, ultimately leading to a decrease in NoC throughput and packet transmission delays or even loss. Simultaneously, unilaterally relying on cache resources to trade for performance will also sacrifice NoC area and power consumption. Two significant problems in link failures that degrade on-chip network performance are deadlock and livelock. Deadlock occurs when, with increased NoC network communication, multiple packets wait for each other to release cache resources, forming a circular dependency, preventing any packet from moving first and causing network congestion. Livelock occurs when packets are endlessly transmitted in a closed-loop path, never escaping to their destination node. Deadlock and livelock occupy cache resources for extended periods, causing regional network congestion and consuming energy.

[0018] Based on the above, this application provides an on-chip network routing method. It employs a shortest XY routing algorithm and a restricted turning strategy, utilizing congestion awareness technology based on cache space and historical routing tables for routing strategy selection, achieving adaptive, deadlock-free routing. This application designs a corresponding routing node structure that effectively supports the routing strategy while balancing area and power consumption. This routing node achieves the technical advantage of high throughput and low latency while also considering area and power consumption.

[0019] According to an embodiment of this application, an on-chip network routing method embodiment is provided. It should be noted that the steps shown in the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions, for example, a computer, a server, etc., and although a logical order is shown in the flowchart, in some cases, the steps shown or described may be executed in a different order than that shown here.

[0020] This embodiment provides an on-chip network routing method. Figure 1 This is a flowchart of an on-chip network routing method according to an embodiment of this application, such as... Figure 1 As shown, the process includes the following steps: Step S101: Upon receiving a message to be transmitted, determine the input direction, current node address, and target node address of the message to be transmitted. The input direction is the direction in which the message to be transmitted enters the current routing node, and the input direction is used to limit the selection range of the next-hop routing node.

[0021] Specifically, the design of an on-chip network (NoC) should first focus on its network topology, the packet exchange mechanism between nodes, and the routing algorithm. The topology defines how routing nodes are arranged in the NoC. Typical topologies include rings, 2D-Mesh networks, 2D-Torus networks, and some specially designed irregular topologies. The exchange mechanism and routing algorithm are both designed based on the topology. Considering the stability, versatility, and scalability of the topology, this embodiment is designed based on the classic 2D-Mesh structure.

[0022] Figure 2 This demonstrates a bounded 2D-Mesh on-chip network, such as... Figure 2As shown, each node represents a routing node. A set of coordinates is assigned to each routing node to represent different routing nodes, such as (3,0), (3,1), (1,2), etc. Routing nodes are categorized into internal, edge, and corner routing nodes based on their location. Internal routing nodes require 5 sets of input / output ports. Four sets of ports interconnect the four adjacent routing nodes (west, south, east, and north), and one set of ports is used for bidirectional interconnection network interfaces to communicate with local processing elements, such as CPUs, memory, and peripherals. Edge routing nodes require only 4 sets of ports, and corner routing nodes require only 3 sets of ports. Since the working principle of routing nodes at all locations is the same, this invention uses an internal 5-port routing node as an example for subsequent design descriptions. Furthermore, of the 5 ports of an internal routing node, 4 are connected to other routing nodes and can be represented by coordinates (x1, y1), (x2, y2), (x3, y3), and (x4, y4), while the remaining port is connected to a processing element via a bidirectional interconnection network interface.

[0023] Because PE communication messages have arbitrary lengths, NoC networks must use fixed-length packet formats for data transmission and resource allocation. To ensure network non-congestion, routing nodes need to be designed with buffer space, typically located in the five input port modules.

[0024] Routing nodes can receive packets to be transmitted from neighboring routing nodes in all directions, or from processing elements. Furthermore, to reduce the area and power consumption of routing nodes, the buffer size can be reduced. In this case, the packet to be transmitted can be further divided into several fixed-length fragments (Flits), including a header Flit, several body Flits, and one tail Flit. After receiving the header Flit of the packet to be transmitted, the on-chip network routing method in this embodiment can be executed.

[0025] Upon receiving a message to be transmitted, determine the input direction of the message. For example: if the message is input from port (x1, y1) to the current routing node, the input direction is W (west); if it is input from port (x2, y2), the input direction is S (south); if it is input from port (x3, y3), the input direction is E (east); if it is input from port (x4, y4), the input direction is N (north). Determine the destination node address from the message. For example, the header Flit contains routing information, and the routing node determines the destination node address based on this information, such as (3,3) or (0,0). Obtain the current node address of the current routing node, such as (3,1) or (1,2). Routing information refers to information carried in the header Flit, such as source and destination addresses, and packet identifiers.

[0026] To avoid deadlocks or livelocks in the on-chip network, this embodiment designs a shortest XY routing algorithm with restricted turns. Based on this algorithm, a 360° loop path is avoided by restricting turns, and 180° turns in the transmitted message are also prevented unless the next hop of all three output ports fails. The shortest XY routing algorithm uses the input direction to limit the selection range of the next-hop routing node. For example, if the input direction is W, the output should not turn around and output from W; instead, it should be selected from the S, E, and N directions. Therefore, the selection range of the next-hop routing node is the routing nodes corresponding to the S, E, and N directions.

[0027] Step S102: Determine the relative position of the target routing node with respect to the current routing node based on the current node address and the target node address.

[0028] Specifically, the relative position of the target routing node with respect to the current routing node is determined based on the current node address and the target node address. For example, if the current node address is (1,1) and the target node address is (3,3), the relative position of the target routing node with respect to the current routing node is in the northeast direction; if the current node address is (2,1) and the target node address is (0,2), the relative position of the target routing node with respect to the current routing node is in the southeast direction.

[0029] Step S103: Based on the input direction, determine the candidate routing nodes among the routing nodes associated with the relative positions.

[0030] Specifically, in order to reduce power consumption and the number of hops in message transmission, the shortest route strategy is adopted, that is, the routing range should be the smallest area defined between the destination node and the source node, and the message to be transmitted will not be transmitted to a routing node in the opposite direction to the target routing node.

[0031] Based on the input direction, candidate routing nodes are determined from the routing nodes associated with the relative positions. For example, if the input direction is W, the selection range for the next-hop routing node is the routing nodes corresponding to the S, E, and N directions. If the relative position of the target routing node with respect to the current routing node is northeast, then the S direction is the opposite direction of the target routing node. Therefore, the S direction is excluded, and the routing nodes corresponding to the E and N directions are selected as candidate routing nodes.

[0032] like Figure 3 As shown, the message to be transmitted enters the current routing node from port (x1, y1), and the destination routing node is to the northeast of the current routing node. It cannot be transmitted from... Figure 3 Direction 1 in the code is output from the current routing node; the message to be transmitted is input to the current routing node from port (x1, y1), and the destination routing node is southeast of the current routing node, and cannot be from... Figure 3 Direction 2 in the output is from the current routing node.

[0033] Step S104: Based on the buffer capacity and input direction of the candidate routing nodes, determine the next-hop routing node among the candidate routing nodes, and transmit the message to be transmitted to the next-hop routing node.

[0034] Specifically, considering issues such as network congestion, link failures, or next-hop node failures, this embodiment designs a congestion-aware routing method. By pre-determining the available buffer space of candidate routing nodes, it selects the routing node with the larger buffer capacity to propagate the packet to be transmitted, thus avoiding congestion and improving throughput. If two candidate routing nodes have the same buffer capacity, this embodiment designs a default XY routing algorithm. That is, when the input direction is W or S, it propagates first in the X direction of the XY coordinate system and then in the Y direction; when the input direction is E or N, it propagates first in the Y direction and then in the X direction.

[0035] Obtain the cache capacity of the candidate routing nodes. Based on the cache capacity and input direction of the candidate routing nodes, determine the next-hop routing node among the candidate routing nodes. For example: if there are candidate routing nodes 1 and 2, and the cache capacity of candidate routing node 1 is greater than that of candidate routing node 2, then candidate routing node 1 is selected as the next-hop routing node. If the cache capacity of candidate routing node 1 is the same as that of candidate routing node 2, the input direction is the W direction, and candidate routing node 1 is a routing node in the E direction, belonging to the X direction in the XY coordinate system, then candidate routing node 1 is selected as the next-hop routing node.

[0036] like Figure 4 As shown, if the buffer capacity of the candidate routing nodes is not considered, steps S101 to S103 will generate multiple message transmission paths between the starting routing node and the target routing node. After considering the buffer capacity of the candidate routing nodes, the path is selected... Figure 4 The message transmission path in the upper left corner is the target message transmission path.

[0037] This embodiment provides an on-chip network routing method that determines the input direction, current node address, and target node address of the packet to be transmitted. First, it filters routing nodes based on the input direction, limiting the selection range of next-hop routing nodes. Then, it determines the relative position of the target routing node with respect to the current routing node, and further filters the routing nodes based on the relative position to determine candidate routing nodes. Finally, based on the buffer capacity and input direction of the candidate routing nodes, it determines the next-hop routing node from among the candidate routing nodes and transmits the packet to the next-hop routing node, completing the routing. This method employs a shortest XY routing algorithm and a restricted turning strategy, along with congestion awareness technology based on buffer space, to achieve adaptive, deadlock-free routing. It avoids any deadlocks while considering the area and power consumption of routing nodes. This solves the problem that routing in on-chip networks can easily lead to network packet congestion or link failures.

[0038] As an optional embodiment, determining candidate routing nodes among routing nodes with relatively associated positions based on the input direction includes: Determine if the target node address exists in the historical routing table; If the destination node address exists in the historical routing table, candidate routing nodes are determined based on the historical routing table and the destination node address. If the destination node address does not exist in the historical routing table, candidate routing nodes are determined from the routing nodes associated with the relative position based on the input direction. After determining the next-hop routing node from among the candidate routing nodes based on their cache capacity and input direction, the destination node address and the next-hop routing node are written into the historical routing table.

[0039] Specifically, this embodiment takes into account that multiple messages to be transmitted may pass through the same routing node and be sent to the same destination routing node. Therefore, this embodiment maintains a historical routing table to store the output port selection for different target node addresses under the current routing node. Determining the output port also determines the candidate routing node.

[0040] If a message to be transmitted is received, or the header Flit of a message to be transmitted is received, the destination node address is determined from the message to be transmitted. The historical routing table of the current routing node is checked to see if the destination node address exists. If the destination node address exists in the historical routing table (i.e., the historical routing table records the destination node address), then candidate routing nodes are simply determined based on the output direction recorded in the historical routing table.

[0041] Determine if the candidate routing node still has sufficient cache space. If the candidate routing node is not congested, it is directly used as the next-hop routing node without performing complex route calculations again. However, if the candidate routing node is congested, route calculations need to be performed again, and the historical routing table needs to be updated.

[0042] If the historical routing table has not recorded the target node address, then steps S101 to S104 are used to determine it, and the target node address and the next-hop routing node are written into the historical routing table.

[0043] In this embodiment, routing strategy selection is performed based on congestion awareness technology of cache space and historical routing table to achieve adaptive, deadlock-free routing and improve routing efficiency.

[0044] As an optional embodiment, determining the next-hop routing node from the candidate routing nodes based on the buffer capacity and input direction includes: Determine the largest cache capacity among the candidate routing node's cache capacity; Select the candidate route node with the largest cache capacity as the route node to be filtered. If the number of routing nodes to be filtered is less than or equal to the first preset threshold, the routing nodes to be filtered will be used as the next-hop routing nodes. If the number of routing nodes to be filtered is greater than the first preset threshold, and the input direction is the first preset direction, the routing node to be filtered corresponding to the first target direction will be used as the next hop routing node. If the input direction is the second preset direction, the routing node to be filtered corresponding to the second target direction will be used as the next hop routing node.

[0045] Specifically, the largest cache capacity among the candidate routing nodes is determined. For example, if there are 3 candidate routing nodes with cache capacities of 16 bits, 32 bits, and 32 bits respectively, then the largest cache capacity is 32 bits, meaning the number of candidate routing nodes corresponding to the largest cache capacity is 2. The candidate routing node corresponding to the largest cache capacity is then selected as the routing node to be filtered.

[0046] The first preset threshold is, for example, 1. If the number of routing nodes to be filtered is less than or equal to the first preset threshold, that is, there is only one routing node to be filtered, the routing node to be filtered is directly used as the next hop routing node. If the number of routing nodes to be filtered is greater than the first preset threshold, it means that there are two or more routing nodes to be filtered. This embodiment is designed based on the default XY routing algorithm, that is, when the input direction is W or S, it propagates first to the X direction and then to the Y direction; when the input direction is E or N, it propagates first to the Y direction and then to the X direction.

[0047] Based on this principle, the first preset direction is the W and S directions, and the first target direction is the X direction in the XY coordinate system, which includes either the E or W direction; the second preset direction is the E and N directions, and the second target direction is the Y direction in the XY coordinate system, which includes either the N or S direction. If the input direction is the first preset direction, the routing node to be filtered corresponding to the first target direction is taken as the next-hop routing node; if the input direction is the second preset direction, the routing node to be filtered corresponding to the second target direction is taken as the next-hop routing node.

[0048] In this embodiment, by determining whether the input direction is a first preset direction or a second preset direction, the routing node to be filtered corresponding to the first target direction or the second target direction is taken as the next-hop routing node. This avoids network congestion, prevents loop paths, and avoids deadlock and livelock.

[0049] As an optional embodiment, determining candidate routing nodes among routing nodes with relatively associated positions based on the input direction includes: The target area is determined based on the relative position, and the target area contains a preset number of routing nodes; Determine the output direction of the messages to be transmitted contained in the target area; Based on the input direction, determine the candidate output direction from the output directions contained in the target region; The routing node corresponding to the candidate output direction is selected as the candidate routing node.

[0050] Specifically, the target area is determined based on the relative position. The target area is the smallest area defined between the target routing node and the current routing node.

[0051] The target area contains a preset number of routing nodes, indicating that the target area contains multiple routing nodes.

[0052] First, packets should generally not make 180° turns unless the next hop at all three output ports fails. For example, a packet input in the (x1, y1)W direction should not turn around and output in the W direction, but should instead output in the (x2, y2)S direction, (x3, y3)E direction, or (x4, y4)N direction. Second, to reduce power consumption and the number of packet hops, a shortest routing strategy should be adopted, meaning the routing range should be the minimum defined area between the destination and source nodes. Packets should not arbitrarily turn away from this minimum area simply because there is more buffer space outside the area or because the network within the area is congested.

[0053] Determine the output direction of the message to be transmitted within the target area. Based on the input direction, identify candidate output directions from the output directions included in the target area. For example, if the input direction is W, and the target area includes output directions N and E, and the target routing node is northeast of the current routing node, then N and E are selected as candidate output directions. The routing nodes corresponding to these candidate output directions are then designated as candidate routing nodes.

[0054] As an optional embodiment, determining the candidate output direction from the output directions included in the target region based on the input direction includes: The output direction in the target region that is inconsistent with the input direction is taken as the output direction to be filtered. Determine the node position of the target routing node relative to the current routing node; Output directions whose angle with the node orientation is less than the second preset threshold are selected as candidate output directions.

[0055] Specifically, this embodiment first uses the shortest XY algorithm to avoid generating 360° loop paths by restricting turning mechanisms. For example, if a message input in the W direction is destined for the northeast, the message output port can only select N or E and cannot turn to the S direction. Therefore, the output direction of the message cannot be the same as the input direction, and the output direction in the target area that is inconsistent with the input direction is selected as the output direction to be filtered.

[0056] Determine the orientation of the target routing node relative to the current routing node. For example, if the current node address is (1,1) and the target node address is (3,3), the node orientation is 2i+2j, where i is a unit vector in the X direction and j is a unit vector in the Y direction. The coefficients of i and j are both greater than 0, indicating that the target routing node is northeast of the current routing node.

[0057] The second preset threshold is, for example, 90 degrees, 89 degrees, or other values. Output directions whose angle with the node's orientation is less than the second preset threshold are selected as candidate output directions. For example, if the output direction to be filtered is the W direction, it can be represented as -i; if the output direction to be filtered is the N direction, it can be represented as j.

[0058] As an optional embodiment, transmitting the message to be transmitted to the next-hop routing node includes: Based on the message to be transmitted, a first sub-message, a second sub-message, and a third sub-message are obtained. The first sub-message contains the target node address, the second sub-message contains data information, and the third sub-message contains a message end flag, which is used to determine whether the message to be transmitted has been completely transmitted. Transmit the first sub-message, the second sub-message, and the third sub-message to the next-hop routing node.

[0059] Specifically, since PE communication messages have arbitrary lengths, NoC networks need to use fixed-length packets for data transmission and resource allocation. To ensure network non-congestion, routing nodes need to be designed with buffer space, typically located in the five input port modules. Since the buffer accounts for the largest proportion of area and power consumption in the entire routing node, sacrificing buffer resources to store the entire message is unreasonable. Therefore, existing NoC designs typically divide the message into several fixed-length fragments (Flits), each Flit being the smallest unit of data transmission within a unit cycle. This invention employs a wormhole switching strategy for node interaction design, allocating buffers at the Flit granularity. That is, each Flit under the same message can be distributed and cached in the buffers of each node along the path, reducing the buffer area and power consumption overhead of a single routing node. Each message is divided into one header Flit, several body Flits, and one tail Flit. This invention designs each Flit to be 32 bits, therefore the corresponding routing node buffer width should also be 32 bits. The header Flit contains routing information, and the routing node completes optimal path calculation, caching, and efficient output port allocation based on the header Flit information. The body Flit contains the actual data information, and the tail Flit is the message end marker. Both inherit the resource allocation from the header Flit and do not require secondary calculation by the node.

[0060] Based on the message to be transmitted, a first sub-message, a second sub-message, and a third sub-message are obtained. The first sub-message is the header Flit mentioned above, which contains routing information, including the destination node address. The second sub-message is the body Flit mentioned above, which contains the actual data information. The third sub-message is the tail Flit mentioned above, which includes a message end marker used to determine whether the message to be transmitted has been completely transmitted.

[0061] In this embodiment, the message to be transmitted is further divided into several sub-messages of fixed length. Each sub-message is the smallest unit of data transmission within a unit period. Sub-messages under the same message to be transmitted can be distributed and cached in the caches of each node under the path, reducing the cache area and power consumption of a single routing node.

[0062] As an optional embodiment, after selecting the candidate route node corresponding to the largest cache capacity as the route node to be filtered, the method further includes: Determine the first coordinate information of the input port of the current routing node into which the message to be transmitted is input, wherein the first coordinate information includes a first coordinate and a second coordinate; The second coordinate information of the target routing node is determined based on the target node address, wherein the second coordinate information includes the third and fourth coordinates; If the first coordinate information is the same as the first preset coordinate information, and the number of routing nodes to be filtered is greater than the first preset threshold, then determine whether the third coordinate is the same as the first coordinate. If the third coordinate is the same as the first coordinate, the route node to be filtered corresponding to the first target coordinate will be the next hop route node; If the third coordinate is different from the first coordinate, the routing node to be filtered corresponding to the second target coordinate will be the next hop routing node. If the first coordinate information is the same as the second preset coordinate information, and the number of routing nodes to be filtered is greater than the first preset threshold, then determine whether the fourth coordinate is the same as the second coordinate. If the fourth coordinate is the same as the second coordinate, the routing node to be filtered corresponding to the third target coordinate will be the next hop routing node. If the fourth coordinate is the same as the second coordinate, the routing node to be filtered corresponding to the fourth target coordinate will be the next hop routing node.

[0063] Specifically, the first coordinate information of the current routing node is determined based on the current node address. The first coordinate information includes a first coordinate and a second coordinate. The first coordinate is the x-coordinate of the current node address, and the second coordinate is the y-coordinate of the current node address. For example: if the first coordinate information is (1,1), the first coordinate is 1 and the second coordinate is 1; if the first coordinate information is (2,1), the first coordinate is 2 and the second coordinate is 1.

[0064] Determine the second coordinate information (x) of the target routing node based on the target node address. d y d The second coordinate information includes the third coordinate x. d and the fourth coordinate y dThe third coordinate is the x-coordinate of the target node address, and the second coordinate is the y-coordinate of the target node address. For example: the second coordinate information is (3,3), the third coordinate is 3, and the fourth coordinate is 3; the first coordinate information is (3,2), the third coordinate is 3, and the fourth coordinate is 2.

[0065] The first preset coordinate information is, for example, (x1, y1) and (x2, y2). The first preset threshold is, for example, 1. If the first coordinate information is the same as the first preset coordinate information, and the number of routing nodes to be filtered is greater than the first preset threshold, it indicates that there are two or more routing nodes to be filtered. Then, it is determined whether the third coordinate is the same as the first coordinate. If the third coordinate is the same as the first coordinate, for example: x... d =x1 or x d =x2, take the filtering routing node corresponding to the first target coordinate as the next hop routing node. For example, the coordinates of the first target are (x4, y4) of the output port. Take the filtering routing node connected to the output port with coordinates (x4, y4) as the next hop routing node.

[0066] If the third coordinate is not the same as the first coordinate, for example: x d Not equal to x1 and x d If the second target coordinate is not equal to x2, the filtering route node corresponding to the second target coordinate is taken as the next-hop route node. For example, if the coordinate of the output port is (x3, y3), the filtering route node connected to the output port with coordinate (x3, y3) is taken as the next-hop route node.

[0067] The second preset coordinate information is, for example, (x3, y3) and (x4, y4). If the first and second preset coordinate information are the same, and the number of routing nodes to be filtered is greater than the first preset threshold, it indicates that there are two or more routing nodes to be filtered. Then, it is determined whether the fourth coordinate is the same as the second coordinate. If the fourth coordinate is the same as the second coordinate, the routing node to be filtered corresponding to the third target coordinate is taken as the next-hop routing node; if the fourth coordinate is the same as the second coordinate, the routing node to be filtered corresponding to the fourth target coordinate is taken as the next-hop routing node.

[0068] The above content is as follows Figure 5 and Figure 6 As shown, the second coordinate information (x) of the target routing node d y d The coordinates of the starting routing node are (x... s y sFirst, the historical routing table is queried. If no relevant record is found, route calculation is performed. If a record is found, the next-hop blocking status of the historical output port is directly checked. If not blocked, the output is based on the historical output port; otherwise, the route is recalculated. During route calculation, the output port is first determined based on the input port and the turning restriction policy. For example, it is checked whether ((x...) s ≤x d And (y) s ≤y d )), or, ((x s ≥x d And (y) s ≥y d Based on the judgment, further determine which port the message entered into the current routing node. After determining the input port, compare the buffer space of the routing nodes corresponding to the two output directions of the candidate output ports, select the direction with the larger buffer space as the final output direction, and update the routing table. If the buffer space of the routing nodes corresponding to the two output directions is the same, then the output direction is determined based on the XY routing algorithm. That is, when the input direction is W or S, propagate first in the X direction and then in the Y direction; when the input direction is E or N, propagate first in the Y direction and then in the X direction. The output direction can be determined by comparing the coordinate information of the target routing node and the coordinate information of the port, and the selected output port is selected as the routing node corresponding to the selected output port. For example: if x d If x = x2, then the selected output ports are x4 and y4; if x d If the value is not equal to x4, then the selected output ports are x2 and y2.

[0069] In this embodiment, the first coordinate information is compared with the first preset coordinate information and the second preset coordinate information. Based on the comparison result, the coordinates of the current node address are compared with the coordinates of the target node address to determine the next-hop routing node from the filtering routing nodes. The method is simple and efficient, and can determine the appropriate next-hop routing node for various situations, avoiding failures such as deadlock, livelock, and network congestion.

[0070] As an optional embodiment, determining the relative position of the target routing node with respect to the current routing node based on the current node address and the target node address includes: The third coordinate information of the current routing node is determined based on the current node address. The third coordinate information includes the fifth and sixth coordinates. The second coordinate information of the target routing node is determined based on the target node address, wherein the second coordinate information includes the third and fourth coordinates; The fifth coordinate is compared with the third coordinate to obtain the first comparison result; By comparing the sixth coordinate with the fourth coordinate, a second comparison result is obtained; Based on the first comparison result and the second comparison result, the relative position between the current routing node and the target routing node is determined.

[0071] Specifically, the third coordinate information of the current routing node is determined based on the current node address. The third coordinate information includes the fifth and sixth coordinates. The fifth coordinate is the x-coordinate of the current node address, and the sixth coordinate is the y-coordinate of the current node address. For example: if the third coordinate information is (1,1), the fifth coordinate is 1, and the sixth coordinate is 1; if the third coordinate information is (2,1), the fifth coordinate is 2, and the sixth coordinate is 1.

[0072] The second coordinate information of the target routing node is determined based on the target node address. This second coordinate information includes a third coordinate and a fourth coordinate. The third coordinate is the x-coordinate of the target node address, and the second coordinate is the y-coordinate of the target node address. For example, if the second coordinate information is (3,3), the third coordinate is 3, and the fourth coordinate is 3; or if the first coordinate information is (3,2), the third coordinate is 3, and the fourth coordinate is 2.

[0073] The fifth coordinate is compared with the third coordinate to obtain the first comparison result. For example, if the fifth coordinate is 2 and the third coordinate is 3, the first comparison result is 3>2. The sixth coordinate is compared with the fourth coordinate to obtain the second comparison result. For example, if the sixth coordinate is 1 and the third coordinate is 3, the second comparison result is 3>1. Based on the first and second comparison results, the relative position between the current routing node and the target routing node is determined. For example, if the first comparison result is 3>2 and the second comparison result is 3>1, then the target routing node is located northeast of the current routing node.

[0074] According to an embodiment of this application, a routing node is provided, such as... Figure 7 As shown, the routing node includes: an arbitration module, a flow control module, a virtual channel module, and a crossbar switch module; The flow control module is connected to the virtual channel module and is used to receive messages to be transmitted and store the messages to be transmitted in the virtual channel module. The arbitration module is used to determine the input direction, current node address, and target node address of the message to be transmitted. Based on the current node address and target node address, it determines the relative position of the target routing node with respect to the current routing node. Based on the input direction, it determines the candidate routing node among the routing nodes associated with the relative position. The input direction is the direction in which the message to be transmitted is input to the current routing node. The input direction is used to limit the selection range of the next-hop routing node. The arbitration module is used to obtain the cache capacity of the candidate routing nodes and determine the next-hop routing node from among the candidate routing nodes based on the cache capacity and input direction. The crossbar switch module is used to transmit the message to be transmitted to the next-hop routing node.

[0075] Specifically, considering requirements such as input buffering and input / output port arbitration, and combining the general basic structure of NoC routing nodes, the optimized routing node structure in this embodiment includes an arbitration module, a flow control module, a virtual channel module, and a crossbar switch module. Given that each routing node has five input directions: Local (L), East, South, West, and North, there are five sets of flow control modules, virtual channel modules, and crossbar switch modules. The flow control module is connected to the Virtual Channel (VC) module. The flow control module can receive packets to be transmitted from routing nodes in the W, S, E, and N directions, as well as from processing elements via the NI interface, and store the packets to be transmitted in the virtual channel module.

[0076] The arbitration module, upon receiving a message to be transmitted, determines the input direction of the message, for example, one of the W, S, E, or N directions. It then determines the target node address within the message itself; for example, the header Flit of the message contains routing information, and the routing node determines the target node address based on this information, such as (3,3) or (0,0). Finally, it retrieves the current node address of the current routing node, for example, (3,1) or (1,2). Based on the shortest XY routing algorithm, the input direction limits the selection range of the next-hop routing node. For example, if the input direction is W, the output should not be reversed to W; instead, it should be selected from the S, E, or N directions. Therefore, the selection range of the next-hop routing node is the routing nodes corresponding to the S, E, or N directions.

[0077] The arbitration module determines the relative position of the target routing node with respect to the current routing node based on the current node address and the target node address. For example, if the current node address is (1,1) and the target node address is (3,3), the relative position of the target routing node is northeast. If the current node address is (2,1) and the target node address is (0,2), the relative position of the target routing node is southeast. Based on the input direction, candidate routing nodes are determined from the routing nodes associated with the relative position. For example, if the input direction is W, the selection range for the next-hop routing node is the routing nodes corresponding to the S, E, and N directions. If the relative position of the target routing node with respect to the current routing node is northeast, then the S direction is the opposite direction to the target routing node; therefore, the S direction is excluded, and the routing nodes corresponding to the E and N directions are selected as candidate routing nodes.

[0078] The arbitration module is used to obtain the cache capacity of candidate routing nodes. Based on the cache capacity and input direction of the candidate routing nodes, the next-hop routing node is determined among the candidate routing nodes. For example: if there are candidate routing nodes 1 and 2, and the cache capacity of candidate routing node 1 is greater than that of candidate routing node 2, then candidate routing node 1 is selected as the next-hop routing node; if the cache capacity of candidate routing node 1 is the same as that of candidate routing node 2, the input direction is the W direction, and candidate routing node 1 is a routing node in the E direction, belonging to the X direction in the XY coordinate system, then candidate routing node 1 is selected as the next-hop routing node.

[0079] The crossbar switch module is used to transmit the message to be transmitted to the next-hop routing node.

[0080] The routing node provided in this embodiment uses a flow control module to receive packets to be transmitted and stores them in a virtual channel module. An arbitration module determines the input direction, current node address, and target node address of the packet. First, the input direction is used to filter routing nodes, limiting the selection range of the next-hop routing node. The relative position of the target routing node with respect to the current routing node is determined, and the routing nodes are further filtered based on the relative position to determine candidate routing nodes. Finally, based on the buffer capacity and input direction of the candidate routing nodes, the next-hop routing node is determined from among the candidate routing nodes. A crossbar switch module is used to transmit the packet to the next-hop routing node. This routing node employs a shortest XY routing algorithm and a restricted turning strategy, along with congestion awareness technology based on buffer space, to achieve adaptive, deadlock-free routing. This avoids any deadlocks while considering the area and power consumption of the routing node. It solves the problem that routing in on-chip networks can easily lead to network packet congestion or link failures.

[0081] As an optional embodiment, the arbitration module includes a control unit; The control unit is used to determine the current node address in the node address table and the target node address in the message to be transmitted; The control unit is also used to determine the input port of the message to be transmitted into the current routing node in a preset allocation table, wherein the input port is used to determine the input direction; The control unit is also used to determine the preset routing algorithm and routing node selection strategy in the routing algorithm table; The control unit is also used to determine candidate routing nodes among the routing nodes with relatively related positions based on the input direction, the preset routing algorithm, and the routing node selection strategy.

[0082] Specifically, such as Figure 7As shown, the arbitration module is the core of the routing node, primarily responsible for arbitrating and selecting among the five sets of input and output ports based on the aforementioned routing and resource allocation strategies, and allocating virtual channels for each input channel packet. The arbitration module integrates one control unit and five reconfigurable allocation tables, including a VC allocation table, a switch allocation table, a node address table, a routing algorithm table, and a historical routing table. The local PE initializes the VC allocation table, switch allocation table, node address table, and routing algorithm using configuration information, which forms the basis for the control unit's operation. The historical routing table is initially empty and needs continuous updating, recording historical paths from this node to any destination node to avoid multiple route calculations. The VC allocation table records the addresses and usage of four virtual channels for each of the five input ports, serving as the arbitration basis for the DMUX (Demultiplexer) to select one of the four options.

[0083] The node address table is configured with the address of the current routing node, used to compare it with the target routing address carried in the packet header Flit, thus realizing path planning. For the 4×4 network of this invention, the largest node coordinate is (3, 3), therefore the node address is designed to be 4 bits, with the high 2 bits representing the X-axis coordinate and the low 2 bits representing the Y-axis coordinate. For example... Figure 1 The address of node (3,1) is 1101. The node address width is related to the network size. The control unit determines the current node address in the node address table and the target node address in the message to be transmitted.

[0084] A preset allocation table, such as a switch allocation table, records the arbitration strategy for the four virtual channels linked to the input terminals of the multiplexer (MUX) under each of the five input ports. This serves as the arbitration basis for the MUX's (Multiplexer) four-to-one selection. Furthermore, it configures the addresses of the five output ports of the crossover switch, which are used to select output ports based on routing strategies. The control unit determines the input port of the current routing node for the message to be transmitted from the preset allocation table and determines the input direction based on the input port.

[0085] The routing algorithm table records the shortest XY routing algorithm and the turning restriction strategy described in this invention. The control unit determines a preset routing algorithm and a routing node selection strategy from the routing algorithm table. The preset routing algorithm is, for example, the shortest XY routing algorithm, and the routing node selection strategy is, for example, a turning restriction strategy. Based on the preset routing algorithm and routing node selection strategy, and considering network congestion conditions, the control unit performs the final path planning and drives the switch allocation.

[0086] In this embodiment, the control unit determines a preset routing algorithm and a routing node selection strategy in the routing algorithm table; based on the input direction, the preset routing algorithm, and the routing node selection strategy, it determines candidate routing nodes among the routing nodes with relatively related positions. Based on the shortest XY routing algorithm and a restricted turning strategy, and using congestion awareness technology based on cache space and historical routing tables, routing strategy selection is performed to achieve adaptive, deadlock-free routing, taking into account both the area and power consumption of the routing nodes.

[0087] As an optional embodiment, the control unit includes a message buffer control submodule; The message caching control submodule is used to determine the first target virtual channel corresponding to the message to be transmitted in the virtual channel module according to the preset allocation table, and to cache the message to be transmitted in the first target virtual channel; The message buffer control submodule is also used to obtain the remaining hop count between the target routing node and the current routing node corresponding to the message to be transmitted when there are multiple messages to be transmitted to the next hop routing node; The message buffer control submodule is also used to obtain the number of single-dimensional nodes of the on-chip network and determine the message weight corresponding to the message to be transmitted based on the remaining hop count and the number of single-dimensional nodes. The crossbar switch module is used to transmit the packet to be transmitted to the next-hop routing node according to the packet weight.

[0088] Specifically, a preset allocation table is used, for example, the VC allocation table. When the arbitration module receives a packet to be transmitted and obtains routing information from it, the packet caching control submodule allocates available virtual channels based on the VC request from the flow control module and the VC allocation table. It then determines the first target virtual channel corresponding to the packet to be transmitted in the virtual channel module and caches the packet in the first target virtual channel. Additionally, the packet caching control submodule can compare the target routing address in the header Flit with the current node address and select an output port based on the high-fault-tolerant routing strategy of this invention. It should be noted that this process is only a preliminary selection of the output port; data output is not yet performed.

[0089] When multiple packets from different input directions arrive at this route simultaneously, and the final arbitration is for the same output port, the packet buffer control submodule also performs priority arbitration. In this embodiment, the packet buffer control submodule uses the remaining hop count of the packet to calculate the weight value for arbitration; that is, the fewer the remaining hop count of the packet, the higher the weight, and the greater the probability of obtaining arbitration, thereby promoting the release of buffer space in that input direction as quickly as possible. When there are multiple packets to be transmitted to the next-hop routing node, the packet buffer control submodule obtains the remaining hop count of the target routing node and the current routing node corresponding to the packet to be transmitted, obtains the number of single-dimensional nodes in the on-chip network, and determines the packet weight corresponding to the packet to be transmitted based on the remaining hop count and the number of single-dimensional nodes. For example: setting the input direction message weight As shown in formula (1).

[0090] (1) Where N is the number of one-dimensional nodes in the on-chip network, for example, Figure 2 Number of single-dimensional nodes in a network on a medium-sized chip =4. and These represent the relative distances between the current node and the target node of the message, i.e., the remaining hops. Then the message weight... This can be represented as a lower remaining hop count resulting in a higher weight. If the contention fails, the packet can only wait in the virtual channel buffer.

[0091] Cross switch module based on message weight The message to be transmitted will be transmitted to the next-hop routing node.

[0092] In this embodiment, the packet buffer control submodule determines the packet weight corresponding to the packet to be transmitted based on the remaining hop count and the number of single-dimensional nodes. This enables the cross-connect switch module to transmit the packet to the next-hop routing node according to the packet weight. This ensures that when there are multiple packets to be transmitted, they are sent sequentially according to their packet weights, avoiding multiple packets competing for the same port and causing routing congestion.

[0093] As an optional embodiment, the control unit includes a message transmission control submodule; The message transmission control submodule is used to determine whether the next-hop routing node is occupied. If the next-hop routing node is occupied, the control cross switch module is paused from transmitting the message to be transmitted to the next-hop routing node. The message transmission control submodule is also used to send an output request to the next-hop routing node if the next-hop routing node is not occupied, and to control the cross switch module to transmit the message to be transmitted to the next-hop routing node after receiving the output permission response.

[0094] Specifically, after priority arbitration is completed, the message transmission control submodule also needs to determine whether the output port used to transmit messages to the selected next-hop routing node has been occupied before. If the output port is still occupied, it means that the next-hop routing node is occupied, and the message to be transmitted needs to wait in the virtual channel module. The message transmission control submodule controls the cross switch module to suspend the transmission of the message to be transmitted to the next-hop routing node until the output port is released.

[0095] If the next-hop routing node is not occupied and the output port is not a local NI, the message transmission control submodule must first send an output request to the next-hop routing node. After receiving a flow control response from the next-hop routing node allowing output, it then switches the crossbar switch module to transmit the message to be transmitted to the next-hop routing node. If the output port is a local NI, the crossbar switch module is directly switched to output the message to be transmitted to the local processing element.

[0096] In this embodiment, it is determined whether the next-hop routing node is occupied. If it is occupied, the transmission of the message to be transmitted is paused and sent to the next-hop routing node to avoid message congestion. If the next-hop routing node is not occupied, an output request is sent to the next-hop routing node, and the message is transmitted after receiving the output permission response, ensuring that the message to be transmitted is accurately transmitted to the next-hop routing node.

[0097] As an optional embodiment, the flow control module includes a cache detection unit; The cache detection unit is used to obtain the free cache space of the virtual channel in the virtual channel module when it receives an input request sent by other routing nodes; The cache detection unit is also used to determine a second target virtual channel based on the free cache space when the current routing node is used as the next-hop routing node by other routing nodes. The second target virtual channel is used to store packets transmitted from other routing nodes to the current routing node.

[0098] Specifically, the cache detection unit in the flow control module is responsible for receiving input requests from other nearby routing nodes in each direction. By detecting the cache space status of this node, it obtains the free cache space of the virtual channel in the virtual channel module. The free cache space is then sent to other routing nodes for them to use in output port arbitration selection.

[0099] When the current routing node is used as the next-hop routing node by other routing nodes, the buffer detection unit calculates the availability of the four virtual channels in the current input direction of this node to determine the available buffer space. The buffer detection unit uses the maximum available buffer space of each virtual channel as a weight for the upstream node to arbitrate the output port; the higher the weight, the stronger the output bias. If the upstream node determines to choose this node as the next hop, the buffer detection unit determines the second target virtual channel based on the available buffer space; for example, the virtual channel with the largest available buffer space is chosen as the second target virtual channel. The buffer detection unit is also responsible for requesting VC space from the arbitrator, which allocates a corresponding number of virtual channels for data reception. Generally, the channel with the largest available VC is allocated to receive new packets.

[0100] As an optional embodiment, the flow control module includes a flow control unit; The flow control unit is used to determine whether the buffer space of the first target virtual channel is full based on the empty / full flag of the first target virtual channel; The flow control unit is also used to send a wait message to the upstream node of the current routing node when it is determined that the buffer space of the first target virtual channel is full. The wait message is used to instruct the upstream node to suspend the transmission of the second sub-message to the current routing node. The second sub-message is contained in the message to be transmitted and contains data information.

[0101] Specifically, based on the handshake mechanism, the flow control unit performs flow control of the volume Flit input according to the FIFO (First In First Out) empty / full flag of the selected virtual channel to avoid packet loss when the FIFO is full. Based on the empty / full flag of the first target virtual channel, it determines whether the buffer space of the first target virtual channel is full.

[0102] When the flow control unit determines that the buffer space of the first target virtual channel is full, for example, when the FIFO occupied by the current node's packets is full, it sends a wait message to the upstream node of the current routing node. This wait message instructs the upstream node to suspend the transmission of the second sub-packet to the current routing node and to continue buffering the second sub-packet in the upstream node's virtual channel. The second sub-packet is, for example, a body Flit. The second sub-packet is contained within the packet to be transmitted and contains data information.

[0103] In this embodiment, when the flow control unit determines that the buffer space of the first target virtual channel is full, it sends a wait message to the upstream node of the current routing node to avoid packet loss due to the full buffer space. Simultaneously, this method allows the routing node to maintain a smaller buffer, saving area and power consumption.

[0104] As an optional embodiment, the virtual channel module includes a preset number of virtual channels, a multiplexer, and a multiplexer; The multiplexer is connected to the flow control module and is used to store the packets to be transmitted received by the flow control module into the virtual channel; The multiplexer is connected to the virtual channel module and is used to transmit the messages to be transmitted stored in the virtual channel module to the cross switch module according to a preset order.

[0105] Specifically, such as Figure 7As shown, the virtual channel module includes a preset number of virtual channels, a multiplexer, and a multiplexer. The preset number indicates multiple channels, and no specific limit is set here. For example, it could include virtual channel 1, virtual channel 2, virtual channel 3, and virtual channel 4. Different virtual channels are designed using a FIFO mechanism. Buffering in routing nodes consumes a large amount of on-chip resources, increasing area and system power consumption. This embodiment only sets buffer space at the input end, without setting output buffer. For a single node, the input buffer of its next-level router is the output buffer of that level. Theoretically, the more virtual channels, the higher the network transmission performance. However, due to limitations in buffer area and power consumption, increasing the number of virtual channels leads to a decrease in FIFO depth. Under the wormhole routing switching mechanism, this can cause the same packet flit to be excessively distributed across various routing nodes, increasing the risk of packet loss. This embodiment designs 4 channels, each with a depth of 8, thus allowing a maximum of 32 flits to be buffered simultaneously. In practical applications, a special design can be made based on the actual communication traffic of the PE.

[0106] The multiplexer is connected to the flow control module and stores the packets to be transmitted received by the flow control module into virtual channels. The buffer space adopts a FIFO-based virtual channel structure, with multiple virtual channels in each input direction. The VC allocator controls the DMUX to receive different packets in that input direction, realizing the sharing of physical channels through time-division multiplexing and parallelizing the serial buffer structure. Even if one packet becomes congested, other packets can still use the remaining virtual channels to complete the transmission.

[0107] The multiplexer is connected to the virtual channel module and is used to transmit the packets to be transmitted stored in the virtual channel module to the crossbar switch module according to a preset order. Since the virtual channel module in the same input direction has 4 FIFOs, if multiple packet headers simultaneously request the same output port, arbitration selection is required through the MUX. Here, the weight is still calculated based on the remaining hop count of the packet.

[0108] The crossbar switch module contains multiple crossbar switches, for example, five crossbar switches. Each crossbar switch is a multiplexer responsible for connecting the input buffer's various control channels (VCs) to the output ports. Since it's meaningless for data to enter the router through one port and then be redirected 180° to exit from that port, each multiplexer has a maximum of four inputs. To reduce the crossbar switch area, this embodiment designs five sets of 4×1 multiplexers for input buffer arbitration. Considering bypass paths, this embodiment additionally instantiates five sets of 4×1 multiplexers for high-priority header Flit arbitration.

[0109] As an optional embodiment, the routing node also includes a bypass path; the bypass path is used to connect the flow control module and the crossbar switch module; The flow control module is used to transmit the target message to the cross switch module through a bypass path when the message to be transmitted is the target message. The crossbar switch module is used to transmit the message to be transmitted to the next-hop routing node.

[0110] Specifically, to reduce buffer power consumption, this embodiment designs a bypass path at each input port, connecting the flow control module and the crossbar switch module. A priority strategy is adopted to classify packets into high-priority and low-priority packets. High-priority packets, such as header folds and control packets, are used as target packets. In low-traffic network environments, the bypass path can be used to transmit target packets directly to the crossbar switch module, bypassing FIFO buffering and waiting. The crossbar switch module then forwards the packets to the next-hop routing node, reducing transmission latency. Low-priority packets, such as body folds and tail folds, are still transmitted via virtual channels.

[0111] It should be noted that although the bypass path can provide more efficient communication in low-traffic network environments, it comes at the cost of area and power consumption due to the need for arbitration of whether the input port is VC or Bypass, as well as additional multiplexers. Therefore, the bypass scheme in this invention is optional.

[0112] In this embodiment, a bypass path is designed in the routing node to connect the flow control module and the crossbar switch module. The target packet is directly transmitted to the crossbar switch module via the bypass path, and the crossbar switch module then transmits the packet to be transmitted to the next-hop routing node. This eliminates the need to cache the target packet in the virtual channel module, reducing cache power consumption and transmission latency.

[0113] This embodiment also provides an on-chip network routing device for implementing the above embodiments and preferred embodiments; details already described will not be repeated. As used below, the term "module" can refer to a combination of software and / or hardware that performs a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, hardware implementations, or a combination of software and hardware, are also possible and contemplated.

[0114] This embodiment provides an on-chip network routing device, such as... Figure 8As shown, it includes: a first determining module 801, used to determine the input direction, current node address, and target node address of the message to be transmitted upon receiving the message to be transmitted, wherein the input direction is the direction in which the message to be transmitted enters the current routing node, and the input direction is used to limit the selection range of the next-hop routing node; a second determining module 802, used to determine the relative position of the target routing node relative to the current routing node based on the current node address and the target node address; a third determining module 803, used to determine candidate routing nodes among the routing nodes associated with the relative position based on the input direction; and a message transmission module 804, used to determine the next-hop routing node among the candidate routing nodes based on the buffer capacity of the candidate routing nodes and the input direction, and transmit the message to be transmitted to the next-hop routing node.

[0115] In some optional implementations, the third determining module 803 includes: a first judging unit, used to judge whether a target node address exists in the historical routing table; a first determining unit, used to determine a candidate routing node based on the historical routing table and the target node address if the target node address exists in the historical routing table; a second determining unit, used to determine a candidate routing node among the routing nodes associated with relative positions based on the input direction if the target node address does not exist in the historical routing table; and a writing unit, used to write the target node address and the candidate routing node into the historical routing table after determining the next-hop routing node among the candidate routing nodes based on the cache capacity of the candidate routing node and the input direction.

[0116] In some optional implementations, the message transmission module 804 includes: a third determining unit, configured to determine the largest cache capacity among the cache capacities of candidate routing nodes; a first setting unit, configured to set the candidate routing node corresponding to the largest cache capacity as the routing node to be filtered; a second judging unit, configured to set the routing node to be filtered as the next-hop routing node when the number of routing nodes to be filtered is less than or equal to a first preset threshold; a third judging unit, configured to set the routing node to be filtered corresponding to a first target direction as the next-hop routing node when the number of routing nodes to be filtered is greater than the first preset threshold and the input direction is a first preset direction; and a second setting unit, configured to set the routing node to be filtered corresponding to a second target direction as the next-hop routing node when the input direction is a second preset direction.

[0117] In some optional implementations, the third determining module 803 includes: a fourth determining unit, configured to determine a target area based on relative position, wherein the target area contains a preset number of routing nodes; a fifth determining unit, configured to determine the output direction of the message to be transmitted contained in the target area; a sixth determining unit, configured to determine the candidate output direction among the output directions contained in the target area based on the input direction; and a third setting unit, configured to set the routing node corresponding to the candidate output direction as the candidate routing node.

[0118] In some optional implementations, the sixth determining unit includes: a first setting submodule, used to take output directions in the target area that are inconsistent with the input direction as output directions to be filtered; a determining submodule, used to determine the node orientation of the target routing node relative to the current routing node; and a second setting submodule, used to take output directions among the output directions to be filtered whose angle with the node orientation is less than a second preset threshold as candidate output directions.

[0119] In some optional implementations, the message transmission module 804 includes: a obtaining unit, configured to obtain a first sub-message, a second sub-message, and a third sub-message based on the message to be transmitted, wherein the first sub-message contains a target node address, the second sub-message contains data information, and the third sub-message contains a message end flag, the message end flag being used to determine whether the message to be transmitted has been completely transmitted; and a transmission unit, configured to transmit the first sub-message, the second sub-message, and the third sub-message to the next-hop routing node.

[0120] In some optional implementations, the message transmission module 804 further includes: a seventh determining unit, configured to determine first coordinate information of the input port of the current routing node into which the message to be transmitted is input, wherein the first coordinate information includes a first coordinate and a second coordinate; an eighth determining unit, configured to determine second coordinate information of the target routing node based on the target node address, wherein the second coordinate information includes a third coordinate and a fourth coordinate; a fourth judging unit, configured to, if the number of routing nodes to be filtered is greater than a first preset threshold when the first coordinate information is the same as the first preset coordinate information, judge whether the third coordinate is the same as the first coordinate; and a fifth judging unit, configured to, if the third coordinate is the same as the first coordinate, assign the first target coordinate to the corresponding... The system comprises the following steps: First, the first target coordinate is selected as the next-hop routing node; second, if the third coordinate is different from the first coordinate, the first target coordinate is selected as the next-hop routing node; third, if the first coordinate is the same as the second preset coordinate, the number of routing nodes to be selected is greater than a first preset threshold, and the system determines whether the fourth coordinate is the same as the second coordinate; fourth, if the fourth coordinate is the same as the second coordinate, the second target coordinate is selected as the next-hop routing node; and fifth, if the fourth coordinate is the same as the second coordinate, the second target coordinate is selected as the next-hop routing node.

[0121] In some optional embodiments, the device further includes: a fourth determining module, configured to determine the third coordinate information of the current routing node based on the current node address, wherein the third coordinate information includes a fifth coordinate and a sixth coordinate; a fifth determining module, configured to determine the second coordinate information of the target routing node based on the target node address, wherein the second coordinate information includes a third coordinate and a fourth coordinate; a comparison module, configured to compare the fifth coordinate with the third coordinate to obtain a first comparison result; a comparison module, configured to compare the sixth coordinate with the fourth coordinate to obtain a second comparison result; and a sixth determining module, configured to determine the relative position between the current routing node and the target routing node based on the first comparison result and the second comparison result.

[0122] Further functional descriptions of the above modules are the same as those in the corresponding embodiments described above, and will not be repeated here.

[0123] In this embodiment, the on-chip network routing device is presented in the form of a functional unit. Here, a unit refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and memory that execute one or more software or fixed programs, and / or other devices that can provide the above functions.

[0124] This application also provides a computer device having the above-described features. Figure 9 The on-chip network routing device shown is shown.

[0125] Please see Figure 9 , Figure 9 This is a schematic diagram of the structure of a computer device provided in an optional embodiment of this application, such as... Figure 9 As shown, the computer device includes one or more processors 901, memory 902, and interfaces for connecting the components, including high-speed interfaces and low-speed interfaces. The components communicate with each other via different buses and can be mounted on a common motherboard or otherwise installed as needed. The processors can process instructions executed within the computer device, including instructions stored in or on memory to display graphical information of a GUI on external input / output devices (such as display devices coupled to the interfaces). In some alternative implementations, multiple processors and / or multiple buses can be used with multiple memories and multiple memory modules, if desired. Similarly, multiple computer devices can be connected, each providing some of the necessary operations (e.g., as a server array, a group of blade servers, or a multiprocessor system). Figure 9 Take the 901 processor as an example.

[0126] Processor 901 may be a central processing unit, a network processor, or a combination thereof. Processor 901 may further include an integrated circuit, a programmable logic device, or a combination thereof. The programmable logic device may be a complex programmable logic device, a field-programmable gate array (FPGA), a general-purpose array logic (GPA), or any combination thereof.

[0127] The memory 902 stores instructions executable by at least one processor 901 to cause at least one processor 901 to perform the method shown in the above embodiments.

[0128] The memory 902 may include a program storage area and a data storage area. The program storage area may store the operating system and applications required for at least one function; the data storage area may store data created based on the use of the computer device. Furthermore, the memory 902 may include high-speed random access memory and may also include non-transitory memory, such as at least one disk drive, flash memory device, or other non-transitory solid-state memory. In some alternative embodiments, the memory 902 may optionally include memory remotely located relative to the processor 901, and these remote memories may be connected to the computer device via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.

[0129] The memory 902 may include volatile memory, such as random access memory; the memory may also include non-volatile memory, such as flash memory, hard disk or solid-state drive; the memory 902 may also include a combination of the above types of memory.

[0130] The computer device also includes a communication interface 903 for communicating with other devices or communication networks.

[0131] This application also provides a computer-readable storage medium. The methods described in this application can be implemented in hardware or firmware, or implemented as recordable on a storage medium, or implemented as computer code downloaded over a network and originally stored on a remote storage medium or a non-transitory machine-readable storage medium and subsequently stored on a local storage medium. Thus, the methods described herein can be processed by software stored on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. The storage medium can be a magnetic disk, optical disk, read-only memory, random access memory, flash memory, hard disk, or solid-state drive, etc.; further, the storage medium can also include combinations of the above types of memory. It is understood that computers, processors, microprocessor controllers, or programmable hardware include memory capable of storing or receiving software or computer code, which, when accessed and executed by the computer, processor, or hardware, implements the methods shown in the above embodiments.

[0132] A portion of this application can be applied as a computer program product, such as computer program instructions, which, when executed by a computer, can invoke or provide the methods and / or technical solutions according to this application through the operation of the computer. Those skilled in the art will understand that the forms in which computer program instructions exist in a computer-readable medium include, but are not limited to, source files, executable files, installation package files, etc. Correspondingly, the ways in which computer program instructions are executed by a computer include, but are not limited to: the computer directly executing the instructions, or the computer compiling the instructions and then executing the corresponding compiled program, or the computer reading and executing the instructions, or the computer reading and installing the instructions and then executing the corresponding installed program. Here, the computer-readable medium can be any available computer-readable storage medium or communication medium accessible to a computer.

[0133] Although embodiments of this application have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of this application, and such modifications and variations all fall within the scope defined by this application.

Claims

1. An on-chip network routing method, characterized in that, The method includes: Upon receiving a message to be transmitted, the input direction, current node address, and target node address of the message to be transmitted are determined. The input direction is the direction in which the message to be transmitted is input to the current routing node, and the input direction is used to limit the selection range of the next-hop routing node. The relative position of the target routing node with respect to the current routing node is determined based on the current node address and the target node address; Based on the input direction, candidate routing nodes are determined among the routing nodes associated with the relative positions; Based on the buffer capacity of the candidate routing nodes and the input direction, the next-hop routing node is determined from the candidate routing nodes, and the message to be transmitted is transmitted to the next-hop routing node.

2. The method according to claim 1, characterized in that, The step of determining candidate route nodes among the route nodes associated with the relative positions based on the input direction includes: Determine if the target node address exists in the historical routing table; If the target node address exists in the historical routing table, the candidate routing node is determined based on the historical routing table and the target node address; If the target node address does not exist in the historical routing table, a candidate routing node is determined from the routing nodes associated with the relative position according to the input direction; After determining the next-hop routing node from the candidate routing nodes based on the cache capacity of the candidate routing nodes and the input direction, the target node address and the candidate routing node are written into the historical routing table.

3. The method according to claim 1, characterized in that, The step of determining the next-hop routing node from the candidate routing nodes based on the cache capacity of the candidate routing nodes and the input direction includes: Determine the cache capacity with the largest value among the cache capacities of the candidate routing nodes; Select the candidate route node with the largest cache capacity as the route node to be filtered. If the number of routing nodes to be filtered is less than or equal to a first preset threshold, the routing nodes to be filtered will be used as the next-hop routing nodes. If the number of routing nodes to be filtered is greater than the first preset threshold, and if the input direction is the first preset direction, the routing node to be filtered corresponding to the first target direction will be used as the next hop routing node. If the input direction is a second preset direction, the routing node to be filtered corresponding to the second target direction is taken as the next hop routing node.

4. The method according to claim 1 or 2, characterized in that, The step of determining candidate route nodes among the route nodes associated with the relative positions based on the input direction includes: Based on the relative positions, a target area is determined, wherein the target area contains a preset number of the routing nodes; Determine the output direction of the message to be transmitted contained in the target area; Based on the input direction, the candidate output direction is determined from the output directions included in the target region; The routing node corresponding to the candidate output direction is taken as the candidate routing node.

5. The method according to claim 4, characterized in that, The step of determining the candidate output direction from the output directions included in the target region based on the input direction includes: The output direction in the target region that is inconsistent with the input direction is taken as the output direction to be filtered. Determine the node orientation of the target routing node relative to the current routing node; The output direction whose angle with the node orientation is less than a second preset threshold is selected as the candidate output direction.

6. The method according to claim 1, characterized in that, The step of transmitting the message to be transmitted to the next-hop routing node includes: Based on the message to be transmitted, a first sub-message, a second sub-message, and a third sub-message are obtained. The first sub-message contains the target node address, the second sub-message contains data information, and the third sub-message contains a message end flag. The message end flag is used to determine whether the message to be transmitted has been completely transmitted. The first sub-message, the second sub-message, and the third sub-message are transmitted to the next-hop routing node.

7. The method according to claim 3, characterized in that, After selecting the candidate route node with the largest cache capacity as the route node to be filtered, the method further includes: The first coordinate information of the input port of the current routing node into which the message to be transmitted is input is determined, wherein the first coordinate information includes a first coordinate and a second coordinate; The second coordinate information of the target routing node is determined based on the target node address, wherein the second coordinate information includes a third coordinate and a fourth coordinate; If the first coordinate information is the same as the first preset coordinate information, and the number of routing nodes to be filtered is greater than the first preset threshold, it is determined whether the third coordinate is the same as the first coordinate. If the third coordinate is the same as the first coordinate, the routing node to be filtered corresponding to the first target coordinate is taken as the next hop routing node; If the third coordinate is different from the first coordinate, the routing node to be filtered corresponding to the second target coordinate will be the next hop routing node. If the first coordinate information is the same as the second preset coordinate information, and the number of routing nodes to be filtered is greater than the first preset threshold, it is determined whether the fourth coordinate is the same as the second coordinate. If the fourth coordinate is the same as the second coordinate, the routing node to be filtered corresponding to the third target coordinate will be the next hop routing node; If the fourth coordinate is the same as the second coordinate, the routing node to be filtered corresponding to the fourth target coordinate is taken as the next hop routing node.

8. The method according to claim 1, characterized in that, Determining the relative position of the target routing node with respect to the current routing node based on the current node address and the target node address includes: The third coordinate information of the current routing node is determined based on the current node address, wherein the third coordinate information includes the fifth coordinate and the sixth coordinate; The second coordinate information of the target routing node is determined based on the target node address, wherein the second coordinate information includes a third coordinate and a fourth coordinate; The fifth coordinate is compared with the third coordinate to obtain the first comparison result; The sixth coordinate is compared with the fourth coordinate to obtain a second comparison result; Based on the first comparison result and the second comparison result, the relative position of the current routing node and the target routing node is determined.

9. A routing node, characterized in that, The routing node includes: an arbitration module, a flow control module, a virtual channel module, and a crossbar switch module; The flow control module is connected to the virtual channel module and is used to receive the message to be transmitted and store the message to be transmitted in the virtual channel module. The arbitration module is used to determine the input direction, current node address, and target node address of the message to be transmitted, determine the relative position of the target routing node with respect to the current routing node based on the current node address and the target node address, and determine the candidate routing node among the routing nodes associated with the relative position based on the input direction. The input direction is the direction in which the message to be transmitted is input to the current routing node, and the input direction is used to limit the selection range of the next-hop routing node. The arbitration module is used to obtain the cache capacity of the candidate routing nodes, and determine the next-hop routing node among the candidate routing nodes based on the cache capacity of the candidate routing nodes and the input direction. The cross switch module is used to transmit the message to be transmitted to the next-hop routing node.

10. The routing node according to claim 9, characterized in that, The arbitration module includes a control unit; The control unit is configured to determine the current node address in the node address table and the target node address in the message to be transmitted; The control unit is further configured to determine, in a preset allocation table, the input port of the message to be transmitted to the current routing node, wherein the input port is used to determine the input direction; The control unit is also used to determine a preset routing algorithm and a routing node selection strategy in the routing algorithm table; The control unit is further configured to determine the candidate routing node among the routing nodes associated with the relative positions based on the input direction, the preset routing algorithm, and the routing node selection strategy.

11. The routing node according to claim 10, characterized in that, The control unit includes a message buffer control submodule; The message caching control submodule is used to determine the first target virtual channel corresponding to the message to be transmitted in the virtual channel module according to the preset allocation table, and cache the message to be transmitted in the first target virtual channel. The message caching control submodule is also used to obtain the remaining hop count of the target routing node corresponding to the message to be transmitted and the current routing node when there are multiple messages to be transmitted to the next hop routing node; The message caching control submodule is also used to obtain the number of single-dimensional nodes of the on-chip network, and determine the message weight corresponding to the message to be transmitted based on the remaining hop count and the number of single-dimensional nodes. The crossbar switch module is used to transmit the packet to be transmitted to the next-hop routing node according to the packet weight.

12. The routing node according to claim 10, characterized in that, The control unit includes a message transmission control submodule; The message transmission control submodule is used to determine whether the next-hop routing node is occupied. If the next-hop routing node is occupied, the cross switch module is controlled to pause the transmission of the message to be transmitted to the next-hop routing node. The message transmission control submodule is also configured to send an output request to the next-hop routing node if the next-hop routing node is not occupied, and after receiving an output permission response, control the cross switch module to transmit the message to be transmitted to the next-hop routing node.

13. The routing node according to claim 9, characterized in that, The flow control module includes a cache detection unit; The cache detection unit is used to obtain the free cache space of the virtual channel in the virtual channel module when it receives an input request sent by other routing nodes. The cache detection unit is further configured to determine a second target virtual channel based on the free cache space when the current routing node is used as the next-hop routing node by the other routing nodes, wherein the second target virtual channel is used to store packets transmitted from the other routing nodes to the current routing node.

14. The routing node according to claim 11, characterized in that, The flow control module includes a flow control unit; The flow control unit is used to determine whether the buffer space of the first target virtual channel is full based on the empty / full flag of the first target virtual channel; The flow control unit is further configured to send a wait message to the upstream node of the current routing node when it is determined that the first target virtual channel buffer space is full. The wait message is used to instruct the upstream node to suspend the transmission of the second sub-message to the current routing node. The second sub-message is contained in the message to be transmitted and contains data information.

15. The routing node according to claim 9, characterized in that, The virtual channel module includes a preset number of virtual channels, a multiplexer, and a multiplexer. The multiplexer is connected to the flow control module and is used to store the packets to be transmitted received by the flow control module into the virtual channel; The multiplexer is connected to the virtual channel module and is used to transmit the messages to be transmitted stored in the virtual channel module to the cross switch module according to a preset order.

16. The routing node according to claim 9, characterized in that, The routing node also includes a bypass path; the bypass path is used to connect the flow control module and the crossbar switch module; The flow control module is used to transmit the target message to the cross switch module through the bypass path when the message to be transmitted is the target message; The cross switch module is used to transmit the message to be transmitted to the next-hop routing node.

17. An on-chip network routing device, characterized in that, The device includes: The first determining module is used to determine the input direction, current node address, and target node address of the message to be transmitted when a message to be transmitted is received, wherein the input direction is the direction in which the message to be transmitted is input to the current routing node, and the input direction is used to limit the selection range of the next-hop routing node; The second determining module is used to determine the relative position of the target routing node with respect to the current routing node based on the current node address and the target node address; The third determining module is used to determine candidate routing nodes among the routing nodes associated with the relative positions based on the input direction; The message transmission module is used to determine the next-hop routing node among the candidate routing nodes based on the buffer capacity of the candidate routing nodes and the input direction, and to transmit the message to be transmitted to the next-hop routing node.

18. A computer device, characterized in that, include: A memory and a processor are communicatively connected, the memory stores computer instructions, and the processor executes the on-chip network routing method according to any one of claims 1 to 8 by executing the computer instructions.

19. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions for causing a computer to perform the on-chip network routing method according to any one of claims 1 to 8.

20. A computer program product, characterized in that, Includes computer instructions for causing a computer to perform the on-chip network routing method according to any one of claims 1 to 8.

Images