Display panel, manufacturing method of display panel and electronic equipment

Abstract

The invention provides a display panel, a manufacturing method of the display panel and electronic equipment. The orthographic projection of the side surface of a supporting part of an isolation structure on an array substrate is arranged in the orthographic projection of a first electrode on the array substrate; therefore, the part, used for blocking the evaporation material, in the isolation structure and the isolation structure at the lap joint position of the cathode and the isolation structure are smoother and more regular in morphology, the controllability of a blocking angle formed by the isolation structure during evaporation can be improved, and then the lap joint effectiveness of the cathode formed by evaporation and the isolation structure is improved.

Description

Technical Field

[0001] This application relates to the field of display technology, and more specifically, to a display panel, a method for manufacturing the display panel, and an electronic device. Background Technology

[0002] Organic light-emitting diodes (OLEDs) and flat panel displays based on light-emitting diodes (LEDs) are widely used in various consumer electronics products such as mobile phones, televisions, laptops, and desktop computers due to their advantages such as high image quality, energy saving, thin body, and wide range of applications, becoming the mainstream of display devices.

[0003] However, the current manufacturing process of OLED display products needs improvement. Summary of the Invention

[0004] In order to overcome the above-mentioned shortcomings in the prior art, the purpose of this application is to provide a display panel, the display panel comprising:

[0005] Array substrate;

[0006] The first electrode is located on one side of the array substrate;

[0007] An isolation structure is located on the side of the array substrate where the first electrode is disposed, the isolation structure encloses to form an isolation opening, the isolation opening exposing at least a portion of the first electrode; the isolation structure includes a support portion and a shielding portion located on the side of the support portion away from the array substrate;

[0008] The support portion includes a first surface near the array substrate and a second surface away from the array substrate. The support portion also includes at least one side surface connecting the first surface and the second surface. The orthographic projection of at least one side surface of the support portion onto the array substrate does not coincide with the orthographic projection of the end of the first electrode away from the isolation opening onto the array substrate.

[0009] In some possible implementations, the orthographic projection of at least one side surface of the support onto the array substrate lies within the orthographic projection of the first electrode onto the array substrate.

[0010] In some possible implementations, the first electrode includes a third surface near the array substrate and a fourth surface away from the array substrate;

[0011] The orthographic projection of the fourth surface on the array substrate lies within the orthographic projection of the third surface on the array substrate; the orthographic projection of at least one side surface of the support portion on the array substrate lies within the orthographic projection of the fourth surface of the first electrode on the array substrate.

[0012] In some possible implementations, the first angle between the side surface and the first surface is θ1, the first height of the support portion in the direction perpendicular to the first surface is H1, and the minimum distance between the orthographic projection of the end of the side surface near the array substrate on the array substrate and the orthographic projection of the end of the fourth surface away from the pixel opening on the array substrate is D1, where D1≥H1 / tanθ1.

[0013] In some possible implementations, the orthographic projection of the isolation structure on the array substrate does not coincide with the orthographic projection of the first electrode on the array substrate;

[0014] Preferably, the orthographic projection of the isolation structure on the array substrate is located between the orthographic projections of the adjacent first electrodes on the array substrate.

[0015] In some possible implementations, the orthographic projection of the support portion on the array substrate lies within the orthographic projection of the shielding portion on the array substrate.

[0016] In some possible implementations, the support portion includes a first metal layer, and the shielding portion includes a second metal layer;

[0017] Preferably, the material of the first metal layer includes aluminum, and / or the material of the second metal layer includes titanium;

[0018] Preferably, the support portion further includes a third metal layer located on the side of the first metal layer closer to the array substrate;

[0019] Preferably, the material of the third metal layer includes molybdenum.

[0020] In some possible implementations, the display panel further includes a pixel defining layer located on one side of the array substrate, the isolation structure being located on the side of the pixel defining layer away from the array substrate, the pixel defining layer including a pixel opening, and the orthographic projection of the pixel opening on the array substrate being located within the orthographic projection of the isolation opening on the array substrate.

[0021] In some possible implementations, the display panel further includes a light-emitting material layer and a second electrode that are at least partially located within the pixel opening and stacked in a direction away from the array substrate.

[0022] In some possible implementations, the isolation structure is conductive, and the second electrode extends from within the pixel opening to the side of the pixel defining layer away from the array substrate and makes electrical contact with the isolation structure.

[0023] In some possible implementations, the display panel further includes a first encapsulation layer located on the side of the second electrode away from the array substrate.

[0024] In some possible implementations, the first encapsulation layer extends from inside the pixel opening along the side surface to the side of the isolation structure away from the array substrate;

[0025] Preferably, the first encapsulation layers corresponding to adjacent pixel openings are spaced apart, and the gaps between the gaps are located on the side of the isolation structure away from the array substrate.

[0026] In some possible implementations, the display panel further includes a second encapsulation layer and a third encapsulation layer stacked on the side of the first encapsulation layer away from the array substrate and in a direction away from the array substrate;

[0027] Preferably, the materials of the first encapsulation layer and the third encapsulation layer include inorganic materials, and the material of the second encapsulation layer includes organic materials.

[0028] In some possible implementations, the portion of the first encapsulation layer located on the side of the isolation structure away from the array substrate has a gap with the isolation structure, and the second encapsulation layer fills the gap.

[0029] In some possible implementations, the orthographic projection of each of the side surfaces of the isolation structure onto the array substrate lies within the orthographic projection of each of the first electrodes onto the array substrate.

[0030] Another object of this application is to provide a method for manufacturing a display panel, the method comprising:

[0031] Provide an array substrate;

[0032] A first electrode is formed on one side of the array substrate;

[0033] An isolation structure is formed on one side of the array substrate where the first electrode is disposed. The isolation structure encloses an isolation opening, which exposes at least a portion of the first electrode. The isolation structure includes a support portion and a shielding portion located on the side of the support portion away from the array substrate. The support portion includes a first surface close to the array substrate and a second surface away from the array substrate. The support portion also includes at least one side surface connecting the first surface and the second surface. The orthographic projection of at least one side surface of the support portion on the array substrate does not coincide with the orthographic projection of the first electrode on the array substrate.

[0034] In some possible implementations, the step of forming an isolation structure on the side of the array substrate where the first electrode is disposed includes:

[0035] An isolation layer is formed on the side of the array substrate where the first electrode is disposed;

[0036] The isolation layer is etched to form the isolation structure with an isolation opening, such that the orthographic projection of at least one side surface of the support portion on the array substrate is located within the orthographic projection of the first electrode on the array substrate, or the orthographic projection of the isolation structure on the array substrate does not coincide with the orthographic projection of the first electrode on the array substrate.

[0037] In some possible implementations, the step of forming an isolation structure on the side of the array substrate where the first electrode is disposed includes:

[0038] A pixel defining layer and an isolation layer are formed on the side of the first electrode away from the array substrate;

[0039] The isolation layer is etched to form the isolation structure with isolation openings;

[0040] The pixel defining layer is etched to form a pixel opening that communicates with the isolation opening.

[0041] In some possible implementations, if the orthographic projection of at least one side surface of the support portion onto the array substrate is within the orthographic projection of the first electrode onto the array substrate, the first electrode includes a third surface near the array substrate and a fourth surface on the array substrate, wherein the orthographic projection of the fourth surface onto the array substrate is within the orthographic projection of the third surface onto the array substrate.

[0042] The first angle between the side surface and the first surface is θ1, the first height of the support in the direction perpendicular to the first surface is H1, the minimum distance between the orthographic projection of the end of the side surface near the array substrate on the array substrate and the orthographic projection of the end of the fourth surface away from the isolation opening on the array substrate is D1, and the preset design and manufacturing error is m.

[0043] The step of etching the isolation layer to form the isolation structure includes:

[0044] Under the condition that m is greater than or equal to 0.1 micrometers and D1 = H1 / tanθ1 + m, the isolation layer is etched to form an isolation structure. This application also provides an electronic device including the display panel provided in this application.

[0045] Compared with the prior art, this application has the following beneficial effects:

[0046] This application provides a display panel, a method for manufacturing the display panel, and an electronic device. By setting the side surface of the support portion of the isolation structure so that its orthographic projection on the array substrate does not coincide with the orthographic projection of the end of the first electrode away from the isolation opening on the array substrate, the morphology of the isolation structure in the portion used to block the vapor deposition material and the isolation structure at the junction of the cathode and the isolation structure can be made flatter and more regular. In this way, the controllability of the blocking angle formed by the isolation structure during vapor deposition can be improved, thereby improving the bonding effectiveness between the vapor-deposited cathode and the isolation structure. Attached Figure Description

[0047] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0048] Figure 1 This is a schematic diagram of an existing display panel;

[0049] Figure 2 One of the schematic diagrams of the display panel provided in this embodiment;

[0050] Figure 3 This is a second schematic diagram of the display panel provided in this embodiment;

[0051] Figure 4 This is the third schematic diagram of the display panel provided in this embodiment;

[0052] Figure 5This is the fourth schematic diagram of the display panel provided in this embodiment;

[0053] Figure 6 This is the fifth schematic diagram of the display panel provided in this embodiment;

[0054] Figure 7A This is the sixth schematic diagram of the display panel provided in this embodiment;

[0055] Figure 7B This is the seventh schematic diagram of the display panel provided in this embodiment;

[0056] Figure 8 This is the eighth schematic diagram of the display panel provided in this embodiment;

[0057] Figure 9 This is diagram nine of the display panel provided in this embodiment;

[0058] Figure 10 This is a flowchart illustrating the steps of the manufacturing method for the display panel provided in this embodiment;

[0059] Figure 11 This is the tenth schematic diagram of the display panel provided in this embodiment.

[0060] Icons: 110-Array substrate; 120-First electrode; 130-Pixel defining layer; 140-Isolation structure; 150-Light emitting material layer; 160-Second electrode; 170-First encapsulation layer; 180-Second encapsulation layer; 190-Third encapsulation layer; 141-Support portion; 142-Shielding portion; 1401-First surface; 1402-Second surface; 1403-Side surface; 1201-Third surface; 1202-Fourth surface; 1411-First metal layer; 1412-Third metal layer; 1421-Second metal layer. Detailed Implementation

[0061] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0062] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0063] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0064] In the description of this application, it should be noted that the terms "center," "upper," "lower," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product of the invention is in use. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. In addition, the terms "first," "second," and "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0065] It should be noted that, where there is no conflict, different features in the embodiments of this application can be combined with each other.

[0066] Please see Figure 1 , Figure 1 This is a schematic diagram of a portion of the film layers of a display panel employing an isolation structure 140. Such display panels typically include an array substrate 110', a first electrode 120' (e.g., an anode), a pixel defining layer 130', an isolation structure 140', a light-emitting material layer 150', and a second electrode 160' (e.g., a cathode).

[0067] The composition and preparation of the isolation structure 140' are further described in patents PCT / CN2023 / 134518, 202310759370.2, 202310740412.8, 202310771071.0, 202311346196.5, and 202310692671.8 for reference.

[0068] The first electrode 120' is located on one side of the array substrate 110'. A pixel defining layer 130' is located on the side of the first electrode 120' away from the array substrate 110', and the pixel defining layer 130' includes a pixel opening that exposes the first electrode 120'. An isolation structure 140' is located on the side of the pixel defining layer 130' away from the array substrate 110', and the isolation structure 140' includes an isolation opening. The orthographic projection of the pixel opening onto the array substrate 110' lies within the orthographic projection of the isolation opening onto the array substrate 110' (i.e., the isolation opening communicates with the pixel opening). The isolation structure 140' includes a support portion 141' and a blocking portion 142' located on the side of the support portion 141' away from the array substrate 110'. At least a portion of the light-emitting material layer 150' and at least a portion of the second electrode 160' are located within the pixel opening, and the second electrode 160' further extends to the side of the pixel defining layer 130' away from the array substrate 110' and overlaps with the isolation structure 140'.

[0069] In this type of display panel, because the first electrode 120' has a certain thickness, the side of the pixel defining layer 130' covering the end of the first electrode 120' that is away from the array substrate 110' also has a certain undulation. In this case, the side of the support portion 141' of the isolation structure 140' is located on the uneven part of the pixel defining layer 130' (e.g., Figure 1 As shown in the dashed circle (in the middle), this makes it difficult to control the topography of the position where the shielding portion 142' formed on the support portion 141' is used to block the vapor deposition material. This, in turn, makes it difficult to control the vapor deposition angle when forming the second electrode 160', and also causes the second electrode 160', which needs to overlap with the isolation structure 140', to be formed at an uneven position on the pixel defining layer 130', affecting the effectiveness of the overlap between the second electrode 160' and the isolation structure 140' (e.g., Figure 1 (As shown by the dashed line in the middle).

[0070] In view of this, this embodiment provides a display panel and its related structure, which can improve the bonding effectiveness between the second electrode 160 and the isolation structure 140. The display panel provided in this embodiment will be described in detail below.

[0071] Please see Figure 2 , Figure 2 This is a schematic diagram of a display panel provided in this embodiment. The display panel may include an array substrate 110, a first electrode 120, and an isolation structure 140.

[0072] In this embodiment, the array substrate 110 may include multiple film layer structures, such as a substrate, a buffer layer, an active layer, multiple metal layers, multiple insulating layers, and a planarization layer. The multiple film layer structures of the array substrate 110 can form multiple thin film transistors (TFTs) at different locations on the array substrate 110. The thin film transistors can cooperate with each other to form multiple pixel driving units or driving circuits.

[0073] The first electrode 120 is located on one side of the array substrate 110. Optionally, a plurality of first electrodes 120 may be spaced apart on one side of the array substrate 110. The first electrode 120 may be electrically connected to a driving unit or driving circuit in the array substrate 110 to obtain a driving voltage from the driving unit or driving circuit.

[0074] The isolation structure 140 is located on the side of the array substrate 110 where the first electrode 120 is disposed. The isolation structure 140 may include an isolation opening that exposes at least a portion of the first electrode 120.

[0075] In this embodiment, the isolation structure 140 includes a support portion 141 and a shielding portion 142 located on the side of the support portion 141 away from the array substrate 110.

[0076] Please refer to Figure 3 The support portion 141 includes a first surface 1401 near the array substrate 110 and a second surface 1402 away from the array substrate 110, with the second surface 1402 contacting the shielding portion 142. The orthographic projection of the second surface 1402 onto the array substrate 110 lies within the orthographic projection of the first surface 1401 onto the array substrate 110. The support portion 141 also includes at least one side surface 1403 connecting the first surface 1401 and the second surface 1402. That is, the area of ​​the first surface 1401 is relatively large, and the area of ​​the second surface 1402 is relatively small; therefore, the side surface 1403 connecting the first surface 1401 and the second surface 1402 forms a non-right angle with the second surface 1402.

[0077] Optionally, the orthographic projection of the support portion 141 on the array substrate 110 is located within the orthographic projection of the shielding portion 142 on the array substrate 110, that is, the support portion 141 is recessed relative to the shielding portion 142 to form an undercut structure. For example, after uniformly etching the shielding portion 142 and the support portion 141 to form an isolation opening, the support portion 141 can be side-etched to make the support portion 141 recessed relative to the shielding portion 142 to form an undercut structure.

[0078] In this embodiment, the orthographic projection of at least one side surface 1403 of the support portion 141 onto the array substrate 110 lies within the orthographic projection of the first electrode 120 onto the array substrate 110.

[0079] For example, in one possible implementation, please refer again. Figure 2 At least one side surface 1403 of the support portion 141 has its orthographic projection on the array substrate 110 located within the orthographic projection of the first electrode 120 on the array substrate 110 (e.g., Figure 2 (The position of the dashed line is shown in the diagram).

[0080] For example, in another possible implementation, please see [link to relevant documentation]. Figure 4 The orthographic projection of the isolation structure 140 on the array substrate 110 does not coincide with the orthographic projection of the first electrode 120 on the array substrate 110. For example, the orthographic projection of the support portion 141 of the isolation structure 140 on the array substrate 110 is located between the orthographic projections of two adjacent first electrodes 120 on the array substrate 110.

[0081] Based on the above design, when the orthographic projection of the side surface 1403 of the support portion 141 onto the array substrate 110 is within the orthographic projection of the first electrode 120 onto the array substrate 110, it can be ensured that the orthographic projections of the side surface 1403 of the support portion 141 and the end of the shielding portion 142 near the isolation opening onto the array substrate 110 will not overlap with the orthographic projection of the end of the first electrode 120 onto the array substrate 110. Thus, for the shielding portion 142, which plays a crucial role in shielding the vapor-deposited material during the vapor deposition process, and the support portion 141, which overlaps with the second electrode 160, the uniformity of their key dimensions can be ensured, thereby improving the controllability of the blocking angle formed by the isolation structure 140 during vapor deposition, and further improving the effectiveness of the overlap between the vapor-deposited cathode and the isolation structure 140.

[0082] In some possible implementations, Figure 2 Based on the scheme shown, the orthographic projections of each side surface 1403 of the isolation structure 140 onto the array substrate 110 are all located within the orthographic projections of each first electrode 120 onto the array substrate 110. In this way, the uniformity of the critical dimensions of the isolation structure 140 corresponding to each isolation opening can be ensured, thereby improving the bonding effectiveness between the cathode of each sub-pixel formed by vapor deposition and the isolation structure 140.

[0083] In some possible implementations, Figure 2 Based on the proposed solution, please refer to... Figure 5 The first electrode 120 includes a third surface 1201 on the side closer to the array substrate 110 and a fourth surface 1202 on the side farther from the array substrate 110. The orthographic projection of the fourth surface 1202 on the array substrate 110 lies within the orthographic projection of the third surface 1201 on the array substrate 110. That is, the cross-section of the first electrode 120 can be trapezoidal, wherein the base side corresponding to the third surface 1201 on the side closer to the array substrate 110 is longer, and the top side corresponding to the fourth surface 1202 on the side farther from the array substrate 110 is shorter.

[0084] In this case, the orthographic projection of at least one side surface 1403 of the support portion 141 onto the array substrate 110 is within the orthographic projection of the fourth surface 1202 of the first electrode 120 onto the array substrate 110. That is, the orthographic projections of the side surface 1403 of the support portion 141 and the end of the shielding portion 142 near the isolation opening onto the array substrate 110 do not coincide with the orthographic projection of the slope connecting the third surface 1201 and the fourth surface 1202 of the first electrode 120 onto the array substrate 110. This further ensures that the side surface 1403 of the support portion 141 and the end of the shielding portion 142 near the array substrate 110 are both formed based on a relatively flat pixel defining layer 130, improving the controllability of the blocking angle formed by the isolation structure 140 during evaporation, thereby improving the bonding effectiveness between the evaporated cathode and the isolation structure 140.

[0085] Furthermore, in some possible implementations, please refer to... Figure 6 The first angle between the side surface 1403 and the first surface 1401 is θ1; the first height of the support portion 141 in the direction perpendicular to the first surface 1401 is H1; the minimum distance between the orthographic projection of the end of the side surface 1403 near the array substrate 110 on the array substrate 110 and the orthographic projection of the end of the fourth surface 1202 away from the pixel opening on the array substrate 110 is D1, that is, the minimum overlap distance between the orthographic projection of the support portion 141 on the array substrate 110 and the orthographic projection of the fourth surface 1402 of the first electrode 120 on the array substrate 110 is D1. Wherein, D1≥H1 / tanθ1.

[0086] Specifically, θ1 is determined by the etching process of the isolation structure 140. In this case, the minimum stagger distance D1 between the support portion 141 and the first electrode 120 is set according to the first height H1 of the support portion 141. This allows the minimum stagger distance D1 between the support portion 141 and the first electrode 120 to be adapted to the first height H1 of the support portion 141, thereby ensuring that the orthographic projection of at least one side surface 1403 of the support portion 141 on the array substrate 110 is within the orthographic projection of the fourth surface 1202 of the first electrode 120 on the array substrate 110.

[0087] In some other possible implementations, the first electrode 120 includes a third surface 1201 on the side closer to the array substrate 110 and a fourth surface 1202 on the side farther from the array substrate 110. The orthographic projection of the third surface 1201 onto the array substrate 110 lies within the orthographic projection of the fourth surface 1202 onto the array substrate 110. That is, the cross-section of the first electrode 120 can be an inverted trapezoid, wherein the base side corresponding to the fourth surface 1202 on the side farther from the array substrate 110 is longer, and the top side corresponding to the third surface 1201 on the side closer to the array substrate 110 is shorter.

[0088] In this case, the orthographic projection of at least one side surface 1403 of the support portion 141 onto the array substrate 110 is within the orthographic projection of the fourth surface 1202 of the first electrode 120 onto the array substrate 110. That is, the orthographic projection of the side surface 140 of the support portion 141 and the end of the fourth surface 1202 of the first electrode 120 away from the array substrate 110 onto the array substrate 110 coincides.

[0089] For some possible implementations, please refer to Figure 7A The support portion 141 includes a first metal layer 1411 stacked in a direction away from the array substrate 110, and the shielding portion 142 includes a second metal layer 1421. For example, the material of the first metal layer 1411 includes molybdenum, and the material of the second metal layer 1412 includes aluminum. Thus, the etching resistance of the support portion 141 is weaker than that of the shielding portion 142. An undercut structure in which the support portion 141 is recessed relative to the shielding portion 142 can be formed by side etching, so that the cross-section of the isolation structure 140 is T-shaped.

[0090] In another possible implementation, please refer to Figure 7B The support portion 141 may also include a third metal layer 1412 located on the side of the first metal layer 1411 near the array substrate 110.

[0091] Optionally, the orthographic projection of the first metal layer 1411 on the array substrate 110 is located within the orthographic projection of the third metal layer 1412 on the array substrate 110, and the orthographic projection of the third metal layer 1412 on the array substrate 110 is located within the orthographic projection of the second metal layer 1421 on the array substrate.

[0092] Optionally, the third metal layer 1412 has stronger etching resistance than the first metal layer 1411. For example, the material of the third metal layer may include molybdenum. Thus, by forming a structure in which the first metal layer 1411 is recessed compared to the second metal layer 1421 and the third metal layer 1412 through a side etching process, the cross-section of the isolation structure 140 is H-shaped.

[0093] In some possible implementations, the display panel may also include a pixel defining layer 130 located on the side of the first electrode 120 away from the array substrate 110, and an isolation structure 140 located on the side of the pixel defining layer 130 away from the array substrate 110.

[0094] The pixel defining layer 130 includes a pixel opening, the orthographic projection of which onto the array substrate 110 lies within the orthographic projection of the isolation opening onto the array substrate. That is, the pixel opening and the isolation opening are connected together to expose at least a portion of the first electrode 120. Optionally, the pixel defining layer 130 may include a plurality of pixel openings, different pixel openings may expose different first electrodes 120, and adjacent first electrodes 120 are isolated from each other by the pixel defining layer 130.

[0095] Furthermore, in some possible implementations, please refer to... Figure 8 The display panel also includes a light-emitting material layer 150 and a second electrode 160, which are at least partially located within the pixel openings and stacked in a direction away from the array substrate 110.

[0096] Optionally, the isolation structure 140 is conductive, and the second electrode 160 extends from inside the pixel opening to the side of the pixel defining layer 130 away from the array substrate 110 and is in electrical contact with the isolation structure 140.

[0097] Optionally, in this embodiment, the first electrode 120 can be connected to the driving circuit in the array substrate 110 to obtain a driving voltage VDD; the second electrode 160 is electrically connected to the isolation structure 140, and the second electrode is supplied with a common voltage VSS. Thus, when there is a potential difference between the first electrode 120 and the second electrode 160, the light-emitting material layer 150 located between the first electrode 120 and the second electrode 160 is driven to emit light.

[0098] For some possible implementations, please refer to Figure 9 The display panel also includes a first encapsulation layer 170 located on the side of the second electrode 160 away from the array substrate 110. Optionally, the first encapsulation layers 170 corresponding to different pixel openings are relatively independent, and the first encapsulation layers 170 corresponding to adjacent pixel openings are spaced apart.

[0099] Furthermore, in some possible implementations, the first encapsulation layer 170 extends from inside the pixel opening along the side surface 1403 to the side of the isolation structure 140 away from the array substrate 110.

[0100] Optionally, the first encapsulation layers 170 corresponding to adjacent pixel openings are spaced apart, and the gaps between the gaps are located on the side of the isolation structure 140 away from the array substrate 110.

[0101] Please refer again to some possible implementation methods. Figure 9 The display panel also includes a second encapsulation layer 180 and a third encapsulation layer 190, which are located on the side of the first encapsulation layer 170 away from the array substrate 110 and are stacked in a direction away from the array substrate 110.

[0102] Optionally, the materials of the first encapsulation layer 170 and the third encapsulation layer 190 include inorganic materials, and the material of the second encapsulation layer 180 includes organic materials. For example, the first encapsulation layer 170 and the third encapsulation layer 190 can be formed by chemical vapor deposition (CVD), and the second encapsulation layer 180 can be formed by inkjet printing (IJP).

[0103] In some possible implementations, the portion of the first encapsulation layer 170 located on the side of the isolation structure 140 away from the array substrate 110 has a gap with the isolation structure 140, and the second encapsulation layer 180 fills this gap. This gap is formed after etching the light-emitting material layer 150 and the second electrode layer 160 deposited during the vapor deposition process on the side of the isolation structure 140 away from the array substrate 110. Filling this gap with the second encapsulation layer 180 ensures the overall encapsulation stability of the display panel.

[0104] Please see Figure 10 This application also provides a method for manufacturing a display panel, which may include the following steps.

[0105] Step S110: Provide an array substrate 110.

[0106] In step S120, a first electrode 120 is formed on one side of the array substrate 110.

[0107] In step S130, an isolation structure 140 is formed on the side of the array substrate 110 where the first electrode 120 is disposed.

[0108] The isolation structure 140 may include an isolation opening that exposes at least a portion of the first electrode 120. The isolation structure 140 includes a support portion 141 and a shielding portion 142 located on the side of the support portion 141 away from the array substrate 110. The support portion 141 includes a first surface 1401 near the array substrate 110 and a second surface 1402 away from the array substrate 110. The orthographic projection of the second surface 1402 onto the array substrate 110 lies within the orthographic projection of the first surface 1401 onto the array substrate 110. The support portion 141 also includes at least one side surface 1403 connecting the first surface 1401 and the second surface 1402. The orthographic projection of at least one side surface 1403 of the support portion 141 onto the array substrate 110 does not coincide with the orthographic projection of the end of the first electrode 120 away from the isolation opening onto the array substrate 110.

[0109] In some possible implementations, in step S130, an isolation layer may first be formed on the side of the array substrate 110 where the first electrode 120 is disposed. Then, the isolation layer is etched to form an isolation structure 140 with an isolation opening, so that the orthographic projection of at least one side surface 1403 of the support portion 141 on the array substrate 110 is located within the orthographic projection of the first electrode 120 on the array substrate 110, or the orthographic projection of the support portion 141 on the array substrate 110 does not coincide with the orthographic projection of the first electrode 120 on the array substrate 110.

[0110] In some possible implementations, in step S130, a pixel defining layer 130 and an isolation layer may be formed on the side of the first electrode 120 away from the array substrate 110.

[0111] Next, the isolation layer is etched to form an isolation structure 140 with isolation openings. For example, by applying photoresist, photolithography is performed to pattern the photoresist, and then the isolation layer is etched under the protection of the photoresist to form the isolation structure 140 with isolation openings.

[0112] After the isolation structure 140 is formed, the pixel defining layer 130 is etched to form a pixel opening that communicates with the isolation opening. For example, the patterned isolation structure 140 can be used as a mask to etch the pixel defining layer 130 to form the pixel opening.

[0113] In some possible implementations, when the orthographic projection of at least one side surface 1403 of the support portion 141 onto the array substrate 110 is located within the orthographic projection of the first electrode 120 onto the array substrate 110, the first angle between the side surface 1403 and the first surface 1401 is θ1, the first height of the support portion 141 in the direction perpendicular to the first surface 1401 is H1, the minimum distance between the orthographic projection of the end of the side surface 1403 near the array substrate 110 onto the array substrate 110 and the orthographic projection of the end of the fourth surface 1202 away from the isolation opening onto the array substrate 110 is D1, and the preset design manufacturing error is m.

[0114] In step S130, the isolation layer can be etched to form the isolation structure 140, provided that the value of m is greater than or equal to 0.1 micrometers and D1 = H1 / tanθ1 + m. For example, the value of m can be 0.21, 0.43, 0.56, 0.78, 0.82, 0.86, or 1.0, etc.

[0115] Specifically, considering the critical dimensional fluctuation of the fabrication process of the isolation structure 140 is ±0.4 micrometers, and the overlap accuracy is ±0.6 micrometers, in this embodiment, The isolation layer can be etched to form an isolation structure 140, provided that the value of m is greater than or equal to 0.82 micrometers.

[0116] In another possible implementation, please see Figure 11 When the orthographic projection of the isolation structure 140 on the array substrate 110 does not coincide with the orthographic projection of the first electrode 120 on the array substrate 110, the minimum distance between the orthographic projection of the end of the isolation structure 140 near the isolation opening on the array substrate 110 and the orthographic projection of the end of the first electrode 120 away from the array substrate on the array substrate is: The preset design and manufacturing error is .

[0117] In step S130, the isolation layer can be etched to form the isolation structure 140 if the value of m is greater than or equal to 0.1 micrometers and D2 = m. For example, the value of m can be 0.21, 0.43, 0.56, 0.78, 0.82, 0.86 or 1.0, etc.

[0118] Specifically, considering the critical dimensional fluctuation of the fabrication process of the isolation structure 140 is ±0.4 micrometers, and the overlap accuracy is ±0.6 micrometers, in this embodiment, The isolation layer can be etched to form an isolation structure 140, provided that the value of m is greater than or equal to 0.82 micrometers.

[0119] This application also provides an electronic device, which includes the display panel provided in this application. The electronic device may include mobile phones, tablets, smart wearable devices, televisions, laptops, monitors, and other devices with display functions.

[0120] In summary, this application provides a display panel, a method for manufacturing the display panel, and an electronic device. By setting the side surface of the support portion of the isolation structure to be within the orthogonal projection of the first electrode on the array substrate, or by setting the orthogonal projection of the isolation structure on the array substrate to not coincide with the orthogonal projection of the first electrode on the array substrate, the morphology of the portion of the isolation structure used to block the vapor deposition material and the isolation structure at the junction of the cathode and the isolation structure can be made flatter and more regular. In this way, the controllability of the blocking angle formed by the isolation structure during vapor deposition can be improved, thereby improving the bonding effectiveness between the vapor-deposited cathode and the isolation structure.

[0121] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0122] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.

Claims

1. A display panel, characterized in that, The display panel includes: Array substrate; The first electrode is located on one side of the array substrate; An isolation structure is located on the side of the array substrate where the first electrode is disposed, the isolation structure encloses to form an isolation opening, the isolation opening exposing at least a portion of the first electrode; the isolation structure includes a support portion and a shielding portion located on the side of the support portion away from the array substrate; The support portion includes a first surface near the array substrate and a second surface away from the array substrate. The support portion also includes at least one side surface connecting the first surface and the second surface. The orthographic projection of at least one side surface of the support portion onto the array substrate does not coincide with the orthographic projection of the end of the first electrode away from the isolation opening onto the array substrate.

2. The display panel according to claim 1, characterized in that, At least one of the side surfaces of the support portion is projected onto the array substrate in a direction within the projection of the first electrode onto the array substrate.

3. The display panel according to claim 2, characterized in that, The first electrode includes a third surface near the array substrate and a fourth surface away from the array substrate; The orthographic projection of the fourth surface on the array substrate lies within the orthographic projection of the third surface on the array substrate; the orthographic projection of at least one side surface of the support portion on the array substrate lies within the orthographic projection of the fourth surface of the first electrode on the array substrate.

4. The display panel according to claim 3, characterized in that, The first angle between the side surface and the first surface is θ1, the first height of the support portion in the direction perpendicular to the first surface is H1, and the minimum distance between the orthographic projection of the end of the side surface near the array substrate on the array substrate and the orthographic projection of the end of the fourth surface away from the pixel opening on the array substrate is D1, where D1≥H1 / tanθ1.

5. The display panel according to claim 1, characterized in that, The orthographic projection of the isolation structure on the array substrate does not coincide with the orthographic projection of the first electrode on the array substrate; Preferably, the orthographic projection of the isolation structure on the array substrate is located between the orthographic projections of the adjacent first electrodes on the array substrate.

6. The display panel according to any one of claims 1-5, characterized in that, The orthographic projection of the support portion on the array substrate is located within the orthographic projection of the shielding portion on the array substrate.

7. The display panel according to any one of claims 1-5, characterized in that, The supporting portion includes a first metal layer, and the shielding portion includes a second metal layer; Preferably, the material of the first metal layer includes aluminum, and / or the material of the second metal layer includes titanium; Preferably, the support portion further includes a third metal layer located on the side of the first metal layer closer to the array substrate; Preferably, the material of the third metal layer includes molybdenum.

8. The display panel according to any one of claims 1-5, characterized in that, The display panel further includes a pixel defining layer located on one side of the array substrate. The isolation structure is located on the side of the pixel defining layer away from the array substrate. The pixel defining layer includes a pixel opening, and the orthographic projection of the pixel opening on the array substrate is located within the orthographic projection of the isolation opening on the array substrate.

9. The display panel according to claim 8, characterized in that, The display panel further includes a light-emitting material layer and a second electrode, which are at least partially located within the pixel opening and stacked in a direction away from the array substrate.

10. The display panel according to claim 9, characterized in that, The isolation structure is conductive, and the second electrode extends from the pixel opening to the side of the pixel defining layer away from the array substrate and makes electrical contact with the isolation structure.

11. The display panel according to claim 9, characterized in that, The display panel also includes a first encapsulation layer located on the side of the second electrode away from the array substrate.

12. The display panel according to claim 11, characterized in that, The first encapsulation layer extends from inside the pixel opening along the side surface to the side of the isolation structure away from the array substrate; Preferably, the first encapsulation layers corresponding to adjacent pixel openings are spaced apart, and the gaps between the gaps are located on the side of the isolation structure away from the array substrate.

13. The display panel according to claim 11, characterized in that, The display panel further includes a second encapsulation layer and a third encapsulation layer stacked on the side of the first encapsulation layer away from the array substrate and in a direction away from the array substrate; Preferably, the materials of the first encapsulation layer and the third encapsulation layer include inorganic materials, and the material of the second encapsulation layer includes organic materials.

14. The display panel according to claim 13, characterized in that, The portion of the first encapsulation layer located on the side of the isolation structure away from the array substrate has a gap with the isolation structure, and the second encapsulation layer fills the gap.

15. The display panel according to claim 13, characterized in that, The orthographic projection of each side surface of the isolation structure onto the array substrate is located within the orthographic projection of each of the first electrodes onto the array substrate.

16. A method for manufacturing a display panel, characterized in that, The method includes: Provide an array substrate; A first electrode is formed on one side of the array substrate; An isolation structure is formed on one side of the array substrate where the first electrode is disposed. The isolation structure encloses an isolation opening, which exposes at least a portion of the first electrode. The isolation structure includes a support portion and a shielding portion located on the side of the support portion away from the array substrate. The support portion includes a first surface close to the array substrate and a second surface away from the array substrate. The support portion also includes at least one side surface connecting the first surface and the second surface. The orthographic projection of at least one side surface of the support portion on the array substrate does not coincide with the orthographic projection of the first electrode on the array substrate.

17. The method according to claim 16, characterized in that, The step of forming an isolation structure on the side of the array substrate where the first electrode is disposed includes: An isolation layer is formed on the side of the array substrate where the first electrode is disposed; The isolation layer is etched to form the isolation structure with an isolation opening, such that the orthographic projection of at least one side surface of the support portion on the array substrate is located within the orthographic projection of the first electrode on the array substrate, or the orthographic projection of the isolation structure on the array substrate does not coincide with the orthographic projection of the first electrode on the array substrate.

18. The method according to claim 16, characterized in that, The step of forming an isolation structure on the side of the array substrate where the first electrode is disposed includes: A pixel defining layer and an isolation layer are formed on the side of the first electrode away from the array substrate; The isolation layer is etched to form the isolation structure with isolation openings; The pixel defining layer is etched to form a pixel opening that communicates with the isolation opening.

19. The method according to claim 17 or 18, characterized in that, When the orthographic projection of at least one of the side surfaces of the support portion onto the array substrate is located within the orthographic projection of the first electrode onto the array substrate; the first electrode includes a third surface near the array substrate and a fourth surface located on the array substrate, wherein the orthographic projection of the fourth surface onto the array substrate is located within the orthographic projection of the third surface onto the array substrate; The first angle between the side surface and the first surface is θ1, the first height of the support in the direction perpendicular to the first surface is H1, the minimum distance between the orthographic projection of the end of the side surface near the array substrate on the array substrate and the orthographic projection of the end of the fourth surface away from the isolation opening on the array substrate is D1, and the preset design and manufacturing error is m. The step of etching the isolation layer to form the isolation structure includes: Under the condition that the value of m is greater than or equal to 0.1 micrometers and D1 = H1 / tanθ1 + m, the isolation layer is etched to form an isolation structure.

20. An electronic device, characterized in that, The electronic device includes a display panel as described in any one of claims 1-15 or a display panel prepared using the manufacturing method of a display panel as described in any one of claims 16-19.

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