Verification methods, apparatus, storage media and equipment for backpressure flow control
By constructing a backpressure model and independently conducting backpressure flow control verification, the other functions of the chip are decoupled, which solves the problem of lagging verification process in the existing technology, improves verification efficiency and shortens the project cycle.
Patent Information
- Application Number
- CN202511399208.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-28
- Publication Date
- 2026-01-30
- Estimated Expiration
- 2045-09-28
AI Technical Summary
In existing technologies, the verification process for reverse pressure flow control is lagging and inefficient, making chip design verification difficult.
By constructing a backpressure model, including backpressure components, excitation components, and monitoring components, verification work is carried out independently. Backpressure flow control verification is performed using a simulation environment, decoupling other chip functions and conducting verification in advance.
This enables backpressure flow control verification to be delivered without relying on RTL code, improving verification efficiency and shortening the project cycle.
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Figure CN120893386B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of chip technology, and in particular to a verification method, apparatus, storage medium and device for reverse pressure flow control. Background Technology
[0002] In the front-end design and verification process of network chips, it is necessary to conduct backpressure flow control related tests to test the chip under high service flow pressure and sudden impact in the early stage of chip design, and to test the stability and reliability of the chip under pressure scenarios.
[0003] In existing technologies, verification personnel typically need to set up an overall verification environment and then wait for the Register Transfer Level (RTL) code of each module in the chip under test to be delivered. They then verify the flow control mechanism of the entire chip by constructing various stimuli and provide feedback on the test results. The architects and designers then iterate on the flow control scheme step by step.
[0004] However, with existing technology, the verification process is relatively delayed after the RTL code is delivered. Due to the high degree of coupling of chip functions, it leads to greater debugging difficulties for verification personnel and low verification efficiency. Summary of the Invention
[0005] This application provides a method, apparatus, storage medium, and device for verifying backpressure flow control, which addresses the problems of slow verification process and low verification efficiency in current backpressure flow control.
[0006] The first aspect of this application provides a method for verifying backpressure flow control, including:
[0007] A backpressure model is obtained, which includes a backpressure component, an excitation component, and a monitoring component. The backpressure component is communicatively connected to the excitation component and the monitoring component through corresponding interfaces. The backpressure component includes modules corresponding to various backpressure types.
[0008] After the simulation verification of back pressure flow control is initiated, in response to the excitation signal sent by the excitation component to the back pressure component, the back pressure component is triggered to execute the corresponding back pressure function;
[0009] The monitoring component acquires the status information of the back pressure component, and the simulation ends after the monitoring component acquires the excitation signal.
[0010] Optionally, the backpressure model further includes: a dynamic interaction component, which communicates with the backpressure component through a corresponding interface; the method further includes:
[0011] The dynamic interaction component sends preset dynamic information to the backpressure component at a preset time. The preset dynamic information includes: reconfiguring backpressure parameters and / or inserting abnormal information.
[0012] Optionally, each of the modules corresponding to the aforementioned back pressure types includes: data plane back pressure and control plane back pressure;
[0013] The data plane backpressure is used to describe the following preset data plane information: initialization time, first-in-first-out (FIFO) packet loss, function delay, abnormal interruption, and threshold failure.
[0014] The control plane backpressure is used to describe the following control plane preset information: priority-based flow control (PFC), PFC deadlock, weighted random early detection (WRED) packet loss, explicit congestion notification (ECN) marking, and pause frame backpressure.
[0015] Optionally, the step of triggering the reverse pressure component to perform a corresponding reverse pressure function in response to the excitation signal sent by the excitation component to the reverse pressure component includes:
[0016] In response to the excitation signal sent by the excitation component to the back pressure component, the module in the back pressure component is triggered to execute the corresponding back pressure function according to the preset information of the data plane and the preset information of the control plane.
[0017] Optionally, the excitation signal includes: data excitation and backpressure excitation;
[0018] The step of triggering the reverse pressure component to execute a corresponding reverse pressure function in response to the excitation signal sent by the excitation component to the reverse pressure component includes:
[0019] If the excitation signal is a data excitation, in response to the excitation signal sent by the excitation component to the backpressure component, the data excitation will reach each of the modules and trigger WRED packet loss and ECN flags in the data plane backpressure and control plane backpressure of each module;
[0020] If the excitation signal is a backpressure excitation, in response to the excitation component sending the excitation signal to the backpressure component, the backpressure excitation will reach the corresponding target module and trigger PFC flow control, PFC deadlock and pause frame backpressure in the control plane backpressure of the target module.
[0021] Optionally, obtaining the status information of the back pressure component through the monitoring component includes:
[0022] The monitoring component calculates the average data transmission rate in the backpressure component and obtains one or more of the following status information in each module: data usage, packet loss data, and abnormal status data.
[0023] The monitoring component shares the status information with each module so that each module can calculate WRED packet loss and ECN tags.
[0024] Optionally, the modified backpressure parameters include at least one of the following: dynamically adjusting the number of handshake credit cells, dynamically adjusting the data processing delay of each module, dynamically adjusting the FIFO depth, dynamically adjusting the backpressure threshold, and dynamically adjusting the interrupt response time;
[0025] The insertion anomaly information includes: during the simulation process, if any two modules are back-pressed for a period of time, an abnormal error occurs inside the simulation chip.
[0026] A second aspect of this application provides a verification device for backpressure flow control, the device comprising:
[0027] An acquisition module is used to acquire a backpressure model, which includes a backpressure component, an excitation component, and a monitoring component. The backpressure component is communicatively connected to the excitation component and the monitoring component through corresponding interfaces. The backpressure component includes modules corresponding to various backpressure types.
[0028] The simulation module is used to initiate the simulation verification of the back pressure flow control, and in response to the excitation signal sent by the excitation component to the back pressure component, trigger the back pressure component to execute the corresponding back pressure function;
[0029] The monitoring module is used to obtain the status information of the back pressure component through the monitoring component, and to end the simulation after the monitoring component obtains the excitation signal.
[0030] A third aspect of this application provides a computer-readable storage medium storing a computer program, which, when executed by a processor, performs the method provided in the first aspect.
[0031] A fourth aspect of this application provides a computer device, the computer device including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program and performs the method provided in the first aspect.
[0032] The technical solutions provided in the embodiments of this specification may include the following beneficial effects:
[0033] In this embodiment, by acquiring the constructed backpressure model, the backpressure function is decoupled from other functions of the chip. In the simulation environment, by sending an excitation signal to the backpressure component through the excitation component, the backpressure component can be triggered to execute the corresponding backpressure function. Then, by monitoring the backpressure component through the monitoring component, the status information of the backpressure component can be obtained to complete the verification of the reaction flow control. This realizes that the verification of the backpressure process no longer depends on the delivery of RTL code, and the verification work can be started and completed earlier, improving the project verification efficiency and shortening the project cycle.
[0034] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this specification. Attached Figure Description
[0035] Figure 1 A schematic flowchart illustrating a verification method for backpressure flow control provided in an embodiment of this application;
[0036] Figure 2 This is a schematic diagram of the structure of a back pressure model provided in an embodiment of this application;
[0037] Figure 3 A flowchart illustrating a verification method for backpressure flow control provided in another embodiment of this application;
[0038] Figure 4 A schematic diagram of the structure of a verification device for backpressure flow control provided in an embodiment of this application;
[0039] Figure 5 This is a schematic diagram of the structure of a computer device provided in an embodiment of this application. Detailed Implementation
[0040] The exemplary embodiments will now be described in detail. When the description refers to the accompanying drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this specification; they are merely exemplary embodiments of apparatuses and methods consistent with some aspects of this specification.
[0041] The terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to be limiting of this specification. The singular forms “a,” “described,” and “the” as used herein are also intended to include the plural forms unless the context clearly indicates otherwise.
[0042] It should be understood that the terms "first," "second," "third," etc., may be used in this specification to describe various information or structural modules for the purpose of more clearly describing the solution. These terms should not be construed as indicating or implying relative importance or implicitly specifying the number, order, or position of the indicated technical features. Therefore, a feature defined with "first," "second," "third," etc., may explicitly or implicitly include one or more of that feature. In the description of this specification, unless otherwise stated, "a plurality of" means two or more; "if" can be interpreted as "when," "when," or "in response to determination."
[0043] In this embodiment of the application, in the prior art, chip verification personnel need to wait for the RTL code of each module in the chip under test to be delivered, and then verify the flow control mechanism of the whole chip by constructing various stimuli and feeding back the test results. The architect and designer gradually iterate on the flow control scheme, which leads to problems such as delayed verification process and low verification efficiency of back pressure flow control.
[0044] To address the aforementioned technical issues, this application proposes a verification method for reverse pressure flow control. This method models the reverse pressure flow control function of the chip, eliminating reliance on RTL code. This allows verification personnel to conduct verification work independently, thereby improving verification efficiency and shortening the project cycle.
[0045] Figure 1 This is a flowchart illustrating a verification method for backpressure flow control provided in an embodiment of this application. This method can be executed by electronic devices, computer devices, etc., with relevant simulation software installed, and no specific limitations are imposed here. Figure 2 This is a schematic diagram of the structure of a counter-pressure model provided in an embodiment of this application.
[0046] refer to Figure 1 , Figure 2 The verification method for backpressure flow control provided in this embodiment includes:
[0047] S101, Obtain the back pressure model.
[0048] A key step in this application's embodiment is to model the backpressure flow control function, construct a backpressure model, and simulate backpressure through the backpressure model. This eliminates the need to rely on RTL code and allows for adjustment suggestions to be provided through simulation early in the project, enabling design adjustments.
[0049] like Figure 2 As shown, the aforementioned backpressure model includes a backpressure component, an excitation component, and a monitoring component. The backpressure component communicates with the excitation component and the monitoring component via corresponding interfaces. The backpressure component includes modules corresponding to various backpressure types. Specifically, backpressure types can be classified in various ways; this embodiment does not impose specific limitations and can be determined according to the needs of modeling.
[0050] Optionally, this embodiment uses System C / System Verilog language for modeling. Modeling can be performed using object-oriented programming and Universal Verification Methodology (UVM), which is of moderate difficulty, but is not a limitation.
[0051] S102. After starting the simulation verification of the back pressure flow control, in response to the excitation signal sent by the excitation component to the back pressure component, the back pressure component is triggered to execute the corresponding back pressure function.
[0052] After running the simulation verification of the back pressure flow control through the simulation software, the excitation component sends an excitation signal to the back pressure component through the corresponding interface. When the back pressure component receives the excitation signal, it executes the back pressure function accordingly.
[0053] S103. The state information of the back pressure component is obtained through the monitoring component, and the simulation ends after the monitoring component obtains the excitation signal.
[0054] After the backpressure component executes its backpressure function, the monitoring component will monitor relevant status information throughout the simulation process, such as data-related information, rate-related information, and anomaly-related information, without specific limitations. This status information helps verification personnel complete the verification of backpressure flow control.
[0055] The excitation signal flows through the modules of the back pressure component. Depending on the type of excitation signal, it may flow to a fixed module or flow sequentially. Finally, it flows to the monitoring component through the interface between the back pressure component and the monitoring component, and the simulation ends.
[0056] In this embodiment, by acquiring the constructed backpressure model, the backpressure function is decoupled from other functions of the chip. In the simulation environment, by sending an excitation signal to the backpressure component through the excitation component, the backpressure component can be triggered to execute the corresponding backpressure function. Then, by monitoring the backpressure component through the monitoring component, the status information of the backpressure component can be obtained to complete the verification of the reaction flow control. This realizes that the verification of the backpressure process no longer depends on the delivery of RTL code, and the verification work can be started and completed earlier, improving the project verification efficiency and shortening the project cycle.
[0057] Based on the above embodiments, such as Figure 2 As shown, the modules corresponding to each back pressure type include: data plane back pressure and control plane back pressure.
[0058] Referring to Table 1, data plane backpressure describes the following preset data plane information: initialization time, First-In-First-Out (FIFO) packet loss, functional delay, abnormal interruption, and threshold failure. Control plane backpressure describes the following preset control plane information: Priority-based Flow Control (PFC) flow control, PFC deadlock, Weighted Random Early Detection (WRED) packet loss, Explicit Congestion Notification (ECN) flag, and Pause Frame backpressure. In this application, FIFO can specifically refer to a FIFO queue.
[0059]
[0060] It should be noted that the modules corresponding to each back pressure type may have one or more functions preset in the table above, which are not specifically limited here.
[0061] Optionally, the above-mentioned response to the excitation signal sent by the excitation component to the back pressure component, triggering the back pressure component to perform the corresponding back pressure function, includes: in response to the excitation signal sent by the excitation component to the back pressure component, triggering the module in the back pressure component to perform the corresponding back pressure function according to the data plane preset information and the control plane preset information.
[0062] Regarding back pressure on the data plane:
[0063] The aforementioned initialization time may refer to the back pressure caused by the module initialization startup time.
[0064] First-in-first-out (FIFO) packet loss can include: the number of credit cells in the module containing the non-droppable FIFO must match the number of cells in the handshake mechanism between the preceding and following stages; packet loss at the FIFO inlet of the droppable FIFO; and packet loss at the FIFO outlet of the droppable FIFO.
[0065] An abnormal interruption can refer to the back pressure caused by an abnormal interruption of a module.
[0066] Threshold failure can refer to the back pressure caused by threshold failure.
[0067] Specifically, during the simulation of back pressure:
[0068] (1) If a module has a preset initialization time, then the module needs to wait for the initialization time to end before it can perform the reverse pressure function according to the excitation signal; otherwise, it will continue to reverse pressure the front stage.
[0069] (2) If a module is preset to lose packets at the FIFO inlet, then if the FIFO continues to receive a lost packet from the previous stage when the FIFO is full (non-lost packets will not be affected by this back pressure; the scenarios described in this application are all based on lost packets), the packet will be discarded at the inlet. This process will not back pressure the previous stage, and the data flow will not be interrupted.
[0070] (3) If a module is preset to lose packets at the FIFO outlet, then during the operation of the FIFO, if it continues to receive the lost packets from the previous stage when the FIFO is full, it will receive the new packets from the previous stage and discard the earliest packets that entered the FIFO at the outlet. This process will not back pressure the previous stage, and the data flow will not be interrupted.
[0071] (4) If a module has a pre-set non-droppable FIFO, if the FIFO continues to receive droppable messages from the previous stage while it is already full, this process will backpressure the previous stage, and the data flow will be cut off here.
[0072] (5) If a module has a preset function delay, the data flow will wait for the preset delay time before continuing to process.
[0073] (6) If a module has a preset abnormal interruption, the data flow will be interrupted for a period of time due to the interruption. This time is the preset interruption response time of each module.
[0074] (7) If a module has a preset threshold failure, the module will monitor the total amount of data remaining inside in real time. When the total amount of data reaches the preset waterline threshold, it will backpressure the previous stage; when the total amount of data drops below the threshold, it will cancel the backpressure.
[0075] Regarding back pressure on the control surface:
[0076] The aforementioned PFC flow control specifically refers to the short-term back pressure exerted by PFC priority-based flow control frames on a specific priority queue, which can be relieved by continuing to send de-flow control frames.
[0077] PFC deadlock specifically refers to the long-term back pressure of PFC flow control frames on a specific priority queue, which can lead to a deadlock, and then self-recovery after a timeout.
[0078] WRED packet loss specifically refers to the active packet loss of the incoming WRED algorithm.
[0079] The ECN marking specifically indicates that the congestion status is marked by explicitly notifying the ECN of the congestion status.
[0080] Pause frame backpressure can refer to the function of pausing data transmission by controlling the frame via MAC.
[0081] Specifically, during the simulation of back pressure:
[0082] (1) If a module has PFC flow control preset, after receiving the PFC backpressure stimulus, the module will backpressure a certain priority packet for a preset time according to the flow control information in the backpressure stimulus. The corresponding packet in the backpressure component will be stuck in the last module and will not flow out to the monitoring component. During this backpressure time, if a new backpressure stimulus arrives, the backpressure time will be added together, or the backpressure can be actively released.
[0083] (2) If a module has a pre-set PFC deadlock, then after receiving a PFC backpressure stimulus, the module will either directly discard a message of a certain priority or apply backpressure for a pre-set time during the pre-set deadlock recovery period. The specific operation depends on the pre-set deadlock recovery type and is not limited here. If a new PFC backpressure stimulus arrives during this backpressure period, it will be ignored.
[0084] (3) If a module is preset to lose packets, the module will lose packets according to the total amount of data occupied in all modules reported by the monitoring component and the real-time value of the data occupied in each module, according to the preset drop threshold and drop probability, and feed back the number of dropped packets to the monitoring component.
[0085] (4) If a module has a preset ECN flag, the module will mark the TOS field of the message with a congestion flag according to the preset ECN threshold and ECN probability, based on the total data occupancy of all modules reported from the monitoring component and the real-time data occupancy of each module.
[0086] (5) If a module presets a pause frame backpressure, after receiving the pause frame backpressure stimulus, the module will stimulate the data with a specific channel number to backpressure for a preset time according to the flow control information in the backpressure stimulus. During this backpressure time, if a new backpressure stimulus arrives, the backpressure time will be superimposed, or the backpressure can be actively released.
[0087] In other words, based on the above embodiments, each module executes a specific back pressure function according to the specific content preset for the data plane back pressure and control plane back pressure.
[0088] Optionally, the above-mentioned excitation signals include: data excitation and back pressure excitation.
[0089] The above-mentioned response to the excitation signal sent by the excitation component to the reverse pressure component, triggering the reverse pressure component to execute the corresponding reverse pressure function, may include:
[0090] (1) If the above excitation signal is a data excitation, in response to the excitation signal sent by the excitation component to the back pressure component, the data excitation will reach each of the modules and trigger WRED packet loss and ECN flag in the data plane back pressure and control plane back pressure in each of the modules.
[0091] It should be noted that data incentives are used in all verification scenarios of the backpressure model in this embodiment. The data incentives simulate data packets transmitted through a real chip, and only parameters related to backpressure flow control, such as packet transmission rate, packet length, priority, channel, drop attribute, number of cross-modules, and TOS field, are modeled and extracted. Other contents of the payload are not considered. By injecting data incentives, the corresponding behaviors of the backpressure component, dynamic interaction component, and monitoring component can be triggered.
[0092] If it is a data stimulus, it will flow through the above modules and trigger WRED packet loss and ECN flags in the data plane backpressure and control plane backpressure within each module.
[0093] (2) If the excitation signal is a back pressure excitation, in response to the excitation signal sent by the excitation component to the back pressure component, the back pressure excitation will reach the corresponding target module and trigger the PFC flow control, PFC deadlock and pause frame back pressure in the control plane back pressure of the target module.
[0094] Specifically, the verification scenarios for pause frame backpressure, PFC flow control, and PFC deadlock in the backpressure model of this embodiment require the use of backpressure stimulus. The backpressure stimulus simulates flow control messages through a real chip, and the modeling standard is consistent with the flow control message standard in the network chip field. By injecting backpressure stimulus, the three types of backpressure functions in the backpressure component—pause frame backpressure, PFC flow control, and PFC deadlock—can be triggered.
[0095] If it is a backpressure excitation, it will only flow into a certain module, that is, into the target module, and trigger PFC flow control, PFC deadlock or pause frame backpressure in the control plane backpressure within that module.
[0096] Furthermore, refer to Table 2 for a detailed description of data incentives and counter-pressure incentives:
[0097]
[0098] The excitation component is the input source of the backpressure model, and it can send data excitation and backpressure excitation at a certain rate. Referring to Table 2, both data excitation and backpressure excitation have preset transmission times and data values, that is, they will be sent with the corresponding data values at the preset transmission times. For example, the packet transmission rate in the data excitation can be a specific packet transmission rate of 200G at the preset transmission time, without any specific restrictions here.
[0099] Further, refer to Figure 2The aforementioned backpressure model may further include: a dynamic interaction component, which communicates with the backpressure component through a corresponding interface.
[0100] During the process of triggering the backpressure component to execute the corresponding backpressure function, preset dynamic information can be sent to the backpressure component at preset times through the dynamic interaction component. This preset dynamic information includes: reconfiguring backpressure parameters and / or inserting exception information.
[0101] Please refer to Table 3 for a detailed introduction to the modified back pressure parameters and inserted anomaly information:
[0102]
[0103] As shown in Table 3, the modified backpressure parameters include at least one of the following: dynamically adjusting the number of handshake credit cells, dynamically adjusting the data processing latency of each module, dynamically adjusting the FIFO depth, dynamically adjusting the backpressure threshold, and dynamically adjusting the interrupt response time. It can be seen that these modified backpressure parameters all need to be pre-configured, with preset interaction times, positions, and values. These pre-configured parameters are then sent to the backpressure component to influence the execution and results of the backpressure function.
[0104] Accordingly, the aforementioned insertion of abnormal information includes: during the simulation process, back-pressure on any two stages of modules for a period of time, causing an abnormal error to occur inside the simulation chip. Specifically, this is also pre-configured, with preset interaction times, interaction locations, and interaction values.
[0105] It should be noted that, in the embodiments of this application, after the dynamic interaction component intervenes, the reaction type in the counter-pressure component will produce the following effect:
[0106] (1) Dynamically adjust the number of handshake credit cells: After adjustment, it will affect the handshake mechanism between the module and the preceding and following components, and the depth of the non-drop-out FIFO in the preceding and following modules needs to be adjusted synchronously.
[0107] (2) Dynamically adjust the data processing delay of each module: After adjustment, it will affect the delay time when the data stream will wait in the module.
[0108] (3) Dynamically adjust the back pressure threshold (PFC / WRED / ECN): After adjustment, it will directly affect the PFC flow control frame triggering and recovery threshold, WRED packet loss threshold and ECN threshold for specific priorities in this module, thereby affecting PFC flow control, PFC deadlock, WRED packet loss and ECN marking.
[0109] (4) Dynamically adjust the interrupt response time: After adjustment, it will directly affect the cut-off time after an abnormal interrupt is triggered in the module.
[0110] (5) Inserting abnormal information: After insertion, it will directly affect the back pressure effect of abnormal interruption in the module. The data flow will be interrupted for a period of time due to the interruption. This time is the interruption response time.
[0111] Figure 3 A flowchart of a verification method for backpressure flow control provided in another embodiment of this application is shown below. Figure 3 As shown, the above-mentioned acquisition of the status information of the backpressure component through monitoring components includes:
[0112] S301. Calculate the average data transmission rate in the backpressure component through the above monitoring component, and obtain one or more of the following status information in each module: data occupancy, packet loss data, and abnormal status data.
[0113] The monitoring component is responsible for collecting statistics on the state information of the back pressure model during the simulation process, which facilitates subsequent verification personnel to analyze whether the simulation scenario and the back pressure function are correct.
[0114] Referring to Table 4, in this embodiment of the application, the status information monitored by the monitoring component is as follows:
[0115]
[0116] The functions of this status information are as follows:
[0117] (1) The peak value of data occupancy in each module can be used to assess where the current data stays in the local area of the back pressure model and whether the performance threshold has been reached.
[0118] (2) The real-time data occupancy value within each module can be used to assess whether the real-time occupancy value of the current data flow in the local area of the back pressure model is within a reasonable range, and can be used to assess whether the resource utilization of each module is sufficient.
[0119] (3) The number of packet loss in each module can be used to locate whether there is an appropriate number and proportion of packet loss points when the back pressure model is in a back pressure state.
[0120] (4) The total amount of data occupied in all modules can be used to assess whether the overall resource consumption of the back pressure model is within a reasonable range.
[0121] (5) Average data transmission rate can be used to determine whether the current chip speed performance meets the preset standard in the excitation.
[0122] The monitoring component can count the total length of messages received over a period of time, and then calculate the average data transmission rate.
[0123] (6) The abnormal interruption status that has occurred in each module. This information is a debugging aid. When the verification result is not ideal, it can be used to determine whether it is caused by a local abnormality.
[0124] S302. The monitoring component shares the above status information with each module so that each module can calculate WRED packet loss and ECN tagging.
[0125] Figure 4 This is a schematic diagram of the structure of a backpressure flow control verification device provided in an embodiment of this application, as shown below. Figure 4 As shown, the device includes:
[0126] The acquisition module 401 is used to acquire the back pressure model, which includes a back pressure component, an excitation component, and a monitoring component. The back pressure component is communicatively connected to the excitation component and the monitoring component through corresponding interfaces. The back pressure component includes modules corresponding to various back pressure types.
[0127] The simulation module 402 is used to initiate the simulation verification of the back pressure flow control, and in response to the excitation signal sent by the excitation component to the back pressure component, trigger the back pressure component to execute the corresponding back pressure function.
[0128] The monitoring module 403 is used to obtain the status information of the back pressure component through the monitoring component, and to end the simulation after the monitoring component obtains the excitation signal.
[0129] Optionally, the backpressure model further includes a dynamic interaction component, which communicates with the backpressure component through a corresponding interface.
[0130] The device further includes an interaction module, used to send preset dynamic information to the back pressure component at a preset time through the dynamic interaction component, the preset dynamic information including: reconfigured back pressure parameters and / or inserted abnormal information.
[0131] Optionally, each of the modules corresponding to the aforementioned back pressure types includes: data plane back pressure and control plane back pressure;
[0132] The data plane backpressure is used to describe the following preset data plane information: initialization time, first-in-first-out (FIFO) packet loss, function delay, abnormal interruption, and threshold failure.
[0133] The control plane backpressure is used to describe the following control plane preset information: priority-based flow control (PFC), PFC deadlock, weighted random early detection (WRED) packet loss, explicit congestion notification (ECN) marking, and pause frame backpressure.
[0134] Optionally, the simulation module 402 is specifically used to respond to the excitation signal sent by the excitation component to the back pressure component, and trigger the module in the back pressure component to execute the corresponding back pressure function according to the data plane preset information and the control plane preset information.
[0135] Optionally, the excitation signal includes: data excitation and backpressure excitation; the simulation module 402 is specifically configured to, if the excitation signal is data excitation, respond to the excitation signal sent by the excitation component to the backpressure component, the data excitation will reach each of the modules and trigger WRED packet loss and ECN marking in the data plane backpressure and control plane backpressure in each of the modules; if the excitation signal is backpressure excitation, respond to the excitation signal sent by the excitation component to the backpressure component, the backpressure excitation will reach the corresponding target module and trigger PFC flow control, PFC deadlock and pause frame backpressure in the control plane backpressure of the target module.
[0136] Optionally, the monitoring module 403 is specifically used to calculate the average data transmission rate in the backpressure component through the monitoring component, and to obtain one or more of the following status information in each module: data occupancy, packet loss data, and abnormal status data; and to share the status information with each module through the monitoring component so that each module can calculate WRED packet loss and ECN marking.
[0137] Optionally, the modified backpressure parameters include at least one of the following: dynamically adjusting the number of handshake credit cells, dynamically adjusting the data processing delay of each module, dynamically adjusting the FIFO depth, dynamically adjusting the backpressure threshold, and dynamically adjusting the interrupt response time;
[0138] The insertion anomaly information includes: during the simulation process, if any two modules are back-pressed for a period of time, an abnormal error occurs inside the simulation chip.
[0139] The embodiments of the document processing apparatus described in this specification can be applied to computer devices, such as servers or terminal devices. The apparatus embodiments can be implemented through software, hardware, or a combination of both. Taking software implementation as an example, as a logically defined apparatus, it is formed by the processor in which it processes the file, reading the corresponding computer program instructions from non-volatile memory into memory for execution. From a hardware perspective, such as... Figure 5 The diagram shown is a hardware structure diagram of a computer device containing a document processing apparatus according to an embodiment of this specification. The computer device 500 includes: a memory 501, a processor 502, and a computer program stored in the memory 501 and executable on the processor 502. When the processor 502 executes the program, it performs the method described above.
[0140] Based on the above embodiments, this application also provides a program product, such as a computer-readable storage medium storing a computer program, which is executed by a processor to perform the above methods.
[0141] The foregoing has described exemplary embodiments of this specification. It should be understood that in some cases, the modules described in this specification may be divided in a manner different from that in the embodiments, and the described actions or steps may be performed in a different order than that in the embodiments, while still achieving the desired result. Furthermore, the processes depicted in the accompanying drawings do not necessarily require a specific or sequential order to achieve the desired result. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.
[0142] Other embodiments of this specification will readily occur to those skilled in the art upon consideration of the specification and practice of the invention claimed herein. This specification is intended to cover any variations, uses, or adaptations that follow the general principles of this specification and include common knowledge or customary techniques in the art not illustrated herein.
[0143] The above description is merely a preferred embodiment of this specification and is not intended to limit this specification. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this specification should be included within the scope of protection of this specification.
Claims
1. A method for verifying backpressure flow control, the method comprising: The method comprises the following steps: acquiring a back pressure model, the back pressure model comprising a back pressure component, an excitation component and a monitoring component, the back pressure component being communicatively connected with the excitation component and the monitoring component through corresponding interfaces, wherein the back pressure component comprises modules corresponding to multiple back pressure types; after starting simulation verification of the back pressure flow control, in response to an excitation signal sent by the excitation component to the back pressure component, triggering the back pressure component to execute corresponding back pressure functions; acquiring state information of the back pressure component through the monitoring component, and ending simulation after the monitoring component acquires the excitation signal; the back pressure model further comprises a dynamic interaction component communicatively connected with the back pressure component through a corresponding interface; the method further comprises: sending preset dynamic information to the back pressure component through the dynamic interaction component at a preset time, the preset dynamic information comprising reconfigured back pressure parameters and / or inserted abnormal information; each module corresponding to a back pressure type comprises data plane back pressure and control plane back pressure; the data plane back pressure is used to describe the following data plane preset information: initialization time, first-in-first-out (FIFO) packet loss, function delay, abnormal interruption and threshold invalidation; the control plane back pressure is used to describe the following control plane preset information: priority-based flow control (PFC) flow control, PFC deadlock, weighted random early detection (WRED) packet loss, explicit congestion notification (ECN) marking and pause frame back pressure; in response to the excitation signal sent by the excitation component to the back pressure component, triggering the modules in the back pressure component to execute corresponding back pressure functions, comprising: in response to the excitation signal sent by the excitation component to the back pressure component, triggering the modules in the back pressure component to execute corresponding back pressure functions according to the data plane preset information and the control plane preset information, wherein each module executes specific back pressure functions according to specific contents of the data plane back pressure and the control plane back pressure.
2. The method of claim 1, wherein, the excitation signal comprises data excitation and back pressure excitation; in response to the excitation signal sent by the excitation component to the back pressure component, triggering the modules in the back pressure component to execute corresponding back pressure functions, comprising: if the excitation signal is data excitation, in response to the excitation signal sent by the excitation component to the back pressure component, the data excitation will reach each module and trigger WRED packet loss and ECN marking in the data plane back pressure and the control plane back pressure in each module; if the excitation signal is back pressure excitation, in response to the excitation signal sent by the excitation component to the back pressure component, the back pressure excitation will reach a corresponding target module and trigger PFC flow control, PFC deadlock and pause frame back pressure in the control plane back pressure in the target module.
3. The method of claim 2, wherein, acquiring state information of the back pressure component through the monitoring component, comprising: calculating a data average transmission rate in the back pressure component through the monitoring component, and acquiring one or more of the following state information in each module: data occupancy, packet loss data and abnormal state data; sharing the state information to each module through the monitoring component, so as to calculate WRED packet loss and ECN marking by each module.
4. The method of claim 1, wherein, The reconfiguration backpressure parameter comprises at least one of the following: dynamically adjusting the number of handshake cells, dynamically adjusting the data processing delay of each module, dynamically adjusting the FIFO depth, dynamically adjusting the backpressure threshold, and dynamically adjusting the interrupt response time. The inserted abnormal information comprises: simulating an abnormal error occurring in the chip for a period of time by backpressuring any two modules in the simulation process.
5. A verification device for back pressure flow control, characterized by The device comprises: The acquisition module is configured to acquire a backpressure model, wherein the backpressure model comprises: a backpressure component, an excitation component and a monitoring component, and a dynamic interaction component, the backpressure component is communicatively connected with the excitation component, the monitoring component and the dynamic interaction component through corresponding interfaces, and the backpressure component comprises modules corresponding to a plurality of backpressure types; The simulation module is configured to, after starting simulation verification of the backpressure flow control, trigger the backpressure component to perform corresponding backpressure functions in response to an excitation signal sent by the excitation component to the backpressure component. The monitoring module is configured to acquire state information of the backpressure component through the monitoring component, and end the simulation after the monitoring component acquires the excitation signal. The interaction module is configured to send preset dynamic information to the backpressure component through the dynamic interaction component at a preset time, wherein the preset dynamic information comprises reconfiguration backpressure parameters and / or inserted abnormal information. Each module corresponding to the backpressure type comprises: data plane backpressure and control plane backpressure. The data plane backpressure is used to describe the following data plane preset information: initialization time, first-in-first-out FIFO packet loss, function delay, abnormal interruption, and threshold invalidation. The control plane backpressure is used to describe the following control plane preset information: priority-based flow control (PFC) flow control, PFC deadlock, weighted random early detection (WRED) packet loss, explicit congestion notification (ECN) marking, and pause frame backpressure. The simulation module is specifically configured to, in response to the excitation signal sent by the excitation component to the backpressure component, trigger the modules in the backpressure component to perform corresponding backpressure functions according to the data plane preset information and the control plane preset information, wherein each module performs a specific backpressure function according to specific content of the data plane backpressure and the control plane backpressure.
6. A computer-readable storage medium, characterized in that, The computer readable storage medium stores a computer program, and the computer program is run on the processor to execute the method of any one of claims 1 to 4.
7. A computer device, comprising: The computer device comprises a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein the processor executes the program to execute the method of any one of claims 1 to 4.
Citation Information
Patent Citations
Back pressure verification method for chip design, computer equipment and medium
CN119250002A