Distance protection method and waveform symmetry-based chip-level relay for preventing TA saturation operation refusal

By correcting the current sampling data under abnormal current transformer conditions and combining it with voltage sampling data to control the chip-level relay, the problem of low distance protection accuracy of chip-level relays when the current transformer is saturated is solved, and accurate distance protection is achieved under current transformer saturation conditions.

CN120896084APending Publication Date: 2025-11-04CHINA SOUTHERN POWER GRID NEW POWER SYSTEM (BEIJING) RESEARCH INSTITUTE CO LTD
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Patent Information

Application Number
CN202511182688.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-08-22
Publication Date
2025-11-04

AI Technical Summary

Technical Problem

Existing technologies using chip-level relays for distance protection suffer from low accuracy, especially when the current transformer (CT) is saturated, which prevents accurate distance protection and leads to maloperation or failure of the protection device.

Method used

By acquiring the startup information of the current transformer, multiple current sampling data, and voltage sampling data, the current sampling data is corrected in abnormal operating conditions to obtain the target current data. Based on the target current data and voltage sampling data, the chip-level relay is controlled to open or close, thereby achieving distance protection.

Benefits of technology

When the current transformer (CT) is saturated, the abnormal current sampling data is automatically corrected to ensure the accuracy of the distance protection, prevent the chip-level relay from failing to operate, and achieve reliable operation in case of fault.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to a distance protection method and a waveform symmetry-based chip-level relay for preventing TA saturation operation refusal. The method comprises the following steps: acquiring starting information, a plurality of current sampling data and a plurality of voltage sampling data of a current transformer; when the starting information shows that the current transformer is in the abnormal working state, correcting the multiple current sampling data to obtain multiple target current data of the current transformer; and according to the multiple pieces of target current data and the multiple pieces of voltage sampling data, controlling a chip-level relay to carry out disconnection or connection operation so as to realize distance protection. According to the embodiment of the application, the plurality of abnormal current sampling data can be automatically corrected when the TA is saturated, and the plurality of target current data in the normal state can be obtained, so that distance protection can be accurately realized according to the plurality of target current data and the plurality of voltage sampling data in the normal state, and the problem that the current sampling time is short when the TA is saturated can be effectively avoided. And the chip-level ohm relay refuses to operate.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power systems, in particular to a distance protection method and a chip-level relay for preventing TA saturation non-operation based on waveform symmetry. BACKGROUND

[0002] With the development of power systems, TA (Transformer for Ampere / Current) saturation phenomenon occurs, which refers to the phenomenon that when the primary current is too large or the TA core has residual magnetism, the magnetic flux density of the current transformer core reaches the saturation point, at which time the secondary current can no longer accurately reflect the primary current. When the TA saturation phenomenon occurs, a chip-level relay is needed to implement distance protection to avoid protection device misoperation or non-operation.

[0003] However, the current method of distance protection by chip-level relay has the problem of low accuracy of distance protection. SUMMARY

[0004] Therefore, it is necessary to provide a distance protection method and a chip-level relay for preventing TA saturation non-operation based on waveform symmetry to improve the accuracy of distance protection by chip-level relay.

[0005] In a first aspect, the present application provides a distance protection method applied to a chip-level relay, which comprises:

[0006] obtaining starting information of a current transformer, a plurality of current sampling data and a plurality of voltage sampling data;

[0007] correcting the plurality of current sampling data to obtain a plurality of target current data of the current transformer when the starting information indicates that the current transformer is in an abnormal working state;

[0008] controlling the chip-level relay to perform opening or closing operation according to the plurality of target current data and the plurality of voltage sampling data to implement distance protection.

[0009] In one embodiment, the step of correcting the plurality of current sampling data to obtain a plurality of target current data of the current transformer comprises:

[0010] determining an abnormality level of the current transformer according to the plurality of current sampling data;

[0011] correcting the plurality of current sampling data according to the abnormality level of the current transformer to obtain a plurality of target current data of the current transformer.

[0012] In one of the embodiments, the multiple current sampling data includes first time period sampling data and second time period sampling data, and the determining of the abnormal level of the current transformer according to the multiple current sampling data includes:

[0013] If the first time period sampling data and the second time period sampling data satisfy a preset current condition, the abnormal level of the current transformer is determined according to the first time period sampling data; the preset current condition includes that the current values of the first time period sampling data are all greater than a preset minimum value, and the current values of the second time period sampling data are all less than the preset minimum value.

[0014] If the first time period sampling data and the second time period sampling data do not satisfy the preset current condition, the abnormal level of the current transformer is determined as a first level.

[0015] In one of the embodiments, the determining of the abnormal level of the current transformer according to the first time period sampling data includes:

[0016] If the duration corresponding to the first time period sampling data is not greater than a preset sampling duration, and the current value of the last sampling data in the first time period sampling data is greater than a preset maximum value, the abnormal level of the current transformer is determined as a second level.

[0017] If the duration corresponding to the first time period sampling data is greater than the preset sampling duration, or the current value of the last sampling data in the first time period sampling data is not greater than the preset maximum value, the abnormal level of the current transformer is determined as the first level.

[0018] In one of the embodiments, the multiple current sampling data includes first time period sampling data and second time period sampling data, the first time period sampling data includes M first sampling data, and the second time period sampling data includes N second sampling data; if the abnormal level of the current transformer is the second level, the method for correcting the multiple current sampling data includes:

[0019] The first second sampling data in the second time period sampling data is corrected according to the Mth first sampling data and the (M+1)th first sampling data in the first time period sampling data, to obtain corrected first second sampling data.

[0020] The Mth first sampling data is taken as new (M-1)th first sampling data, the corrected first second sampling data is taken as new Mth first sampling data, the second time period sampling data is taken as new first second sampling data, and the step of correcting the first second sampling data in the second time period sampling data according to the (M-1)th first sampling data and the Mth first sampling data in the first time period sampling data is returned until the Nth second sampling data is obtained.

[0021] In one of the embodiments, if the abnormal level of the current transformer is the first level, the method for correcting the plurality of current sampling data comprises:

[0022] The plurality of current sampling data is subjected to interpolation processing, and the plurality of current sampling data subjected to interpolation processing is determined as the plurality of target current data.

[0023] In a second aspect, the application further provides a chip-level relay for preventing TA saturation and refusing to act based on waveform symmetry, comprising:

[0024] An acquisition module is configured to acquire start information of a current transformer, a plurality of current sampling data and a plurality of voltage sampling data.

[0025] A correction module is configured to correct the plurality of current sampling data to obtain a plurality of target current data of the current transformer when the start information indicates that the current transformer is in an abnormal working state.

[0026] A distance protection module is configured to control the chip-level relay to perform opening or closing operation according to the plurality of target current data and the plurality of voltage sampling data, so as to realize distance protection.

[0027] In a third aspect, the application further provides a computer device comprising a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the method in any one of the above embodiments when executing the computer program.

[0028] In a fourth aspect, the application further provides a computer readable storage medium, wherein the computer readable storage medium stores a computer program, and the computer program implements the steps of the method in any one of the above embodiments when executed by a processor.

[0029] In a fifth aspect, the application further provides a computer program product, wherein the computer program product comprises a computer program, and the computer program implements the steps of the method in any one of the above embodiments when executed by a processor.

[0030] The distance protection method and the chip-level relay for preventing TA saturation from refusing to act based on waveform symmetry obtain starting information of a current transformer, a plurality of current sampling data and a plurality of voltage sampling data; when the starting information indicates that the current transformer is in an abnormal working state, the plurality of current sampling data is corrected to obtain a plurality of target current data of the current transformer; and the chip-level relay is controlled to perform opening or closing operation according to the plurality of target current data and the plurality of voltage sampling data, so as to realize distance protection. The plurality of abnormal current sampling data can be automatically corrected to obtain the plurality of target current data in a normal state when TA is saturated, so that the distance protection can be accurately realized according to the plurality of target current data in the normal state and the plurality of voltage sampling data, that is, the chip-level ohm relay can be effectively prevented from refusing to act when TA is saturated. BRIEF DESCRIPTION OF DRAWINGS

[0031] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the related art, the drawings needed to be used in the description of the embodiments of the present application or the related art will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other related drawings can be obtained by those skilled in the art without creative labor.

[0032] Figure 1 The curve diagram of the secondary current in the related art when TA is saturated and in a normal state;

[0033] Figure 2 The application environment diagram of the distance protection method in an embodiment;

[0034] Figure 3 The flow diagram of the distance protection method in an embodiment;

[0035] Figure 4 The flow diagram of the correction step in an embodiment;

[0036] Figure 5 The flow diagram of the step of determining an abnormal level in an embodiment;

[0037] Figure 6 The flow diagram of the distance protection method in another embodiment;

[0038] Figure 7 The structural block diagram of the chip-level relay for preventing TA saturation from refusing to act based on waveform symmetry in an embodiment;

[0039] Figure 8 The internal structure diagram of the computer device in an embodiment. DETAILED DESCRIPTION

[0040] In order to make the purposes, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the drawings and embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application and not to limit the present application.

[0041] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of this application; the terms "comprising," "comprises" and "including" and any variations thereof as used herein are intended to cover a non-exclusive inclusion.

[0042] It should be noted that the terms "first", "second", etc. used in the present application can be used to describe various elements, but these elements are not limited by these terms, that is, in the description of the embodiments of the present application, the technical terms "first", "second", etc. are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number, specific order or primary and secondary relationship of the indicated technical features. In the description of the embodiments of the present application, the meaning of "multiple" is two and more than two, unless otherwise explicitly and specifically limited. The term "and / or" used in the present application means one of the options or any combination of multiple options.

[0043] Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the present application. The appearance of the phrase in various places in the specification does not necessarily all refer to the same embodiment, nor is it necessarily independent or alternative embodiments to other embodiments. The skilled person in the art explicitly and implicitly understands that the embodiments described herein can be combined with other embodiments.

[0044] With the development of power systems, TA (Transformer for Ampere / Current) saturation phenomenon appears. TA saturation phenomenon refers to that when the primary current is too large (especially containing large DC component or non-periodic component of high-order harmonic), or there is residual magnetism in the TA core, the magnetic flux density of the current transformer core reaches the saturation point, at this time the secondary current can no longer accurately reflect the primary current. For example, as shown in Figure 1 , Figure 1 is a curve diagram of the secondary current I in the normal state (i.e. when TA is not saturated), and Figure 1 the solid curve of the TA saturation curve represents the curve diagram of the secondary current I when the TA is saturated, Figure 1 the dashed curve of the TA saturation curve represents the curve diagram of the secondary current I when the TA is not saturated.

[0045] Generally, TA saturation phenomenon is more common when the power system fails, and it has a greater impact on the protection device (especially distance protection). For example, first, it causes the measurement impedance calculation error: since the core of distance protection is to calculate the measurement impedance from the fault point to the installation place of the protection device, TA saturation causes the amplitude of the secondary current to decrease and the phase to shift, wherein the amplitude decrease will cause the calculated measurement impedance to become larger, thereby causing the zone fault to refuse to act, that is, for the zone fault that should act, the calculated value of the measurement impedance may be greater than the impedance setting value of the I section or II section, causing the protection device to not act (i.e., refuse to act) or the protection range to be shortened, the action time to be prolonged; the phase shift will cause the impedance angle of the measurement impedance to shift, thereby causing the direction to be misjudged, that is, causing the impedance point originally falling within the action zone to shift to outside the action zone (refuse to act), or the zone outside the fault point to shift to within the action zone (misoperation), and affecting the directionality of the distance element and the protection zone. Second, it causes transient overreach. Third, it causes harmonic interference and oscillation lockout misoperation / refusal to act. Fourth, it affects the starting element and the phase selection element. Fifth, it affects the pilot protection cooperation. Therefore, TA saturation phenomenon can cause current measurement distortion, thereby affecting the performance of the protection device, and even causing the protection device to misoperate or refuse to act. Based on this, when TA saturation phenomenon occurs, a chip-level relay is needed to implement distance protection to avoid misoperation or refusal to act of the protection device.

[0046] However, the current method of distance protection through a chip-level relay can only implement differential protection, does not separately process distance protection, that is, cannot accurately implement distance protection, and therefore, the current method of distance protection through a chip-level relay has the problem of low accuracy of distance protection.

[0047] After the above introduction of the background technology of the distance protection method provided by the embodiments of the present application, the implementation environment related to the distance protection method provided by the embodiments of the present application will be briefly described. The distance protection method provided by the embodiments of the present application can be applied to, for example Figure 2The chip-level relay 11 can be a chip-level M ohm relay. The chip-level relay 11 can include, but is not limited to, a computing module, a communication module, and the like. The chip-level relay 11 is communicatively connected to the chip-level sampling relay 12 and the chip-level starting relay 13 through the communication module. Thus, the chip-level relay 11 can acquire a plurality of current sampling data and a plurality of voltage sampling data through the chip-level sampling relay 12, and acquire starting information and phase selection information through the chip-level starting relay 13. Thus, when the starting information indicates that the current transformer is in an abnormal working state, the chip-level relay 11 can correct the plurality of current sampling data through the computing module to obtain a plurality of target current data of the current transformer, and control the chip-level relay to be opened or closed according to the plurality of target current data and the plurality of voltage sampling data, so as to realize distance protection. In addition, the chip-level relay 11 can be communicatively connected to other chip-level relays 14 through the communication module. Thus, the chip-level relay 11 can transmit the result of controlling the chip-level relay to be opened or closed to the trip logic processing unit and other chip-level relays 14. The computing module of the chip-level relay can include, but is not limited to, a processor, a memory, an input / output interface, and the like.

[0048] Those skilled in the art can understand that Figure 2 The structure shown in the figure is only a block diagram of part of the structure related to the scheme of the present application, and does not constitute a limitation on the chip-level relay to which the scheme of the present application is applied. The specific chip-level relay can include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0049] In one embodiment, as Figure 3 shown, a distance protection method is provided. The method is applied to the chip-level relay in Figure 2 for example, and includes the following steps.

[0050] S201, acquiring starting information of a current transformer, a plurality of current sampling data, and a plurality of voltage sampling data.

[0051] The starting information is used to indicate that the current transformer is in a normal working state or an abnormal working state. The plurality of current sampling data and the plurality of voltage sampling data can include a plurality of three-phase current sampling data and a plurality of three-phase voltage sampling data, or can include a plurality of single-phase current sampling data and a plurality of single-phase voltage sampling data.

[0052] In this embodiment, the chip-level sampling relay can sample the input of the current transformer to obtain multiple current sampling data and multiple voltage sampling data. For example, the chip-level sampling relay can sample at a fixed power frequency, such as sampling the three-phase current and three-phase voltage of the line at intervals of n points per cycle (n > 40, sampling rate n * 50 per cycle), obtaining discrete sampling sequences of each three-phase current signal and three-phase voltage signal. Thus, the chip-level relay can acquire multiple current sampling data and multiple voltage sampling data through the chip-level sampling relay and communication module. Furthermore, the chip-level starting relay can acquire starting information and phase selection information in real time or periodically, thus, the chip-level relay can acquire starting information and phase selection information through the chip-level starting relay and communication module.

[0053] S202, when the startup information indicates that the current transformer is in an abnormal working state, correct multiple current sampling data to obtain multiple target current data of the current transformer.

[0054] Among them, abnormal working state indicates that the current transformer has saturation, and target current data refers to the corrected current sampling data.

[0055] In this embodiment, when the startup information indicates that the current transformer is in an abnormal operating state, it means that the chip-level startup relay has given information that the protection device has been activated. At this time, the chip-level relay can start from n / 2 sampling points (e.g., 10ms) and use a calculation period equal to that at the sampling time, for example, n times per cycle, to identify and judge each current sampling data to obtain a judgment result. Thus, the chip-level relay can correct multiple current sampling data according to the judgment result to obtain multiple target current data of the current transformer. Among them, the judgment result is used to characterize the degree of TA saturation, which can be divided into mild saturation (waveform top clipping), moderate saturation (waveform severe distortion), and deep saturation (secondary current almost zero).

[0056] S203 controls the chip-level relay to open or close based on multiple target current data and multiple voltage sampling data to achieve distance protection.

[0057] In the embodiments of the present application, the chip-level relay can calculate the chip-level Mho relay according to the plurality of target current data and the plurality of voltage sampling data according to the basic principle of distance protection, that is, the measured impedance from the fault point to the installation place of the protection device can be calculated, and the chip-level relay is controlled to perform the opening (i.e. non-action) or closing operation (i.e. action) according to the calculated measured impedance, so as to realize the distance protection. In this way, the chip-level Mho relay can be prevented from refusing to act when the TA is saturated. In addition, the chip-level relay can also transmit the result of controlling the chip-level relay to perform the opening or closing operation to other chip-level relays required by the tripping logic processing unit through the communication module.

[0058] In the distance protection method, the starting information of the current transformer, the plurality of current sampling data and the plurality of voltage sampling data are obtained; when the starting information indicates that the current transformer is in an abnormal working state, the plurality of current sampling data is corrected to obtain the plurality of target current data of the current transformer; and the chip-level relay is controlled to perform the opening or closing operation according to the plurality of target current data and the plurality of voltage sampling data, so as to realize the distance protection. The plurality of abnormal current sampling data can be automatically corrected to obtain the plurality of target current data in the normal state when the TA is saturated, so that the distance protection can be accurately realized according to the plurality of target current data in the normal state and the plurality of voltage sampling data, that is, the chip-level Mho relay can be effectively prevented from refusing to act when the TA is saturated.

[0059] In one embodiment, an implementation of correcting the current sampling data is provided, that is, the "correcting the plurality of current sampling data to obtain the plurality of target current data of the current transformer" in S202 described above, as shown in the following formula (1): Figure 4

[0060] S301, determining the abnormal level of the current transformer according to the plurality of current sampling data.

[0061] ​In the embodiments of the present application, optionally, the chip-level relay can start from n / 2 sampling points (such as 10 ms), adopt a calculation period equal to the sampling time, for example, calculate n times per cycle, identify and judge each current sampling data in the three-phase current to obtain the abnormal level. Alternatively, the chip-level relay can determine at least one fault phase according to the phase selection information, for example, the fault phase can be phase A, so that the chip-level relay can start from n / 2 sampling points (such as 10 ms), adopt a calculation period equal to the sampling time, for example, calculate n times per cycle, identify and judge each current sampling data in the A-phase current to obtain the abnormal level. Of course, the specific implementation manner of determining the abnormal level of the current transformer is not limited in the embodiments of the present application. The abnormal level is used to represent the saturation degree of the TA saturation, and the saturation degree of the TA saturation can be divided into mild saturation (waveform top flattening), moderate saturation (waveform severe distortion) and deep saturation (secondary current almost zero).

[0062] S302, correcting the plurality of current sampling data according to the abnormal level of the current transformer to obtain a plurality of target current data of the current transformer.

[0063] In the embodiments of the present application, optionally, if the abnormal level of the current transformer is the first level, the chip-level relay can correct the plurality of current sampling data by using the first correction manner, that is, the plurality of target current data of the current transformer can be obtained; or, if the abnormal level of the current transformer is the second level, the chip-level relay can correct the plurality of current sampling data by using the second correction manner, that is, the plurality of target current data of the current transformer can be obtained. Of course, the first correction manner and the second correction manner are not limited in the embodiments of the present application.

[0064] In the embodiments, the abnormal level of the current transformer can be determined according to the plurality of current sampling data, so that the plurality of current sampling data can be accurately corrected according to the abnormal level of the current transformer, that is, the plurality of target current data in the normal state can be obtained.

[0065] In one embodiment, the plurality of current sampling data includes first time period sampling data and second time period sampling data, based on which, an implementation manner of determining the abnormal level of the current transformer is provided, that is, the "determining the abnormal level of the current transformer according to the plurality of current sampling data" in the above S301, as shown in Figure 5 , includes:

[0066] S401, judging whether the first time period sampling data and the second time period sampling data satisfy a preset current condition; the preset current condition includes that the current values of the first time period sampling data are all greater than a preset minimum value, and the current values of the second time period sampling data are all less than the preset minimum value;

[0067] If the first time period sampling data and the second time period sampling data do not satisfy the preset current condition, S402 is performed; if the first time period sampling data and the second time period sampling data satisfy the preset current condition, S403 is performed.

[0068] S402, determining the abnormal level of the current transformer as a first level.

[0069] S403, determining the abnormal level of the current transformer according to the first time period sampling data.

[0070] The plurality of current sampling data includes the first time period sampling data and the second time period sampling data, the preset current condition includes that the current values of the first time period sampling data are all greater than a preset minimum value and the current values of the second time period sampling data are all less than the preset minimum value, and the preset minimum value can be any smaller value Imin, for example, 0.05In, In being the rated current.

[0071] In the embodiment, the chip-level relay can determine whether the first time period sampling data and the second time period sampling data satisfy the preset current condition. If the first time period sampling data and the second time period sampling data do not satisfy the preset current condition, that is, there is no position in the curve formed by the plurality of current sampling data that can satisfy that the current values of the first time period sampling data are all greater than the preset minimum value and the current values of the second time period sampling data are all less than the preset minimum value, the chip-level relay can determine the abnormal level of the current transformer as the first level. If the first time period sampling data and the second time period sampling data satisfy the preset current condition, that is, there is at least one position in the curve formed by the plurality of current sampling data that can satisfy that the current values of the first time period sampling data are all greater than the preset minimum value and the current values of the second time period sampling data are all less than the preset minimum value, the chip-level relay can determine the abnormal level of the current transformer according to the first time period sampling data.

[0072] In one of the embodiments, S403 includes:

[0073] If the duration corresponding to the first time period sampling data is not greater than a preset sampling duration, and the current value of the tail sampling data in the first time period sampling data is greater than a preset maximum value, the abnormal level of the current transformer is determined as a second level.

[0074] If the duration corresponding to the first time period sampling data is greater than the preset sampling duration, or the current value of the tail sampling data in the first time period sampling data is not greater than the preset maximum value, the abnormal level of the current transformer is determined as the first level.

[0075] In this embodiment, the chip-level relay can determine whether the duration corresponding to the first time period sampling data is not greater than a preset sampling duration, and whether the current value of the last sampled data in the first time period sampling data is greater than a preset maximum value. If the duration corresponding to the first time period sampling data is not greater than the preset sampling duration, and the current value of the last sampled data in the first time period sampling data is greater than the preset maximum value, then the chip-level relay can determine the abnormality level of the current transformer as the second level. If the duration corresponding to the first time period sampling data is greater than the preset sampling duration, or the current value of the last sampled data in the first time period sampling data is not greater than the preset maximum value, then the chip-level relay can determine the abnormality level of the current transformer as the first level.

[0076] The first level indicates a slight degree of saturation in the current transformer (TA), while the second level indicates a more severe degree of saturation (deep saturation). The preset maximum value can be any large number, such as 10In, where In is the rated current.

[0077] For example, assuming the fault phase is phase A, and in the first 10ms of sampling data for phase A current, the current sampling data for the preceding period (i.e., the sampling data for the first time period) is all greater than the preset minimum value Imin, and the current sampling data for the following period (i.e., the sampling data for the second time period) is all less than the preset minimum value Imin, then the time greater than the preset minimum value Imin can be recorded as t0, which is the duration corresponding to the sampling data for the first time period. Next, it can be determined whether t0 is greater than the preset sampling duration (e.g., 5ms). If t0 is greater than the preset sampling duration, it indicates that the saturation is not severe and has little impact on the chip-level ohmic relay. The chip-level relay can then determine the current transformer's abnormality level as Level 1. If t0 is not greater than the preset sampling duration, then it is determined whether the current value of the previous sampling point less than the preset minimum value Imin (i.e., the current value of the last sampling data in the first time period) is greater than the preset maximum value. If the current value of the last sampling data in the first time period is not greater than the preset maximum value, the chip-level relay can then determine the current transformer's abnormality level as Level 1. If the current value of the last sampled data in the first time period is greater than the preset maximum value, the chip-level relay can determine the abnormality level of the current transformer as the second level.

[0078] In this embodiment, the abnormality level of the current transformer can be accurately classified by judging the degree of saturation of the current transformer. Thus, multiple current sampling data can be targeted for correction based on the abnormality level of the current transformer.

[0079] In one embodiment, the plurality of current sampling data includes first time period sampling data and second time period sampling data, the first time period sampling data includes M first sampling data, and the second time period sampling data includes N second sampling data. Based on this, if the abnormal level of the current transformer is the second level, an implementation manner of correcting the current sampling data is provided, that is, the method of "correcting the plurality of current sampling data" in S302, which includes:

[0080] According to the M-1th first sampling data and the Mth first sampling data in the first time period sampling data, the 1st second sampling data in the second time period sampling data is corrected to obtain corrected 1st second sampling data.

[0081] The Mth first sampling data is taken as new M-1th first sampling data, the corrected 1st second sampling data is taken as new Mth first sampling data, the 2nd second sampling data in the second time period sampling data is taken as new 1st second sampling data, and the step of correcting the 1st second sampling data in the second time period sampling data according to the M-1th first sampling data and the Mth first sampling data in the first time period sampling data is executed again until the Nth second sampling data is obtained.

[0082] The plurality of current sampling data includes first time period sampling data and second time period sampling data, the first time period sampling data includes M first sampling data, and the second time period sampling data includes N second sampling data.

[0083] In the embodiment of the application, if the abnormal level of the current transformer is the second level, the chip-level relay can perform interpolation calculation on the 1st second sampling data in the second time period sampling data according to the M-1th first sampling data and the Mth first sampling data in the first time period sampling data to obtain corrected 1st second sampling data. Then, the chip-level relay can take the Mth first sampling data as new M-1th first sampling data, take the corrected 1st second sampling data as new Mth first sampling data, take the 2nd second sampling data in the second time period sampling data as new 1st second sampling data, and execute again the step of correcting the 1st second sampling data in the second time period sampling data according to the M-1th first sampling data and the Mth first sampling data in the first time period sampling data until the Nth second sampling data is obtained. That is, the M first sampling data and the corrected N second sampling data can be determined as the plurality of target current data of the current transformer.

[0084] For example, assuming n = 40, and the current values of the current sampling data X0, X1, X2,..., X9, X0, X1,..., X5 are greater than the preset minimum value Imin, and the subsequent X6, X7, X8, X9 are less than the preset minimum value Imin, then the calculation module in the chip-level relay can obtain X6 by interpolation from X4 and X5, and the specific formula is as follows:

[0085] X6 = X4 + (x5 - x4) * 2 (1)

[0086] Similarly, the calculation module in the chip-level relay can obtain X7 by interpolation from X5 and the interpolated X6, and the specific formula is as follows:

[0087] X7 = X5 + (x6 - x5) * 2 (2)

[0088] Therefore, the calculation module in the chip-level relay can obtain X8 by interpolation from X6 and the interpolated X7, and the specific formula is as follows:

[0089] X8 = X6 + (x7 - x6) * 2 (3)

[0090] In turn, all interpolated X6, X7, X8, X9 can be obtained.

[0091] It should be noted that if the interpolated current value is greater than 20In, the current value that needs to be interpolated can be directly determined as 20In. In addition, the data at time t after 5ms can be directly set as equal values according to the waveform symmetry principle, that is, X11 = X9, X12 = X8, and in turn, the data within 10ms can be completed. Further, in turn, in the time period of each zero crossing in the TA saturation stage, all current values can be completed according to the waveform symmetry principle, so that the corrected current sampling sequence can be obtained.

[0092] In this embodiment, the current sampling data with severe TA saturation can be corrected to obtain corrected current sampling data, and all current values can be completed according to the waveform symmetry principle, so that accurate multiple target current data can be obtained.

[0093] In one embodiment, if the abnormal level of the current transformer is the first level, an implementation manner for correcting the current sampling data is provided, that is, the method of "correcting multiple current sampling data" in S302, which includes:

[0094] Interpolating the multiple current sampling data, and determining the interpolated multiple current sampling data as multiple target current data.

[0095] In the embodiment of the application, if the abnormality level of the current transformer is the first level, the chip-level relay can perform interpolation processing on the plurality of current sampling data, and determine the plurality of current sampling data after interpolation processing as the plurality of target current data. The interpolation processing mode can include, but is not limited to, linear interpolation, binomial interpolation, etc.

[0096] In the embodiment, the plurality of current sampling data can be interpolated to obtain the plurality of target current data.

[0097] In an optional embodiment, as shown in Figure 6 A distance protection method is provided, applied to a chip-level relay, including:

[0098] S21, obtaining start-up information of a current transformer, a plurality of current sampling data and a plurality of voltage sampling data;

[0099] S22, when the start-up information indicates that the current transformer is in an abnormal working state, determining whether the first time period sampling data and the second time period sampling data satisfy a preset current condition; the preset current condition includes that the current values of the first time period sampling data are all greater than a preset minimum value, and the current values of the second time period sampling data are all less than the preset minimum value;

[0100] If the first time period sampling data and the second time period sampling data do not satisfy the preset current condition, S23 is performed; if the first time period sampling data and the second time period sampling data satisfy the preset current condition, S24 is performed;

[0101] S23, determining that the abnormality level of the current transformer is the first level;

[0102] S24, determining whether the time length corresponding to the first time period sampling data is not greater than a preset sampling time length, and whether the current value of the last sampling data in the first time period sampling data is greater than a preset maximum value;

[0103] If the time length corresponding to the first time period sampling data is greater than the preset sampling time length, or the current value of the last sampling data in the first time period sampling data is not greater than the preset maximum value, S23 is performed; if the time length corresponding to the first time period sampling data is not greater than the preset sampling time length, and the current value of the last sampling data in the first time period sampling data is greater than the preset maximum value, S25 is performed;

[0104] S25, determining that the abnormality level of the current transformer is the second level;

[0105] If the abnormality level of the current transformer is the second level:

[0106] S26, correcting the first second sampling data in the second time period sampling data according to the M-1th first sampling data and the Mth first sampling data in the first time period sampling data, to obtain the corrected first second sampling data;

[0107] S27, taking the Mth first sampling data as the new M-1th first sampling data, taking the corrected first second sampling data as the new Mth first sampling data, taking the second second sampling data in the second time period sampling data as the new first second sampling data, returning to execute S26 until the Nth second sampling data is corrected, that is, a plurality of target current data of the current transformer can be obtained;

[0108] If the abnormal level of the current transformer is the first level:

[0109] S28, interpolating the plurality of current sampling data, and determining the plurality of current sampling data after interpolation as the plurality of target current data;

[0110] S29, controlling the chip-level relay to perform opening or closing operation according to the plurality of target current data and the plurality of voltage sampling data, to realize distance protection.

[0111] In the above distance protection method, the starting information, the plurality of current sampling data and the plurality of voltage sampling data of the current transformer are obtained; when the starting information indicates that the current transformer is in an abnormal working state, the plurality of current sampling data is corrected to obtain a plurality of target current data of the current transformer; and the chip-level relay is controlled to perform opening or closing operation according to the plurality of target current data and the plurality of voltage sampling data, to realize distance protection. The embodiments of the present application can automatically correct a plurality of abnormal current sampling data when TA is saturated to obtain a plurality of target current data in a normal state, so that distance protection can be accurately realized according to the plurality of target current data in the normal state and the plurality of voltage sampling data, that is, the chip-level MΩ relay can be effectively prevented from refusing to act when TA is saturated. Based on this, the embodiments of the present application relate to the field of power system relay protection, and specifically relate to a chip-level MΩ relay and a distance protection method for preventing TA saturation refusal to act based on waveform symmetry. The distance protection method based on the symmetry of the waveform after fault can quickly identify TA saturation and correct the chip-level MΩ relay (i.e. distance relay), which can ensure that the chip-level MΩ relay reliably acts when a positive direction fault occurs.

[0112] It should be understood that although the steps in the flowcharts involved in the above embodiments are shown in sequence according to the arrows, the steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, the execution of the steps is not strictly limited in sequence, and the steps can be executed in other orders. Moreover, at least some of the steps in the flowcharts involved in the above embodiments can include multiple steps or multiple stages, which are not necessarily executed at the same time, but can be executed at different times, and the execution order of the steps or stages is not necessarily sequential, but can be alternately or alternately executed with at least part of other steps or steps or stages in other steps. It can be understood that the steps in different embodiments can be freely combined as needed, and various non-contradictory schemes formed by the combination are within the scope of protection of the present application.

[0113] Based on the same inventive concept, the embodiments of the present application also provide a chip-level relay for preventing TA saturation from refusing to act based on waveform symmetry. The implementation scheme for solving the problem provided by the chip-level relay is similar to the implementation scheme described in the above method, so the specific limitations in one or more chip-level relay embodiments for preventing TA saturation from refusing to act based on waveform symmetry provided below can refer to the limitations of the distance protection method in the above text, and will not be repeated here.

[0114] In one exemplary embodiment, as shown in Figure 7 a chip-level relay for preventing TA saturation from refusing to act based on waveform symmetry is provided, comprising: an acquisition module 31, a correction module 32, and a distance protection module 33, wherein:

[0115] The acquisition module 31 is configured to acquire startup information of a current transformer, a plurality of current sampling data, and a plurality of voltage sampling data.

[0116] The correction module 32 is configured to correct the plurality of current sampling data to obtain a plurality of target current data of the current transformer when the startup information indicates that the current transformer is in an abnormal working state.

[0117] The distance protection module 33 is configured to control the chip-level relay to perform opening or closing operations according to the plurality of target current data and the plurality of voltage sampling data to implement distance protection.

[0118] In one embodiment, the correction module 32 comprises:

[0119] An abnormality level determination unit is configured to determine an abnormality level of the current transformer according to the plurality of current sampling data.

[0120] The correction unit is configured to correct the plurality of current sampling data according to the abnormality level of the current transformer to obtain a plurality of target current data of the current transformer.

[0121] In one of the embodiments, the plurality of current sampling data includes first time period sampling data and second time period sampling data, and the abnormality level determination unit includes:

[0122] The first determination sub-unit is configured to determine the abnormality level of the current transformer according to the first time period sampling data if the first time period sampling data and the second time period sampling data satisfy a preset current condition; and the preset current condition includes that current values of the first time period sampling data are all greater than a preset minimum value, and current values of the second time period sampling data are all less than the preset minimum value.

[0123] The second determination sub-unit is configured to determine the abnormality level of the current transformer as a first level if the first time period sampling data and the second time period sampling data do not satisfy the preset current condition.

[0124] In one of the embodiments, the first determination sub-unit is specifically configured to:

[0125] If a time length corresponding to the first time period sampling data is not greater than a preset sampling time length, and a current value of a tail sampling data in the first time period sampling data is greater than a preset maximum value, then the abnormality level of the current transformer is determined as a second level.

[0126] If the time length corresponding to the first time period sampling data is greater than the preset sampling time length, or the current value of the tail sampling data in the first time period sampling data is not greater than the preset maximum value, then the abnormality level of the current transformer is determined as the first level.

[0127] In one of the embodiments, the plurality of current sampling data includes first time period sampling data and second time period sampling data, the first time period sampling data includes M first sampling data, and the second time period sampling data includes N second sampling data; if the abnormality level of the current transformer is the second level, the correction unit is specifically configured to:

[0128] correct a first second sampling data in the second time period sampling data according to an M-1th first sampling data and an Mth first sampling data in the first time period sampling data to obtain a corrected first second sampling data.

[0129] The Mth first sampling data is taken as new (M-1)th first sampling data, the corrected first second sampling data is taken as new Mth first sampling data, the second second sampling data in the second time period sampling data is taken as new first second sampling data, and the step of correcting the first second sampling data in the second time period sampling data according to the (M-1)th first sampling data and the Mth first sampling data in the first time period sampling data is returned to be executed until the Nth second sampling data is obtained.

[0130] In one of the embodiments, if the abnormal level of the current transformer is the first level, the correction unit is specifically used for:

[0131] The plurality of current sampling data is subjected to interpolation processing, and the plurality of current sampling data subjected to the interpolation processing is determined as the plurality of target current data.

[0132] The above-mentioned various modules in the chip-level relay based on waveform symmetry for preventing TA saturation from refusing to act can be realized by software, hardware and combinations thereof in whole or in part. The above-mentioned various modules can be embedded in or independent of the processor in the computer device in hardware form, or can be stored in the memory in the computer device in software form, so as to be called and executed by the processor to perform the operations corresponding to the above-mentioned various modules.

[0133] In one exemplary embodiment, a chip-level relay is provided, which can include a computer device, which can be a server, or the computer device can also be a terminal, and the internal structure diagram thereof can be as shown in Figure 8The computer device includes a processor, a memory, an input / output interface, a communication interface, a display unit and an input device. The processor, the memory and the input / output interface are connected through a system bus, and the communication interface, the display unit and the input device are connected to the system bus through the input / output interface. The processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operating system and the computer program in the non-volatile storage medium to run. The input / output interface of the computer device is configured to exchange information between the processor and external devices. The communication interface of the computer device is configured to perform wired or wireless communication with external terminals. The wireless communication can be achieved through WIFI, mobile cellular network, near field communication (NFC) or other technologies. The computer program is executed by the processor to implement a distance protection method. The display unit of the computer device is configured to form a visually visible picture, which can be a display screen, a projection device or a virtual reality imaging device. The display screen can be a liquid crystal display screen or an electronic ink display screen. The input device of the computer device can be a touch layer overlaid on the display screen, or a key, trackball or touchpad arranged on the shell of the computer device, or an external keyboard, touchpad or mouse, etc.

[0134] Those skilled in the art can understand that, Figure 8 The structure shown in the figure is only a block diagram of part of the structure related to the scheme of the present application, and does not constitute a limitation on the computer device to which the scheme of the present application is applied. The specific computer device can include more or fewer components than those shown in the figure, or combine certain components, or have a different component arrangement.

[0135] In one exemplary embodiment, a computer device is provided, including a memory and a processor, the memory storing a computer program, and the processor executing the computer program to implement the following steps:

[0136] Obtaining startup information of the current transformer, a plurality of current sampling data and a plurality of voltage sampling data;

[0137] When the startup information indicates that the current transformer is in an abnormal working state, correcting the plurality of current sampling data to obtain a plurality of target current data of the current transformer;

[0138] According to the plurality of target current data and the plurality of voltage sampling data, controlling the chip-level relay to perform opening or closing operation to realize distance protection.

[0139] In one embodiment, the plurality of current sampling data is corrected to obtain a plurality of target current data of the current transformer, and the processor, when executing the computer program, further implements the following steps:

[0140] The abnormality level of the current transformer is determined according to the plurality of current sampling data.

[0141] The plurality of current sampling data is corrected according to the abnormality level of the current transformer to obtain a plurality of target current data of the current transformer.

[0142] In one embodiment, the plurality of current sampling data includes first time period sampling data and second time period sampling data, and the abnormality level of the current transformer is determined according to the plurality of current sampling data. The processor, when executing the computer program, further implements the following steps:

[0143] If the first time period sampling data and the second time period sampling data satisfy a preset current condition, the abnormality level of the current transformer is determined according to the first time period sampling data. The preset current condition includes that the current values of the first time period sampling data are all greater than a preset minimum value, and the current values of the second time period sampling data are all less than the preset minimum value.

[0144] If the first time period sampling data and the second time period sampling data do not satisfy the preset current condition, the abnormality level of the current transformer is determined as a first level.

[0145] In one embodiment, the abnormality level of the current transformer is determined according to the first time period sampling data. The processor, when executing the computer program, further implements the following steps:

[0146] If the duration corresponding to the first time period sampling data is not greater than a preset sampling duration, and the current value of the last sampling data in the first time period sampling data is greater than a preset maximum value, the abnormality level of the current transformer is determined as a second level.

[0147] If the duration corresponding to the first time period sampling data is greater than the preset sampling duration, or the current value of the last sampling data in the first time period sampling data is not greater than the preset maximum value, the abnormality level of the current transformer is determined as the first level.

[0148] In one embodiment, the plurality of current sampling data includes first time period sampling data and second time period sampling data, the first time period sampling data includes M first sampling data, and the second time period sampling data includes N second sampling data. If the abnormality level of the current transformer is the second level, the method for correcting the plurality of current sampling data, the processor, when executing the computer program, further implements the following steps:

[0149] According to the M-1th first sampling data and the Mth first sampling data in the first time period sampling data, the 1st second sampling data in the second time period sampling data is corrected to obtain the corrected 1st second sampling data;

[0150] The Mth first sampling data is taken as the new M-1th first sampling data, the corrected 1st second sampling data is taken as the new Mth first sampling data, and the 2nd second sampling data in the second time period sampling data is taken as the new 1st second sampling data, and the step of correcting the 1st second sampling data in the second time period sampling data according to the M-1th first sampling data and the Mth first sampling data in the first time period sampling data is executed again until the Nth second sampling data is obtained.

[0151] In one embodiment, if the abnormality level of the current transformer is the first level, the method for correcting the plurality of current sampling data further comprises the following steps when the computer program is executed by the processor:

[0152] The plurality of current sampling data is subjected to interpolation processing, and the plurality of current sampling data subjected to the interpolation processing is determined as the plurality of target current data.

[0153] In one embodiment, a computer readable storage medium is provided, and the computer readable storage medium stores a computer program. The computer program is executed by the processor to implement the following steps:

[0154] The starting information of the current transformer, the plurality of current sampling data and the plurality of voltage sampling data are obtained;

[0155] When the starting information indicates that the current transformer is in an abnormal working state, the plurality of current sampling data is corrected to obtain the plurality of target current data of the current transformer;

[0156] According to the plurality of target current data and the plurality of voltage sampling data, the chip-level relay is controlled to be opened or closed to realize distance protection.

[0157] In one embodiment, the plurality of current sampling data is corrected to obtain the plurality of target current data of the current transformer, and the computer program is executed by the processor to implement the following steps:

[0158] According to the plurality of current sampling data, the abnormality level of the current transformer is determined;

[0159] According to the abnormality level of the current transformer, the plurality of current sampling data is corrected to obtain the plurality of target current data of the current transformer.

[0160] In one embodiment, the plurality of current sampling data includes first time period sampling data and second time period sampling data, the abnormality level of the current transformer is determined according to the plurality of current sampling data, and the computer program, when executed by the processor, further implements the following steps:

[0161] If the first time period sampling data and the second time period sampling data satisfy a preset current condition, the abnormality level of the current transformer is determined according to the first time period sampling data; the preset current condition includes that the current values of the first time period sampling data are all greater than a preset minimum value, and the current values of the second time period sampling data are all less than the preset minimum value.

[0162] If the first time period sampling data and the second time period sampling data do not satisfy the preset current condition, the abnormality level of the current transformer is determined as a first level.

[0163] In one embodiment, the abnormality level of the current transformer is determined according to the first time period sampling data, and the computer program, when executed by the processor, further implements the following steps:

[0164] If the duration corresponding to the first time period sampling data is not greater than a preset sampling duration, and the current value of the last sampling data in the first time period sampling data is greater than a preset maximum value, the abnormality level of the current transformer is determined as a second level.

[0165] If the duration corresponding to the first time period sampling data is greater than the preset sampling duration, or the current value of the last sampling data in the first time period sampling data is not greater than the preset maximum value, the abnormality level of the current transformer is determined as the first level.

[0166] In one embodiment, the plurality of current sampling data includes first time period sampling data and second time period sampling data, the first time period sampling data includes M first sampling data, the second time period sampling data includes N second sampling data, if the abnormality level of the current transformer is the second level, the method for correcting the plurality of current sampling data, and the computer program, when executed by the processor, further implements the following steps:

[0167] The first second sampling data in the second time period sampling data is corrected according to the M-1th first sampling data and the Mth first sampling data in the first time period sampling data, to obtain corrected first second sampling data.

[0168] The Mth first sampling data is taken as new (M-1)th first sampling data, the corrected first second sampling data is taken as new Mth first sampling data, the second second sampling data in the second time period sampling data is taken as new first second sampling data, and the step of correcting the first second sampling data in the second time period sampling data according to the (M-1)th first sampling data and the Mth first sampling data in the first time period sampling data is returned to be executed until the Nth second sampling data is obtained.

[0169] In one embodiment, if the abnormality level of the current transformer is the first level, the method for correcting the plurality of current sampling data, when executed by the processor, further implements the following steps:

[0170] The plurality of current sampling data is subjected to interpolation processing, and the plurality of current sampling data subjected to the interpolation processing is determined as the plurality of target current data.

[0171] In one embodiment, a computer program product is provided, comprising a computer program which, when executed by a processor, implements the steps of the image processing method in any of the above embodiments.

[0172] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by a computer program instructing relevant hardware. The computer program can be stored in a non-volatile computer readable storage medium. When the computer program is executed, the processes of the above-mentioned embodiment methods can be included. Any reference to memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile memory and volatile memory. The non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical storage, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. The volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration but not limitation, the RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM), etc. The database involved in the embodiments provided in the present application can include at least one of a relational database and a non-relational database. The non-relational database can include a distributed database based on a block chain, etc., and is not limited thereto. The processor involved in the embodiments provided in the present application can be a general processor, a central processing unit, a graphics processing unit, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, an artificial intelligence (AI) processor, etc., and is not limited thereto.

[0173] The technical features of the above embodiments can be combined arbitrarily. In order to make the description simple, all possible combinations of the technical features in the above embodiments are not described, however, as long as the combinations of the technical features do not exist contradictory, it should be considered as the scope of the present application.

[0174] The above embodiments only express several implementation ways of the present application, and the description is specific and detailed, but it should not be understood as a limitation to the patent scope of the present application. It should be pointed out that for ordinary skilled in the art, without departing from the concept of the present application, several modifications and improvements can be made, which all belong to the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the appended claims.

Claims

1. A distance protection method, characterized in that, Applied to chip-level relays, the method includes: Acquire startup information, multiple current sampling data, and multiple voltage sampling data from the current transformer; When the startup information indicates that the current transformer is in an abnormal working state, the multiple current sampling data are corrected to obtain multiple target current data of the current transformer. Based on the multiple target current data and the multiple voltage sampling data, the chip-level relay is controlled to open or close to achieve distance protection.

2. The method according to claim 1, characterized in that, The step of correcting the multiple current sampling data to obtain multiple target current data of the current transformer includes: The anomaly level of the current transformer is determined based on the multiple current sampling data. Based on the anomaly level of the current transformer, the multiple current sampling data are corrected to obtain multiple target current data of the current transformer.

3. The method according to claim 2, characterized in that, The multiple current sampling data include sampling data from a first time period and sampling data from a second time period. Determining the anomaly level of the current transformer based on the multiple current sampling data includes: If the sampling data of the first time period and the sampling data of the second time period meet the preset current conditions, the abnormality level of the current transformer is determined based on the sampling data of the first time period; the preset current conditions include that the current values ​​of the sampling data of the first time period are all greater than the preset minimum value, and the current values ​​of the sampling data of the second time period are all less than the preset minimum value. If the sampling data of the first time period and the sampling data of the second time period do not meet the preset current condition, then the abnormality level of the current transformer is determined to be the first level.

4. The method according to claim 3, characterized in that, The step of determining the anomaly level of the current transformer based on the sampled data from the first time period includes: If the duration of the sampling data in the first time period is not greater than the preset sampling duration, and the current value of the last sampled data in the first time period is greater than the preset maximum value, then the abnormality level of the current transformer is determined to be the second level. If the duration of the sampling data in the first time period is greater than the preset sampling duration, or if the current value of the last sampled data in the first time period is not greater than the preset maximum value, then the abnormality level of the current transformer is determined to be the first level.

5. The method according to claim 2, characterized in that, The multiple current sampling data includes sampling data from a first time period and sampling data from a second time period. The first time period sampling data includes M first sampling data points, and the second time period sampling data includes N second sampling data points. If the anomaly level of the current transformer is level two, the method for correcting the multiple current sampling data includes: Based on the (M-1)th first sample data and the Mth first sample data in the first time period sampling data, the first second sample data in the second time period sampling data is corrected to obtain the corrected first second sample data; The Mth first sampled data is taken as the new (M-1)th first sampled data, the corrected first second sampled data is taken as the new Mth first sampled data, and the second second sampled data in the second time period sampled data is taken as the new first second sampled data. The process of correcting the first second sampled data in the second time period sampled data based on the (M-1)th and Mth first sampled data in the first time period sampled data is repeated until the corrected Nth second sampled data is obtained.

6. The method according to claim 2, characterized in that, If the anomaly level of the current transformer is the first level, the method for correcting the multiple current sampling data includes: The multiple current sampling data are interpolated, and the interpolated multiple current sampling data are determined as the multiple target current data.

7. A chip-level relay for preventing current transformer (CT) saturation failure based on waveform symmetry, characterized in that, The chip-level relay includes: The acquisition module is used to acquire the current transformer's startup information, multiple current sampling data, and multiple voltage sampling data; The correction module is used to correct the multiple current sampling data when the start-up information indicates that the current transformer is in an abnormal working state, so as to obtain multiple target current data of the current transformer. The distance protection module is used to control the chip-level relay to open or close based on the multiple target current data and the multiple voltage sampling data, so as to achieve distance protection.

8. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 6.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 6.

10. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 6.