A method for rapid acquisition and blind synchronization of blind burst signals

Abstract

This application discloses a method for fast acquisition and blind synchronization of blind burst signals, comprising: a receiving end continuously capturing signals of one frame length to obtain multiple captured signals; when the acquisition threshold of the evaluation function exceeds the judgment threshold, it is determined that there are some burst signals in the captured signals, wherein the signals do not contain pilot structures; the signal length of the captured signals is extended and then sent to a synchronizer for synchronization, and the chip corresponding to the maximum value of the evaluation function is selected as the burst signal synchronization header; after determining the arrival time of the burst signal synchronization header, the burst signal is demodulated using CSK demodulation to obtain a bit stream; based on the bit stream, CRC check is used to perform auxiliary verification of the sliding synchronization process.

Description

Technical Field

[0001] This application relates to the field of communications, and more specifically, to a method for rapid acquisition and blind synchronization of blind burst signals. Background Technology

[0002] In digital communication systems, pilot structures are the organization of known signals used for critical functions such as synchronization and channel estimation. Pilot signals are predefined known signals at the transmitting end. The receiving end detects these signals to obtain channel state information, thereby performing synchronization and channel estimation to improve the accuracy and reliability of data transmission.

[0003] Due to the lack of the aforementioned pilot structure, the transmission time of sporadic, intermittent blind bursts is random and discrete. The receiver cannot obtain the arrival time of the burst signal and channel estimation information through the pilot. Currently, it is difficult to achieve fast and effective acquisition and synchronization of blind burst signals, making efficient blind burst detection and transmission impossible, thus affecting the performance of the communication system. Summary of the Invention

[0004] To address at least one deficiency or improvement requirement in the prior art, this invention provides a method for rapid acquisition and blind synchronization of blind burst signals. It utilizes CRC check soft decision to assist the synchronization and demodulation process of blind burst signals, effectively improving system transmission performance.

[0005] To achieve the above objectives, according to a first aspect of the present invention, a method for fast acquisition and blind synchronization of blind burst signals is provided. The method includes: a receiver continuously capturing signals of one frame length to obtain multiple captured signals; when the acquisition threshold of the evaluation function exceeds a judgment threshold, determining that some burst signals exist in the captured signals, wherein the signals do not contain pilot structures; extending the signal length of the captured signals and sending them to a synchronizer for synchronization; selecting the chip corresponding to the maximum value of the evaluation function as the burst signal synchronization header; based on the arrival time of the location information of the burst signal synchronization header, using CSK demodulation to demodulate the burst signals to obtain a bit stream; and using CRC checksum to perform auxiliary verification of the sliding synchronization process based on the bit stream.

[0006] In an exemplary embodiment, determining that a partial burst signal exists in the intercepted signal when the capture threshold of the evaluation function exceeds the determination threshold includes: constructing an evaluation function S(Y) by calculating the correlation value between the intercepted signal and the local signal, wherein the evaluation function S(Y) is expressed as follows:

[0007]

[0008] Where Y represents receiving a burst signal, This represents the maximum value of the correlation function, and N represents the number of symbols present in the burst signal;

[0009] Based on a given false alarm probability With the probability density function of the unsent signal Determine the judgment threshold U 0, the false alarm probability The probability of an item not being detected is specifically expressed as follows:

[0010]

[0011] Among them, variables S(Y) represents the evaluation function of the received frame.

[0012] In an exemplary embodiment, the step of extending the signal length of the captured signal and sending it to the synchronizer for synchronization, and selecting the chip corresponding to the maximum value of the evaluation function as the burst signal synchronization head includes: taking the captured signal as the center, combining the extended frames before and after it to obtain a synchronization preparation frame with a length of three frames; traversing all the chips in the synchronization preparation frames as preset burst signal heads, which are respectively related to the local signal; completing synchronization when the distance between the arrival time of the burst signal and the synchronization point is less than 1 / 2 chip time, and selecting the chip corresponding to the maximum value of the evaluation function as the burst signal head.

[0013] In an exemplary embodiment, the step of demodulating the burst signal using CSK demodulation to obtain a bitstream after the arrival time of the burst signal synchronization header location information includes: traversing all states of the Chirp-CSK signal and correlating them with the synchronized burst signal; determining the synchronization index corresponding to the maximum value of the evaluation function as the decimal information carried by the received signal; and converting the decimal information into binary information bits to obtain the bitstream.

[0014] In an exemplary embodiment, the auxiliary verification of the sliding synchronization process based on the bit stream using CRC check includes: appending the calculated first check code to the data to be sent to form a new data frame, and sending it to the receiving end; the receiving end recalculates the second check code according to the check code generation rules, and if the first check code and the second check code are the same, it indicates that the correct data has been received.

[0015] In an exemplary embodiment, the method further includes: determining whether the demodulation result with the chip corresponding to the maximum value of the evaluation function as the synchronization header satisfies the CRC check result; when the remainder of the modulo 2 division of the received data and the generator polynomial is not 0, taking the second largest value of the evaluation function and performing iterative judgment again; after multiple iterations, the corresponding position that satisfies the CRC check equation is taken as the arrival time of the burst signal.

[0016] According to a second aspect of the present invention, a device for rapid acquisition and synchronization of blind burst signals is also provided, comprising: a truncation unit, configured to continuously truncate a signal of one frame length at the receiving end to acquire multiple truncation signals, and when the acquisition threshold of the evaluation function exceeds the determination threshold, to determine that some burst signals exist in the truncation signals, wherein the signals do not contain pilot structures; a synchronization unit, configured to extend the signal length of the truncation signals and send them to a synchronizer for synchronization, and select the chip corresponding to the maximum value of the evaluation function as the burst signal synchronization header; a demodulation unit, configured to demodulate the burst signals using CSK demodulation to obtain a bit stream after determining the arrival time of the burst signal synchronization header location information; and a verification unit, configured to perform auxiliary verification of the sliding synchronization process using CRC verification based on the bit stream.

[0017] According to a third aspect of the invention, a computer-readable storage medium is also provided, wherein a computer program is stored therein, wherein the computer program is configured to execute the above-described method for rapid acquisition and blind synchronization of blind burst signals when it is run.

[0018] According to a fourth aspect of the present invention, an electronic device is also provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the above-described method for rapid acquisition and blind synchronization of blind burst signals through the computer program.

[0019] In summary, compared with the prior art, the above-described technical solutions conceived by this invention can achieve the following beneficial effects:

[0020] This invention provides a method for rapid acquisition and blind synchronization of blind burst signals. Addressing the shortcomings of joint detection, the method continuously captures multiple truncated signals by intercepting a one-frame length of signal at the receiving end. When the acquisition threshold of the evaluation function exceeds the judgment threshold, it is determined that some burst signals exist in the truncated signals, wherein the signals do not contain pilot structures. The signal length of the truncated signals is extended and then sent to a synchronizer for synchronization. The chip corresponding to the maximum value of the evaluation function is selected as the burst signal synchronization header. Based on the arrival time of the burst signal synchronization header, CSK demodulation is used to demodulate the burst signal to obtain a bit stream. Based on the bit stream, CRC checksum is used to assist in the sliding synchronization process. This CRC checksum-assisted synchronization scheme effectively improves synchronization and demodulation performance. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0022] Figure 1 A flowchart illustrating an optional method for rapid acquisition and blind synchronization of blind burst signals provided in this application embodiment;

[0023] Figure 2 A schematic diagram of an optional traditional long packet structure, a short packet structure, and a pilot-free short packet structure provided for embodiments of this application;

[0024] Figure 3 A schematic diagram of an optional blind burst signal joint detection provided for an embodiment of this application;

[0025] Figure 4 A schematic diagram of an optional Chirp-CSK orthogonality analysis provided for an embodiment of this application;

[0026] Figure 5 A schematic diagram of an optional pilot-free short packet structure provided for an embodiment of this application;

[0027] Figure 6 A schematic diagram of an optional receiver signal acquisition process provided for an embodiment of this application;

[0028] Figure 7 An optional sliding correlation synchronization diagram provided for an embodiment of this application;

[0029] Figure 8 A schematic diagram of an optional blind burst signal fast acquisition and blind synchronization device provided for an embodiment of this application;

[0030] Figure 9 This is a schematic diagram of an optional electronic device provided in an embodiment of this application. Detailed Implementation

[0031] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention. Furthermore, the technical features involved in the various embodiments of this invention described below can be combined with each other as long as they do not conflict with each other.

[0032] The terms "first," "second," "third," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or apparatuses.

[0033] According to one aspect of the embodiments of this application, a method for rapid acquisition and blind synchronization of blind burst signals is provided. The following is in conjunction with... Figure 1 This application describes a method for rapid acquisition and blind synchronization of blind burst signals provided in its embodiments.

[0034] Figure 1 This is a flowchart illustrating an optional method for rapid acquisition and blind synchronization of blind burst signals provided in an embodiment of this application, as shown below. Figure 1 As shown, the process includes the following steps:

[0035] S102, the receiving end continuously captures a signal of one frame length to obtain multiple captured signals. When the capture threshold of the evaluation function exceeds the judgment threshold, it is determined that there are some burst signals in the captured signals, wherein the signals do not contain pilot structures.

[0036] S104, after extending the signal length of the intercepted signal, it is sent to the synchronizer for synchronization, and the chip corresponding to the maximum value of the evaluation function is selected as the synchronization head of the burst signal.

[0037] S106, after the arrival time of the burst signal synchronization header positioning information, the burst signal is demodulated using CSK demodulation to obtain a bit stream;

[0038] S108, Based on the bit stream, CRC check is used to perform auxiliary verification of the sliding synchronization process.

[0039] The method for rapid acquisition and blind synchronization of blind burst signals provided in this application is applicable to blind detection scenarios without pilot short packets. Figure 2This paper presents schematic diagrams of traditional long packet structures, short packet structures, and pilotless short packet structures (i.e., blind burst signals). Compared to long packet communication, short packet communication differs fundamentally in information theory, physical layer transmission, frame structure design, and protocols. Traditional long packet structures primarily consist of two basic elements: pilots and payloads. Pilots typically do not carry information but can effectively estimate channel parameters, enabling efficient acquisition and synchronization. The payload carries the information exchanged between the sender and receiver. Clearly, long packet communication requires the transmission of large amounts of data, resulting in a very high payload bit ratio, making the overhead of the pilot structure negligible. However, short packet communication has a smaller data transmission volume, but the pilot overhead is significant, severely squeezing the information and coding redundancy space of the payload. Pilot-based short packet communication does not demonstrate an advantage in resource utilization. Pilotless short packets eliminate the pilot structure and utilize the excellent autocorrelation and cross-correlation of payload bits to achieve blind acquisition and synchronization, effectively improving information transmission efficiency.

[0040] like Figure 3 As shown, for sporadic and intermittent blind bursts, the information transmission time is random and discrete, and the receiver cannot obtain the arrival time of the burst signal and channel estimation information through the pilot. To achieve blind burst detection transmission, the receiver needs to continuously track and capture the air signal. When the capture threshold exceeds the judgment threshold, it is determined that a short packet has been detected. To ensure the integrity of the short packet structure, the signal length is extended before being sent to the synchronizer for subsequent synchronization and demodulation processes.

[0041] A chirp signal is a linear frequency modulated (LFM) signal that, after cyclic shift modulation, becomes a chirp-code-shift keying (Chirp-CSK) signal. The amount of cyclic shift carries a certain number of information bits, which serve as the symbol unit of the burst signal. Assuming the burst signal contains N symbols, each symbol has q chips, and the spreading factor is SF, it can carry SF bits of information. Assuming binary information bits... Convert decimal to The Chirp-CSK signal carrying decimal information k can be represented as follows: Here, i represents the imaginary part, μ represents the frequency modulation parameter, T represents the symbol period, and t represents the time variable.

[0042] By cascading N Chirp-CSK signals, a blind burst signal can be obtained. The Chirp signals, containing different information, are orthogonal. Assuming they contain information... and Chirp-CSK signal , The correlation can be expressed as,

[0043]

[0044] Combination Figure 4 As shown, Chirp-CSK signals containing the same information exhibit excellent autocorrelation performance, while signals containing different information are completely orthogonal, with their correlation values ​​at the zero point. Chirp-CSK signals possess superior autocorrelation and cross-correlation properties, making them suitable for blind burst signal detection. Optionally, the blind burst signal can be composed of N Chirp-CSK signals carrying different information connected in series, as shown in the diagram. Figure 5 As shown.

[0045] Through steps S102 to S108, multiple captured signals are obtained by continuously capturing a frame-length signal at the receiving end. When the capture threshold of the evaluation function exceeds the judgment threshold, it is determined that there are some burst signals in the captured signals, wherein the signals do not contain pilot structures. The signal length of the captured signals is extended and sent to the synchronizer for synchronization. The chip corresponding to the maximum value of the evaluation function is selected as the burst signal synchronization header. After the arrival time of the location information of the burst signal synchronization header is determined, the burst signal is demodulated using Code Shift Keying (CSK) to obtain a bit stream. Based on the bit stream, CRC check is used to assist in the sliding synchronization process. CRC check soft decision is used to assist in the synchronization and demodulation process of blind burst signals, effectively improving the system transmission performance.

[0046] In an exemplary embodiment, determining that a portion of the intercepted signal exists in the captured signal when the capture threshold of the evaluation function exceeds the determination threshold includes:

[0047] S11, an evaluation function S(Y) is constructed by calculating the correlation value between the intercepted signal and the local signal. The evaluation function S(Y) is expressed as follows:

[0048]

[0049] Where Y represents receiving a burst signal, This represents the maximum value of the correlation function, and N represents the number of symbols present in the burst signal;

[0050] S12, based on the given false alarm probability With the probability density function of the unsent signal Determine the judgment threshold U 0, the false alarm probability The probability of an item not being detected is specifically expressed as follows:

[0051]

[0052] Among them, variables S(Y) represents the evaluation function of the received frame.

[0053] In this embodiment, the receiving end process mainly includes acquisition, synchronization, and demodulation. During burst signal transmission, determining whether a real burst signal has been acquired requires considering the transmitting end state, and two assumptions are made regarding the two states of the transmitting end:

[0054] H 0: No signal sent, probability representation ;

[0055] H 1: Signal sent status, probability representation .

[0056] For a given observation, assuming Y represents the received burst signal, an evaluation function is constructed based on the characteristics of the received frame. S ( Y ), by comparing evaluation functions S ( Y ) and judgment threshold U The presence of a signal frame is determined by a value of 0. Therefore, the detector's discrimination method can be represented by one of the following four cases:

[0057] (1) Probability of no detection: P ( S ( Y )< U 0| H 0), Correct reception status, indicating that the receiver did not detect the presence of a burst signal when no burst signal was sent;

[0058] (2) Probability of being sent and detected: P ( S ( Y )> U 0| H 1) Correct reception status indicates that the receiving end detected a real burst signal when the burst signal was sent;

[0059] (3) The probability of a false alarm not being detected: P ( S ( Y )> U 0| H 0), Error reception status, indicating that no signal was sent, but the receiver generates a false alarm to identify a real burst signal;

[0060] (4) Status of sent but not detected, i.e., probability of missed detection: P ( S ( Y )< U 0| H 1) indicates that the receiver was affected by noise and did not recognize the transmitted burst signal.

[0061] Based on the four transmit / receive states described above, the false alarm probability and the missed detection probability directly determine the complexity and acquisition success rate of the receiver. Given the probability density function of the untransmitted signal... Probability density function of transmitted signal Judgment threshold U When the value is 0, the probability of a false alarm and the probability of a missed detection can be expressed as follows: , .

[0062] For example, such as Figure 6 As shown, the receiver continuously captures a 1-frame length signal and cyclically correlates it with N parallel chirp signals. The sum of the N correlation values ​​is S(Y). Given a false alarm probability... The decision threshold can be obtained using the aforementioned false alarm probability formula. U 0. When S(Y)>U0, the receiver determines that a portion of the burst signal has been captured in the intercepted signal.

[0063] Specifically, assuming that in an additive white Gaussian noise (AWGN) channel, the correlation function R follows a Gaussian distribution,

[0064]

[0065]

[0066] in, Indicates noise power. This indicates taking the average. This represents the modified Bessel function of the first kind in Bessel functions. Represents the Marcum Q function, variables S(Y) represents the evaluation function of the received frame.

[0067] The cumulative probability density of the maximum correlation value can be obtained from the cumulative probability density of the correlation values, as follows.

[0068]

[0069] The probability density of the maximum correlation value is obtained by differentiating the cumulative probability density.

[0070]

[0071] Since there are N symbols in the burst signal, the evaluation function... S ( Y ) is the sum of the maximum values ​​of N related functions, therefore in H In state 0, the probability density function can be represented by a convolution of N times the probability density of a single symbol.

[0072]

[0073] Given a false alarm probability The decision threshold can be obtained. U 0. The receiving end obtains the evaluation function by continuously capturing and intercepting signals. S ( Y Evaluation function for N symbolic short packets. S ( Y It can be constructed from relevant functions.

[0074]

[0075] when S ( Y )> U At 0, it is considered that a signal has been captured. S (Y)< U 0 indicates that there is no short packet structure in the intercepted signal.

[0076] In an exemplary embodiment, the step of extending the signal length of the truncated signal and sending it to the synchronizer for synchronization, and selecting the chip corresponding to the maximum value of the evaluation function as the burst signal synchronization header includes:

[0077] S21, taking the intercepted signal as the center, and combining the extended frame before and after each, a synchronization preparation frame with a length of three frames is obtained.

[0078] S22, each chip in all synchronization preparation frames is used as a preset burst signal header and associated with the local signal;

[0079] S23, Synchronization is completed when the distance between the arrival time of the burst signal and the synchronization point is less than 1 / 2 chip time, and the chip corresponding to the maximum value of the evaluation function is selected as the burst signal head.

[0080] In this embodiment, as Figure 7 As shown, when the receiver successfully captures the signal, the system determines that there is a burst signal in the intercepted signal. To ensure that the receiver contains the complete burst signal (one frame in length), the system extends the intercepted signal by one frame before and after it, resulting in a preparatory frame with a length of three frames.

[0081] Each chip in the synchronization preparation frame is used as a burst signal header and correlated with the local signal. Assuming there are N symbols in the burst signal, and each symbol has q chips, the sum of the N maximum values ​​is taken, resulting in 2Nq+1 evaluation functions. The chip corresponding to the maximum value of the evaluation function is taken as the burst signal header. The method for obtaining the evaluation functions is the same as described above and will not be repeated here.

[0082] When the evaluation function of the sliding correlation frame of the local signal floats smoothly, it is determined that no signal exists. When the signal shows an upward trend, the tail of the sliding correlation frame coincides with the head of the signal. The first peak indicates that the last symbol of the sliding correlation frame completely coincides with the first symbol of the short packet. When the evaluation function reaches its maximum value, it indicates that the sliding correlation frame completely coincides with the burst signal. This is determined to be the burst signal synchronization header, i.e., the arrival time of the burst signal.

[0083] In an exemplary embodiment, the step of demodulating the burst signal using CSK demodulation to obtain a bitstream after determining the arrival time of the burst signal synchronization header positioning information includes:

[0084] S31, iterate through all states of the Chirp-CSK signal and correlate them with the synchronized burst signal;

[0085] S32, determine the synchronization index corresponding to the maximum value of the evaluation function as the decimal information carried by the received signal;

[0086] S33, convert the decimal information into binary information bits to obtain the bit stream.

[0087] In this embodiment, once the receiving end accurately determines the arrival time of the information, the burst signal will enter the demodulation module for information demodulation. The information carried in the short packet can be demodulated only when the local signal and the received symbol carry the same information, resulting in a maximum peak value. Therefore, by iterating through all states of Chirp-CSK and correlating them with the synchronized short packet signal, the synchronization index corresponding to the maximum value is the decimal information carried by the received signal.

[0088] Optionally, the information demodulation process can be represented as follows:

[0089]

[0090]

[0091] in, It is a bitstream of binary information bits, where SF is the spreading factor. Information in decimal format. For related functions.

[0092] In an exemplary embodiment, the step of using CRC checksum to perform auxiliary verification of the sliding synchronization process based on the bit stream includes:

[0093] S41, append the calculated first check code to the data to be sent to form a new data frame and send it to the receiving end;

[0094] S42, the receiving end recalculates the second check code according to the check code generation rules. If the first check code is the same as the second check code, it means that the correct data has been received.

[0095] In this embodiment, Cyclic Redundancy Check (CRC) is mainly used to detect or verify errors that may occur after data transmission or storage. CRC utilizes the principle of division and remainders to achieve error detection. First, a first checksum is calculated based on the principle of modulo-2 division. Then, the obtained checksum is appended to the data to be sent to form a new data frame, which is sent to the receiving end. The receiving end recalculates the second checksum according to the rules of the generated checksum. If they are the same, it means that the correct data has been received; if they are different, it means that the received data is erroneous.

[0096] Specifically, assume a set of lengths is The binary data, after CRC check, has a length of Redundant bit length Assuming the data polynomial Generating polynomials Redundancy check polynomial Initial bit generation The CRC check process involves the following steps:

[0097] Step 1: Generate the polynomial corresponding to the data bits , For the data bits i The value of the bit (0 or 1). This is a variable used to represent the position of a binary digit.

[0098] Step 2: Generate the polynomial , The number of items One item needs to be removed. The calculation method is as follows: As the dividend, first... take x That is, shift left by r bits, then... Use it as a divisor in modulo 2 operations.

[0099] Step 3, in the CRC check algorithm, a frame of data has n = k + r bits, with the first k bits being the data code and the last r bits being the redundancy code. This is calculated from step 3. R(x) After that, R(x) Attached F(x) The CRC data to be transmitted is then formed, and its format is [ F(x) , R(x) ].

[0100] Step 4, data received by the receiving end F'(x)According to modulo 2 division G(x) Conduct an inspection.

[0101] like F'(x) If the result of mod G(x) is 0, it indicates that there were no errors in the data transmission process, and the receiving end will receive the data; if F'(x) If the result of modG(x) is not 0, it indicates that there is an error in the data transmission, and the receiving end discards the data.

[0102] This embodiment utilizes CRC checksum to assist the synchronization process, effectively improving system transmission performance.

[0103] In one exemplary embodiment, the method further includes:

[0104] S51, determine whether the demodulation result using the chip corresponding to the maximum value of the evaluation function as the synchronization header satisfies the CRC check result;

[0105] S52, when the remainder of the modulo 2 division of the received data and the generator polynomial is not 0, take the second largest value of the evaluation function and perform iterative judgment again;

[0106] S53, after multiple iterations, uses the corresponding position that satisfies the CRC check equation as the arrival time of the burst signal.

[0107] In this embodiment, for example, after the receiving end captures the preparation frame, synchronization needs to be performed in the three-frame-long synchronization preparation frame, followed by demodulation. By traversing each sampling point, a total of 2Nq+1 evaluation functions are obtained. The value of the i-th evaluation function corresponds to the frame with the i-th sampling point as the synchronization header in the three frames. Therefore, the sampling point corresponding to the maximum value of the evaluation function can be represented as...

[0108]

[0109] Due to channel noise, the demodulation result of the synchronization header is used to determine whether it satisfies the CRC check result. When the remainder of the modulo-2 division of the received data and the generated multinomial is not zero, the second largest value of the evaluation function is taken for iterative judgment again. After multiple iterations, the position that finally satisfies the CRC check equation is taken as the arrival time of the short packet.

[0110] This embodiment demonstrates that using soft decision-making based on CRC check can effectively improve the joint synchronization and demodulation performance of the system.

[0111] According to another aspect of the embodiments of this application, an apparatus for implementing the above-described method for rapid acquisition and blind synchronization of blind burst signals is also provided. Figure 8 This is a schematic diagram of an optional blind burst signal fast acquisition and blind synchronization device according to an embodiment of this application, as shown below. Figure 8 As shown, the device may include:

[0112] The interception unit 802 is used to continuously intercept a signal of one frame length at the receiving end to capture multiple intercepted signals. When the capture threshold of the evaluation function exceeds the judgment threshold, it is determined that there are some burst signals in the intercepted signals, wherein the signals do not contain pilot structures.

[0113] Synchronization unit 804 is used to extend the signal length of the intercepted signal and send it to the synchronizer for synchronization, and select the chip corresponding to the maximum value of the evaluation function as the synchronization head of the burst signal.

[0114] The demodulation unit 806 is used to demodulate the burst signal using CSK demodulation to obtain a bit stream after the arrival time of the burst signal synchronization header positioning information.

[0115] The verification unit 808 is used to perform auxiliary verification of the sliding synchronization process based on the bit stream using CRC verification.

[0116] It should be noted that the interception unit 802 in this embodiment can be used to perform the above step S102, the synchronization unit 804 in this embodiment can be used to perform the above step S104, the demodulation unit 806 in this embodiment can be used to perform the above step S106, and the verification unit 808 in this embodiment can be used to perform the above step S108.

[0117] Through the above modules, multiple captured signals are obtained by continuously capturing a frame-length signal at the receiving end. When the capture threshold of the evaluation function exceeds the judgment threshold, it is determined that there are some burst signals in the captured signals, wherein the signals do not contain pilot structures. The signal length of the captured signals is extended and sent to the synchronizer for synchronization. The chip corresponding to the maximum value of the evaluation function is selected as the burst signal synchronization header. After locating the arrival time of the burst signal synchronization header, the burst signal is demodulated using CSK demodulation to obtain a bit stream. Based on the bit stream, CRC check is used to assist in the sliding synchronization process. CRC check soft decision is used to assist in the synchronization and demodulation process of blind burst signals, effectively improving the system transmission performance.

[0118] In one exemplary embodiment, the synchronization unit includes:

[0119] The extension module is used to obtain a synchronization preparation frame with a length of three frames by combining the intercepted signal with an extended frame that is extended before and after it.

[0120] The traversal module is used to traverse all the chips in the synchronization preparation frames as preset burst signal headers, which are respectively related to the local signal;

[0121] The synchronization module is used to complete synchronization when the distance between the arrival time of the burst signal and the synchronization point is less than 1 / 2 chip time, and selects the chip corresponding to the maximum value of the evaluation function as the burst signal head.

[0122] It should be noted that the examples and scenarios implemented by the above modules and corresponding steps are the same, but are not limited to the content disclosed in the above embodiments. It should be noted that the above modules, as part of the device, can run in a hardware environment and can be implemented by software or hardware. The hardware environment includes a network environment.

[0123] According to another aspect of the embodiments of this application, a storage medium is also provided. Optionally, in this embodiment, the storage medium can be used to execute the program code of any of the blind burst signal fast acquisition and blind synchronization methods described in the embodiments of this application.

[0124] Optionally, in this embodiment, the storage medium is configured to store program code for performing the following steps:

[0125] S1, the receiving end continuously captures a signal of one frame length to obtain multiple captured signals. When the capture threshold of the evaluation function exceeds the judgment threshold, it is determined that there are some burst signals in the captured signals, wherein the signals do not contain pilot structures.

[0126] S2, after extending the signal length of the intercepted signal, it is sent to the synchronizer for synchronization, and the chip corresponding to the maximum value of the evaluation function is selected as the synchronization head of the burst signal.

[0127] S3, based on the arrival time of the burst signal synchronization head positioning information, the burst signal is demodulated using CSK demodulation to obtain a bit stream;

[0128] S4, based on the bit stream, CRC check is used to perform auxiliary verification of the sliding synchronization process. Optionally, specific examples in this embodiment can refer to the examples described in the above embodiments, and will not be repeated in this embodiment.

[0129] The computer-readable storage medium may include, but is not limited to, any type of disk, including floppy disks, optical disks, DVDs, CD-ROMs, microdrives, as well as magneto-optical disks, ROMs, RAMs, EPROMs, EEPROMs, DRAMs, VRAMs, flash memory devices, magnetic cards or optical cards, nanosystems (including molecular memory ICs), or any type of medium or device suitable for storing instructions and / or data.

[0130] According to another aspect of the embodiments of this application, an electronic device for implementing the above-described method for rapid acquisition and blind synchronization of blind burst signals is also provided. The electronic device may be a server, a terminal, or a combination thereof.

[0131] Figure 9 This is a schematic diagram of the structure of an optional electronic device according to an embodiment of this application, such as... Figure 9 As shown, it includes a processor 902, a communication interface 904, a memory 906, and a communication bus 908. The processor 902, communication interface 904, and memory 906 communicate with each other via the communication bus 908.

[0132] Memory 906 is used to store computer programs;

[0133] When processor 902 executes a computer program stored in memory 906, it performs the following steps:

[0134] S1, the receiving end continuously captures a signal of one frame length to obtain multiple captured signals. When the capture threshold of the evaluation function exceeds the judgment threshold, it is determined that there are some burst signals in the captured signals, wherein the signals do not contain pilot structures.

[0135] S2, after extending the signal length of the intercepted signal, it is sent to the synchronizer for synchronization, and the chip corresponding to the maximum value of the evaluation function is selected as the synchronization head of the burst signal.

[0136] S3, based on the arrival time of the burst signal synchronization head positioning information, the burst signal is demodulated using CSK demodulation to obtain a bit stream;

[0137] S4, based on the bit stream, CRC check is used to perform auxiliary verification of the sliding synchronization process. Optionally, specific examples in this embodiment can refer to the examples described in the above embodiments, and will not be repeated in this embodiment.

[0138] Optionally, the communication bus can be a PCI (Peripheral Component Interconnect) bus or an EISA (Extended Industry Standard Architecture) bus, etc. This communication bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 9 The symbol is represented by a single thick line, but this does not indicate that there is only one bus or one type of bus. The communication interface is used for communication between the aforementioned electronic device and other devices.

[0139] The memory may include RAM, or non-volatile memory, such as at least one disk storage device. Optionally, the memory may also be at least one storage device located remotely from the aforementioned processor.

[0140] As an example, the memory 906 described above may include, but is not limited to, the synchronization unit 804, demodulation unit 806, first solution unit 806, and verification unit 808 from the aforementioned blind burst signal fast acquisition and blind synchronization device. Furthermore, it may include, but is not limited to, other module units from the aforementioned blind burst signal fast acquisition and blind synchronization device, which will not be elaborated upon in this example.

[0141] The processors mentioned above can be general-purpose processors, including but not limited to: CPU (Central Processing Unit), NP (Network Processor), etc.; they can also be DSP (Digital Signal Processor), ASIC (Application Specific Integrated Circuit), FPGA (Field-Programmable Gate Array), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components.

[0142] Optionally, specific examples in this embodiment can refer to the examples described in the above embodiments, and will not be repeated here.

[0143] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, as some steps may be performed in other orders or simultaneously according to this application. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to this application.

[0144] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0145] In the several embodiments provided in this application, it should be understood that the disclosed apparatus can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some service interface; the indirect coupling or communication connection between devices or units may be electrical or other forms.

[0146] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0147] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0148] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage device (CMD). Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a memory and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned memory includes various media capable of storing program code, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.

[0149] Those skilled in the art will understand that all or part of the steps in the various methods of the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, which may include: a flash drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, etc.

[0150] The foregoing description is merely an exemplary embodiment of this disclosure and should not be construed as limiting the scope of this disclosure. Any equivalent changes and modifications made in accordance with the teachings of this disclosure shall still fall within the scope of this disclosure. Those skilled in the art will readily conceive of embodiments of this disclosure upon considering the specification and practicing the disclosure herein. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not described herein. The specification and embodiments are to be considered exemplary only, and the scope and spirit of this disclosure are defined by the claims.

[0151] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0152] Those skilled in the art will readily understand that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for fast acquisition of blind burst signals and blind synchronization, characterized in that, The method comprises the following steps: The receiving end continuously intercepts a frame length of signals to obtain a plurality of intercepted signals, and determines that there is a partial burst signal in the intercepted signals when a capture threshold of an evaluation function exceeds a determination threshold, wherein the signal does not contain a pilot structure; The signal length of the intercepted signal is extended and then sent to a synchronizer for synchronization, and a chip corresponding to a maximum value of the evaluation function is selected as a burst signal synchronization header; After the burst signal synchronization header positioning information reaches a time of arrival, information demodulation is performed on the burst signal by using CSK demodulation to obtain a bit stream; Based on the bit stream, a sliding synchronization process is assisted by using CRC check; The step of determining that there is a partial burst signal in the intercepted signals when the capture threshold of the evaluation function exceeds the determination threshold comprises the following steps: an evaluation function is constructed by calculating a correlation value of the intercepted signal and a local signal S ( Y ), the evaluation function S ( Y ) is expressed as, where Y represents the received burst signal, represents the maximum value of the correlation function, and N represents the number of symbols in the burst signal. based on a given false alarm probability with a non-signal probability density function determining a decision threshold U 0, the false alarm probability is a missed detection probability, specifically represented as, where the variables denotes an evaluation function S(Y) of the received frame; The step of sending the signal length of the intercepted signal to the synchronizer for synchronization after extension, and selecting a chip corresponding to a maximum value of the evaluation function as a burst signal synchronization header comprises the following steps: A synchronization preparation frame with a length of three frames is obtained by taking the intercepted signal as a center and combining a frame extension frame extended before and after the intercepted signal; Chips in all synchronization preparation frames are traversed respectively as preset burst signal headers, and are correlated with a local signal respectively; Synchronization is completed in a case where a distance between a time of arrival of the burst signal and a synchronization point is less than 1 / 2 chip time, and a chip corresponding to a maximum value of the evaluation function is selected as a burst signal header.

2. The method of blind burst signal fast acquisition and blind synchronization as claimed in claim 1, wherein, The step of obtaining a bit stream by using CSK demodulation on the burst signal after the burst signal synchronization header positioning information reaches a time of arrival comprises the following steps: All states of a Chirp-CSK signal are traversed and correlated with the synchronized burst signal; A synchronization index corresponding to a maximum value of an evaluation function is determined as decimal information carried by a received signal; The decimal information is converted into binary information bits to obtain the bit stream.

3. The method of blind burst signal fast acquisition and blind synchronization as claimed in claim 1, wherein, The step of assisting the sliding synchronization process by using CRC check based on the bit stream comprises the following steps: A first check code calculated is attached to data to be sent to form a frame of new data, and the new data is sent to a receiving end; The receiving end recalculates a second check code according to a generation check code rule, and correct data is received if the first check code is the same as the second check code.

4. The method of blind burst signal fast acquisition and blind synchronization as claimed in claim 3, wherein, The method further comprises the following steps: It is judged whether a demodulation result with a chip corresponding to a maximum value of an evaluation function as a synchronization header meets a CRC check result; When a modulo 2 division remainder of received data and a generation polynomial is not 0, a second iteration is performed on a second largest value of the evaluation function; After a plurality of iterations, a corresponding position meeting a CRC check equation is taken as a time of arrival of a burst signal.

5. A blind burst quick acquisition and blind synchronization apparatus for performing the blind burst quick acquisition and blind synchronization method of claim 1, characterized by, The method comprises the following steps: An intercepting unit is configured to continuously intercept a frame length of signals to obtain a plurality of intercepted signals, and determine that there is a partial burst signal in the intercepted signals when a capture threshold of an evaluation function exceeds a determination threshold, wherein the signal does not contain a pilot structure; A synchronization unit is configured to send the signal length of the intercepted signal to a synchronizer for synchronization after extension, and select a chip corresponding to a maximum value of the evaluation function as a burst signal synchronization header. A demodulation unit is configured to perform information demodulation on the burst signal to obtain a bit stream by using CSK demodulation after the burst signal synchronization header positioning information arrives at a time; A check unit is configured to perform auxiliary check on a sliding synchronization process by using CRC check based on the bit stream; The synchronization unit comprises: An expansion module is configured to obtain a synchronization preparation frame with a length of three frames by centering on the intercepted signal and combining a frame of each of the front and rear expansion frames; A traversal module is configured to respectively traverse chips in all the synchronization preparation frames as preset burst signal headers and respectively correlate with a local signal; A synchronization module is configured to complete synchronization in a case where a distance between a burst signal arrival time and a synchronization point is less than 1 / 2 chip time, and select a chip corresponding to a maximum value of an evaluation function as a burst signal header.

6. A computer readable storage medium, characterized in that, The computer readable storage medium comprises a stored program, wherein the program performs the method in any one of claims 1 to 4 when running. 7.An electronic device comprising a memory and a processor, the electronic device characterized by, The memory stores a computer program, and the processor is configured to perform the method in any one of claims 1 to 4 by using the computer program.

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