Embedded microlens
By introducing microlens arrays and micromirror structures into photonic integrated circuits, combined with optical vias and redirection elements, the problems of optical I/O density requirements and space occupation in photonic integrated circuits are solved, achieving efficient optical signal transmission and expansion.
Patent Information
- Application Number
- CN202480020004.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-03-31
- Filing Date
- 2024-03-27
- Publication Date
- 2025-11-04
AI Technical Summary
Existing photonic integrated circuits (PICs) face challenges such as increased density requirements and the space occupied by optical circuit systems on the chip surface during data transmission, and lack effective solutions for photonic I/O expansion and alignment tolerance.
By employing microlens arrays and micromirror structures, combined with optical vias and optical redirection elements, efficient transmission and amplification of optical signals between PICs are achieved. Optical signals are transmitted between PIC chips through microlenses, and high-density optical I/O is realized by utilizing microlens arrays and micromirror reflection paths.
This enables the expansion of high-density optical I/O ports in photonic integrated circuits, reducing chip area footprint and improving data transmission efficiency and alignment tolerance.
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Figure CN120898159A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] Certain aspects of the present disclosure generally relate to photonic integrated circuits (PICs). More particularly, the present disclosure provides optical arrangements for PICs. BACKGROUND
[0002] As data traffic network demands have increased, network companies that previously used traditional copper cables for communication have sought more efficient solutions that can be deployed on a large scale. Currently, fiber optic technology dominates the long-haul communication space. Network companies have gradually shifted to using fiber optics to transmit data over increasingly shorter distances, even within device clusters, and device-to-device or chip-to-chip. With the use of fiber optics, data is transmitted as photons at the speed of light and can be transmitted at a range of data rates, including ultra-high frequencies, thereby allowing higher data volume transmission. SUMMARY
[0003] In one implementation, a photonic integrated circuit is disclosed. The photonic integrated circuit includes a substrate, a buried oxide (BOX) layer disposed above the substrate, a waveguide layer disposed above the BOX layer, a cladding layer disposed above the waveguide layer, and a lens layer disposed above the cladding layer. The waveguide layer includes a waveguide and a micromirror disposed in at least a portion of the waveguide layer. The lens layer includes a microlens aligned with the micromirror.
[0004] In another implementation, a photonic integrated circuit is disclosed. The photonic integrated circuit includes a first waveguide, a second waveguide, and an optical via. The optical via includes a first optical redirecting element and a second optical redirecting element. The first optical redirecting element is configured to reflect an optical signal from the first waveguide to the second optical redirecting element. The second optical redirecting element is configured to reflect the optical signal from the first optical redirecting element to the second waveguide.
[0005] In yet another implementation, a photonic system is disclosed. The photonic system includes a first photonic integrated circuit (PIC) having a first lens disposed on a surface of the first PIC and a second PIC having a second lens disposed on a surface of the second PIC. The first lens is aligned with the second lens such that an optical signal is configured to be transmitted between the first lens and the second lens.
[0006] In yet another implementation, a photonic system is disclosed. The photonic system includes a substrate, a buried oxide (BOX) layer disposed above the substrate, an element layer disposed above the BOX layer, a cladding layer disposed above the element layer, and a lens layer disposed above the cladding layer. The element layer includes an element. The lens layer includes a microlens aligned with the element. BRIEF DESCRIPTION OF DRAWINGS
[0007] So that the manner in which the above recited features of the present disclosure can be understood in detail, a more particular description of the disclosure, briefly summarized above, can be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings
[0008] Figure 1 is a perspective view of a portion of an exemplary co-packaged optical and electrical elements according to an embodiment.
[0009] Figure 2A shows an exemplary photonic integrated circuit (PIC) implemented with a microlens array according to an embodiment.
[0010] Figure 2B shows a first optical configuration of a PIC according to an embodiment.
[0011] Figure 2C shows a second optical configuration of a PIC with micromirrors according to an embodiment.
[0012] Figure 2D shows a microlens array according to an embodiment.
[0013] Figure 2E shows a fresnel lens according to an embodiment.
[0014] Figure 2F shows a planar optical device according to an embodiment.
[0015] Figure 3 shows a photonic system according to an embodiment.
[0016] Figure 4A shows an optical via of a PIC according to an embodiment.
[0017] Figure 4B shows a PIC with an optical via according to an embodiment.
[0018] Figure 5 shows an exemplary electronic and optical element including a PIC according to an embodiment.
[0019] Figure 6 shows a flowchart of a method of forming a photonic element according to an embodiment.
[0020] Figures 7A to 7D shows a schematic cross-sectional view of a photonic element during a method of Figure 6 according to an embodiment.
[0021] Figure 8A flowchart of a method 800 of forming a photonic element according to an embodiment is shown.
[0022] Figures 9A to 9G A schematic cross-sectional view of a photonic element during a method according to an embodiment is shown. Figure 8
[0023] Figure 10 A flowchart of a method of forming a photonic system according to an embodiment is shown.
[0024] Figure 11 A flowchart of a method of forming an electronic and optical element including a PIC according to an embodiment is shown.
[0025] For the purposes of promoting an understanding of the principles of the application, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements and features of one embodiment can be beneficially incorporated into other aspects without further recitation. DETAILED DESCRIPTION
[0026] Certain aspects of the present disclosure generally relate to photonic integrated circuits (PICs). More particularly, the present disclosure provides optical arrangements for PICs.
[0027] Figure 1 is a perspective view of a portion of an example co-packaged optical and electrical element 100 including an electrical or opto-electrical chip 102 connected to a photonic integrated interconnect unit 103 by a plurality of optical waveguides or electrical traces interconnects 104, wherein all of the foregoing are formed or disposed on a package substrate 101. In an aspect, the electrical or opto-electrical chip 102 can comprise any high-density chip having a high input / output (I / O) pin count. In one example, the high-density chip has between 100 and 2000 I / O pins or up to and greater than 2000 I / O pin count. Examples of the electrical or opto-electrical chip 102 include, but are not limited to, data center SWITCH chips, artificial intelligence (AI) chips, and the like.
[0028] The photonic integrated interconnect unit 103 includes a fiber optic connector region configured to couple to the fiber optic connector 112 for removably connecting the fiber optic cable 120 to the photonic integrated interconnect unit 103. In an aspect, the fiber optic cable 120 can be inserted into the fiber optic connector 112 to operably connect the fiber optic cable 120 to the co-packaged optical and electrical elements 100. In an aspect, the photonic integrated interconnect unit 103 is configured for connecting fiber optic cables 120 including, but not limited to, single mode fiber optic cables having a 9 micron fiber core diameter. The fiber optic connector 112 can further include a plurality of optical fibers to operably connect the fiber optic cable 120 to the photonic integrated interconnect unit 103.
[0029] In an aspect, the photonic integrated interconnect unit 103 in the co-packaged electrical and optical element group is configured to transmit signals between the electrical or opto-electrical chip 102 and the fiber optic cable 120 connected to the photonic integrated interconnect unit 103. The photonic integrated interconnect unit 103 includes a photonic glass layer (PGL) substrate 106, a plurality of optical structures 110 integrally formed with or on the PGL substrate 106, an optical transceiver integrated circuit (SiPho chip) 108 mounted on the PGL substrate 106 and coupled to the plurality of optical structures 110 at a first interface 107, and a fiber optic connector 112 connected to both the PGL substrate 106 and the plurality of optical structures 110 at a second interface 109.
[0030] In an aspect, the SiPho chip 108 in the photonic integrated interconnect unit 103 operates to convert electrical signals to optical signals and vice versa. The plurality of optical structures 110 in the photonic integrated interconnect unit 103 operate to transmit optical signals between the SiPho chip 108 and the fiber optic connector 112, and the optical waveguide or electrical trace interconnect 104 operates to transmit electrical or optical signals between the photonic integrated interconnect unit 103 (specifically, the SiPho chip 108) and the electrical or opto-electrical chip 102. The optical waveguide or electrical trace interconnect 104 can include metal traces formed within the package substrate 101, which in some aspects can include metal traces formed in a printed circuit board (PCB) substrate or within a plurality of redistribution layers (e.g., dielectric-containing layers) formed over a solid core substrate (e.g., a silicon or glass core substrate).
[0031] The photonic engine can further include one or more electronic entity chips 111 coupled to the SiPho chip 108, as appropriate. The electronic entity chips 111 are generally used to assist the operations performed by the optical chip. In one aspect, the electronic entity chips 111 are operatively connected to the SiPho chip 108 to assist the SiPho chip 108 with various electrical functions. As shown, the electronic entity chips 111 can be mounted on top of the SiPho chip 108 and thereby directly connected to the SiPho chip 108. Alternatively, the electronic entity chips 111 can be embedded in the PGL substrate 106 and connected to the SiPho chip 108 through the PGL substrate 106, which is often referred to herein simply as the substrate 106. Additionally, the electronic entity chips 111 can be mounted on or embedded in the package substrate 101 and connected to the SiPho chip 108 through the electrical trace interconnects 104. In some aspects, a photonic integrated circuit (PIC), such as the SiPho chip 108, can include micro-lenses so that optical signals can be transferred between the PICs using the micro-lenses, as described in greater detail herein.
[0032] Electrical micro-bumps are commonly used as two-dimensional electrical signal input / output (I / O) interfaces in computer chips that allow for a large amount of data I / O (e.g., providing density and communication speed). The demand for data I / O density on photonic ICs (PICs) is increasing, but is limited due to the lack of ways to make scalable and alignment-tolerant photonic I / O. Furthermore, large areas of the PIC surface can be occupied by optical circuitry (e.g., optical mode volume converters and fiber attachments), taking up valuable real estate of the chip surface. Certain aspects of the present disclosure provide techniques for enabling optical I / O ports on a PIC without losing valuable real estate of the PIC chip area by routing optical signals from one side of the chip to the other side by incorporating a dense array of fiber I / O micro-lenses. Other aspects relate to techniques for using micro-lenses to form scalable and large alignment-tolerant optical data I / O.
[0033] Figure 2A An example photonic integrated circuit (PIC) 200 is shown implemented with a micro-lens array 226. Micro-lenses and micro-mirrors can be integrated into the PIC on one side of the PIC 200 (e.g., the backside of the chip) as a two-dimensional fiber input / output (I / O) array. As shown, the micro-lens array 226 can include micro-lenses, such as micro-lens 214. The micro-lens 214 can be a micro-lens array 221 ( Figure 2D ), a Fresnel lens 223 ( Figure 2E ), or a planar optic 224 ( Figure 2F). The planar optical device can be a metasurface. The microlens 214 can be made of an organic liquid. The microlens 214 can be implemented by the optical configuration 200B or the optical configuration 200C (or a combination of the optical configurations 200B, 200C). The PIC can include one or more photonic circuits 201.
[0034] Figure 2B An optical configuration 200B of the PIC 200 is shown. As shown in the optical configuration 200B, a buried oxide (BOX) layer 204 can be formed over a substrate 202 (e.g., a silicon substrate). A waveguide layer 206 can be formed on the BOX layer 204, which can include an element 220. The element 220 is an optical component having a periodic structure that diffracts light into several beams that travel in different directions (e.g., different diffraction angles). For example, the element 220 can change a propagation direction of an optical signal from the waveguide layer 206 such that the optical signal propagates to a microlens 214 formed over the element 220. The element 220 is a grating coupling, a waveguide, a mode-volume converter, a laser, a light emitting diode (LED), a VECEL, a DNA cell, or an on-chip biological element. A cladding layer 208 is disposed over the waveguide layer 206. The cladding layer 208 includes the microlens 214. The cladding layer 208 is an optical dielectric film. The optical dielectric film includes, but is not limited to, aSi, SiO, SiN, TiO, TaO, NbO, AlO, CrO, MgO, or any combination thereof. The cladding layer 208 can include the same material as the waveguide layer 206.
[0035] The cladding layer 208 can be formed over the waveguide layer 206, where the microlens 214 can be formed in the cladding layer 208. The cladding layer 208 can be disposed over the waveguide layer 206. The cladding layer 208 can include, for example, amorphous silicon (aSi), silicon oxide (SiOx), silicon nitride (SiNx), titanium oxide (TiOx), tantalum oxide (TaOx), niobium oxide (NbOx), aluminum oxide (AlOx), chromium oxide (CrOx), magnesium oxide (MgOx), or any combination thereof.
[0036] Figure 2CAn optical configuration 200C of the PIC 200 with micromirrors 212 is shown. For example, multiple photonic components can be integrated into a PIC as a two-dimensional fiber input / output (I / O) array. As shown, the optical configuration 200C of the PIC 200 includes the micromirrors 212 and microlenses 214 aligned with the micromirrors 212. The micromirrors 212 can be disposed adjacent to the waveguide layer 206. The micromirrors 212 reflect optical signals from the waveguide layer 206 toward the microlenses 214. In some cases, the optical configuration 200C of the PIC 200 can include the waveguide layer 206 that guides electromagnetic waves in an optical spectrum (e.g., an optical light spectrum). The waveguide layer 206 can be arranged to emit electromagnetic waves in a radiation path 218 that intersects at least a portion of the micromirrors 212. Electromagnetic waves that impinge on the micromirrors 212 can be reflected in a reflection path 219 (e.g., an optical reflection path) that intersects at least a portion of the microlenses 214. The radiation pattern of the electromagnetic waves can be adjusted by the microlenses 214. For example, the microlenses 214 can expand (or focus) the radiation beams reflected from the micromirrors 212 and / or emitted from the photonic elements 228.
[0037] In certain aspects, the optical configuration 200C of the PIC 200 can include a substrate 202 (e.g., a silicon substrate), a buried oxide (BOX) layer 204, a waveguide layer 206, a cladding layer 208, and a lens layer 210. The BOX layer 204 can be disposed above the substrate 202. The waveguide layer 206 can be disposed above the BOX layer 204. In some cases, the sidewalls of the waveguide can be coated for anti-reflection and protection. The cladding layer 208 can be disposed above the waveguide layer 206. The cladding layer 208 can include, for example, amorphous silicon (aSi), silicon oxide (SiOx), silicon nitride (SiNx), titanium oxide (TiOx), tantalum oxide (TaOx), niobium oxide (NbOx), aluminum oxide (AlOx), chromium oxide (CrOx), magnesium oxide (MgOx), or any combination thereof. At least one lens layer 210 can be disposed above the cladding layer 208. The lens layer 210 includes the microlenses 214. The lens layer 210 can include an optical dielectric film. The optical dielectric film can include, for example, aSi, SiO, SiN, TiO, TaO, NbO, AlO, CrO, MgO, or any combination thereof. In some cases, the lens layer 210 can include the same material as the cladding layer 208.
[0038] The micromirror 212 can include an optically reflective surface, such as a reflective metal or metal alloy. The micromirror 212 can include, for example, aluminum (Al), silver (Ag), copper (Cu), gold (Au), chromium (Cr), titanium (Ti), or any combination thereof. As an example, the micromirror 212 can be formed by metal deposition on an etched slanted bottom, as further described herein. The micromirror 212 can be slanted (sloped or inclined) at a particular angle 222 to facilitate the reflective path 219 intersecting the microlens 214. For example, the micromirror 212 can be slanted at an angle of 0 degrees to 90 degrees relative to a plane 225, which can be parallel to the waveguide layer 206 and / or the lens layer 210. In certain aspects, the sidewalls of the etched cavity of the micromirror 212 can be coated with an anti-reflective coating. For certain aspects, the micromirror 212 can be coated with a protective coating, such as an oxide protection. The coating can include a dielectric film, including, for example, SiO, SiN, TiO, NbO, TaO, AlO, or any combination thereof.
[0039] The microlens 214 can include any suitable optical lens, including, for example, a microlens array (e.g., a microlens array with a pitch of 1 micron to 100 microns), Figure 2D ), a Fresnel lens (e.g., a nano / micro-processed Fresnel lens), Figure 2E ), a planar optical device (e.g., a metasurface), Figure 2F ), or any combination thereof. The planar optical device can include a metasurface. The Fresnel lens can be nano / micro-processed. For the planar optical device, a plurality of layers can be deposited over the cladding layer 208. For example, the planar optical device or metasurface can include an array of nano / micro-structured pillars. The microlens 214 can be made of an organic liquid. The size of the microlens 214 can be from 100 nanometers (nm) to 1000 micrometers (pm). The microlens 214 can be aligned with the micromirror 212. For example, the microlens 214 can be arranged in the reflective path 219 of the micromirror 212. The microlens 214 can be formed by deposition of one or more layers (or films) of the lens layer 210. For example, the lens layer 210 can be deposited by chemical vapor deposition (CVD), physical vapor deposition (PVD), and / or atomic layer deposition (ALD). The lens layer 210 can have a thickness of 100 nm to 1000 pm as a single layer (or film) or as a stack of multiple layers (or films). The microlens 214 can be formed by patterning, such as photolithography, nanoimprint lithography (NIL), gray-tone lithography, e-beam lithography, etching, focused ion beam milling, ion milling, or a combination thereof.
[0040] In some aspects, gap filler 240 may be disposed between micromirror 212 and microlens 214. Gap filler 240 may be disposed above micromirror 212 to facilitate the formation or placement of microlens 214 above micromirror 212. Gap filler 240 may comprise any dielectric film, including, for example, silicon oxide (SiOx), silicon nitride (SiNx), titanium oxide (TiOx), or combinations thereof. In some cases, gap filler 240 may be removed from PIC 200, as further described herein.
[0041] In some respects, photonic element 228 may be arranged in a radiation pattern 230 associated with microlens 214. Photonic element 228 may include silicon photonic elements, including, for example, grating couplings, waveguides, mode-to-volume converters, lasers, light-emitting diodes (LEDs), vertical-external-cavity surface-emitting lasers (VECSELs), microfluidic devices, deoxyribonucleic acid (DNA) cells, on-chip bio-elemental devices, or combinations thereof.
[0042] Although this article describes the waveguide layer 206 that emits electromagnetic radiation and the micromirror 212 that reflects the radiation to the microlens 214. Figure 2C The examples depicted herein are not exhaustive, but aspects of this disclosure can also be applied to electromagnetic radiation traveling in the opposite direction. For example, electromagnetic radiation can pass through microlens 214, which can focus or disperse the radiation. Electromagnetic radiation emitted from microlens 214 can strike micromirror 212, which can reflect the electromagnetic radiation to waveguide layer 206. In this case, radiation path 218 can represent reflection path 219, and reflection path 219 can represent radiation path.
[0043] Figure 3 Photonic system 300 is illustrated. Photonic system 300 includes a first PIC 302 and a second PIC 304 having microlenses aligned for optical communication. First PIC 302 may include microlenses 306, 308. Second PIC 304 may include microlenses 310, 312. As shown, first microlens 306 may be aligned with first microlens 310 (e.g., on the vertical axis) to allow optical signals (e.g., light beams) to propagate between first microlenses 306, 310, as illustrated. Similarly, second microlens 308 may be aligned with second microlens 312 (e.g., on the vertical axis) to allow optical signals (e.g., light beams) to propagate between second microlenses 308, 312, as illustrated.
[0044] The first PIC 302 can have an array of embedded microlenses (e.g., including first microlens 306 and second microlens 308) on its surface (e.g., the top surface or both the top and bottom surfaces). The second PIC 304 can also have an array of embedded microlenses (e.g., first microlens 310 and second microlens 312). The positions of the PICs 302, 304 can be arranged such that the microlenses are aligned. In some aspects, the distance between the microlenses (e.g., first microlenses 306, 310) can be any distance between 1 nm and 10 mm. Signals can be transmitted between the two PICs by a light beam that propagates in and out through the microlenses on either / both PICs. The embedded microlenses can allow for in-plane alignment tolerances of up to tens of microns (e.g., 30 pm can be a target).
[0045] Figure 4A An optical via 400 of a PIC (e.g., PIC 200) is shown. Figure 4B A PIC (e.g., PIC 200) with an optical via 400 is shown. An opening 408 can be formed in the PIC 200. The opening 408 can be a hole (e.g., a hole from one side of the substrate to the other side of the substrate) through at least a portion of the substrate of the PIC 200. A first mirror 404 and a second mirror 406 can be disposed in the opening 408. The first mirror 404 and the second mirror 406 can be configured to redirect light from one side of the PIC 200 to the other side of the PIC 200. An optical signal 402 from a first waveguide 430 can arrive at the first mirror 404 from one side of the PIC toward a first surface 410. The optical signal 402 can be reflected by the first mirror 404 toward the second mirror 406. The second mirror 406 reflects the optical signal 402 to propagate along a side toward a second surface 412 (e.g., through a second waveguide 440 disposed along the second surface 412). An array of microlenses (e.g., microlens array 226) can be disposed on the second surface 412. Thus, the optical signal propagating along the second surface 412 can be directed to a microlens 214 of the microlens array 226. In some aspects, the optical via 400 can be implemented for each waveguide 430, 440 to propagate an optical signal to a respective microlens 214. As shown, the optical via 400 can propagate optical signals to / from the microlens array 226 and optical circuitry 450, which can be implemented on the first surface 410. Although the optical via 400 is implemented with mirrors 404, 406 for redirecting the optical signal, any optical redirecting element (e.g., a mirror, a micromirror, or a grating) can be used.
[0046] Figure 5An example electronic and optical component 500 including a PIC 200 is shown. The PIC 200 can be implemented with the optical via 400 to transfer optical signals from one side of the PIC 200 to another side of the PIC 200. The optical signals can be provided to a microlens array 226 implemented on the second surface 412. As shown, the microlens array 226 can be implemented on the second surface 412 facing up, allowing the first surface 410 to be electrically coupled to an electrical IC (EIC) 510, as shown, for example, by electrical connection elements. As shown, the EIC 510 can be electrically coupled to an interposer 512 on which a graphical processing unit (GPU) 514 can be disposed.
[0047] As described, the second surface 412 of the PIC 200 can have a fiber I / O array while the first surface 410 has electronic microbumps. After flip-chip, electrical signals are provided from the EIC 510 through the electronic microbumps while optical signals are in and out through the fiber I / O array at the second surface 412 of the PIC 200. As described herein, a number of holes (e.g., openings) are created in the substrate 202 along the thickness direction. The two ends of the holes can have optical structures (e.g., mirrors, micromirrors, gratings) that redirect light that is passing along the surface (e.g., horizontal direction) to the vertical direction, so that light from one side of the PIC 200 is directed to the other side of the PIC 200. Thus, a fiber I / O array can be disposed on one side (e.g., the second surface 412) and electrical I / O can be disposed on the first surface 410. The PIC 200 can be flipped so that the electrical I / O side faces and connects to another electrical chip, as described. In some aspects, the fiber I / O side can face up and connect to an array of optical fibers.
[0048] Figure 6 A flowchart of a method 600 of forming a photonic component is shown. FIG. 7 shows a schematic cross-sectional view of a photonic component during the method 600. The photonic component (e.g., the SiPho chip 108) includes a photonic assembly (e.g., the optical configuration 200B of the PIC 200). The method 600 can be performed, for example, by a manufacturing facility or system.
[0049] At Figure 7A As shown at operation 602, an input component 704 can be obtained or formed. The input component can include a substrate 202, a buried oxide (BOX) layer 204, a waveguide layer 206, and a cladding layer 208. The BOX layer 204 can be disposed over the substrate 202. The waveguide layer 206 can be disposed over the BOX layer 204. The cladding layer 208 can be disposed over the waveguide layer 206. The waveguide layer can include the waveguide layer 206.
[0050] At operation 604, as Figure 7BAs shown, element 220 may be formed through at least cladding layer 208 and waveguide layer 206 (or within cladding layer 208 and waveguide layer 206). Element 220 may be formed using any suitable etching process, such as wet etching and / or dry etching. An etching process may be performed to selectively remove a portion of cladding layer 208 and waveguide layer 206. For example, the etching depth may be from 100 nm to 1000 μm, and the etching diameter may be from 100 nm to 1000 μm.
[0051] Depending on the situation, proceed with operation 606, such as Figure 7C As shown, the lens layer 210 may be formed over the cladding layer 208. For example, the lens layer 210 may be formed over the cladding layer 208 by a deposition process. For example, the lens layer 210 may be deposited by chemical vapor deposition (CVD), physical vapor deposition (PVD), and / or atomic layer deposition (ALD). The lens layer 210 may include, for example, aSi, SiO, SiN, TiO, TaO, NbO, AlO, CrO, MgO, or any combination thereof. For example, the lens layer 210 may have a thickness from 100 nm to 1000 μm.
[0052] Depending on the circumstances, Yu Ru Figure 7D In operation 608, microlens 214 may be formed in lens layer 210. For example, lens layer 210 may be patterned to form microlens 214. Microlens 214 may be disposed above cladding layer 208. Lens layer 210 may be patterned by photolithography, nanolithography (NIL), grayscale lithography, electron beam lithography, etching, focused ion beam polishing, ion polishing, or any combination thereof. In some cases, microlens 214 includes a Fresnel lens, a planar optics device, or a metasurface. Microlens 214 is aligned with element 220. Microlenses may include organic liquids and have a diameter from about 100 nm to about 1000 μm. In some embodiments, operation 608 is repeated to form a plurality of microlenses 214. For example, a second lens layer is disposed above lens layer 210, and the second lens is patterned in the second lens layer. The second lens layer is aligned with element 220.
[0053] Figure 8 A flowchart of a method 800 for forming a photonic element is shown. Figure 9 shows a schematic cross-sectional view of the photonic element during method 800. The photonic element (e.g., SiPho chip 108) includes photonic components (e.g., optical configuration 200C of PIC 200). Method 800 may be performed, for example, by a manufacturing facility or system.
[0054] At Figure 9AAs shown in operation 802, an input element 904 can be obtained or formed. The input element can include a substrate 202, a buried oxide (BOX) layer 204, a waveguide layer 206, and a cladding layer 208. The BOX layer 204 can be disposed over the substrate 202. The waveguide layer 206 can be disposed over the BOX layer 204. The cladding layer 208 can be disposed over the waveguide layer 206. The waveguide layer can include the waveguide layer 206.
[0055] At operation 804, as shown in Figure 9B the cavity 908 can be formed through (or in) at least the cladding layer 208 and the waveguide layer 206. In some cases, the cavity 908 can be formed in at least a portion of the BOX layer 204. In other embodiments, the cavity 908 can intersect the BOX layer 204, the waveguide layer 206, and / or the cladding layer 208. The cavity 908 can be formed using any suitable etching process, such as a wet etching process and / or a dry etching process. The cavity 908 can be formed to have a sloped surface, for example, with an angle of 0 degrees to 90 degrees. The etching process can be performed to selectively remove a portion of the cladding layer 208, the waveguide layer 206, and / or the BOX layer 204. For example, the etching depth can be 100 nm to 1000 μιη, and the etching diameter can be 100 nm to 1000 μιη.
[0056] At operation 806, as shown in Figure 9C the micromirror 212 can be formed in the cavity 908. For example, the micromirror 212 can be formed by deposition of a reflective metal or metal alloy. The micromirror 212 can include, for example, aluminum (Al), silver (Ag), copper (Cu), gold (Au), chromium (Cr), titanium (Ti), or any combination thereof. The micromirror 212 can be disposed in at least a portion of the waveguide layer 206. In some cases, the micromirror can be disposed in the cavity 908 that intersects the BOX layer 204, the waveguide layer 206, and / or the cladding layer 208. In some cases, a coating can be applied to the sidewalls of the cavity 908 and / or the micromirror 212. For example, an anti-reflective coating can be formed on the sidewalls of the cavity 908. In certain cases, a protective coating can be formed on the micromirror 212, such as an oxidation protection. The coating can include a dielectric film, including, for example, SiO, SiN, TiO, NbO, TaO, AlO, or any combination thereof.
[0057] At operation 808, as shown in Figure 9DAs shown, a gap fill 240 can be formed over the micromirror 212 in the cavity 908. The gap fill 240 can be formed in the cavity 908 by a deposition process. A planarization process (e.g., a chemical mechanical planarization (CMP) process) can be performed to smooth an upper surface of the gap fill 240. The gap fill 240 can include any dielectric film, including, for example, silicon oxide (SiOx), silicon nitride (SiNx), titanium oxide (TiOx), or combinations thereof.
[0058] Optionally, at operation 810, as shown, Figure 9E As shown, a lens layer 210 can be formed over the cladding layer 208 and the gap fill 240. For example, the lens layer 210 can be formed over the cladding layer 208 and the gap fill 240 by a deposition process. For example, the lens layer 210 can be deposited by chemical vapor deposition (CVD), physical vapor deposition (PVD), and / or atomic layer deposition (ALD). The lens layer 210 can include, for example, aSi, SiO, SiN, TiO, TaO, NbO, AlO, CrO, MgO, or any combination thereof. For example, the lens layer 210 can have a thickness of 100 nm to 1000 pm.
[0059] Optionally, at operation 812, as shown, Figure 9F The microlens 214 can be formed in the lens layer 210. For example, the lens layer 210 can be patterned to form the microlens 214. The microlens 214 can be disposed over the cladding layer 208, with the microlens aligned with the micromirror 212. The lens layer 210 can be patterned by photolithography, nanoimprint lithography (NIL), gray-tone lithography, e-beam lithography, etching, focused ion beam milling, ion milling, or any combination thereof. It will be appreciated that any suitable microlens can be disposed over the micromirror 212, such as the patterned microlenses described herein with respect to operations 810, 812. In some cases, a Fresnel lens, a flat optic, or a metasurface can be disposed over the micromirror 212. Optionally, at operation 814, as shown, Figure 9G The gap fill 240 can be removed from the cavity 908.
[0060] Figure 10A flowchart of a method 1000 of forming a photonic system 300 is shown. The method 1000 can be performed, for example, by a manufacturing facility. At operation 1002, the manufacturing facility can form a first PIC (e.g., the first PIC 302) with a first lens (e.g., the first microlens 306) disposed on a surface of the first PIC. The first PIC 302 can be formed using the method 600 or the method 800. At operation 1004, the manufacturing facility can form a second PIC (e.g., the second PIC 304) with a second lens (e.g., the first microlens 310) disposed on a surface of the second PIC 304. The second PIC 304 can be formed using the method 600 or the method 800. At operation 1006, the manufacturing facility can align the first microlens 306 with the first microlens 310 such that a light beam is transmitted between the first microlens 306 and the first microlens 310. In some aspects, the first microlens 306 is aligned with the first microlens 310 such that the surface of the first PIC 302 and the surface of the second PIC 304 are in a facing relationship. In some aspects, the first microlens 306 is part of a first array of lenses (e.g., corresponding to the microlens array 226) and the first microlens 310 is part of a second array of lenses. The manufacturing facility can align the first array of lenses and the second array of lenses, respectively. In some aspects, forming the first PIC 302 can include forming a waveguide (e.g., the waveguide layer 206) and forming an element 220 (e.g., a grating) or a mirror (e.g., the micromirror 212) to change a direction of an optical signal from the waveguide to the first microlens 306.
[0061] Figure 11 A flowchart of a method 1100 of forming an electronic and optical element 500 including the PIC 200 is shown. The method 1100 can be performed, for example, by a manufacturing facility. At operation 1102, the manufacturing facility can form a first waveguide (e.g., the first waveguide 430) in the PIC 200. At operation 1104, the manufacturing facility can form a second waveguide (e.g., the second waveguide 440) in the PIC 200. At operation 1106, the manufacturing facility can form an optical via (e.g., the optical via 400) with a first optical redirecting element (e.g., the first mirror 404) and a second optical redirecting element (e.g., the second mirror 406) in the PIC 200. The first mirror 404 element reflects an optical signal (e.g., the optical signal 402) from the first waveguide 430 to the second mirror 406. The second mirror 406 reflects the optical signal from the first mirror 404 to the second waveguide 440.
[0062] As appropriate, at operation 1108, the fabrication facility can form a lens (e.g., micro-lens 214) and form an element 220 or micro-lens 212 in the PIC to change the direction of the optical signal from the second mirror 406 toward the micro-lens 214. In some aspects, the micro-lens 214 can be formed on a second surface (e.g., second surface 412) on the first surface 410 of the PIC. The second waveguide 440 can be formed along the second surface 412, and the first waveguide 430 can be formed along the second surface 412 of the PIC opposite the first surface 410. In some aspects, the fabrication facility can form an electrical connection element (e.g., for coupling to the EIC 510) coupled to the first surface 410 of the PIC. In some aspects, the fabrication facility can form optical circuitry on the second surface 412 of the PIC and coupled to the first waveguide 430.
[0063] While the foregoing is directed to aspects of the present disclosure, other and further aspects of the disclosure can be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.
Claims
1. A photonic integrated circuit, the photonic integrated circuit comprising: substrate; An embedded oxide (BOX) layer is disposed above the substrate; A waveguide layer is disposed above the BOX layer, and the waveguide layer includes a waveguide; Micromirrors, wherein the micromirrors are disposed in at least a portion of the waveguide layer; A cladding layer is disposed above the waveguide layer; as well as A lens layer is disposed above the covering layer, and the lens layer has microlenses aligned with the micromirrors.
2. The photonic integrated circuit as described in claim 1, wherein: The micromirrors comprise aluminum (Al), silver (Ag), copper (Cu), gold (Au), chromium (Cr), titanium (Ti), or any combination thereof; and The optical reflection path associated with the micromirror intersects with at least a portion of the microlens.
3. The photonic integrated circuit of claim 1, wherein the photonic integrated circuit further comprises a gap-filling material disposed between the micromirror and the microlens.
4. The photonic integrated circuit of claim 1, wherein the lens layer comprises amorphous silicon (aSi), silicon oxide (SiOx), silicon nitride (SiNx), titanium oxide (TiOx), tantalum oxide (TaOx), niobium oxide (NbOx), aluminum oxide (AlOx), chromium oxide (CrOx), magnesium oxide (MgOx), or a combination thereof.
5. The photonic integrated circuit of claim 1, wherein the microlens comprises a microlens array, a Freyner lens, a planar optical device, or a combination thereof.
6. The photonic integrated circuit of claim 1, wherein the micromirror may be coated with a protective coating comprising SiO, SiN, TiO, NbO, TaO, AlO, or any combination thereof.
7. The photonic integrated circuit of claim 1, wherein the cladding layer comprises amorphous silicon (aSi), silicon oxide (SiOx), silicon nitride (SiNx), titanium oxide (TiOx), tantalum oxide (TaOx), niobium oxide (NbOx), aluminum oxide (AlOx), chromium oxide (CrOx), magnesium oxide (MgOx), or any combination thereof.
8. A photonic integrated circuit, the photonic integrated circuit comprising: First waveguide; Second waveguide; and An optical aperture having a first optical redirection element and a second optical redirection element, wherein the first optical redirection element is configured to reflect an optical signal from a first waveguide to the second optical redirection element, and wherein the second optical redirection element is configured to reflect the optical signal from the first optical redirection element to the second waveguide.
9. The photonic integrated circuit of claim 8, wherein each of the first optical redirection element or the second optical redirection element comprises a mirror or a grating.
10. The photonic integrated circuit of claim 8, wherein the photonic integrated circuit further comprises: Lenses; and A third optical redirection element is configured to change the direction of the optical signal from the second optical redirection element toward the lens.
11. The photonic integrated circuit as claimed in claim 10, wherein: The lens is disposed on a first surface of a first surface of the photonic integrated circuit, wherein the second waveguide is disposed along the first surface, and wherein the first waveguide is disposed along a second surface of the photonic integrated circuit opposite to the first surface.
12. The photonic integrated circuit of claim 11, wherein the photonic integrated circuit further includes an electrical connection element coupled to the second surface on the second surface of the photonic integrated circuit.
13. A photonic system, the photonic system comprising: A first photonic integrated circuit (PIC), wherein a first lens is disposed on the surface of the first PIC; and A second PIC, wherein a second lens is disposed on the surface of the second PIC, wherein the first lens is aligned with the second lens such that an optical signal is configured to be transmitted between the first lens and the second lens.
14. The photonic system of claim 13, wherein the surface of the first PIC and the surface of the second PIC are in a face-to-face relationship.
15. The photonic system of claim 13, wherein: The first array of lenses includes the first lens; and The second array of lenses includes the second lens, and the first array of lenses is aligned with the second array of lenses.
16. The photonic system of claim 13, wherein the first PIC comprises: waveguide; and A grating or mirror configured to change the direction of the optical signal from the waveguide to the first lens.
17. A photonic system, the photonic system comprising: substrate; An embedded oxide (BOX) layer is disposed above the substrate; A component layer is disposed above the BOX layer, and the component layer has components; A covering layer is disposed above the component layer; as well as A lens layer is disposed above the covering layer, and the lens layer has microlenses aligned with the element.
18. The system of claim 17, wherein the element is a grating coupler, waveguide, mode-to-volume converter, laser, LED, VECEL, DNA cell, or on-chip bio-element.
19. The system of claim 17, wherein the element layer is a waveguide and the element is a grating.
20. The system of claim 17, wherein the lens layer comprises amorphous silicon (aSi), silicon oxide (SiOx), silicon nitride (SiNx), titanium oxide (TiOx), tantalum oxide (TaOx), niobium oxide (NbOx), aluminum oxide (AlOx), chromium oxide (CrOx), magnesium oxide (MgOx), or combinations thereof.