A high-voltage pulse calibration method and system based on distributed deployment

Abstract

The embodiment of the specification discloses a high-voltage pulse calibration method and system based on distributed deployment, relates to the technical field of high-voltage pulse measurement, and comprises the following steps: determining an optimal divider series and a corresponding optimal divider combination based on a target measurement voltage, a total number of distributed small dividers, a maximum output voltage and an uncertainty parameter; each voltage generation module of a full-solid multi-stage voltage generator is connected with a distributed small divider; the distributed small dividers corresponding to the optimal divider combination are started to measure the voltage of the corresponding voltage generation module, and the measurement voltage of each stage of divider is obtained; the measurement voltage of each stage of divider is calibrated with a corresponding standard source, and the calibration coefficient of each stage is obtained; the measurement voltage of each stage of divider is corrected by using the calibration coefficient of each stage, and the corrected measurement voltage of each stage is obtained; and based on the corrected measurement voltage of each stage, the overall output voltage signal is obtained, so that the problem of low high-voltage pulse measurement precision of the full-solid multi-stage pulse voltage generator is solved.

Description

Technical Field

[0001] This application relates to the field of high-voltage pulse measurement technology, and more specifically, to a high-voltage pulse calibration method and system based on distributed deployment. Background Technology

[0002] All-solid-state multi-stage pulse voltage generators are devices capable of generating high-voltage pulses and have broad application prospects in industry, scientific research, and medical fields. However, the high-voltage pulses generated by all-solid-state multi-stage pulse voltage generators are characterized by large amplitude (up to hundreds of kilovolts or even higher) and fast rise time (nanosecond level). Furthermore, the internal circuit distribution of all-solid-state multi-stage pulse voltage generators is complex, and traditional centralized measurement systems cannot meet the requirements for real-time and accurate measurement of high-voltage pulses.

[0003] Traditional high-voltage pulse measurement methods typically use a single high-voltage divider to directly measure the overall voltage, but this method has the following problems:

[0004] 1. The frequency response characteristics of the high-voltage divider are insufficient to meet the measurement requirements of fast rise times, resulting in waveform distortion;

[0005] 2. Distributed parameters (such as parasitic capacitance and inductance) have a significant impact, further reducing measurement accuracy;

[0006] 3. Electromagnetic interference is severe under high voltage conditions, affecting the quality of measurement signals;

[0007] 4. The voltage division ratio of a single voltage divider is fixed, making it difficult to simultaneously meet the requirements of a wide range of voltage amplitudes and high-precision measurements.

[0008] All of the above reasons can lead to a decrease in the accuracy of measurement results, making it difficult to meet the technical requirements of various fields in the future.

[0009] Therefore, a new high-voltage pulse calibration system is needed to effectively solve the problem of low high-voltage pulse measurement accuracy in all-solid-state multi-stage pulse voltage generators. Summary of the Invention

[0010] This specification provides a distributed high-voltage pulse calibration system and method to address the problem of low high-voltage pulse measurement accuracy in all-solid-state multi-stage pulse voltage generators. To achieve the above objective, the technical solution adopted in this specification is as follows:

[0011] In one aspect, this specification provides a high-voltage pulse calibration method based on distributed deployment, the apparatus comprising:

[0012] Step 102: Based on the target measured voltage, the total number of distributed miniature voltage dividers, the maximum output voltage, and the uncertainty parameters, determine the optimal number of voltage divider stages and the corresponding optimal voltage divider combination; each voltage generation module of the all-solid-state multi-stage voltage generator is connected to a distributed miniature voltage divider.

[0013] Step 104: Start the distributed small voltage divider corresponding to the optimal voltage divider combination to measure the voltage of the corresponding voltage generation module and obtain the measured voltage of each voltage divider.

[0014] Step 106: Calibrate the measured voltages of each voltage divider with the corresponding standard source to obtain the calibration coefficients for each stage;

[0015] Step 108: Correct the measured voltage of each voltage divider using calibration coefficients at each level to obtain the corrected measured voltage at each level;

[0016] Step 110: Obtain the overall output voltage signal based on the measured voltages at each correction stage.

[0017] On the other hand, this specification provides a high-voltage pulse calibration system based on distributed deployment, the method comprising:

[0018] A distributed miniature voltage divider is used to calibrate the voltage of each voltage generation module of an all-solid-state multi-stage pulse voltage generator to obtain the voltage divider measurement voltage; the distributed miniature voltage divider is composed of surface-mount resistors connected in series according to the target voltage division ratio;

[0019] A high-speed analog-to-digital converter is used to convert the voltage measured by the voltage divider output from a distributed small voltage divider into digital signals, generate the voltage measurement signals at each stage, and transmit them to the host computer.

[0020] The timing control module is used to provide a unified clock signal for each high-speed analog-to-digital converter;

[0021] The host computer is used to process and evaluate the waveform quality of the received measurement voltage signals at each stage, and obtain the overall output voltage signal and waveform quality evaluation results of the all-solid-state multi-stage pulse voltage generator.

[0022] The host computer includes:

[0023] The waveform reconstruction module is used to merge and reconstruct the received measurement voltage signals at each stage to obtain the overall output voltage signal of the all-solid-state multi-stage pulse voltage generator.

[0024] The waveform quality assessment module is used to assess the quality of the reconstructed overall output voltage signal and obtain waveform quality assessment results.

[0025] Based on the above technical solution, this specification can achieve the following technical effects:

[0026] This method deploys distributed voltage acquisition devices in each module of an all-solid-state multi-stage pulse voltage generator, and then transmits the acquired voltage signals to a host computer for integration through a distributed acquisition network. At the same time, each voltage module is calibrated with a standard source, thereby achieving higher accuracy measurement and calibration of high-voltage pulses, thus solving the problem of low high-voltage pulse measurement accuracy in all-solid-state multi-stage pulse voltage generators. Attached Figure Description

[0027] Figure 1 This is a flowchart illustrating a high-voltage pulse calibration method based on distributed deployment, as shown in one embodiment of this specification.

[0028] Figure 2 is a schematic diagram of the weights and standard verification of each frequency shown in an embodiment of this specification.

[0029] Figure 3 This is a flowchart illustrating the workflow of a distributed high-voltage pulse calibration system according to one embodiment of this specification.

[0030] Figure 4 This specification shows a circuit topology diagram and a distributed sampling schematic diagram of an all-solid-state multi-stage pulse voltage generator according to one embodiment.

[0031] Figure 5 This is a flowchart of the host computer shown in one embodiment of this specification. Detailed Implementation

[0032] To more clearly illustrate the technical solutions of the embodiments in this specification, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are merely some examples or embodiments of this specification. For those skilled in the art, these drawings can be applied to other similar scenarios without creative effort. Unless obvious from the context or otherwise specified, the same reference numerals in the drawings represent the same structures or operations.

[0033] It should be understood that the terms "system," "device," "unit," and / or "module" as used in this specification are a method of distinguishing different components, elements, parts, sections, or assemblies at different levels. However, if other terms can achieve the same purpose, they may be replaced by other expressions.

[0034] As indicated in this specification and claims, unless the context clearly indicates otherwise, the words "a," "an," "an," and / or "the" do not specifically refer to the singular and may also include the plural. Generally speaking, the terms "comprising" and "including" only indicate the inclusion of expressly identified steps and elements, which do not constitute an exclusive list, and the method or apparatus may also include other steps or elements.

[0035] Flowcharts are used in this specification to illustrate the operations performed by the system according to embodiments of this specification. It should be understood that the preceding or following operations are not necessarily performed in exact order. Instead, the steps can be processed in reverse order or simultaneously. Furthermore, other operations can be added to these processes, or one or more steps can be removed from them.

[0036] Example 1

[0037] Please refer to Figure 1 , Figure 1 The diagram shows a flowchart of a high-voltage pulse calibration method based on distributed deployment provided in this embodiment. The method includes:

[0038] Step 102: Based on the target measured voltage, the total number of distributed miniature voltage dividers, the maximum output voltage, and the uncertainty parameters, determine the optimal number of voltage divider stages and the corresponding optimal voltage divider combination; each voltage generation module of the all-solid-state multi-stage voltage generator is connected to a distributed miniature voltage divider.

[0039] In this embodiment, the method further includes the following steps before step 102:

[0040] Step 101: Use a high-precision standard voltage source to calibrate each distributed miniature voltage divider at different voltage levels to obtain the uncertainty parameters of each distributed miniature voltage divider at different voltage levels.

[0041] In this embodiment, one implementation of step 101 is as follows:

[0042] Step 202: Use a high-precision standard voltage source to measure the voltage of each distributed small voltage divider at different voltage levels to obtain the measured voltage value;

[0043] Step 204: Compare the measured voltage value with the voltage reading of the high-precision standard voltage source to obtain voltage deviation data;

[0044] Step 206: Calculate the measurement uncertainty based on the voltage deviation data obtained from several measurements; Step 208: Calculate the uncertainty parameters of each distributed small voltage divider at different voltage levels based on the measurement uncertainty and the standard uncertainty of the high-precision standard voltage source.

[0045] Step 210: Based on the linearity differences caused by device process differences, use linear interpolation to interpolate the voltage deviation data to obtain a linearity error statistics table.

[0046] Specifically, for each voltage divider module, multiple different voltage levels are measured within its operating voltage range using a high-precision standard voltage source. The measured voltage value of the voltage divider at each voltage level is obtained through measuring equipment and compared with the voltage reading output by the standard voltage source to obtain the voltage deviation data at each voltage level.

[0047] Based on the variance of voltage deviation data obtained from several measurements, the measurement uncertainty is calculated. According to the measurement uncertainty at a specific voltage level and the standard uncertainty of a high-precision standard voltage source, the uncertainty parameter of each voltage divider at a specific voltage level is calculated, forming basic data to support the subsequent selection of the optimal voltage level.

[0048] Based on the subtle changes in linearity caused by differences in device manufacturing processes, a linear interpolation method is used to interpolate and fill in the voltage deviation data, and a linearity error statistics table is established for subsequent voltage correction.

[0049] Among them, the uncertainty parameter is calculated. The formula is as follows:

[0050]

[0051] in, This indicates the measurement uncertainty at a specific voltage level; This represents the standard uncertainty of a high-precision standard voltage source at a specific voltage level.

[0052] In this embodiment, one implementation of step 102 is as follows:

[0053] Step 302: Calculate the minimum number of voltage divider stages based on the target measured voltage and the maximum output voltage of the distributed small voltage divider.

[0054] Step 304: Traverse downwards from the total number of distributed small voltage dividers to the minimum number of voltage divider stages:

[0055] Step 306: For each voltage divider stage traversed, calculate the current voltage level based on the target measured voltage and the current voltage divider stage.

[0056] Step 308: Based on the current voltage level, determine the uncertainty parameter of each distributed small voltage divider at the current voltage level, and select target distributed small voltage dividers with uncertainty parameters lower than a preset threshold.

[0057] Step 310: Based on the uncertainty parameters of the target distributed small voltage divider at the current voltage level, calculate the combined measurement uncertainty of the target distributed small voltage divider after series connection at the current voltage divider stage.

[0058] Step 312: Select the voltage divider stage with the smallest combined measurement uncertainty as the optimal voltage divider stage, and determine the optimal voltage divider combination corresponding to the optimal voltage divider stage.

[0059] Specifically, regarding the optimal selection of the number of working module stages (taking the measurement of a 75kV target voltage as an example), the total number of modules is N, and the target voltage is V. target =75kV. Determine the maximum output voltage of a single module (this can be obtained from the module parameters, assumed to be V). m ), calculate the minimum series n min That is, n min =V target / V m (Round up). n is a possible series (n is an integer and satisfies n < N), and the series is traversed downwards from N to n. min .

[0060] For each traversal level n, calculate the required voltage V for each level. per =V target / n, filter out those at voltage level V per Voltage divider modules with uncertainties below a preset threshold are excluded from the stages with higher uncertainties. For the selected n-stage voltage dividers, the uncertainty parameter u(u) of each voltage divider at the corresponding voltage level is used to determine the appropriate stage. i (where is the measurement uncertainty of the i-th stage voltage divider at the corresponding voltage level), the combined measurement uncertainty after series connection is calculated using the formula.

[0061]

[0062] After n from N to n min The series combination iterative calculation is performed, and the corresponding combined uncertainty is calculated respectively. The series combination with the smallest combined uncertainty is selected as the final working series, which drives the corresponding module to discharge and work, thereby ensuring the optimal measurement accuracy of the output voltage.

[0063] Step 104: Start the distributed small voltage divider corresponding to the optimal voltage divider combination to measure the voltage of the corresponding voltage generation module and obtain the measured voltage of each voltage divider.

[0064] Step 106: Calibrate the measured voltages of each voltage divider with the corresponding standard source to obtain the calibration coefficients for each stage;

[0065] One implementation of step 106 in this embodiment is as follows:

[0066] Step 402: Based on the measured voltages of each voltage divider and the standard source, obtain the corresponding voltage time-domain signal and the standard source time-domain signal;

[0067] Step 404: Perform Fast Fourier Transform on the voltage time-domain signal and the standard source time-domain signal respectively to obtain the voltage frequency-domain signal and the standard source frequency-domain signal;

[0068] Step 406: Compare the voltage frequency domain signal with the standard source frequency domain signal to obtain the calibration coefficients of each voltage divider.

[0069] In this embodiment, the calibration coefficients include amplitude calibration coefficients and phase calibration coefficients;

[0070] In this embodiment, one implementation of step 404 is as follows:

[0071] Step 4041: Group the standard source frequency domain signal of the voltage frequency domain signal according to frequency to obtain the voltage frequency domain signal and the standard source frequency domain signal under different frequency groups;

[0072] Step 4042: Take the modulus value of the voltage frequency domain signal and the standard source frequency domain signal in each group within the group to obtain the voltage component amplitude and the standard source component amplitude of each group;

[0073] Step 4043: Based on the voltage component amplitude and the standard source component amplitude, calculate the amplitude calibration coefficient of each voltage divider at different frequencies;

[0074] Step 4044: Based on the phase of the sinusoidal signals of the voltage frequency domain signal and the standard source frequency domain signal under different frequency groupings, calculate the phase calibration coefficient of each voltage divider at different frequencies.

[0075] Specifically, during the calibration of each output voltage stage with a standard source, the reconstructed time-domain waveform signal y(t) of each voltage divider stage is acquired. A Fast Fourier Transform (FFT) is then applied to y(t), according to the formula...

[0076]

[0077] (Where N is the number of sampling points, j = 0, 1, ..., N-1) The time-domain signal is converted into a frequency-domain signal Y(j). By analyzing Y(j) and comparing the frequency-domain decomposition results of the measured waveform and the standard source waveform, a correction coefficient k is introduced. f The phase and amplitude of the measured signal are calibrated at different frequencies, and the set of correction coefficients for each level is recorded. During actual measurement, the measured signal is corrected using the recorded set of correction coefficients for each level before the waveform is reconstructed, resulting in a more accurate measurement value and improving the accuracy of voltage measurement.

[0078] For the measured waveform Y recon (j) and standard waveform Ystd The FFT result of (j), after grouping by frequency, shows the amplitude within each group (taking the modulus value |Y(j)|:

[0079] Measure the amplitude of the m-th frequency component of the waveform:

[0080]

[0081] The amplitude of the m-th frequency component of the standard waveform:

[0082]

[0083] The amplitude calibration coefficient k reflects the difference between the measured waveform and the standard waveform at each frequency component. fm The calculation formula is:

[0084]

[0085] Phase calibration coefficient k ff The calculation formula is:

[0086]

[0087] Where θ1 and θ2 represent the phases of the sinusoidal signal in the frequency domain.

[0088] Step 108: Correct the measured voltage of each voltage divider using calibration coefficients at each level to obtain the corrected measured voltage at each level;

[0089] In this embodiment, one implementation of step 108 is as follows:

[0090] Based on the amplitude calibration coefficient and phase calibration coefficient of each voltage divider at different frequencies, the measured voltage of each voltage divider is calibrated at different frequencies to obtain the corrected measured voltage of each stage.

[0091] Step 110: Obtain the overall output voltage signal based on the measured voltages at each correction stage.

[0092] In this embodiment, one implementation of step 110 is as follows:

[0093] Step 502: Convert the corrected measurement voltages at each level into corresponding digital signals to obtain the measurement voltage signals at each level;

[0094] Step 504: Combine the measured voltage signals at each stage to obtain the overall measured voltage signal;

[0095] Step 506: Convolve and reconstruct the overall measured voltage signal to obtain the reconstructed overall output voltage signal.

[0096] Specifically, the output voltage of each stage is collected and transmitted to the ADC module to convert the electrical signal into a digital signal. Then, the signal is imported into the host computer for processing through a multi-channel data acquisition card. The sampling timing control needs to be synchronized with the power supply discharge timing control.

[0097] A waveform reconstruction method based on convolution operations is adopted. In specific implementation, a suitable convolution kernel is designed according to the impulse response characteristics of the system. Assuming the impulse response of the system is h[a], the discrete voltage signal acquired by the i-th module is... x i [n] Through the formula:

[0098]

[0099] Where M is the length of the pulse response h[a]. Through this convolution operation, the signals of each module can be effectively fused to restore the superimposed composite waveform, which is a more accurate high-voltage pulse waveform for measurement.

[0100] Convolution operations are performed to reconstruct and fuse the signals from each module after calibration with correction coefficients, thus reconstructing the overall output voltage waveform of the all-solid-state Marx generator.

[0101] In this embodiment, the method further includes the following after step 110:

[0102] Step 112: Perform a fast Fourier transform on the overall output voltage signal to obtain the overall output voltage frequency domain signal;

[0103] Step 114: Calculate the waveform distortion based on the overall output voltage frequency domain signal;

[0104] Step 116: Compare the waveform distortion with a preset distortion threshold. If the waveform distortion exceeds the preset distortion threshold, the measurement is determined to be abnormal.

[0105] Specifically, when assessing the quality of the reconstructed waveform, a Fast Fourier Transform (FFT) is introduced to perform frequency domain analysis. Assuming the reconstructed time-domain waveform signal is y(n), the frequency-domain signal is obtained after the FFT transformation:

[0106]

[0107] Where N is the number of sampling points. K = 0, 1, ..., N-1.

[0108] Based on the frequency domain signal Y(k), waveform distortion, signal-to-noise ratio, and other indicators can be calculated. The calculation results are compared with preset thresholds. When the indicators exceed the thresholds, an alarm signal is issued to promptly check for potential power supply problems. The specific process is as follows:

[0109] The frequency point k after FFT decomposition corresponds to the actual frequency f. k =k•f s / N, but due to the symmetry of the FFT results (the first half of the real signal FFT is a positive frequency, and the second half is a negative frequency mirror image), usually only the first N / 2+1 points are analyzed. For periodic waveforms (such as sine waves and square waves), their frequency components are mostly integer multiples of the fundamental frequency (harmonics). In order to accurately evaluate the accuracy of the measured signal, the FFT results of the reconstructed waveform and the standard waveform need to be compared by grouping them into the same frequency range.

[0110] For the reconstructed waveform Y recon (k) and standard waveform Y std The FFT result of (k) is grouped by frequency, and the amplitudes within each group are summed (taking the modulus |Y(k)|) to obtain the integrated frequency domain amplitude:

[0111] The amplitude of the w-th frequency component of the reconstructed waveform:

[0112]

[0113] The amplitude of the w-th frequency component of the standard waveform:

[0114]

[0115] The error rate, reflecting the difference between the reconstructed waveform and the standard waveform at each frequency component, is calculated using the following formula:

[0116]

[0117] like Figure 2 As shown, taking a square wave as an example, after FFT decomposition, the proportion of each frequency component in its frequency domain can be obtained. The total waveform energy is 1. Furthermore, the weight of the harmonic waveforms at different frequencies in the entire signal is calculated, assigning weights to the errors brought by different frequencies, reflecting the differences between the reconstructed waveform and the standard waveform in each frequency component. The calculation formula is as follows:

[0118]

[0119] Where W is the number of frequency groups.

[0120] Waveform distortion and other parameters are calculated based on the frequency domain signal. For example, the total harmonic distortion (THD) is obtained by calculating the ratio of each harmonic component to the fundamental component. The formula for calculating THD is as follows:

[0121]

[0122] The calculation results are compared with the preset threshold. When the index exceeds the normal threshold, the host computer issues a warning. At this time, some modules may malfunction.

[0123] In summary, this method deploys distributed voltage acquisition devices in each module of an all-solid-state multi-stage pulse voltage generator, and then transmits the acquired voltage signals to a host computer for integration through a distributed acquisition network. At the same time, each voltage module is calibrated with a standard source, thereby achieving higher accuracy measurement and calibration of high-voltage pulses.

[0124] Example 2

[0125] This embodiment provides a high-voltage pulse calibration system based on distributed deployment. The system includes:

[0126] A distributed miniature voltage divider is used to calibrate the voltage of each voltage generation module of an all-solid-state multi-stage pulse voltage generator to obtain the voltage divider measurement voltage; the distributed miniature voltage divider is composed of surface-mount resistors connected in series according to the target voltage division ratio;

[0127] A high-speed analog-to-digital converter is used to convert the voltage measured by the voltage divider output from a distributed small voltage divider into digital signals, generate the voltage measurement signals at each stage, and transmit them to the host computer.

[0128] The timing control module is used to provide a unified clock signal for each high-speed analog-to-digital converter;

[0129] The host computer is used to process and evaluate the waveform quality of the received measurement voltage signals at each stage, and obtain the overall output voltage signal and waveform quality evaluation results of the all-solid-state multi-stage pulse voltage generator.

[0130] The host computer includes:

[0131] The waveform reconstruction module is used to merge and reconstruct the received measurement voltage signals at each stage to obtain the overall output voltage signal of the all-solid-state multi-stage pulse voltage generator.

[0132] The waveform quality assessment module is used to assess the quality of the reconstructed overall output voltage signal and obtain waveform quality assessment results.

[0133] In this embodiment, reference Figure 3This diagram illustrates the system's workflow. The all-solid-state multi-stage pulse voltage generator consists of multiple cascaded modules. Each module is equipped with a distributed miniature voltage divider. The voltage signal is converted from digital to analog via a corresponding A / D converter, and then the voltage signals from multiple modules are acquired by a data acquisition card and uploaded to the host computer. Due to the distributed deployment, the measured voltage parameters at each stage are reduced. Therefore, the voltage divider can use low-voltage, high-precision surface-mount resistors for voltage division, enabling accurate measurement of the voltage of the corresponding module. Compared to the traditional method of directly measuring the overall voltage using a single high-voltage divider, distributed measurement reduces the influence of distributed parameters (such as parasitic capacitance and inductance), and the distributed sampling method greatly improves the accuracy of the power signal of each module, effectively overcoming the waveform distortion problem caused by insufficient frequency response characteristics in traditional measurement methods.

[0134] Optionally, in each module of the all-solid-state multi-stage pulse voltage generator, a high-precision, low-voltage withstand surface-mount resistor voltage divider circuit can be installed as a distributed miniature voltage divider. The surface-mount resistors are connected in series according to a specific voltage division ratio, using a 100MΩ and 100kΩ resistor in series, to achieve a 1000:1 voltage division of the module's output voltage, ensuring that the voltage input to subsequent measurement circuits is within a safe and measurable range.

[0135] refer to Figure 4 A distributed miniature voltage divider is connected in parallel across the main capacitor Cn to collect the output voltage of each stage and transmit it to the ADC module to convert the electrical signal into a digital signal. The signal is then imported into the host computer for processing via a multi-channel data acquisition card. The sampling timing control needs to be synchronized with the power supply discharge timing control.

[0136] In this embodiment, a high-speed analog-to-digital converter (ADC) is deployed in each module to convert the voltage signal collected by the voltage divider into a digital signal. An ADC chip with a resolution of 14 bits and a sampling rate of 200MSPS (ADI's AD9250) can be selected to meet the acquisition requirements of rapidly changing high-voltage pulses.

[0137] Optionally, the ADC chip connects to the subsequent data processing unit via an SPI interface. The transmission protocol uses differential signal encoding and LVDS (Low Voltage Differential Signaling) technology for data transmission, effectively enhancing anti-interference capabilities. During PCB routing, the SPI data lines are length-equalized and a shielding layer is added to further ensure the accuracy of data transmission.

[0138] Optionally, to meet the requirements of high sampling rate and response speed, a high-speed parallel interface is used for data transmission, and the transmission protocol adopts differential signal encoding to enhance anti-interference capability and ensure that the quality of the measurement signal is not affected by severe electromagnetic interference in a high-voltage environment.

[0139] Optionally, a timing control unit, based on an FPGA, can be provided to precisely control the sampling start time and sampling frequency of each module's ADC, ensuring that the sampling data of all modules are based on the same time axis. This provides an accurate timing basis for subsequent waveform reconstruction.

[0140] Optionally, a Xilinx FPGA chip is used as the core of the timing control unit, and precise timing control logic is implemented using a Python program. A clock management module is designed inside the FPGA to generate a stable clock signal as the sampling clock for each module's ADC. By configuring the FPGA's GPIO ports, precise sampling start times and sampling frequency control signals are output to ensure that the sampling data from all modules are based on the same time axis, and the sampling clock jitter is controlled within ±1ns.

[0141] Optionally, during the system initialization phase, a self-test unit can be used to perform self-diagnostics on each module. A self-test program can be written to sequentially check whether the resistance value of the distributed voltage divider is normal, whether the sampling function of the ADC is accurate, etc.

[0142] Optionally, if a fault is detected in a module, the host computer displays the location of the faulty module and the fault type, and provides a prompt on the system interface to facilitate maintenance personnel in quickly locating and handling the problem.

[0143] Optionally, system calibration and voltage divider calibration are performed using a high-precision voltage standard source (such as FLUKE 5720A). Different voltage values ​​from the standard source are applied to the voltage divider input, the output voltage is measured, and compared with the theoretically calculated value. Based on the measurement error, the voltage divider resistance is fine-tuned to ensure the voltage division ratio error is controlled within ±1%.

[0144] Optional, see reference Figure 5 For each voltage divider module, multiple different voltage levels were measured within its operating voltage range using a high-precision standard voltage source. The measured voltage values ​​of the voltage divider at each voltage level were obtained using measuring equipment and compared with the voltage readings output by the standard voltage source to obtain voltage deviation data for each voltage level. Then, based on the subtle variations in linearity caused by differences in device manufacturing processes, linear interpolation was used to interpolate and fill the voltage deviation data, establishing a linearity error statistics table. For a specific voltage level, the target voltage deviation number was extracted from the linearity error statistics table. Then, based on the voltage readings of the high-precision standard voltage source at that voltage level, the measurement uncertainty parameters of each voltage divider at that specific voltage level were calculated, forming basic data to support the subsequent selection of the optimal voltage division level.

[0145] Meanwhile, using the sinusoidal sweep frequency method (scanning termination frequency not lower than 2MHz), each voltage divider is calibrated with the voltage divider by a legal or authorized metrology institution at different frequencies to obtain and record the amplitude-frequency characteristic and phase-frequency characteristic parameters or curves.

[0146] When the test sample needs to be measured at a target voltage of 75kV (e.g., 75kV Note: the maximum output voltage of an all-solid-state multi-stage pulse voltage generator is 200kV, and its capability range is higher than the target voltage), based on the principle of parallel charging and series discharging, the optimal number of working module stages is selected through the following steps:

[0147] Series traversal selection calculation: For a possible series n (n is an integer, and n ≤ total number of modules N), calculate the voltage required for each series in V. per =V target / n, based on the pre-calibrated linearity error statistics table, select those at voltage level V per For voltage divider modules with measurement uncertainties below a preset threshold, exclude those with higher uncertainties. For the selected n-stage voltage dividers, calculate the combined measurement uncertainty after series connection based on the uncertainty parameters of each voltage divider at its corresponding voltage level. The calculation formula is as follows:

[0148]

[0149] Where u i The measurement uncertainty of the i-th stage voltage divider at the corresponding voltage level

[0150] After combining n from N to the minimum number of stages (target voltage / maximum output of a single module, rounded up), the corresponding combined uncertainty is calculated for each stage. The stage combination with the smallest combined uncertainty is selected as the final working stage, which drives the corresponding module to discharge and operate, so as to ensure the optimal measurement accuracy of the output voltage.

[0151] Furthermore, such as Figure 4 The host computer program diagram shown illustrates the sinusoidal frequency sweep calibration performed by the host computer. During the calibration of each output voltage stage against the standard source, a Fast Fourier Transform (FFT) is introduced to perform sinusoidal frequency sweep calibration analysis on the waveform. Assuming the reconstructed time-domain waveform signal is y(t), the frequency-domain signal is obtained after the FFT transformation:

[0152]

[0153] Where N is the number of sampling points. j = 0, 1, ..., N-1.

[0154] Based on the aforementioned amplitude-frequency and phase-frequency characteristic parameters or curves of the sinusoidal sweep frequency calibration, a correction coefficient k can be introduced according to the frequency domain decomposition Y(j) of the measured waveform and the standard source waveform. fThe phase and amplitude of the measured signal at different frequencies are calibrated, thereby recording the set of correction coefficients for each level. The waveform is then reconstructed after correction during measurement to obtain a more accurate measurement value.

[0155] The beneficial effects of this technical solution are as follows:

[0156] 1. By adopting distributed multi-node collaborative calibration and combining it with high-precision time synchronization (such as PTP protocol), the overall calibration accuracy of the system reaches within ±0.1%, which is better than the traditional centralized calibration method (usually ±0.5%).

[0157] 2. The modular design allows for the addition or removal of calibration nodes as needed, adapting to high-voltage pulse testing requirements of different scales (such as from small-scale laboratory applications to large-scale industrial applications).

[0158] Based on this, this system deploys distributed voltage acquisition devices in each module of the all-solid-state multi-stage pulse voltage generator, and then transmits the acquired voltage signals to the host computer for integration through a distributed acquisition network. At the same time, each voltage module is calibrated with a standard source, thereby achieving higher accuracy measurement and calibration of high-voltage pulses.

[0159] In summary, this system effectively solves the problem of low high-voltage pulse measurement accuracy of all-solid-state Marx generators by using distributed deployment, high-speed ADC, precise timing control, waveform reconstruction and quality assessment technologies. It can meet the technical requirements for accurate high-voltage pulse measurement in various fields such as industry, scientific research, and medicine.

[0160] It should be noted that different embodiments may produce different beneficial effects. In different embodiments, the beneficial effects may be any one or a combination of the above, or any other possible beneficial effects.

[0161] The basic concepts have been described above. Obviously, for those skilled in the art, the detailed disclosure above is merely illustrative and does not constitute a limitation of this specification. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements, and corrections to this specification. Such modifications, improvements, and corrections are suggested in this specification and therefore remain within the spirit and scope of the exemplary embodiments described herein.

[0162] Furthermore, this specification uses specific terms to describe embodiments thereof. For example, "an embodiment," "one embodiment," and / or "some embodiments" refer to a particular feature, structure, or characteristic associated with at least one embodiment of this specification. Therefore, it should be emphasized and noted that references to "an embodiment," "one embodiment," or "an alternative embodiment" in different locations throughout this specification do not necessarily refer to the same embodiment. Moreover, certain features, structures, or characteristics in one or more embodiments of this specification can be appropriately combined.

[0163] Furthermore, those skilled in the art will understand that various aspects of this specification can be described and illustrated in several patentable ways or situations, including any new and useful combination of processes, machines, products, or substances, or any new and useful improvements thereof. Accordingly, various aspects of this specification can be implemented entirely by hardware, entirely by software (including firmware, resident software, microcode, etc.), or by a combination of hardware and software. All of the above hardware or software may be referred to as a “data block,” “module,” “engine,” “unit,” “component,” or “system.” Furthermore, various aspects of this specification may be represented as a computer product located on one or more computer-readable media, including computer-readable program code.

[0164] Computer storage media may contain a propagated data signal containing computer program code, for example, on baseband or as part of a carrier wave. This propagated signal may take various forms, including electromagnetic, optical, and suitable combinations thereof. Computer storage media can be any computer-readable medium other than a computer-readable storage medium, which can be connected to an instruction execution system, apparatus, or device to enable communication, propagation, or transmission of a program for use. The program code located on the computer storage medium can be propagated through any suitable medium, including radio, cable, fiber optic cable, RF, or similar media, or any combination of the above media.

[0165] Similarly, it should be noted that, in order to simplify the description disclosed herein and thus aid in the understanding of one or more embodiments of the invention, the foregoing description of embodiments in this specification may sometimes combine multiple features into a single embodiment, drawing, or description thereof. However, this method of disclosure does not imply that the subject matter of this specification requires more features than those mentioned in the claims. In fact, the embodiments contain fewer features than all the features of a single embodiment disclosed above.

[0166] In some embodiments, numbers describing the quantity of components and attributes are used. It should be understood that such numbers used in the description of embodiments are modified in some examples with the terms "approximately," "approximately," or "generally." Unless otherwise stated, "approximately," "approximately," or "generally" indicates that the numbers are allowed to vary by ±20%. Accordingly, in some embodiments, the numerical parameters used in the specification and claims are approximate values, which may be changed depending on the characteristics required by individual embodiments. In some embodiments, numerical parameters should take into account specified significant digits and employ a general method of digit reservation. Although the numerical ranges and parameters used to confirm their breadth of range in some embodiments of this specification are approximate values, in specific embodiments, such values ​​are set as precisely as feasible.

[0167] Finally, it should be understood that the embodiments described in this specification are merely illustrative of the principles of the embodiments described herein. Other variations may also fall within the scope of this specification. Therefore, alternative configurations of the embodiments described herein are intended to be illustrative rather than limiting, and should be considered consistent with the teachings of this specification. Accordingly, the embodiments described herein are not limited to those explicitly introduced and described herein.

Claims

1. A high-voltage pulse calibration method based on distributed deployment, characterized in that, The method comprises the following steps: Based on the target measurement voltage, the total number of distributed small voltage dividers, the maximum output voltage, and the uncertainty parameter, determine the optimal number of voltage dividers and the corresponding optimal voltage divider combination; each voltage generation module of the all-solid-state multi-stage voltage generator is connected to a distributed small voltage divider; Start the distributed small voltage divider corresponding to the optimal voltage divider combination, measure the voltage of the corresponding voltage generation module, and obtain the measurement voltage of each stage of voltage divider; Calibrate the measurement voltage of each stage of voltage divider with the corresponding standard source to obtain the calibration coefficient of each stage; Use the calibration coefficient of each stage to correct the measurement voltage of each stage of voltage divider to obtain the corrected measurement voltage of each stage; Based on the corrected measurement voltage of each stage, obtain the overall output voltage signal; Before the step of determining the optimal number of voltage dividers and the corresponding optimal voltage divider combination based on the target measurement voltage, the total number of distributed small voltage dividers, the maximum output voltage, and the uncertainty parameter, the method further comprises the following steps: Calibrate each distributed small voltage divider at different voltage levels using a high-precision standard voltage source to obtain the uncertainty parameter and the linearity error statistical table of each distributed small voltage divider at different voltage levels; The step of obtaining the overall output voltage signal based on the corrected measurement voltage of each stage comprises the following steps: Convert the corrected measurement voltage of each stage into a corresponding digital signal to obtain the measurement voltage signal of each stage; Merge the measurement voltage signals of each stage to obtain the overall measurement voltage signal; Convolve and reconstruct the overall measurement voltage signal to obtain the reconstructed overall output voltage signal.

2. The method of claim 1, wherein, The step of calibrating each distributed small voltage divider at different voltage levels using a high-precision standard voltage source to obtain the uncertainty parameter and the linearity error statistical table of each distributed small voltage divider at different voltage levels comprises the following steps: Measure the voltage of each distributed small voltage divider at different voltage levels using a high-precision standard voltage source to obtain the measured voltage value; Compare the measured voltage value with the voltage indication value of the high-precision standard voltage source to obtain the voltage deviation data; Calculate the measurement uncertainty based on the voltage deviation data obtained from several measurements; Calculate the uncertainty parameter of each distributed small voltage divider at different voltage levels based on the measurement uncertainty and the standard uncertainty of the high-precision standard voltage source; Based on the linearity difference caused by the difference in device technology, use linear interpolation to interpolate the voltage deviation data to obtain the linearity error statistical table.

3. The method of claim 1, wherein, The step of determining the optimal number of voltage dividers and the corresponding optimal voltage divider combination based on the target measurement voltage, the total number of distributed small voltage dividers, the maximum output voltage, and the uncertainty parameter comprises the following steps: Based on the target measurement voltage and the maximum output voltage of the distributed small voltage divider, calculate the minimum number of voltage dividers; Iterate from the total number of distributed small voltage dividers to the minimum number of voltage dividers; For each iteration of the number of voltage dividers, calculate the current voltage level based on the target measurement voltage and the current number of voltage dividers; Based on the current voltage level, determine the uncertainty parameter of each distributed small voltage divider at the current voltage level, and select the target distributed small voltage divider whose uncertainty parameter is lower than the preset threshold. Based on the uncertainty parameters of the target distributed small voltage divider at the current voltage level, the synthesized measurement uncertainty of the target distributed small voltage divider after being connected in series at the current voltage divider stage is calculated; The voltage divider stage with the minimum synthesized measurement uncertainty is selected as the optimal voltage divider stage, and the optimal voltage divider combination corresponding to the optimal voltage divider stage is determined.

4. The method of claim 1, wherein, The calibration of the measurement voltage of each voltage divider stage with the corresponding standard source to obtain the calibration coefficient of each stage includes: Based on the measurement voltage of each voltage divider stage and the standard source, the corresponding voltage time domain signal and the standard source time domain signal are obtained; The voltage time domain signal and the standard source time domain signal are respectively subjected to fast Fourier transform to obtain the voltage frequency domain signal and the standard source frequency domain signal; The voltage frequency domain signal and the standard source frequency domain signal are compared to obtain the calibration coefficient of each voltage divider stage.

5. The method of claim 4, wherein, The calibration coefficient includes an amplitude calibration coefficient and a phase calibration coefficient; the comparison of the voltage frequency domain signal and the standard source frequency domain signal to obtain the calibration coefficient of each voltage divider stage includes: The voltage frequency domain signal and the standard source frequency domain signal are grouped according to frequency to obtain the voltage frequency domain signal and the standard source frequency domain signal under different frequency groups; The voltage component amplitude and the standard source component amplitude of each group are obtained by taking the modulus value of the voltage frequency domain signal and the standard source frequency domain signal in each group; Based on the voltage component amplitude and the standard source amplitude, the amplitude calibration coefficient of each voltage divider at different frequencies is calculated; Based on the phase of the sine signal of the voltage frequency domain signal and the standard source frequency domain signal under different frequency groups, the phase calibration coefficient of each voltage divider at different frequencies is calculated.

6. The method of claim 5, wherein, The correction of the measurement voltage of each voltage divider stage by using the calibration coefficient of each stage to obtain the corrected measurement voltage of each stage includes: Based on the linearity error statistical table, the measurement voltage of each voltage divider stage is calibrated at different frequencies by using the amplitude calibration coefficient and the phase calibration coefficient of each voltage divider stage at different frequencies to obtain the corrected measurement voltage of each stage.

7. The method of claim 1, wherein, After the overall output voltage signal is obtained based on the corrected measurement voltage of each stage, it further includes: The overall output voltage signal is subjected to fast Fourier transform to obtain the overall output voltage frequency domain signal; Based on the overall output voltage frequency domain signal, the waveform distortion degree is calculated; The waveform distortion degree is compared with the preset distortion threshold value, and if the waveform distortion degree exceeds the preset distortion threshold value, it is determined that the measurement is abnormal.

8. A distributed deployment based high voltage pulse calibration system suitable for use in the method of claim 1, characterized by, It includes: A distributed small voltage divider is used to calibrate the voltage of each voltage generation module of the all-solid-state multi-stage pulse voltage generator to obtain a voltage divider measurement voltage; The distributed small voltage divider is composed of patch resistors connected in series according to a target voltage division ratio; A high-speed analog-to-digital converter is used to convert the voltage divider measurement voltage output by the distributed small voltage divider into a digital signal, generate a measurement voltage signal of each stage, and transmit it to an upper computer; A timing control module is used to provide a unified clock signal for each high-speed analog-to-digital converter; An upper computer is used to process and evaluate the waveform quality of the received measurement voltage signal of each stage to obtain the overall output voltage signal of the all-solid-state multi-stage pulse voltage generator and the waveform quality evaluation result; The upper computer includes: A waveform reconstruction module is configured to combine and reconstruct the received multi-stage measurement voltage signals to obtain an overall output voltage signal of the all-solid-state multi-stage pulse voltage generator. A waveform quality evaluation module is configured to evaluate the quality of the reconstructed overall output voltage signal to obtain a waveform quality evaluation result.

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