GPU power supply control method, electronic equipment and storage medium

Abstract

The invention provides a GPU power supply control method, electronic equipment and a storage medium, relates to the field of power supply control, and can utilize an embedded controller EC of the electronic equipment to enable a plurality of power supplies of a GPU to be powered on according to a preset power-on time sequence or to be powered off according to a preset power-off time sequence. The method comprises the steps that an EC receives a GPU power supply enable signal; the GPU power supply enable signal is used for indicating that a plurality of target power supplies of the GPU are powered on or indicating that the plurality of target power supplies of the GPU are powered off; the EC responds to the GPU power supply enable signal and obtains a power supply management signal of the target power supply; and the EC controls the power supply state of the target power supplies based on the power supply management signals of the target power supplies, so that the plurality of target power supplies are powered on according to a preset power-on time sequence or powered off according to a preset power-off time sequence.

Description

TECHNICAL FIELD

[0001] The application relates to the field of power supply control, in particular to a GPU power supply control method, an electronic device and a storage medium. BACKGROUND

[0002] With the rapid development of electronic device technologies such as mobile phones, tablet computers and notebook computers, and the increasing demand of users for display effects, a display card (a separate display card or an integrated display card) capable of guaranteeing the display effect of the electronic device will exist in the electronic device. In actual electronic devices, because a graphics processing unit (GPU) in the display card has multiple power supplies, in order to ensure the normal work of the GPU, the power-on and power-off of the multiple power supplies of the GPU have strict timing requirements.

[0003] Therefore, how to ensure the power-on and power-off timing of the multiple power supplies of the GPU is a problem to be solved. SUMMARY

[0004] The embodiments of the application provide a GPU power supply control method, an electronic device and a storage medium, which can control the multiple power supplies of the GPU to be powered on according to a preset power-on timing or to be powered off according to a preset power-off timing by using an embedded controller (EC) possessed by the electronic device itself, and the cost is lower and the method is more simple compared with the prior art method of using multiple components to control the power-on and power-off timing of the multiple power supplies of the GPU.

[0005] In order to achieve the above object, the embodiments of the application adopt the following technical solutions: In a first aspect, the embodiments of the application provide a GPU power supply control method applied to an electronic device, and the electronic device includes an embedded controller (EC). The method includes: receiving, by the EC, a GPU power supply enable signal; the GPU power supply enable signal is used to indicate that multiple target power supplies of a GPU are powered on or to indicate that the multiple target power supplies of the GPU are powered off; in response to the GPU power supply enable signal, obtaining, by the EC, a power management signal of the target power supply; and based on the power management signal of the target power supply, controlling, by the EC, the power state of the target power supply, so that the multiple target power supplies are powered on according to a preset power-on timing or are powered off according to a preset power-off timing.

[0006] Based on the technical solutions provided in the present application, the EC possessed by the electronic device can be used to fully analyze the plurality of power management signals related to the power supply state of the GPU, so as to adjust the power enable signal used to control the power supply state of the plurality of power supplies of the GPU, so as to achieve the purpose of making the plurality of power supplies of the GPU power on according to the preset power-on timing or power off according to the preset power-off timing. Since the control of the power-on and power-off timing of the plurality of power supplies of the GPU in the entire technical solution reuses the EC of the electronic device itself, compared with the prior art scheme of using a plurality of components to control the power-on and power-off timing of the plurality of power supplies of the GPU, the cost is lower and the scheme is more convenient.

[0007] Further, since the EC is a programmable device, the analysis of the plurality of power management signals and the adjustment of the power enable signal based on the analysis result can be realized through programming. Once the power-on and power-off timing is wrong or needs to be adjusted, the debugging or adjustment can be more convenient, so that the power-on and power-off timing of the GPU is more accurate, the fault handling is faster when a fault occurs, and the user experience is improved.

[0008] In a possible implementation manner of the first aspect, the EC controls the power supply state of the target power supply, including: the EC controls the target power supply to power on to enter the power-on state or power off to enter the power-off state. Wherein, the EC controls the target power supply to power on, including: the EC sends an enable signal used to instruct the target power supply to power on to the power chip of the target power supply, so that the power chip of the target power supply controls the target power supply to power on; the EC controls the target power supply to power off, including: the EC sends an enable signal used to instruct the target power supply to power off to the power chip of the target power supply, so that the power chip of the target power supply controls the target power supply to power off. In this way, the EC can control the target power supply to power on or power off by sending the enable signal to the power chip of the target power supply.

[0009] In a possible implementation manner of the first aspect, when the target power supply is a first type of power supply, the power management signal of the target power supply includes a first power supply state indication signal; the power-on sequence of the first type of power supply in the preset power-on timing is the first one, and the sequence in the preset power-off timing is the last one; in the preset power-off timing, the power-off sequence of the first power supply is the sequence before the power-off sequence of the first type of power supply; the first power supply state indication signal is used to indicate that the first power supply has supplied power to the GPU or has not supplied power to the GPU; In a case that the target power supply is the first type of power supply, the EC controls the power supply state of the target power supply based on the power supply management signal of the target power supply, including: in a case that the GPU power supply enable signal indicates that the multiple target power supplies of the GPU are powered on, or the state indication signal of the first power supply indicates that the first power supply has supplied power to the GPU, controlling the first type of power supply to be powered on; in a case that the GPU power supply enable signal indicates that the multiple target power supplies of the GPU are powered off, and the state indication signal of the first power supply indicates that the first power supply has not supplied power to the GPU, controlling the first type of power supply to be powered off.

[0010] Based on the above technical solution, in a case that the state indication signal of the first power supply is used to indicate that the first power supply has supplied power to the GPU, or the GPU power supply enable signal is used to indicate that the multiple power supplies of the GPU are powered on, it can be determined that the GPU power supply powering-on process is in progress, or the GPU power supply powering-off process is in progress and the first power supply has not been powered off. Therefore, the EC can control the first type of power supply to be powered on or to supply power to the GPU. In a case that the state indication signal of the first power supply is used to indicate that the first power supply has not supplied power to the GPU, and the GPU power supply enable signal is used to indicate that the multiple power supplies of the GPU are powered off, it can be determined that the GPU power supply powering-off process is in progress and the first power supply has been powered off. Therefore, the EC can control the first type of power supply to be powered off or to stop supplying power to the GPU. It can be seen that, by the technical solution, the first type of power supply can be powered on in the first type of power supply powering-on order in the preset powering-on timing, and be powered off in the first type of power supply powering-off order in the preset powering-off timing, thereby ensuring the correctness of the powering-on and powering-off orders of the first type of power supply. Meanwhile, since the powering-on and powering-off control actions of the EC on the first type of power supply are both implemented based on the same power supply management signal, the complexity of the entire GPU power supply control method is also reduced.

[0011] In a possible implementation manner of the first aspect, in a case that the target power supply is the second type of power supply, the power supply management signal of the target power supply includes: the state indication signal of the previous power supply and the sleep enable signal of the second type of power supply; the second type of power supply is not powered off in a case that the second type of power supply enters the sleep state or does not enter the sleep state; in the preset powering-on timing, the powering-on order of the previous power supply is the order before the powering-on order of the target power supply; the state indication signal of the previous power supply is used to indicate that the previous power supply has supplied power to the GPU or has not supplied power to the GPU; the sleep enable signal of the second type of power supply is used to indicate that the second type of power supply enters the sleep state or does not enter the sleep state. In a case where the target power supply is the second type of power supply, the EC controls the power supply state of the target power supply based on the power supply management signal of the target power supply, including: in a case where the state indication signal of the previous power supply indicates that the previous power supply has supplied power to the GPU, or the sleep enable signal of the second type of power supply indicates that the second type of power supply enters the sleep state, controlling the second type of power supply to power on; in a case where the state indication signal of the previous power supply indicates that the previous power supply does not supply power to the GPU, and the sleep enable signal of the second type of power supply indicates that the second type of power supply does not enter the sleep state, controlling the second type of power supply to power off.

[0012] Based on the above technical solution, in a case where the state indication signal of the previous power supply is used to indicate that the previous power supply has supplied power to the GPU, or the sleep enable signal of the second type of power supply is used to indicate that the second type of power supply enters the sleep state, it can be determined that this time is in the GPU power-on process and the previous power supply has been powered on, or this time is in the GPU power-on process and the second type of power supply is to enter the sleep state. Therefore, at this time, the EC can control the second type of power supply to power on or supply power to the GPU. In a case where the state indication signal of the previous power supply is used to indicate that the previous power supply does not supply power to the GPU, and the sleep enable signal of the second type of power supply is used to indicate that the second type of power supply does not enter the sleep state, it can be determined that this time is in the GPU power-off process and the previous power supply has been powered off. Therefore, at this time, the EC can control the second type of power supply to power off or stop supplying power to the GPU. It can be seen that, through the technical solution, the second type of power supply can be powered on according to the power-on sequence of the second type of power supply in the preset power-on sequence, and powered off according to the power-off sequence of the second type of power supply in the preset power-off sequence, thereby ensuring the correctness of the power-on and power-off sequence of the second type of power supply.

[0013] In a possible implementation of the first aspect, in a case where the target power supply is the third type of power supply, the power supply management signal of the target power supply includes an enable signal of the previous power supply; the power-off sequence of the third type of power supply in the preset power-off sequence is the first; in the preset power-on sequence, the power-on sequence of the previous power supply is the previous sequence of the power-on sequence of the target power supply; the enable signal of the previous power supply is used to indicate that the previous power supply is powered on or powered off; In a case where the target power supply is the third type of power supply, the EC controls the power supply state of the target power supply based on the power supply management signal of the target power supply, including: the EC controls the power supply state of the target power supply based on the power supply management signal of the target power supply and the GPU power enable signal.

[0014] Based on the above technical solution, since the third type of power supply needs to be powered off first, when controlling the power supply state of the target power supply, the GPU power enable signal can be used for control, so that when the EC receives the GPU power enable signal indicating that the multiple power supplies of the GPU are powered off, the third type of power supply can be powered off in time, thereby ensuring the correctness of the power-off sequence of the third type of power supply.

[0015] In a possible implementation of the first aspect, when the target power supply is a first sub power supply in the third type of power supply, the power management signal of the target power supply further includes: a state indication signal of a previous power supply; the first sub power supply does not have a sleep enable signal, and the relevance to the GPU temperature is less than a preset threshold; the state indication signal of the previous power supply is used to indicate that the previous power supply has supplied power to the GPU or has not supplied power to the GPU; In the case that the target power supply is the first sub power supply, the EC controls the power state of the target power supply based on the power management signal of the target power supply and the GPU power supply enable signal, including: in the case that the state indication signal of the previous power supply is used to indicate that the previous power supply has supplied power to the GPU, the enable signal of the previous power supply is used to indicate that the previous power supply is powered on, and the GPU power supply enable signal indicates that the multiple target power supplies of the GPU are powered on, the EC controls the first sub power supply to be powered on; in the case that the state indication signal of the previous power supply is used to indicate that the previous power supply has not supplied power to the GPU, or the enable signal of the previous power supply is used to indicate that the previous power supply is powered off, or the GPU power supply enable signal indicates that the multiple target power supplies of the GPU are powered off, the EC controls the first sub power supply to be powered off.

[0016] Based on the above technical solution, in the case that the enable signal of the previous power supply corresponding to the first sub power supply is used to indicate that the previous power supply is powered on, the state indication signal of the previous power supply is used to indicate that the previous power supply has supplied power to the GPU, and the GPU power supply enable signal is used to indicate that the multiple power supplies of the GPU are powered on, it can be determined that this is in the GPU power-on process and the previous power supply has been powered on. Therefore, at this time, the EC can control the first sub power supply to be powered on or supply power to the GPU. In the case that the enable signal of the previous power supply corresponding to the first sub power supply is used to indicate that the previous power supply is powered off, or the state indication signal of the previous power supply is used to indicate that the previous power supply has not supplied power to the GPU, or the GPU power supply enable signal is used to indicate that the multiple power supplies of the GPU are powered off, it can be determined that this is in the GPU power-off process. Therefore, at this time, the EC can control the first sub power supply to be powered off or stop supplying power to the GPU. It can be seen that, through the technical solution, the first sub power supply which has less relevance to the GPU temperature and does not have a sleep enable signal can be powered on in the first sub power supply power-on order in the preset power-on sequence, thereby ensuring the correctness of the power-on and power-off order of the first sub power supply.

[0017] In a possible implementation of the first aspect, when the target power supply is a second sub power supply in the third type of power supply, the power management signal of the target power supply further includes: an over-temperature indication signal and a sleep enable signal of the second sub power supply; the state indication signal of the previous power supply of the second sub power supply cannot be obtained by the EC; the over-temperature indication signal is used to indicate that the GPU temperature is less than or greater than a preset temperature; and the sleep enable signal of the second sub power supply is used to indicate that the second sub power supply enters a sleep state or does not enter the sleep state; In a case that the target power supply is the second sub power supply, the EC controls the power supply state of the target power supply based on the power supply management signal of the target power supply and the GPU power supply enable signal, including: in a case that the enable signal of the precedent power supply is used to indicate that the precedent power supply is powered on, the over-temperature indication signal is used to indicate that the temperature of the GPU does not exceed the preset temperature, the sleep enable signal of the second sub power supply is used to indicate that the second sub power supply does not enter the sleep state, and the GPU power supply enable signal indicates that the multiple target power supplies of the GPU are powered on, controlling the second sub power supply to be powered on; in a case that the enable signal of the precedent power supply is used to indicate that the precedent power supply is powered off, or the over-temperature indication signal is used to indicate that the temperature of the GPU exceeds the preset temperature, or the sleep enable signal of the second sub power supply is used to indicate that the second sub power supply enters the sleep state, or the GPU power supply enable signal indicates that the multiple target power supplies of the GPU are powered off, controlling the second sub power supply to be powered off.

[0018] Based on the above technical solution, for the second sub power supply which cannot obtain the state indication signal of the precedent power supply, in a case that the over-temperature indication signal indicates that the temperature of the GPU is normal, the enable signal of the precedent power supply is used to indicate that the precedent power supply is powered on, the sleep enable signal of the second sub power supply indicates that the second sub power supply does not enter the sleep state, and the GPU power supply enable signal is used to indicate that the multiple power supplies of the GPU are powered on, it can be determined that the GPU power supply is powered on and the precedent power supply is powered on at this time. Therefore, the EC can control the second sub power supply to be powered on or supply power to the GPU at this time. In a case that the over-temperature indication signal indicates that the temperature of the GPU exceeds the preset temperature, or the enable signal of the precedent power supply is used to indicate that the precedent power supply is powered off, or the sleep enable signal of the second sub power supply indicates that the second sub power supply enters the sleep state, or the GPU power supply enable signal is used to indicate that the multiple power supplies of the GPU are powered off, it can be determined that the second sub power supply needs to be powered off to enter the sleep state, or the second sub power supply needs to be powered off to reduce the temperature of the GPU, or the GPU power supply is in the power-off process. Therefore, the EC can control the second sub power supply to be powered off or stop supplying power to the GPU at this time. It can be seen that, through the technical solution, the second sub power supply can be powered on according to the power-on sequence of the second sub power supply in the preset power-on sequence on the basis of ensuring that the second sub power supply is associated with the temperature of the GPU and the first power-off of the second sub power supply, thereby ensuring the correctness of the power-on and power-off sequence of the second sub power supply. At the same time, in a case that the GPU is over-temperature or needs to enter the sleep state, the second sub power supply can also be controlled to be powered off in time to prevent the GPU from being over-temperature and malfunctioning or generating unnecessary power consumption.

[0019] In a possible implementation manner of the first aspect, when the target power supply is a third sub-power supply other than the first sub-power supply and the second sub-power supply in the third type of power supply, the power management signal of the target power supply further includes: a pre-power supply state indication signal, an over-temperature indication signal, and a sleep enable signal of the third sub-power supply; the first sub-power supply does not have the sleep enable signal, and the relevance to the GPU temperature is less than a preset threshold; the pre-power supply state indication signal of the second sub-power supply cannot be acquired by the EC; the pre-power supply state indication signal is used to indicate that the pre-power supply has supplied power to the GPU or has not supplied power to the GPU; the over-temperature indication signal is used to indicate that the GPU temperature does not exceed a preset temperature or exceeds the preset temperature; and the sleep enable signal of the third sub-power supply is used to indicate that the third sub-power supply enters a sleep state or does not enter the sleep state. In the case that the target power supply is the third sub-power supply, the EC controls the power supply state of the target power supply based on the power management signal of the target power supply, including: in the case that the enable signal of the pre-power supply is used to indicate that the pre-power supply is powered on, the pre-power supply state indication signal is used to indicate that the pre-power supply has supplied power to the GPU, the over-temperature indication signal is used to indicate that the GPU temperature does not exceed a preset temperature, the sleep enable signal of the third sub-power supply is used to indicate that the third sub-power supply does not enter the sleep state, and the GPU power supply enable signal indicates that the plurality of target power supplies of the GPU are powered on, the third sub-power supply is controlled to be powered on; in the case that the enable signal of the pre-power supply is used to indicate that the pre-power supply is powered off, or the pre-power supply state indication signal is used to indicate that the pre-power supply has not supplied power to the GPU, or the over-temperature indication signal is used to indicate that the GPU temperature exceeds the preset temperature, or the sleep enable signal of the third sub-power supply is used to indicate that the third sub-power supply enters the sleep state, or the GPU power supply enable signal indicates that the plurality of target power supplies of the GPU are powered off, the third sub-power supply is controlled to be powered off.

[0020] Based on the above technical solution, in the case that the over-temperature indication signal indicates that the temperature of the GPU is normal, the previous power supply enable signal is used to indicate that the previous power supply is powered on, the previous power supply state indication signal is used to indicate that the previous power supply has supplied power to the GPU, the sleep enable signal of the third sub-power supply indicates that the third sub-power supply does not enter the sleep state, and the GPU power supply enable signal is used to indicate that the plurality of power supplies of the GPU are powered on, it can be determined that the GPU power supply is powered on and the previous power supply is powered on at this time. Therefore, the EC can control the third sub-power supply to be powered on or supply power to the GPU at this time. In the case that the over-temperature indication signal indicates that the temperature of the GPU exceeds the preset temperature, or the previous power supply enable signal is used to indicate that the previous power supply is powered off, or the previous power supply state indication signal is used to indicate that the previous power supply does not supply power to the GPU, or the sleep enable signal of the third sub-power supply indicates that the third sub-power supply enters the sleep state, or the GPU power supply enable signal is used to indicate that the plurality of power supplies of the GPU are powered off, it can be determined that the third sub-power supply needs to be powered off to enter the sleep state, or the third sub-power supply needs to be powered off to reduce the temperature of the GPU, or the GPU power supply is in the power-off process. Therefore, the EC can control the third sub-power supply to be powered off or stop supplying power to the GPU at this time. It can be seen that, through the technical solution, the third sub-power supply can be powered on in the preset power-on sequence on the basis of guaranteeing the first power-off of the third sub-power supply associated with the temperature of the GPU and having the sleep enable signal, thereby guaranteeing the correctness of the power-on and power-off sequence of the third sub-power supply. At the same time, in the case that the GPU is overheated or needs to enter the sleep state, the third sub-power supply can also be powered off in time to prevent the GPU from overheating and malfunctioning or generating unnecessary power consumption.

[0021] In a second aspect, the present application provides an electronic device, which comprises a display screen, a memory, an embedded controller (EC) and one or more processors; wherein the memory stores computer program codes, and the computer program codes comprise computer instructions, which, when executed by the EC, cause the electronic device to perform the GPU power supply control method provided in the first aspect and any possible design manner thereof.

[0022] In a third aspect, the present application provides an embedded controller, which comprises a processing unit and a memory; wherein the memory is used to store one or more computer program codes, and the computer program codes comprise computer instructions, which, when executed by the embedded controller, cause the embedded controller to perform the GPU power supply control method provided in the first aspect and any possible design manner thereof.

[0023] In a fourth aspect, the present application provides a computer readable storage medium, which comprises computer instructions, which, when executed on an electronic device, cause the electronic device to perform the GPU power supply control method provided in the first aspect and any possible design manner thereof.

[0024] In a fifth aspect, the present application provides a computer program product, which, when running on an electronic device, causes the electronic device to perform the GPU power control method according to the first aspect and any possible design of the first aspect.

[0025] It can be understood that the beneficial effects achievable by the technical solutions provided in the second aspect to the fifth aspect above can refer to the beneficial effects in the first aspect and any possible design of the first aspect, which will not be described here again. BRIEF DESCRIPTION OF DRAWINGS

[0026] Figure 1 A schematic diagram of the principle of the GPU power control method provided by the embodiments of the present application; Figure 2 A schematic diagram of the hardware architecture of an electronic device provided by the embodiments of the present application; Figure 3 A schematic diagram of the flow of a GPU power control method provided by the embodiments of the present application Figure 1 ; Figure 4 A schematic diagram of the flow of a GPU power control method provided by the embodiments of the present application Figure 2 ; Figure 5 A schematic diagram of the flow of a GPU power control method provided by the embodiments of the present application Figure 3 ; Figure 6 A schematic diagram of the flow of a GPU power control method provided by the embodiments of the present application Figure 4 ; Figure 7 A schematic diagram of the structure of a GPU power control device provided by the embodiments of the present application. DETAILED DESCRIPTION

[0027] The terms used in the following embodiments of the present application are only for the purpose of describing the specific embodiments and are not intended to be limiting of the present application. As used in the specification and the appended claims of the present application, the singular forms “a,” “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that “ / ” means or, for example, A / B can mean A or B; and “and / or” in the text merely describes an associated relationship with the associated objects, which means that there can be three relationships, for example, A and / or B, which means that there are three cases of A alone, A and B together, and B alone.

[0028] Reference within this application to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase "in an embodiment" in various places in the specification are not necessarily all referring to the same embodiment, nor are they necessarily all referring to a common set of embodiments, of the application. It will be explicitly understood that the application described herein can be combined with another embodiment to form another embodiment that can be claimed.

[0029] The terms "first", "second", etc. in the following embodiments of the present application are used only for descriptive purposes and should not be construed as implying or suggesting relative importance or a specific number of the technical features indicated. Thus, the features defined with "first", "second" can explicitly or implicitly include one or more of the features, and in the description of the embodiments of the present application, the meaning of "a plurality of" is two or more, unless otherwise specified.

[0030] Firstly, the nouns involved in the embodiments of the present application are described as follows: Graphics processing unit (GPU): GPU is also called display core, display chip, video processor, etc., which is a kind of coprocessor for processing image and graphics operation , widely used in mobile phones, tablet computers, notebook computers and other electronic devices. GPU is a microprocessor specially designed for parallel computing, whose architecture takes high-density computing unit as the core, and the typical feature is to contain thousands of small stream processors (such as NVIDIA's unified computing device architecture (CUDA) core or AMD's Stream Processors (SP)). Compared with central processing unit (CPU), GPU realizes super large scale parallel task processing through the advantage of quantity, such as rendering millions of pixels at the same time or matrix operation in deep learning.

[0031] Embedded Controller (EC): EC is a low-power microcontroller (MCU) dedicated to system management, commonly found in mobile platforms such as laptops, servers, etc. Its core feature is always-on, even if the host is hibernating or shutting down, EC can still monitor the hardware state and respond to wake-up instructions (such as lid-open wake-up, keyboard shortcuts). In the embodiments of the present application, EC can also be used to communicate with the controllers (or power supply chips) of each power supply of the GPU, thereby controlling the power-on and power-off timing of multiple power supplies of the GPU.

[0032] Low level: Low level is a low voltage opposite to high level, which is a statement in electrical engineering. In digital logic circuits, low level refers to the maximum input level allowed when the input of a logic gate is low. When the input level is lower than the preset low voltage, the input level is considered low. In digital logic circuits, low level can be represented by "0". In different circuits, the preset low voltage corresponding to low level can be different.

[0033] High level (or high level signal): High level refers to high voltage opposite to low level, which is a statement in electrical engineering. In digital logic circuits, high level refers to the minimum input level allowed when the input of a logic gate is high. When the input level is higher than the preset high voltage, the input level is considered high. In digital logic circuits, high level can be represented by "1". In different circuits, the preset high voltage corresponding to high level can be different.

[0034] AND gate: AND gate is one of the commonly used logic gates, also known as AND circuit. If only all conditions are met, an event will occur, this logical relationship is called "AND" logical relationship. The circuit with "AND" logical relationship is called AND gate. AND gate is a basic logic gate circuit that performs "AND" operation, with multiple input terminals and one output terminal. When all inputs are high (logic 1) at the same time, the output is high, otherwise the output is low (logic 0).

[0035] OR gate: OR gate is one of the commonly used logic gates, also known as OR circuit. If only one condition is met, an event will occur, this relationship is called "OR" logical relationship. The circuit with "OR" logical relationship is called OR gate. OR gate is a basic logic gate circuit that performs "OR" operation, with multiple input terminals and one output terminal. As long as one of the inputs is high, the output is high; only when all inputs are low, the output is low.

[0036] Enable Signal: Enable Signal is a control signal in digital circuits that enables / disables a specific module or operation through a high level (logic 1) or low level (logic 0). Its essence is a dynamic resource allocation mechanism used to optimize system power consumption and performance.

[0037] Power on: Power on refers to the process of switching a device or system from a power-off state (no power input) to a power-on state (power input). In this embodiment, the power-on of the GPU refers to the power supply of the GPU starting to supply power to the GPU.

[0038] Power off: Power off refers to the process of switching a device or system from a power-on state to a power-off state.

[0039] Input / Output (I / O) signal: I / O signal is an electrical signal used to exchange data with external devices in computers or industrial control systems, covering both input (such as sensor data) and output (such as actuator control) functions.

[0040] In the prior art, electronic devices such as mobile phones, tablets, and laptops often have graphics cards (stand-alone graphics cards or integrated graphics cards) that can improve the display effect of electronic devices. Due to hardware protection, energy efficiency optimization, and other purposes, the GPU in the graphics card of the electronic device often has multiple different power supplies. In order to ensure the normal operation of the GPU, the power-on and power-off of the multiple power supplies of the GPU have strict timing requirements.

[0041] In related technical solutions, in order to ensure the power-on and power-off timing of the multiple power supplies in the GPU, a corresponding timing control circuit is built using capacitors, resistors, diodes, and logic gates. However, this technical solution is high in cost, prone to errors, and difficult to debug.

[0042] To solve the above problems, the present embodiment provides a GPU power control method applied in an electronic device. In this technical solution, referring to Figure 1 As shown in the figure, the embedded controller EC in the electronic device obtains a power management signal related to the power state of the target power supply of the GPU when the GPU needs to work or stop working. The power state includes a power-on state or a power-off state. When a certain target power supply is powered on or supplies power to the GPU, it means that the target power supply is in a power-on state; when a certain target power supply is powered off or stops supplying power to the GPU, it means that the target power supply is in a power-off state. Then, the EC can adjust the power enable signal in the multiple power management signals based on the power management signal of the target power supply to control the power state of the target power supply, so that the multiple target power supplies of the GPU are powered on according to the preset power-on timing or powered off according to the preset power-off timing.

[0043] It can be seen that in the technical solution provided in the present application, the EC possessed by the electronic device itself can be used to fully analyze a plurality of power management signals related to the power state of the GPU, so as to adjust the power enable signal for controlling the power state of the plurality of power supplies of the GPU, so as to achieve the purpose of powering on the plurality of power supplies of the GPU according to the preset power-on timing or powering off the plurality of power supplies of the GPU according to the preset power-off timing. Since the control of the power-on and power-off timing of the plurality of power supplies of the GPU in the entire technical solution reuses the EC of the electronic device itself, compared with the prior art scheme of using a plurality of components to control the power-on and power-off timing of the plurality of power supplies of the GPU, the cost is lower and the scheme is more simple and convenient.

[0044] Further, since the EC is a programmable device, the analysis of the plurality of power management signals and the adjustment of the power enable signal based on the analysis result can be realized through programming. Once the power-on and power-off timing is wrong or needs to be adjusted, it can be more convenient to debug or adjust, so that the power-on and power-off timing of the GPU is more accurate, the fault handling when a fault occurs is faster, and the user experience is improved.

[0045] The technical solution provided in the embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0046] The technical solution provided in the present application can be applied to an electronic device with a graphics card (or GPU) and an EC (Embedded Controller). In some embodiments, the electronic device can be a mobile phone, a tablet computer, a handheld computer, a personal computer (PC), an ultra-mobile personal computer (UMPC), a netbook, a cellular phone, a personal digital assistant (PDA), an augmented reality (AR) device, a virtual reality (VR) device, an artificial intelligence (AI) device, a wearable device, a vehicle-mounted device, a smart home device, and / or a smart city device, etc. The specific type of the electronic device is not specially limited in the embodiments of the present application.

[0047] Exemplarily, the electronic device in the embodiments of the present application can be in an electronic device with a heterogeneous SOC. In some embodiments, the electronic device can be a notebook computer, a mobile phone, a tablet computer, a handheld computer, a personal computer (PC), an ultra-mobile personal computer (UMPC), a netbook, and an electronic device such as a cellular phone, a personal digital assistant (PDA), an augmented reality (AR) device, a virtual reality (VR) device, an artificial intelligence (AI) device, a wearable device, an in-vehicle device, a smart home device, and / or a smart city device, and the like. The specific type of the electronic device is not specially limited in the embodiments of the present application.

[0048] Exemplarily, taking the notebook computer as an example, Figure 2 A structural schematic diagram of an electronic device provided by the embodiments of the present application is shown.

[0049] Referring to Figure 2 As shown in the figure, the electronic device can include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, an antenna 1, a touchpad 150, a wireless communication module 160, an audio module 170, a loudspeaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, a sensor module 180, a key 190, a motor 191, an indicator 192, a display screen 193, and a camera 194, and the like. The sensor module 180 can include a pressure sensor, a gyroscope sensor, a magnetic sensor, an acceleration sensor, a gravity sensor, a distance sensor, a proximity light sensor, a fingerprint sensor, a temperature sensor, a touch sensor, an ambient light sensor, and the like.

[0050] The other devices (such as the processor 110, the external memory interface 120, the internal memory 121, the universal serial bus interface 130, the charging management module 140, the power management module 141, the battery 142, the antenna 1, the touchpad 150, the wireless communication module 160, the audio module 170, the loudspeaker 170A, the receiver 170B, the microphone 170C, the earphone interface 170D, the sensor module 180, the key 190, the motor 191, the indicator 192, and the camera 194, etc.) other than the display screen 193 can be arranged on the base of the notebook computer. The camera 194 can also be arranged on the frame of the display screen 193 of the notebook computer.

[0051] The processor 110 can specifically include one or more processing units. For example, the processor 110 can include an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a neural-network processing unit (NPU), a controller, a memory, a video codec, a digital signal processor (DSP), a baseband processor, etc. Different processing units can be independent devices or integrated in one or more processors.

[0052] The controller can be the nerve center and command center of the electronic device. The controller can generate operation control signals according to command operation codes and timing signals, and complete the control of command fetching and command execution.

[0053] In the embodiments of the present application, the controller in the electronic device can include an embedded controller EC. The EC can be used to communicate with the controllers (or power supply chips) of each power supply of the GPU, so as to obtain all power management signals related to the power supply state of the GPU, and adjust the power supply enable signal based on the power management signal, so as to control the power-on and power-off timing of the multiple power supplies of the GPU. That is, the EC can be specifically used to execute the GPU power control method provided in the embodiments of the present application.

[0054] The memory in the processor 110 can also be provided for storing commands and data. In some embodiments, the memory in the processor 110 is a cache memory. The memory can save the commands or data that have just been used or recycled by the processor 110. If the processor 110 needs to use the commands or data again, it can be directly called from the memory. This avoids repeated access and reduces the waiting time of the processor 110, thereby improving the efficiency of the system.

[0055] In some embodiments, the processor 110 can include one or more interfaces. The interfaces can include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a subscriber identity module (SIM) interface, and / or a universal serial bus (USB) interface, etc.

[0056] The charging management module 140 is configured to receive charging input from a charger to charge the battery 142. The charger can be a wireless charger or a wired charger. In some embodiments of wired charging, the charging management module 140 can receive charging input from a wired charger through the USB interface 130. In some embodiments of wireless charging, the charging management module 140 can receive wireless charging input through a receiving coil in a wireless charging chip of the electronic device.

[0057] The charging management module 140 can charge the battery 142 and also supply power to the electronic device through the power management module 141.

[0058] The power management module 141 is configured to connect the battery 142, the charging management module 140, and the processor 110. The power management module 141 receives input from the battery 142 and / or the charging management module 140 to supply power to the processor 110, the internal memory 121, the display 193, the camera 194, and the wireless communication module 160, etc. The power management module 141 can also be configured to monitor parameters such as voltage, current, battery cycle count, battery health status (leakage, impedance), etc. of the battery. In other embodiments, the power management module 141 can also be disposed in the processor 110. In some embodiments, the charging management module 140 and the power management module 141 can be disposed in the same device.

[0059] The external memory interface 120 can be used to connect an external nonvolatile memory, to extend the storage capacity of the electronic device. The external nonvolatile memory communicates with the processor 110 through the external memory interface 120 to perform a data storage function. For example, files such as music, videos, and the like are stored in the external nonvolatile memory.

[0060] The internal memory 121 can include one or more random access memories (RAMs) and one or more non-volatile memories (NVMs). The random access memory can be directly read and written by the processor 110, and can be used to store executable programs (e.g., machine commands) of an operating system or other programs that are currently running, and can also be used to store data of users and application programs, and the like. The non-volatile memory can also store executable programs and store data of users and application programs, and can be loaded in advance into the random access memory for direct reading and writing by the processor 110.

[0061] The touch sensor, also referred to as a "touch device". The touch sensor can be disposed on the display screen 193, and the touch sensor and the display screen 193 form a touch screen, also referred to as a "touch screen". The touch sensor is used to monitor touch operations acting on or near it. The touch sensor can pass the monitored touch operation to the application processor to determine the touch event type. Visual output related to the touch operation can be provided through the display screen 193. In other embodiments, the touch sensor can also be disposed on the surface of the electronic device, which is different from the position where the display screen 193 is located.

[0062] The keys 190 include a power-on key, a volume key, and the like. The keys 190 can be mechanical keys. They can also be touch keys. The electronic device can receive key input and generate key signal input related to user settings and function control of the electronic device.

[0063] The indicator 192 can be an indicator light, which can be used to indicate the charging state, the power change, and can also be used to indicate messages, missed calls, notifications, and the like. In some embodiments, the indicator 192 can be disposed near the USB interface.

[0064] The motor 191 can generate a vibration prompt. For example, touch operations acting on different applications (such as games, audio playback, and the like) can correspond to different vibration feedback effects. Touch operations acting on different regions of the display screen 193 can also correspond to different vibration feedback effects. Different application scenarios (such as time reminders, alarms, games, and the like) can also correspond to different vibration feedback effects. The touch vibration feedback effect can also support customization.

[0065] The camera 194 is configured to capture still images or videos. An object projects an optical image through a lens to a photosensitive element. The photosensitive element can be a charge coupled device (CCD) or a complementary metal-oxide-semiconductor (CMOS) phototransistor. The photosensitive element converts the optical signal into an electrical signal, which is then transmitted to an ISP for conversion into a digital image signal. The ISP outputs the digital image signal to a DSP for processing. The DSP converts the digital image signal into a standard image signal in RGB, YUV, or the like. In some embodiments, the electronic device can include one or N cameras 194, where N is a positive integer greater than 1.

[0066] The electronic device implements the display function through a GPU, the display screen 193, and an application processor, etc. The GPU is a microprocessor for image editing, connected to the display screen 193 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. The processor 110 can include one or more GPUs that execute program commands to generate or change display information. In the embodiments of the present application, the GPU is also used to cooperate with the NPU to complete the frame interpolation of the video.

[0067] In some embodiments, taking the GPU as an Nvidia GPU for example, the GPU can have the following power supplies: 1V2_POWER, 1V8_POWER, MSVDD_POWER, NVVDD_POWER, PEXVDD_POWER, and FBVDD_POWER. Among them, 1V2_POWER refers to a 1.2V voltage source, and 1V8_POWER refers to a 1.8V voltage source. In addition, each power supply can have a corresponding power chip to realize the power supply control of the corresponding power supply and the input and output of related power management signals.

[0068] Since the voltages required by different components (such as GPIO interface, peripheral component interconnect express (PCIe) interface, register, video memory, etc.) of the GPU when working normally can be different, and the power-on / power-off of different components needs to have a fixed sequence based on the hardware design, the multiple power supplies of the GPU need to be powered on according to a preset power-on sequence when the GPU is powered on. When the GPU is powered off, the multiple power supplies of the GPU need to be powered off according to a preset power-off sequence. The preset power-on sequence and the preset power-off sequence are different.

[0069] In some embodiments, the power-up sequence of these power supplies can be specified as: 1V2_POWER -> 1V8_POWER -> MSVDD_POWER -> NVVDD_POWER and PEXVDD_POWER -> FBVDD_POWER when the GPU needs to be powered up.

[0070] In some embodiments, the power-down sequence of these power supplies can be specified as: MSVDD_POWER, NVVDD_POWER and PEXVDD_POWER -> FBVDD_POWER -> 1V2_POWER -> 1V8_POWER when the GPU needs to be powered down.

[0071] ISP is used to process the data feedback by the camera 194. For example, when taking a photo, the shutter is opened, the light is transmitted to the camera photosensitive element through the lens, the light signal is converted into an electric signal, and the camera photosensitive element transmits the electric signal to the ISP for processing, and converts it into a visible image. ISP can also optimize the noise and brightness of the image through algorithm. ISP can also optimize the exposure, color temperature and other parameters of the shooting scene. In some embodiments, the ISP can be arranged in the camera 194. The camera 194 is used to capture still images or videos.

[0072] The digital signal processor is used to process digital signals, in addition to being able to process digital image signals, it can also process other digital signals. For example, when the electronic device selects a frequency point, the digital signal processor is used to perform Fourier transform on the frequency point energy, etc.

[0073] The video codec is used to compress or decompress digital video. The electronic device can support one or more video codecs. In this way, the electronic device can play or record videos in multiple encoding formats, such as: moving picture experts group (MPEG) 1, MPEG 2, MPEG 3, MPEG 4, etc.

[0074] The display screen 193 is configured to display images, videos, and the like. The display screen 193 includes a display panel. The display panel can be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), a Miniled, a Micro Led, a Micro-oLed, a quantum dot light emitting diode (QLED), or the like. In some embodiments, the electronic device can include one or N display screens 193, where N is a positive integer greater than 1.

[0075] The antenna 1 is configured to transmit and receive electromagnetic wave signals. Each antenna in the electronic device can be configured to cover a single or multiple communication frequency bands. Different antennas can also be multiplexed to improve the utilization of the antennas.

[0076] The wireless communication module 160 can provide solutions for wireless communication, including wireless local area networks (WLAN) (e.g., wireless fidelity (Wi-Fi) networks), Bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), infrared (IR) technology, and the like, which can be applied to the electronic device. The wireless communication module 160 can be one or more devices that integrate at least one communication processing module. The wireless communication module 160 receives electromagnetic waves via the antenna 1, performs frequency modulation and filtering processing on the electromagnetic wave signals, and sends the processed signals to the processor 110. The wireless communication module 160 can also receive signals to be transmitted from the processor 110, perform frequency modulation, amplification, and convert the signals to electromagnetic wave radiation via the antenna 1.

[0077] In some embodiments, the antenna 1 and the wireless communication module 160 of the electronic device are coupled, so that the electronic device can communicate with networks and other devices through wireless communication technologies. The wireless communication technologies can include wireless local area networks, Bluetooth, global navigation satellite systems, frequency modulation, near field communication technologies, infrared technologies, and the like.

[0078] It can be understood that the interface connection relationship between the modules shown in the embodiments of the present application is only illustrative and does not constitute a structural limitation on the electronic device. In other embodiments of the present application, the electronic device can also use different interface connection modes or a combination of multiple interface connection modes.

[0079] Of course, it can be understood that the above Figure 2 The examples shown are only illustrative examples when the electronic device is a notebook computer. If the electronic device is a mobile phone, a tablet computer, a handheld computer, a PC, a PDA, a wearable device (such as a smart watch, a smart bracelet), or other device forms, the structure of the electronic device can include fewer structures than those shown in the above Figure 2 , or can include more structures than those shown in the above Figure 2 , which is not limited herein.

[0080] The technical solutions provided in the embodiments of the present application can be implemented in an electronic device with the above hardware architecture.

[0081] Based on the hardware architecture of the electronic device introduced in the above embodiments, the GPU power control method provided by the embodiments of the present application will be introduced below in combination with the drawings.

[0082] In the embodiments of the present application, the purpose of the GPU power control method is to use the free EC of the electronic device to more simply complete the control of the power-on and power-off timing of multiple powers of the GPU, thereby reducing the cost of the control of the power-on and power-off timing of the GPU in the electronic device. The control process of the power-on timing of multiple powers of the GPU can be referred to as a GPU power-on control process, and the control process of the power-off timing of multiple powers of the GPU can be referred to as a GPU power-off control process.

[0083] The GPU power control method provided by the embodiments of the present application will be introduced below in combination with 3. Figure 3 The flowchart of the GPU power control method provided by the embodiments of the present application is shown in FIG. 3, and the method can be specifically executed by the EC in the electronic device. Referring to FIG. 3, the electronic device is a notebook computer, the GPU in the electronic device is a Nvidia GPU, and the Nvidia GPU has five powers, 1V2_POWER, MSVDD_POWER, NVVDD_POWER, PEXVDD_POWER, and FBVDD_POWER. The GPU power control method can include S301-S320. Figure 3 S301, in the case of normal operation of the electronic device, the EC receives a GPU power enable signal.

[0084] ​In this embodiment, the normal operation of the electronic device specifically refers to the following: the system main power supply voltage / system total power supply / system voltage cabinet (VSYS) provides a stable power supply, and all functional modules of the electronic device can be used normally (or the system can be referred to as powered on). Here, "functional module can be used normally" means that the power supply to the functional module is stable and it can be used normally.

[0085] When an electronic device requires the GPU to work, the GPU power control method is specifically a GPU power-on control process. In the GPU power-on control process, the GPU power enable signal is used to instruct multiple power supplies of the GPU to power on, or to instruct multiple power supplies of the GPU to supply power to the GPU.

[0086] When an electronic device requires the GPU to stop working, the GPU power control method is specifically a GPU power-down control process. In the GPU power-down control process, the GPU power enable signal is used to instruct multiple power supplies of the GPU to power down, or to instruct multiple power supplies of the GPU to stop supplying power to the GPU.

[0087] In some embodiments, the GPU power enable signal can specifically be the GPU_PWREN signal. This GPU_PWREN signal can be a level signal generated and sent to the GPU in real time or periodically by the CPU in the electronic device during normal operation, based on the current usage requirements of the GPU. When the GPU_PWREN signal is high, it is used to instruct multiple power supplies of the GPU to power on, or to instruct multiple power supplies of the GPU to supply power to the GPU. When the GPU_PWREN signal is low, it is used to instruct multiple power supplies of the GPU to power off, or to instruct multiple power supplies of the GPU to stop supplying power to the GPU. The CPU can generate different GPU_PWREN signals according to actual needs; for example, it can generate a high-level GPU_PWREN signal when the GPU needs to work, and a low-level GPU_PWREN signal when the GPU needs to stop working.

[0088] For example, refer to Figure 4 As shown, when VSYS is powered on and the system is powered on, the CPU can send GPU_PWREN to the EC. This application does not impose specific restrictions on the timing of the generation and transmission of the GPU power enable signal; the specific timing depends on the actual requirements.

[0089] Based on the above description, if the GPU power enable signal is the GPU_PWREN signal, in the GPU power up control process, the GPU_PWREN signal is a high level signal; in the GPU power down control process, the GPU_PWREN signal is a low level signal.

[0090] After the EC receives the GPU power enable signal, the EC can start to control the power up or power down of the plurality of power supplies of the GPU, so that the plurality of power supplies of the GPU are powered up according to the preset power up timing, or are powered down according to the preset power down timing, that is, S302-S319 are executed.

[0091] S302, the EC judges whether the FBVDD state indication signal indicates that the FBVDD_POWER has supplied power to the GPU, or whether the GPU power enable signal indicates that the plurality of power supplies of the GPU are powered up.

[0092] The FBVDD state indication signal is used to indicate that the FBVDD_POWER has supplied power to the GPU, or is used to indicate that the FBVDD_POWER has not supplied power to the GPU.

[0093] In some embodiments, the FBVDD state indication signal can be the FBVDD_PWRGD signal. The FBVDD_PWRGD is a level signal output by the power supply chip (integrated circuit, IC) of the FBVDD_POWER.

[0094] For the power supply chip of the FBVDD_POWER, when the power supply chip of the FBVDD_POWER receives the FBVDD enable signal (i.e. the high level FBVDD_POWER_EN) indicating the power up of the FBVDD_POWER, the power supply chip of the FBVDD_POWER can output the FBVDD to be used by the GPU, that is, the FBVDD_POWER is powered up. At the same time, the power supply chip of the FBVDD_POWER can output the high level FBVDD_PWRGD signal. The high level FBVDD_PWRGD signal is specifically used to indicate that the FBVDD_POWER has supplied power to the GPU. That is, the FBVDD state indication signal at this time is used to indicate that the FBVDD_POWER has supplied power to the GPU.

[0095] When the power chip of the FBVDD_POWER receives the FBVDD enable signal indicating the FBVDD_POWER to power on (i.e., the FBVDD_POWER_EN at a low level), the power chip of the FBVDD_POWER stops outputting the FBVDD to the GPU, i.e., the FBVDD_POWER is powered off. Meanwhile, the power chip of the FBVDD_POWER can output the FBVDD_PWRGD signal at a low level. The FBVDD_PWRGD signal at a low level specifically indicates that the FBVDD_POWER does not supply power to the GPU. That is, the FBVDD state indication signal at this time indicates that the FBVDD_POWER does not supply power to the GPU.

[0096] Based on the above description, in the GPU power-on control process, the EC starts to power on the various power supplies of the GPU only after receiving the GPU power enable signal indicating the GPU to power on. At this time, the power chip of the FBVDD_POWER has not received the FBVDD enable signal indicating the FBVDD_POWER to power on (i.e., not powered on), and the FBVDD_POWER is still in the powered-off state. Therefore, the FBVDD state indication signal indicates that the FBVDD_POWER does not supply power to the GPU. If the FBVDD state indication signal is the FBVDD_PWRGD signal, in the GPU power-on control process, the FBVDD_PWRGD signal is at a low level.

[0097] In the GPU power-off control process, the EC starts to power off the various power supplies of the GPU only after receiving the GPU power enable signal indicating the GPU to power off. At this time, the power chip of the FBVDD_POWER has not received the FBVDD enable signal indicating the FBVDD_POWER to power off, and the FBVDD_POWER is still in the powered-on state. Therefore, the FBVDD state indication signal indicates that the FBVDD_POWER supplies power to the GPU. If the FBVDD state indication signal is the FBVDD_PWRGD signal, in the GPU power-off control process, the FBVDD_PWRGD signal is at a high level.

[0098] In some embodiments, the interface through which the power chip of the FBVDD_POWER outputs the FBVDD_PWRGD signal is connected to an input interface (e.g., a GPIO interface) of the EC. In this way, the EC can obtain the FBVDD_PWRGD signal output by the power chip of the FBVDD_POWER at any time. That is, the EC can obtain the FBVDD state indication signal at any time. Of course, in practice, the EC can obtain the FBVDD state indication signal in other possible manners.

[0099] S302 is executed in the sense that: in the GPU power-on control process, 1V2_POWER of each power supply of the GPU needs to be powered on first, so after the EC receives the GPU power enable signal for indicating the power-on of the multiple power supplies of the GPU, 1V2_POWER should be powered on first. But in the GPU power-off control process, 1V2_POWER needs to be powered off after FBVDD_POWER is powered off, so in the GPU power-off control process, the EC will not power off 1V2_POWER first after receiving the GPU_PWREN signal for indicating the power-off of the multiple power supplies of the GPU.

[0100] Therefore, if the EC directly controls 1V2_POWER to be powered on after receiving the GPU power enable signal for indicating the power-on of the multiple power supplies of the GPU, it will cause the actions performed by the EC after receiving the GPU_PWREN signal in the GPU power-on control process and the GPU power-off control process to be quite different, and further make the GPU power control method process performed by the EC more complex, and the related programming more complicated. Therefore, in order to reduce the uniformity of the actions performed by the EC in the GPU power-on control process and the GPU power-off control process as much as possible, and reduce the complexity of the corresponding programming, it is necessary to determine whether to control 1V2_POWER to be powered on or powered off based on the FBVDD state indication signal before controlling 1V2_POWER to be powered on or powered off. Based on this, after the EC receives the GPU power enable signal, it can determine whether to control 1V2_POWER to be powered on or powered off based on the state indication signal of BVDD_POWER and the GPU power enable signal.

[0101] In the case where the FBVDD state indication signal is used to indicate that FBVDD_POWER has supplied power to the GPU, or the GPU power enable signal is used to indicate the power-on of the multiple power supplies of the GPU, it can be determined that this time is in the GPU power-on process, or this time is in the GPU power-off process and FBVDD_POWER has not been powered off. Therefore, at this time, the EC can output the 1V2 enable signal for indicating the power-on of 1V2_POWER, so that 1V2_POWER and 1V8_POWER are powered on in turn or supply power to the GPU, that is, S303 is executed. In addition, while executing S303, the EC can determine whether the MSVDD_POWER that should be powered on after 1V8_POWER can be powered on, that is, S305 is executed.

[0102] If the FBVDD status indicator signal indicates that FBVDD_POWER is not supplying power to the GPU, and the GPU power enable signal indicates that multiple GPU power supplies are powered down, then it can be determined that the GPU power-down process is underway and FBVDD_POWER has been powered down. Therefore, the EC can output a power-down signal for 1V2_POWER to indicate that 1V2_POWER is powered down, so that 1V2_POWER and 1V8_POWER are powered down or stop supplying power to the GPU in sequence, i.e., S304 is executed. In addition, while executing S304, since it can be determined that all power supplies of the GPU except 1V2_POWER and 1V8_POWER have been powered down, but the execution of S302 is necessarily the second execution in the GPU power-down process, in order to ensure the integrity of the entire GPU power control method and the consistency of the actions executed in the GPU power-on control process and the GPU power-down control process, the EC can determine whether MSVDD_POWER, which is the first power-down in the power-down sequence, can be powered down. To ensure consistency in the actions performed during the GPU power-on and power-off control processes, and since MSVDD_POWER only has two states—power-off and power-on—the operation of determining whether MSVDD_POWER, which is the first to power off in the power-off sequence, is powered off can be the same operation as the operation of determining whether MSVDD_POWER, which is powered on after 1V8_POWER in the power-on sequence, is powered on. That is, S305 is executed simultaneously with S304.

[0103] In some embodiments, if the FBVDD status indicator signal is the FBVDD_PWRGD signal and the GPU power enable signal is the GPU_PWREN signal, then refer to Figure 4 As shown, when the EC obtains the GPU_PWREN signal, the specific implementation of S302 can be as follows: the EC uses OR gate logic to determine the first result of the FBVDD_PWRGD signal and the GPU_PWREN signal. Specifically, the EC using OR gate logic to determine the first result of the FBVDD_PWRGD signal and the GPU_PWREN signal can mean that the EC uses the FBVDD_PWRGD signal and the GPU_PWREN signal as inputs to the OR gate logic, determines the output result of the OR gate logic, and this output result is the first result.

[0104] Then, based on the first result, the EC can output an enable signal for 1V2_POWER, i.e., a 1V2 enable signal. This 1V2 enable signal can be a 1V2_POWER_EN signal.

[0105] In a case where the first result is a high level (or a logic "1"), referring to the related description in the foregoing embodiments, the EC can output a 1V2 enable signal for indicating 1V2_POWER power-on, so as to power on the 1V2_POWER. In a case where the first result is a low level (or a logic "0"), referring to the related description in the foregoing embodiments, the EC can output a 1V2 enable signal for indicating 1V2_POWER power-off, so as to power off the 1V2_POWER.

[0106] S303, the EC outputs a 1V2 enable signal for indicating 1V2_POWER power-on, so as to power on the 1V2_POWER.

[0107] In some embodiments, the 1V2 enable signal for indicating 1V2_POWER power-on can be a 1V2_POWER_EN signal at a high level.

[0108] In the embodiments of the present application, the EC can specifically output, to a power chip of the 1V2_POWER, a 1V2 enable signal for indicating 1V2_POWER power-on. In a case where the 1V2_POWER is powered on, the power chip of the 1V2_POWER further outputs, to a power chip of the 1V8_POWER, a 1V8 enable signal for indicating 1V8_POWER power-on, so as to power on the 1V8_POWER or supply power to the GPU. In this way, after the EC outputs the 1V2 enable signal for indicating 1V2_POWER power-on, the 1V2_POWER and the 1V8_POWER can be sequentially powered on.

[0109] In some embodiments, the 1V8 enable signal for indicating 1V8_POWER power-on can be a 1V2_POWER state indication signal for indicating that the 1V2_POWER has supplied power to the GPU. The 1V2_POWER state indication signal for indicating that the 1V2_POWER has supplied power to the GPU can be a 1V2_PWRGD signal at a high level, and the 1V2_PWRGD is a level signal output by the power chip of the 1V2_POWER.

[0110] For the power chip of 1V2_POWER, when the power chip of 1V2_POWER receives a 1V2 enable signal (i.e., a 1V2_POWER power-on signal, which can be a high-level 1V2_POWER_EN signal) indicating that 1V2_POWER is powered on, the power chip of 1V2_POWER can output 1V2 for the GPU to use, i.e., 1V2_POWER is powered on. At the same time, the power chip of 1V2_POWER can output a high-level 1V2_PWRGD signal. The high-level 1V2_PWRGD signal is specifically used to indicate that 1V2_POWER has supplied power to the GPU, and to indicate that 1V8_POWER is powered on. That is, the 1V8 enable signal at this time is used to indicate that 1V8_POWER is powered on, or to indicate that 1V8_POWER supplies power to the GPU.

[0111] In some embodiments, an output interface of the EC is connected to an interface of the power chip of 1V2_POWER that inputs an enable signal, and an interface of the power chip of 1V2_POWER that outputs a FBVDD_PWRGD signal is connected to an interface of the power chip of 1V8_POWER that inputs an enable signal. In this way, the EC can output a 1V2 enable signal to the power chip of 1V2_POWER in real time, and the power chip of 1V2_POWER can also output a 1V2_PWRGD signal to the power chip of 1V8_POWER at any time. Of course, in practice, the EC outputs a 1V2 enable signal, and the power chip of 1V2_POWER outputs a 1V2_PWRGD signal in any other possible manner.

[0112] In some embodiments, if the 1V2 enable signal used to indicate that 1V2_POWER is powered on is a high-level 1V2_POWER_EN, and the 1V8 enable signal used to indicate that 1V8_POWER is powered on is a high-level 1V2_PWRGD signal, the specific implementation of S303 can be that the EC outputs a high-level 1V2_POWER_EN to power on 1V2_POWER, and the power chip of 1V2_POWER outputs a high-level 1V2_PWRGD signal to power on 1V8_POWER. In some embodiments, since the power chip of 1V2_POWER outputs a low-level 1V2_PWRGD signal when 1V2_POWER is not powered on (or powered off), the process of powering on 1V2_POWER so that the power chip of 1V2_POWER outputs a high-level 1V2_PWRGD signal can be referred to as pulling up the 1V2_PWRGD signal.

[0113] S304, the EC outputs a 1V2 enable signal used to indicate that 1V2_POWER is powered off, to power off 1V2_POWER.

[0114] In some embodiments, the 1V2 enable signal for instructing the 1V2_POWER to power off can be a low-level 1V2_POWER_EN signal.

[0115] In the embodiments of the present application, the EC can output, to a power supply chip of the 1V2_POWER, a 1V2 enable signal for instructing the 1V2_POWER to power off. In the case that the 1V2_POWER powers off, the power supply chip of the 1V2_POWER further outputs, to a power supply chip of the 1V8_POWER, a 1V8 enable signal for instructing the 1V8_POWER to power off, so as to make the 1V8_POWER power off or stop supplying power to the GPU. In this way, after the EC outputs the 1V2 enable signal for instructing the 1V2_POWER to power off, the 1V2_POWER and the 1V8_POWER can be powered off in sequence.

[0116] In some embodiments, the 1V8 enable signal for instructing the 1V8_POWER to power off can be a 1V2_POWER state indication signal for instructing the 1V2_POWER to stop supplying power to the GPU. The 1V2_POWER state indication signal for instructing the 1V2_POWER to stop supplying power to the GPU can be a low-level 1V2_PWRGD signal.

[0117] For the power supply chip of the 1V2_POWER, after the power supply chip of the 1V2_POWER receives the 1V2 enable signal for instructing the 1V2_POWER to power off (i.e., the low-level 1V2_POWER_EN), the power supply chip of the 1V2_POWER can stop outputting the 1V2 to be used by the GPU, i.e., the 1V2_POWER powers off. Meanwhile, the power supply chip of the 1V2_POWER can output a low-level 1V2_PWRGD signal. The low-level 1V2_PWRGD signal is specifically used for instructing the 1V2_POWER to stop supplying power to the GPU and for instructing the 1V8_POWER to power off. That is, the 1V8 enable signal at this time is used for instructing the 1V8_POWER to power off or for instructing the 1V8_POWER to stop supplying power to the GPU.

[0118] In some embodiments, if the 1V2 enable signal for indicating 1V2_POWER power-off is low 1V2_POWER_EN, and the 1V8 enable signal for indicating 1V8_POWER power-off is low 1V2_PWRGD signal, the specific implementation of S304 can be: the EC outputs low 1V2_POWER_EN to make 1V2_POWER power-off, and the power supply chip of 1V2_POWER outputs low 1V2_PWRGD signal to make 1V8_POWER power-off. In some embodiments, since the power supply chip of 1V2_POWER outputs high 1V2_PWRGD signal when 1V2_POWER is not powered off (or powered on), the process of 1V2_POWER powering off to make the power supply chip of 1V2_POWER output low 1V2_PWRGD signal can be referred to as pulling down 1V2_PWRGD signal.

[0119] It should be noted that in the execution process of the GPU power supply control method, S303 and S304 are executed alternatively, not simultaneously, and the specific one to be executed is determined according to the actual situation.

[0120] S305, the EC judges whether the over-temperature indication signal indicates that the GPU temperature is normal, and the MSVDD sleep enable signal indicates that the MSVDD_POWER does not enter the sleep state, and the 1V2 enable signal indicates that the 1V2_POWER is powered on, and the GPU power supply enable signal indicates that the plurality of power supplies of the GPU are powered on.

[0121] Among them, the over-temperature indication signal is used to indicate that the GPU temperature is normal, or to indicate that the GPU temperature exceeds the preset temperature. The MSVDD sleep enable signal is used to indicate that the MSVDD_POWER enters the sleep state, or to indicate that the MSVDD_POWER does not enter the sleep state. In the embodiment of the application, the normal GPU temperature means that the GPU temperature does not exceed (or is less than or equal to) the preset temperature.

[0122] In some embodiments, the over-temperature indication signal can be the OVERT_N signal output by the GPU or the temperature sensor in the GPU, and the OVERT_N signal can be a level signal. When the GPU or the temperature sensor in the GPU detects that the temperature of the GPU does not exceed the preset temperature, the GPU or the temperature sensor in the GPU can output the over-temperature indication signal indicating that the GPU temperature is normal, and the over-temperature indication signal indicating that the GPU temperature is normal can be a high-level OVERT_N signal; when the GPU or the temperature sensor in the GPU detects that the temperature of the GPU exceeds the preset temperature, the GPU or the temperature sensor in the GPU can output the over-temperature indication signal indicating that the GPU temperature exceeds the preset temperature, and the over-temperature indication signal indicating that the GPU temperature exceeds the preset temperature can be a low-level OVERT_N signal.

[0123] When the over-temperature indication signal is used to indicate that the GPU temperature exceeds the preset temperature, if the current GPU still needs to work, the power supplies of the GPU other than the 1V2_POWER, 1V8_POWER, and FBVDD_POWER that must be powered and the PEXVDD_POWER that has little effect on the GPU temperature need to be powered off to reduce the GPU temperature and avoid safety risks. When the over-temperature indication signal is used to indicate that the GPU temperature is normal, the powering-on and powering-off process of the power supplies of the GPU has no effect. Based on this, in the GPU power-on control flow, when it is determined whether the MSVDD_POWER can be powered on, the over-temperature indication signal also needs to be considered.

[0124] In some embodiments, the MSVDD sleep enable signal can be an MSVDD_GC6_EN signal output by the GPU, which can be a level signal.

[0125] In the case where the GPU meets the sleep condition, the GPU enters a sleep state or a low-power state. The sleep condition can include any one or more of the following: the resource requirement of a rendering / computing task that needs to be processed by the GPU is less than a preset threshold, a temperature sensor on the GPU detects an overheating risk, an operating system instructs the GPU to enter the sleep state, and the like.

[0126] On this basis, in the case where the GPU meets the sleep condition and enters the sleep state, the GPU outputs sleep enable signals indicating that the MSVDD_POWER, NVVDD_POWER, and FBVDD_POWER enter the sleep state. The MSVDD sleep enable signal indicating that the MSVDD_POWER enters the sleep state can be a low-level MSVDD_GC6_EN signal; the NVVDD sleep enable signal indicating that the NVVDD_POWER enters the sleep state can be a low-level NVVDD_GC6_EN signal; and the FBVDD sleep enable signal indicating that the FBVDD_POWER enters the sleep state can be a high-level FBVDD_GC6_EN signal.

[0127] The GPU outputs a sleep enable signal indicating that the corresponding power supply does not enter the sleep state in the case that the sleep condition is not met. The MSVDD sleep enable signal indicating that the MSVDD_POWER does not enter the sleep state can be a high-level MSVDD_GC6_EN signal; the NVVDD sleep enable signal indicating that the NVVDD_POWER does not enter the sleep state can be a high-level NVVDD_GC6_EN signal; and the FBVDD sleep enable signal indicating that the FBVDD_POWER does not enter the sleep state can be a low-level FBVDD_GC6_EN signal.

[0128] It should be noted that in practice, the GPU will not be in the sleep state when power-down is required, that is, in the GPU power-down control process, the GPU only outputs the sleep enable signal indicating that the corresponding power supply does not enter the sleep state to the MSVDD_POWER, NVVDD_POWER and FBVDD_POWER, and does not output the sleep enable signal indicating that the corresponding power supply enters the sleep state to the MSVDD_POWER, NVVDD_POWER and FBVDD_POWER.

[0129] When the MSVDD_POWER enters the sleep state, the MSVDD_POWER needs to be powered down. When the MSVDD_POWER does not enter the sleep state, the MSVDD_POWER can be powered up (in the GPU power-up process) or powered down (in the GPU power-down process). The same applies to the NVVDD_POWER. When the FBVDD_POWER enters the sleep state, to ensure that the GPU can be woken up from the sleep state in time and work normally, the FBVDD_POWER responsible for power supply of important components of the GPU is not powered down (may be slightly reduced in voltage). When the FBVDD_POWER does not enter the sleep state, the FBVDD_POWER can be powered up (in the GPU power-up process) or powered down (in the GPU power-down process).

[0130] Based on this, in the GPU power-up control process, it is also necessary to determine whether the MSVDD_POWER is powered up in combination with the MSVDD sleep enable signal. Further, because the power-up sequence of the MSVDD_POWER needs to be after the 1V8_POWER, and the 1V8_POWER is quickly associated and started after the 1V2_POWER is powered up, it is also necessary to determine whether the MSVDD_POWER is powered up in combination with the 1V2 enable signal. To ensure the accuracy of the determination result, it is also possible to determine whether the MSVDD_POWER is powered up in combination with the GPU power enable signal.

[0131] In addition, in the GPU power-off control process, since the MSVDD_POWER is the first power to be powered off in the power-off sequence of the GPU, at this time, the MSVDD_POWER can be determined to be powered off only by combining the GPU power enable signal. Further, in order to ensure the consistency of the EC operation in the GPU power-on control process and the GPU power-off control process, in the GPU power-off control process, the MSVDD_POWER can also be determined to be powered off by combining the MSVDD sleep enable signal, the over-temperature indication signal and the 1V2 enable signal. However, the MSVDD sleep enable signal, the over-temperature indication signal and the 1V2 enable signal should not affect the determination result of whether the MSVDD_POWER is powered off based on the GPU power enable signal.

[0132] In a case where it is determined that the over-temperature indication signal indicates that the GPU temperature is normal, the MSVDD sleep enable signal indicates that the MSVDD_POWER does not enter the sleep state, the 1V2 enable signal indicates that the 1V2_POWER is powered on, and the GPU power enable signal is used to indicate that the plurality of powers of the GPU are powered on, it can be determined that the GPU power-on process is in progress and the 1V2_POWER has been powered on at this time. Therefore, at this time, the EC can output the MSVDD enable signal used to indicate that the MSVDD_POWER is powered on, so as to power on the MSVDD_POWER or supply power to the GPU, that is, S306 is performed.

[0133] In a case where it is determined that the over-temperature indication signal indicates that the GPU temperature exceeds the preset temperature, or the MSVDD sleep enable signal indicates that the MSVDD_POWER enters the sleep state, or the 1V2 enable signal indicates that the 1V2_POWER is powered off, or the GPU power enable signal is used to indicate that the plurality of powers of the GPU are powered off, it can be determined that the MSVDD_POWER needs to be powered off to enter the sleep state, or the MSVDD_POWER needs to be powered off to reduce the GPU temperature, or the GPU power-off process is in progress. Therefore, at this time, the EC can output the MSVDD enable signal used to indicate that the MSVDD_POWER is powered off, so as to power off the MSVDD_POWER or stop supplying power to the GPU, that is, S307 is performed.

[0134] In some embodiments, the GPU outputs the interfaces of the sleep enable signals corresponding to the MSVDD_POWER, the NVVDD_POWER and the FBVDD_POWER to the EC, so that the EC can obtain the sleep enable signals corresponding to the three powers in real time. The GPU or the temperature sensor in the GPU outputs the interface of the over-temperature indication signal to the EC, so that the EC can obtain the over-temperature indication signal in real time. Of course, in practice, the EC can also obtain the sleep enable signals corresponding to the three powers and the over-temperature indication signal in other possible manners.

[0135] In some embodiments, if the over-temperature indication signal is the OVERT_N signal, the MSVDD hibernate enable signal is the MSVDD_GC6_EN signal, the 1V2 enable signal is the 1V2_POWER_EN signal, and the GPU power enable signal is the GPU_PWREN signal, the specific implementation of S305 can be that the EC determines the second result of the OVERT_N signal, the MSVDD_GC6_EN signal, the 1V2_POWER_EN signal, and the GPU_PWREN signal using AND gate logic. Figure 4 As shown in the foregoing embodiments, the specific implementation of S305 can be that the EC determines the second result of the OVERT_N signal, the MSVDD_GC6_EN signal, the 1V2_POWER_EN signal, and the GPU_PWREN signal using AND gate logic. Specifically, the EC takes the OVERT_N signal, the MSVDD_GC6_EN signal, the 1V2_POWER_EN signal, and the GPU_PWREN signal as inputs of the AND gate logic, determines the output result of the AND gate logic, and the output result is the second result.

[0136] After that, the EC can output the enable signal of the MSVDD_POWER, that is, the MSVDD enable signal, based on the second result. The MSVDD enable signal can be the MSVDD_POWER_EN signal.

[0137] In the case where the second result is a high level (or a logic "1"), the EC can output the MSVDD enable signal for indicating the power-on of the MSVDD_POWER, so as to power on the MSVDD_POWER, according to the foregoing embodiments. In the case where the second result is a low level (or a logic "0"), the EC can output the MSVDD enable signal for indicating the power-off of the MSVDD_POWER, so as to power off the MSVDD_POWER, according to the foregoing embodiments.

[0138] S306, the EC outputs the MSVDD enable signal for indicating the power-on of the MSVDD_POWER, so as to power on the MSVDD_POWER.

[0139] In some embodiments, the MSVDD enable signal for indicating the power-on of the MSVDD_POWER can be the MSVDD_POWER_EN signal at a high level. In the embodiments of the present application, the EC can specifically output, to the power chip of the MSVDD_POWER, the MSVDD enable signal for indicating the power-on of the MSVDD_POWER.

[0140] In some embodiments, an output interface of the EC is connected with an interface of a power chip input enable signal of the MSVDD_POWER. In this way, the EC can output the MSVDD enable signal to the power chip of the MSVDD_POWER in real time. Of course, in practice, the EC can output the MSVDD enable signal in any other possible manner.

[0141] After S306 is executed, the EC can further determine whether the NVVDD_POWER and the PEXVDD_POWER are powered on, i.e., S308 and S309 are executed. Among the power-on timing sequences of the plurality of power supplies of the GPU, the NVVDD_POWER and the PEXVDD_POWER need to be powered on after the MSVDD_POWER. S308 is specifically used to determine whether the NVVDD_POWER is powered on, and S309 is specifically used to determine whether the PEXVDD_POWER is powered on.

[0142] In some embodiments, if the MSVDD enable signal for indicating the power-on of the MSVDD_POWER is the high-level MSVDD_POWER_EN, the specific implementation of S306 can be that the EC outputs the high-level MSVDD_POWER_EN to enable the MSVDD_POWER.

[0143] S307, the EC outputs the MSVDD enable signal for indicating the power-off of the MSVDD_POWER to power off the MSVDD_POWER.

[0144] In some embodiments, the MSVDD enable signal for indicating the power-off of the MSVDD_POWER can be the low-level MSVDD_POWER_EN signal. In the embodiments of the present application, the EC can specifically output, to the power chip of the MSVDD_POWER, the MSVDD enable signal for indicating the power-off of the MSVDD_POWER.

[0145] After S307 is executed, the EC can further determine whether the NVVDD_POWER and the PEXVDD_POWER are powered down. In the power-down timing of the plurality of power supplies of the GPU, the NVVDD_POWER and the PEXVDD_POWER need to be powered down at the same time as the MSVDD_POWER. In order to ensure the unity of the actions performed in the GPU power supply power-up control process and the GPU power supply power-down control process, and the NVVDD_POWER and the PEXVDD_POWER only have two cases of power-up and power-down, the determination operation of whether the NVVDD_POWER and the PEXVDD_POWER are powered down is the same as the determination operation of whether the NVVDD_POWER and the PEXVDD_POWER are powered up. That is, S308 and S309 are executed after S307. S308 is specifically configured to determine whether the NVVDD_POWER is powered down, and S309 is specifically configured to determine whether the PEXVDD_POWER is powered down.

[0146] In some embodiments, if the MSVDD enable signal for indicating that the MSVDD_POWER is powered down is the low-level MSVDD_POWER_EN, the specific implementation of S307 can be that the EC outputs the low-level MSVDD_POWER_EN to cause the MSVDD_POWER to be powered down.

[0147] It should be noted that in the process of one execution of the GPU power supply control method, S306 and S307 are only executed alternatively, and will not be executed at the same time. Which one is executed depends on the actual situation.

[0148] S308, the EC determines whether the over-temperature indication signal indicates that the temperature of the GPU is normal, the MSVDD enable signal indicates that the MSVDD_POWER is powered up, the MSVDD state indication signal indicates that the MSVDD_POWER has supplied power to the GPU, the NVVDD sleep enable signal indicates that the NVVDD_POWER does not enter the sleep state, and the GPU power supply enable signal indicates that the plurality of power supplies of the GPU are powered up.

[0149] The MSVDD state indication signal is used to indicate that the MSVDD_POWER has supplied power to the GPU, or is used to indicate that the MSVDD_POWER has not supplied power to the GPU.

[0150] In the GPU power-on control flow, it is required to make the NVVDD_POWER power up after the MSVDD_POWER. In order to ensure the correct power-on sequence of the NVVDD_POWER, the MSVDD state indication signal reflecting whether the MSVDD_POWER has supplied power to the GPU is combined to determine whether the NVVDD_POWER is powered on. Further, in order to make the determination result more accurate, the MSVDD enable signal can also be combined to determine whether the NVVDD_POWER is powered on.

[0151] In the GPU power-off control flow, since the NVVDD_POWER is the first power supply to be powered off in the power-off sequence of the GPU, the GPU power enable signal can be combined to determine whether the NVVDD_POWER is powered off. Further, in order to ensure the consistency of the EC operation in the GPU power-on control flow and the GPU power-off control flow, the MSVDD enable signal and the MSVDD state indication signal can also be combined to determine whether the NVVDD_POWER is powered off in the GPU power-off control flow.

[0152] In some embodiments, the MSVDD state indication signal can be an MSVDD_PWRGD signal. The MSVDD_PWRGD is a level signal output by the power supply chip of the MSVDD_POWER.

[0153] For the power supply chip of the MSVDD_POWER, after the power supply chip of the MSVDD_POWER receives the MSVDD enable signal (i.e., the high-level MSVDD_POWER_EN) indicating the power-on of the MSVDD_POWER, the power supply chip of the MSVDD_POWER can output the MSVDD to be used by the GPU, i.e., the power-on of the MSVDD_POWER. At the same time, the power supply chip of the MSVDD_POWER can output the high-level MSVDD_PWRGD signal. The high-level MSVDD_PWRGD signal is specifically used to indicate that the MSVDD_POWER has supplied power to the GPU. That is, the MSVDD state indication signal at this time is used to indicate that the MSVDD_POWER has supplied power to the GPU.

[0154] In some embodiments, since the power chip of the MSVDD_POWER outputs a low level MSVDD_POWER signal when the MSVDD_POWER is not powered on (or powered off), the process of powering on the MSVDD_POWER so that the power chip of the MSVDD_POWER outputs a high level MSVDD_PWRGD signal can be referred to as pulling up the MSVDD_PWRGD signal. For example, when the EC outputs a high level MSVDD_POWER_EN, the MSVDD_PWRGD signal is pulled up.

[0155] When the power chip of the MSVDD_POWER receives the MSVDD enable signal (i.e. low level MSVDD_POWER_EN) indicating that the MSVDD_POWER is powered off, the power chip of the MSVDD_POWER stops outputting the MSVDD to be used by the GPU, i.e. the MSVDD_POWER is powered off. At the same time, the power chip of the MSVDD_POWER can output a low level MSVDD_PWRGD signal. The low level MSVDD_PWRGD signal is specifically used to indicate that the MSVDD_POWER does not supply power to the GPU. That is, the MSVDD state indication signal at this time is used to indicate that the MSVDD_POWER does not supply power to the GPU.

[0156] In some embodiments, since the power chip of the MSVDD_POWER outputs a high level MSVDD_PWRGD signal when the MSVDD_POWER is not powered off (or powered on), the process of powering off the MSVDD_POWER so that the power chip of the MSVDD_POWER outputs a low level MSVDD_PWRGD signal can be referred to as pulling down the MSVDD_PWRGD signal. For example, when the EC outputs a low level MSVDD_POWER_EN, the MSVDD_PWRGD signal is pulled down.

[0157] Based on the above description, in the GPU power on control process, when S309 is executed, the MSVDD_POWER is in a powered on state, so the MSVDD state indication signal is used to indicate that the MSVDD_POWER has supplied power to the GPU. If the MSVDD state indication signal is the MSVDD_PWRGD signal, in the GPU power on control process, the MSVDD_PWRGD signal is a high level signal when S309 is executed.

[0158] In the GPU power-off control flow, when S309 is executed, the MSVDD_POWER is in the power-off state, so the MSVDD state indication signal is used to indicate that the MSVDD_POWER does not supply power to the GPU. If the MSVDD state indication signal is the MSVDD_PWRGD signal, in the GPU power-on control flow, when S309 is executed, the MSVDD_PWRGD signal is a low signal.

[0159] The reason for judging whether the NVVDD_POWER is powered on in combination with the over-temperature indication signal can refer to the related description of S305 in the foregoing embodiment, which will not be described here.

[0160] In some embodiments, the NVVDD sleep enable signal can be the NVVDD_GC6_EN signal output by the GPU, which can be a level signal. The related concept of the NVVDD sleep enable signal can refer to the related description after S305 in the foregoing embodiment.

[0161] Since the NVVDD_POWER needs to be powered off when it is indicated to enter the sleep state, the NVVDD_POWER can be powered on or powered off when it does not enter the sleep state. Therefore, in the GPU power-on control flow, it is also necessary to judge whether the NVVDD_POWER is powered on in combination with the NVVDD sleep enable signal. In order to ensure the accuracy of the judgment result, it can also be combined with the GPU power enable signal to judge whether the MSVDD_POWER is powered on.

[0162] In addition, in the GPU power-off control flow, since the NVVDD_POWER and the MSVDD_POWER are both the first power supply to be powered off in the power-off sequence of each power supply of the GPU, at this time, it can be judged only in combination with the GPU power enable signal whether the NVVDD_POWER is powered off. Further, in order to ensure the uniformity of the EC operation in the GPU power-on control flow and the GPU power-off control flow, in the GPU power-off control flow, the NVVDD sleep enable signal, the over-temperature indication signal, the MSVDD enable signal, and the MSVDD state indication signal can also be used to judge whether the MSVDD_POWER is powered off. However, the NVVDD sleep enable signal, the over-temperature indication signal, the MSVDD enable signal, and the MSVDD state indication signal should not affect the judgment result of whether the MSVDD_POWER is powered off by the GPU power enable signal.

[0163] In some embodiments, the interface of the power chip outputting the MSVDD_PWRGD signal of the MSVDD_POWER is connected to an input interface (for example, a GPIO interface) of the EC, so that the EC can obtain the MSVDD_PWRGD signal outputted by the power chip of the MSVDD_POWER at any time. That is, the EC can obtain the MSVDD state indication signal at any time. Of course, in practice, the EC can obtain the MSVDD state indication signal in other possible implementation manners.

[0164] In a case where it is determined that the over-temperature indication signal indicates that the temperature of the GPU is normal, the MSVDD enable signal is used to indicate that the MSVDD_POWER is powered on, the MSVDD state indication signal is used to indicate that the MSVDD_POWER has supplied power to the GPU, the NVVDD hibernation enable signal indicates that the NVVDD_POWER does not enter the hibernation state, and the GPU power enable signal is used to indicate that the plurality of power supplies of the GPU are powered on, it can be determined that the GPU power on process is in progress and the MSVDD_POWER has been powered on at this time. Therefore, the EC can output the NVVDD enable signal used to indicate that the NVVDD_POWER is powered on at this time, so as to power on the NVVDD_POWER or supply power to the GPU, that is, S310 is performed.

[0165] In a case where it is determined that the over-temperature indication signal indicates that the temperature of the GPU exceeds the preset temperature, or the MSVDD enable signal is used to indicate that the MSVDD_POWER is powered off, or the MSVDD state indication signal is used to indicate that the MSVDD_POWER does not supply power to the GPU, or the NVVDD hibernation enable signal indicates that the NVVDD_POWER enters the hibernation state, or the GPU power enable signal is used to indicate that the plurality of power supplies of the GPU are powered off, it can be determined that the NVVDD_POWER needs to be powered off to enter the hibernation state, or the NVVDD_POWER needs to be powered off to reduce the temperature of the GPU, or the GPU power off process is in progress. Therefore, the EC can output the NVVDD enable signal used to indicate that the NVVDD_POWER is powered off at this time, so as to power off the NVVDD_POWER or stop supplying power to the GPU, that is, S311 is performed.

[0166] In some embodiments, if the over-temperature indication signal is the OVERT_N signal, the NVVDD hibernation enable signal is the NVVDD_GC6_EN signal, the MSVDD enable signal is the MSVDD_POWER_EN signal, the MSVDD state indication signal is the MSVDD_PWRGD signal, and the GPU power enable signal is the GPU_PWREN signal, refer to Figure 4As shown, the specific implementation of S308 can be that the EC uses AND gate logic to determine a third result of the OVERT_N signal, the NVVDD_GC6_EN signal, the MSVDD_POWER_EN signal, the MSVDD_PWRGD signal, and the GPU_PWREN signal. Specifically, the EC takes the OVERT_N signal, the NVVDD_GC6_EN signal, the MSVDD_POWER_EN signal, the MSVDD_PWRGD signal, and the GPU_PWREN signal as inputs of the AND gate logic, determines an output result of the AND gate logic, and the output result is the third result.

[0167] Subsequently, the EC can output an enable signal of the NVVDD_POWER, i.e., an NVVDD enable signal, based on the third result. The NVVDD enable signal can be the NVVDD_POWER_EN signal.

[0168] In the case that the third result is a high level (or a logic "1"), referring to the related description in the foregoing embodiments, the EC can output the NVVDD enable signal indicating the power-up of the NVVDD_POWER, so as to power up the NVVDD_POWER. In the case that the third result is a low level (or a logic "0"), referring to the related description in the foregoing embodiments, the EC can output the NVVDD enable signal indicating the power-down of the NVVDD_POWER, so as to power down the NVVDD_POWER.

[0169] S309, the EC determines whether the MSVDD enable signal indicates the power-up of the MSVDD_POWER, the MSVDD state indication signal indicates that the MSVDD_POWER has supplied power to the GPU, and the GPU power enable signal indicates the power-up of the plurality of power supplies of the GPU.

[0170] The related concepts of the MSVDD enable signal, the MSVDD state indication signal, and the GPU power enable signal can be referred to the related description after S308 in the foregoing embodiments, which will not be described herein.

[0171] The reason why the MSVDD enable signal, the MSVDD state indication signal, and the GPU power enable signal are combined in S309 to determine whether the PEXVDD_POWER is powered up (or powered down) can be referred to the reason why the MSVDD enable signal, the MSVDD state indication signal, and the GPU power enable signal are combined to determine whether the NVVDD_POWER is powered up (or powered down) in the content after S308 in the foregoing embodiments, which will not be described herein.

[0172] It should be noted that, since PEXVDD_POWER has little effect on the temperature of GPU during the working process of GPU, the over-temperature indication signal does not need to be considered when judging whether PEXVDD_POWER is powered on. At the same time, since the GPU hardware design does not enable the PEXVDD_POWER sleep signal when the GPU enters the sleep state, there is no PEXVDD sleep enable signal.

[0173] In a case where it is determined that the MSVDD enable signal is used to indicate that the MSVDD_POWER is powered on, the MSVDD state indication signal is used to indicate that the MSVDD_POWER has supplied power to the GPU, and the GPU power enable signal is used to indicate that the plurality of power supplies of the GPU are powered on, it can be determined that the GPU power on process is in progress and the MSVDD_POWER has been powered on at this time. Therefore, the EC can output the PEXVDD enable signal used to indicate that the PEXVDD_POWER is powered on at this time, so as to power on the PEXVDD_POWER or supply power to the GPU, that is, S312 is performed.

[0174] In a case where it is determined that the MSVDD enable signal is used to indicate that the MSVDD_POWER is powered off, or the MSVDD state indication signal is used to indicate that the MSVDD_POWER does not supply power to the GPU, or the GPU power enable signal is used to indicate that the plurality of power supplies of the GPU are powered off, it can be determined that the GPU power off process is in progress at this time. Therefore, the EC can output the PEXVDD enable signal used to indicate that the PEXVDD_POWER is powered off at this time, so as to power off the PEXVDD_POWER or stop supplying power to the GPU, that is, S313 is performed.

[0175] In some embodiments, if the MSVDD enable signal is the MSVDD_POWER_EN signal, the MSVDD state indication signal is the MSVDD_PWRGD signal, and the GPU power enable signal is the GPU_PWREN signal, the specific implementation of S309 can be that the EC determines the fourth result of the MSVDD_POWER_EN signal, the MSVDD_PWRGD signal and the GPU_PWREN signal by using AND gate logic, as shown in FIG. Figure 4

[0176] ​Afterwards, the EC can output an enable signal of the PEXVDD_POWER, i.e., a PEXVDD enable signal, based on the fourth result. The PEXVDD enable signal can be a PEXVDD_POWER_EN signal.

[0177] In a case where the fourth result is a high level (or a logic "1"), referring to the related description in the foregoing embodiments, the EC can output a PEXVDD enable signal for indicating the PEXVDD_POWER power-up, so as to power up the PEXVDD_POWER. In a case where the fourth result is a low level (or a logic "0"), referring to the related description in the foregoing embodiments, the EC can output a PEXVDD enable signal for indicating the PEXVDD_POWER power-down, so as to power down the PEXVDD_POWER.

[0178] S310, the EC outputs an NVVDD enable signal for indicating the NVVDD_POWER power-up, so as to power up the NVVDD_POWER.

[0179] In some embodiments, the NVVDD enable signal for indicating the NVVDD_POWER power-up can be a high-level NVVDD_POWER_EN signal. In the embodiments of the present application, the EC can output, to a power chip of the NVVDD_POWER, the NVVDD enable signal for indicating the NVVDD_POWER power-up.

[0180] In some embodiments, an output interface of the EC is connected to an interface of the power chip of the NVVDD_POWER for inputting an enable signal. In this way, the EC can output the NVVDD enable signal to the power chip of the NVVDD_POWER in real time. Of course, the actual manner of outputting the NVVDD enable signal by the EC can also be any other possible implementation manner.

[0181] After S310 is performed, the EC can further perform a judgment on whether the FBVDD_POWER is powered up, i.e., perform S314. In the power-up timing sequence of the plurality of powers of the GPU, the FBVDD_POWER needs to be powered up after the NVVDD_POWER and the PEXVDD_POWER.

[0182] In some embodiments, if the NVVDD enable signal for indicating the NVVDD_POWER power-up is a high-level NVVDD_POWER_EN, the specific implementation of S310 can be that the EC outputs the high-level NVVDD_POWER_EN, so as to power up the NVVDD_POWER.

[0183] S311, the EC outputs an NVVDD enable signal for indicating the power-off of the NVVDD_POWER, so as to power off the NVVDD_POWER.

[0184] In some embodiments, the NVVDD enable signal for indicating the power-off of the NVVDD_POWER can be an NVVDD_POWER_EN signal at a low level. In the embodiments of the present application, the EC can specifically output, to a power chip of the NVVDD_POWER, the NVVDD enable signal for indicating the power-off of the NVVDD_POWER.

[0185] After the execution of S311, the EC can further perform a judgment on whether the FBVDD_POWER is powered off. In the power-off timing sequence of the plurality of power supplies of the GPU, the FBVDD_POWER needs to be powered off after the NVVDD_POWER and the PEXVDD_POWER. In order to ensure the unity of the execution actions in the GPU power-on control flow and the GPU power-off control flow, and since the FBVDD_POWER only has two cases of power-on and power-off, the judgment operation on whether the FBVDD_POWER is powered off is the same as the judgment operation on whether the FBVDD_POWER is powered on. That is, S311 is followed by S314.

[0186] In some embodiments, if the NVVDD enable signal for indicating the power-off of the NVVDD_POWER is an NVVDD_POWER_EN signal at a low level, the specific implementation of S311 can be that the EC outputs the NVVDD_POWER_EN signal at a low level, so as to power off the NVVDD_POWER.

[0187] It should be noted that in the execution of the GPU power supply control method, S310 and S311 are executed alternatively, and not simultaneously. Which one is specifically executed depends on the actual situation.

[0188] S312, the EC outputs a PEXVDD enable signal for indicating the power-on of the PEXVDD_POWER, so as to power on the PEXVDD_POWER.

[0189] In some embodiments, the PEXVDD enable signal for indicating the power-on of the PEXVDD_POWER can be a PEXVDD_POWER_EN signal at a high level. In the embodiments of the present application, the EC can specifically output, to a power chip of the PEXVDD_POWER, the PEXVDD enable signal for indicating the power-on of the PEXVDD_POWER.

[0190] In some embodiments, an output interface of the EC is connected with an interface of a power chip input enable signal of the PEXVDD_POWER. In this way, the EC can output the PEXVDD enable signal to the power chip of the PEXVDD_POWER in real time. Of course, in practice, the EC can output the PEXVDD enable signal in any other possible manner.

[0191] After S312 is executed, the EC can further determine whether the FBVDD_POWER is powered on, i.e., S314 is executed. In the power-on timing sequence of the plurality of power supplies of the GPU, the FBVDD_POWER needs to be powered on after the NVVDD_POWER and the PEXVDD_POWER.

[0192] In some embodiments, if the PEXVDD enable signal for indicating the power-on of the PEXVDD_POWER is the high-level PEXVDD_POWER_EN, the specific implementation of S312 can be that the EC outputs the high-level PEXVDD_POWER_EN to power on the PEXVDD_POWER.

[0193] S313, the EC outputs the PEXVDD enable signal for indicating the power-off of the PEXVDD_POWER to power off the PEXVDD_POWER.

[0194] In some embodiments, the PEXVDD enable signal for indicating the power-off of the PEXVDD_POWER can be the low-level PEXVDD_POWER_EN signal. In the embodiments of the present application, the EC can specifically output the PEXVDD enable signal for indicating the power-off of the PEXVDD_POWER to the power chip of the PEXVDD_POWER.

[0195] After S313 is executed, the EC can further determine whether the FBVDD_POWER is powered off. In the power-off timing sequence of the plurality of power supplies of the GPU, the FBVDD_POWER needs to be powered off after the NVVDD_POWER and the PEXVDD_POWER. In order to ensure the unity of the execution actions in the GPU power-on control process and the GPU power-off control process, and the FBVDD_POWER only has two cases of power-on and power-off, the determination operation of whether the FBVDD_POWER is powered off is the same as the determination operation of whether the FBVDD_POWER is powered on. That is, S314 is executed after S313.

[0196] In some embodiments, if the PEXVDD_POWER_EN is low when the PEXVDD for indicating the PEXVDD_POWER power-off is low, the specific implementation of S313 can be that the EC outputs a low PEXVDD_POWER_EN to make the PEXVDD_POWER power off.

[0197] It should be noted that in the execution of the GPU power supply control method, S312 and S313 are executed alternatively, and not simultaneously. Which one is executed depends on the actual situation.

[0198] S314, the EC judges whether the NVVDD state indication signal indicates that the NVVDD_POWER has supplied power to the GPU, or whether the PEXVDD state indication signal indicates that the PEXVDD_POWER has supplied power to the GPU, or whether the FBVDD sleep enable signal indicates that the FBVDD_POWER enters the sleep state.

[0199] Among them, the NVVDD state indication signal is used to indicate that the NVVDD_POWER has supplied power to the GPU, or to indicate that the NVVDD_POWER has not supplied power to the GPU. The PEXVDD state indication signal is used to indicate that the PEXVDD_POWER has supplied power to the GPU, or to indicate that the PEXVDD_POWER has not supplied power to the GPU.

[0200] In the GPU power supply power-on control process, it is necessary to make the FBVDD_POWER power on after the NVVDD_POWER and the PEXVDD_POWER. In order to ensure the correct power-on sequence of the FBVDD_POWER, it is necessary to combine the NVVDD state indication signal which can reflect whether the NVVDD_POWER has supplied power to the GPU, and the PEXVDD state indication signal which can reflect whether the PEXVDD_POWER has supplied power to the GPU, to judge whether the NVVDD_POWER is powered on. Further, since the power-on speed of the NVVDD_POWER and the PEXVDD_POWER is inconsistent, when combining the two to judge whether the FBVDD_POWER is powered on, only one of the state indication signals needs to meet the premise of the FBVDD_POWER power-on.

[0201] In the GPU power-off control flow, since the FBVDD_POWER is a power supply that is powered off after the PEXVDD_POWER and the NVVDD_POWER in the power-off sequence of the GPU, the NVVDD state indication signal and the PEXVDD state indication signal also need to be combined to determine whether the NVVDD_POWER is powered off. Further, since the power-off speed of the NVVDD_POWER and the PEXVDD_POWER is very fast, when the two are combined to determine whether the FBVDD_POWER is powered off, the state indication signals of the two need to meet the FBVDD_POWER power-off premise before the FBVDD_POWER can be powered off.

[0202] In some embodiments, the NVVDD state indication signal can be an NVVDD_PWRGD signal. The NVVDD_PWRGD is a level signal output by the power supply chip of the NVVDD_POWER.

[0203] For the power supply chip of the NVVDD_POWER, when the power supply chip of the NVVDD_POWER receives the NVVDD enable signal indicating that the NVVDD_POWER is powered on (i.e., the high-level NVVDD_POWER_EN), the power supply chip of the NVVDD_POWER can output the NVVDD to be used by the GPU, i.e., the NVVDD_POWER is powered on. At the same time, the power supply chip of the NVVDD_POWER can output a high-level NVVDD_PWRGD signal. The high-level NVVDD_PWRGD signal is specifically used to indicate that the NVVDD_POWER has supplied power to the GPU. That is, the NVVDD state indication signal at this time is used to indicate that the NVVDD_POWER has supplied power to the GPU.

[0204] In some embodiments, since the power supply chip of the NVVDD_POWER outputs a low-level NVVDD_POWER signal when the NVVDD_POWER is not powered on (or powered off), the process of the power supply chip of the NVVDD_POWER outputting a high-level NVVDD_PWRGD signal when the NVVDD_POWER is powered on can be referred to as pulling up the NVVDD_PWRGD signal. For example, when the EC outputs a high-level NVVDD_POWER_EN, the NVVDD_PWRGD signal will be pulled up.

[0205] When the power chip of the NVVDD_POWER receives the NVVDD enable signal indicating the NVVDD_POWER to power down (i.e. the NVVDD_POWER_EN at low level), the power chip of the NVVDD_POWER stops outputting the NVVDD to the GPU, i.e. the NVVDD_POWER powers down. Meanwhile, the power chip of the NVVDD_POWER can output the NVVDD_PWRGD signal at low level. The NVVDD_PWRGD signal at low level is specifically used to indicate that the NVVDD_POWER does not supply power to the GPU. That is, the NVVDD status indication signal at this time is used to indicate that the NVVDD_POWER does not supply power to the GPU.

[0206] In some embodiments, since the power chip of the NVVDD_POWER outputs the NVVDD_PWRGD signal at high level when the NVVDD_POWER is not powered down (or powered up), the process of the power chip of the NVVDD_POWER outputting the NVVDD_PWRGD signal at low level when the NVVDD_POWER powers down can be referred to as pulling down the NVVDD_PWRGD signal. For example, when the EC outputs the NVVDD_POWER_EN at low level, the NVVDD_PWRGD signal is pulled down.

[0207] Based on the above description, in the GPU power up control process, when S314 is executed, the NVVDD_POWER is in the powered up state, so the NVVDD status indication signal is used to indicate that the NVVDD_POWER has supplied power to the GPU. If the NVVDD status indication signal is the NVVDD_PWRGD signal, in the GPU power up control process, the NVVDD_PWRGD signal is at high level when S314 is executed.

[0208] In the GPU power down control process, when S314 is executed, the power chip of the NVVDD_POWER is in the powered down state, so the NVVDD status indication signal is used to indicate that the NVVDD_POWER does not supply power to the GPU. If the NVVDD status indication signal is the NVVDD_PWRGD signal, in the GPU power up control process, the NVVDD_PWRGD signal is at low level when S314 is executed.

[0209] In some embodiments, the PEXVDD status indication signal can be the PEXVDD_PWRGD signal. The PEXVDD_PWRGD is a level signal output by the power chip of the PEXVDD_POWER.

[0210] For the power chip of PEXVDD_POWER, when the power chip of PEXVDD_POWER receives a PEXVDD enable signal (i.e. high level PEXVDD_POWER_EN) indicating that PEXVDD_POWER is powered on, the power chip of PEXVDD_POWER can output PEXVDD for use by the GPU, i.e. PEXVDD_POWER is powered on. At the same time, the power chip of PEXVDD_POWER can output a high level PEXVDD_PWRGD signal. The high level PEXVDD_PWRGD signal is specifically used to indicate that PEXVDD_POWER has supplied power to the GPU. That is, the PEXVDD state indication signal at this time is used to indicate that PEXVDD_POWER has supplied power to the GPU.

[0211] In some embodiments, since the power chip of PEXVDD_POWER outputs a low level PEXVDD_POWER signal when PEXVDD_POWER is not powered on (or powered off), the process of PEXVDD_POWER powering on so that the power chip of PEXVDD_POWER outputs a high level PEXVDD_PWRGD signal can be referred to as pulling up the PEXVDD_PWRGD signal. For example, when the EC outputs a high level PEXVDD_POWER_EN, the PEXVDD_PWRGD signal will be pulled up.

[0212] When the power chip of PEXVDD_POWER receives a PEXVDD enable signal (i.e. low level PEXVDD_POWER_EN) indicating that PEXVDD_POWER is powered off, the power chip of PEXVDD_POWER stops outputting PEXVDD for use by the GPU, i.e. PEXVDD_POWER is powered off. At the same time, the power chip of PEXVDD_POWER can output a low level PEXVDD_PWRGD signal. The low level PEXVDD_PWRGD signal is specifically used to indicate that PEXVDD_POWER has not supplied power to the GPU. That is, the PEXVDD state indication signal at this time is used to indicate that PEXVDD_POWER has not supplied power to the GPU.

[0213] In some embodiments, since the power chip of PEXVDD_POWER outputs a high level PEXVDD_PWRGD signal when PEXVDD_POWER is not powered off (or powered on), the process that PEXVDD_POWER is powered off so that the power chip of PEXVDD_POWER outputs a low level PEXVDD_PWRGD signal can be referred to as pulling down the PEXVDD_PWRGD signal. For example, when the EC outputs a low level PEXVDD_POWER_EN, the PEXVDD_PWRGD signal is pulled down.

[0214] Based on the above description, in the GPU power on control process, when S314 is executed, the PEXVDD_POWER is in the powered on state, so the PEXVDD state indication signal is used to indicate that the PEXVDD_POWER has supplied power to the GPU. If the PEXVDD state indication signal is the PEXVDD_PWRGD signal, in the GPU power on control process, the PEXVDD_PWRGD signal is a high level signal when S314 is executed.

[0215] In the GPU power off control process, when S314 is executed, the power chip of PEXVDD_POWER is in the powered off state, so the PEXVDD state indication signal is used to indicate that the PEXVDD_POWER has not supplied power to the GPU. If the PEXVDD state indication signal is the PEXVDD_PWRGD signal, in the GPU power on control process, the PEXVDD_PWRGD signal is a low level signal when S314 is executed.

[0216] The FBVDD sleep enable signal can be the FBVDD_GC6_EN signal output by the GPU, and the FBVDD_GC6_EN signal can be a level signal. According to the foregoing description about the GPU entering the sleep state after S305 in the foregoing embodiments, since the FBVDD_POWER does not need to be powered off when the FBVDD_POWER enters the sleep state, the FBVDD_POWER can be powered on or powered off when the FBVDD_POWER does not enter the sleep state. Therefore, in the GPU power on control process, in order to ensure that the FBVDD_POWER is still powered on when it is indicated to enter the sleep state, the FBVDD sleep enable signal also needs to be combined with the FBVDD_POWER to determine whether the FBVDD_POWER is powered on. That is, when the NVVDD state indication signal, the PEXVDD state indication signal, and the FBVDD sleep enable signal are combined to determine whether the FBVDD_POWER is powered on, only one of the three signals needs to meet the premise of the FBVDD_POWER being powered on.

[0217] In the GPU power-off control flow, when the FBVDD_POWER is determined whether to be powered off in combination with the NVVDD state indication signal, the PEXVDD state indication signal and the FBVDD sleep enable signal, since the GPU will not enter the sleep state in general case when the GPU needs to be powered off, the FBVDD sleep enable signal is used to indicate that the FBVDD_POWER does not enter the sleep state at this time. In order to prevent the GPU power-off failure caused by the FBVDD sleep enable signal indicating that the FBVDD_POWER enters the sleep state when the GPU needs to be powered off due to possible fault reasons, the FBVDD sleep enable signal needs to be ensured to meet the power-off requirement of the FBVDD_POWER (i.e., the FBVDD sleep enable signal indicates that the FBVDD_POWER does not enter the sleep state) at this time.

[0218] In the case where it is determined that the NVVDD state indication signal is used to indicate that the NVVDD_POWER has supplied power to the GPU, or the PEXVDD state indication signal is used to indicate that the PEXVDD_POWER has supplied power to the GPU, or the FBVDD sleep enable signal is used to indicate that the FBVDD_POWER enters the sleep state, it can be determined that the GPU power-on flow is in this case and the PEXVDD_POWER or the NVVDD_POWER has been powered on, or the GPU power-on flow is in this case and the FBVDD_POWER is to enter the sleep state. Therefore, the EC can output the FBVDD enable signal used to indicate that the FBVDD_POWER is powered on at this time, so as to power on the FBVDD_POWER or supply power to the GPU, i.e., S315 is performed.

[0219] In the case where it is determined that the NVVDD state indication signal is used to indicate that the NVVDD_POWER has supplied power to the GPU, or the PEXVDD state indication signal is used to indicate that the PEXVDD_POWER has supplied power to the GPU, or the FBVDD sleep enable signal is used to indicate that the FBVDD_POWER enters the sleep state, it can be determined that the GPU power-on flow is in this case and the PEXVDD_POWER or the NVVDD_POWER has been powered on, or the GPU power-on flow is in this case and the FBVDD_POWER is to enter the sleep state. Therefore, the EC can output the FBVDD enable signal used to indicate that the FBVDD_POWER is powered on at this time, so as to power on the FBVDD_POWER or supply power to the GPU, i.e., S315 is performed.

[0220] In some embodiments, if the FBVDD sleep enable signal is the FBVDD_GC6_EN signal, the NVVDD state indication signal is the NVVDD_PWRGD signal, and the PEXVDD state indication signal is the PEXVDD_PWRGD signal, refer to Figure 4As shown, the specific implementation of S314 can be that the EC uses or gate logic to determine the fifth result of the FBVDD_GC6_EN signal, the NVVDD_PWRGD signal and the PEXVDD_PWRGD signal. Specifically, the EC takes the FBVDD_GC6_EN signal, the NVVDD_PWRGD signal and the PEXVDD_PWRGD signal as inputs of the or gate logic, determines the output result of the or gate logic, and the output result is the fifth result.

[0221] After that, the EC can output the enable signal of the FBVDD_POWER, i.e., the FBVDD enable signal, based on the fifth result. The FBVDD enable signal can be the FBVDD_POWER_EN signal.

[0222] In the case where the fifth result is high (or logic "1"), referring to the related description in the foregoing embodiments, the EC can output the FBVDD enable signal indicating the power-up of the FBVDD_POWER to power up the FBVDD_POWER. In the case where the fifth result is low (or logic "0"), referring to the related description in the foregoing embodiments, the EC can output the FBVDD enable signal indicating the power-down of the FBVDD_POWER to power down the FBVDD_POWER.

[0223] S315, the EC outputs the FBVDD enable signal indicating the power-up of the FBVDD_POWER to power up the FBVDD_POWER.

[0224] In some embodiments, the FBVDD enable signal indicating the power-up of the FBVDD_POWER can be the FBVDD_POWER_EN signal at high level. In the embodiments of the present application, the EC can output, to the power supply chip of the FBVDD_POWER, the FBVDD enable signal indicating the power-up of the FBVDD_POWER.

[0225] In some embodiments, an output interface of the EC is connected to an interface of the power supply chip of the FBVDD_POWER inputting the enable signal. In this way, the EC can output the FBVDD enable signal to the power supply chip of the FBVDD_POWER in real time. Of course, the actual output manner of the FBVDD enable signal by the EC can also be any other possible implementation manner.

[0226] After S315 is executed, the EC can further determine whether all the powers of the GPU are powered up, i.e., execute S317.

[0227] In some embodiments, if the FBVDD enable signal for indicating the power-up of the FBVDD_POWER is the high-level FBVDD_POWER_EN, the specific implementation of S315 can be that the EC outputs the high-level FBVDD_POWER_EN to power up the FBVDD_POWER.

[0228] S316, the EC outputs the FBVDD enable signal for indicating the power-down of the FBVDD_POWER to power down the FBVDD_POWER.

[0229] In some embodiments, the FBVDD enable signal for indicating the power-down of the FBVDD_POWER can be the low-level FBVDD_POWER_EN signal. In the embodiments of the present application, the EC can specifically output, to the power supply chip of the FBVDD_POWER, the FBVDD enable signal for indicating the power-down of the FBVDD_POWER.

[0230] After S316 is executed, the EC can further perform the judgment of whether all the power supplies of the GPU have been powered down, that is, S318 is executed.

[0231] In some embodiments, if the FBVDD enable signal for indicating the power-down of the FBVDD_POWER is the low-level FBVDD_POWER_EN, the specific implementation of S316 can be that the EC outputs the low-level FBVDD_POWER_EN to power down the FBVDD_POWER.

[0232] It should be noted that in the process of one execution of the GPU power supply control method, S315 and S316 are executed only once, and not simultaneously, and which one is executed is determined according to the actual situation.

[0233] S317, the EC judges whether the MSVDD state indication signal indicates that the MSVDD_POWER has supplied power to the GPU, and the PEXVDD state indication signal indicates that the PEXVDD_POWER has supplied power to the GPU, and the NVVDD state indication signal indicates that the NVVDD_POWER has supplied power to the GPU, and the FBVDD state indication signal indicates that the FBVDD_POWER has supplied power to the GPU.

[0234] Among them, the FBVDD state indication signal is used to indicate that the FBVDD_POWER has supplied power to the GPU, or is used to indicate that the FBVDD_POWER has not supplied power to the GPU.

[0235] In some embodiments, since the power chip of the FBVDD_POWER outputs a low level FBVDD_PWRGD signal when the FBVDD_POWER is not powered on (or powered off), the process of powering on the FBVDD_POWER so that the power chip of the FBVDD_POWER outputs a high level FBVDD_PWRGD signal can be referred to as pulling up the FBVDD_PWRGD signal. For example, when the EC outputs a high level FBVDD_POWER_EN, the FBVDD_PWRGD signal is pulled up.

[0236] In some embodiments, since the power chip of the FBVDD_POWER outputs a high level FBVDD_PWRGD signal when the FBVDD_POWER is not powered off (or powered on), the process of powering off the FBVDD_POWER so that the power chip of the FBVDD_POWER outputs a low level FBVDD_PWRGD signal can be referred to as pulling down the FBVDD_PWRGD signal. For example, when the EC outputs a low level FBVDD_POWER_EN, the FBVDD_PWRGD signal is pulled down.

[0237] When it is determined that the MSVDD state indication signal is used to indicate that the MSVDD_POWER has supplied power to the GPU, the PEXVDD state indication signal is used to indicate that the PEXVDD_POWER has supplied power to the GPU, the NVVDD state indication signal is used to indicate that the NVVDD_POWER has supplied power to the GPU, and the FBVDD state indication signal is used to indicate that the FBVDD_POWER has supplied power to the GPU, it can be determined that all power supplies of the GPU have been powered on, and the EC can output a GPU power supply state indication signal indicating that all power supplies of the GPU have been powered on, that is, S319 is performed. In this way, other devices (such as a CPU) in the electronic device that need to know whether all power supplies of the GPU have been powered on can timely know that all power supplies of the GPU have been powered on, and the electronic device can also normally use the GPU subsequently.

[0238] When it is determined that the MSVDD state indication signal is used to indicate that the MSVDD_POWER has not supplied power to the GPU, or the PEXVDD state indication signal is used to indicate that the PEXVDD_POWER has not supplied power to the GPU, or the NVVDD state indication signal is used to indicate that the NVVDD_POWER has not supplied power to the GPU, or the FBVDD state indication signal is used to indicate that the FBVDD_POWER has not supplied power to the GPU, it can be determined that all power supplies of the GPU have not been powered on, and the power-on process of each power supply of the GPU can be performed in a loop, that is, the GPU power supply control method is performed again from S301 or S302 (for example, from 301 again in the figure).

[0239] In some embodiments, if the MSVDD state indication signal is the MSVDD_PWRGD signal, the NVVDD state indication signal is the NVVDD_PWRGD signal, the PEXVDD state indication signal is the PEXVDD_PWRGD signal, and the FBVDD state indication signal is the FBVDD_PWRGD signal, the EC outputs a GPU power state indication signal indicating that the GPU is powered on. Figure 4 As shown in FIG. 3, the implementation of S317 can be that the EC determines a sixth result of the MSVDD_PWRGD signal, the NVVDD_PWRGD signal, the PEXVDD_PWRGD signal, and the FBVDD_PWRGD signal using AND gate logic. The EC can determine the output result of the AND gate logic using the MSVDD_PWRGD signal, the NVVDD_PWRGD signal, the PEXVDD_PWRGD signal, and the FBVDD_PWRGD signal as inputs, and the output result is the sixth result.

[0240] After obtaining the sixth result, the EC can output a GPU power state indication signal based on the sixth result. The GPU power state indication signal can be the GPU_PWREN signal.

[0241] In the case that the sixth result is high (or logic "1"), the EC can output a GPU power state indication signal indicating that the GPU is powered on, according to the related description in the foregoing embodiments. In the case that the sixth result is low (or logic "0"), the EC can reacquire the GPU_PWREN signal, or determine a first result of the FBVDD_PWRGD signal and the GPU_PWREN signal using OR gate logic.

[0242] S318, the EC determines whether the MSVDD state indication signal indicates that the MSVDD_POWER does not supply power to the GPU, the PEXVDD state indication signal indicates that the PEXVDD_POWER does not supply power to the GPU, the NVVDD state indication signal indicates that the NVVDD_POWER does not supply power to the GPU, and the FBVDD state indication signal indicates that the FBVDD_POWER does not supply power to the GPU.

[0243] When it is determined that the MSVDD state indication signal is used to indicate that the MSVDD_POWER does not supply power to the GPU, the PEXVDD state indication signal is used to indicate that the PEXVDD_POWER does not supply power to the GPU, the NVVDD state indication signal is used to indicate that the NVVDD_POWER does not supply power to the GPU, and the FBVDD state indication signal is used to indicate that the FBVDD_POWER does not supply power to the GPU, it can be determined that all power supplies of the current GPU have been powered off, and the EC can output a GPU power supply state indication signal indicating that all power supplies of the GPU have been powered off, that is, S320 is performed. In this way, other devices (for example, a CPU) in the electronic device that need to know whether all power supplies of the GPU have been powered off can timely know that all power supplies of the GPU have been powered off, and the electronic device can also normally stop using the GPU subsequently.

[0244] When it is determined that the MSVDD state indication signal is used to indicate that the MSVDD_POWER supplies power to the GPU, or the PEXVDD state indication signal is used to indicate that the PEXVDD_POWER supplies power to the GPU, or the NVVDD state indication signal is used to indicate that the NVVDD_POWER supplies power to the GPU, or the FBVDD state indication signal is used to indicate that the FBVDD_POWER supplies power to the GPU, it can be determined that all power supplies of the current GPU have not been powered off, and the power-off process of each power supply of the GPU can be cyclically performed, that is, the GPU power supply control method is performed again from S301 or S302 (for example, from 301 again in the figure).

[0245] In some embodiments, if the MSVDD state indication signal is the MSVDD_PWRGD signal, the NVVDD state indication signal is the NVVDD_PWRGD signal, the PEXVDD state indication signal is the PEXVDD_PWRGD signal, and the FBVDD state indication signal is the FBVDD_PWRGD signal, the specific implementation of S318 can be that the EC determines a seventh result of the MSVDD_PWRGD signal, the NVVDD_PWRGD signal, the PEXVDD_PWRGD signal, and the FBVDD_PWRGD signal using an OR gate logic. Specifically, the EC takes the MSVDD_PWRGD signal, the NVVDD_PWRGD signal, the PEXVDD_PWRGD signal, and the FBVDD_PWRGD signal as inputs of the OR gate logic, determines an output result of the OR gate logic, and the output result is the seventh result.

[0246] After obtaining the seventh result, the EC can output a GPU power state indication signal based on the seventh result. The GPU power state indication signal can be a GPU_PWREN signal.

[0247] In the case that the seventh result is a low level (or a logic "1"), referring to the relevant description in the foregoing embodiments, the EC can output a GPU power state indication signal indicating that each power supply of the GPU has been powered off. In the case that the seventh result is a high level (or a logic "0"), referring to the relevant description in the foregoing embodiments, the EC re-obtains the GPU_PWREN signal, or uses an OR gate to determine the first result of the FBVDD_PWRGD signal and the GPU_PWREN signal.

[0248] It should be noted that, in the execution of the GPU power control method, S317 and S318 are executed alternatively, and not simultaneously. Which one is executed depends on the actual situation.

[0249] In addition, if the electronic device needs to power off the GPU, and no other device needs to know the power-off result of each power supply of the GPU, S318 can be omitted. Whether S318 is included or not can be determined according to actual needs, which is not limited in the present application. If S318 is omitted, S317 is executed after S316.

[0250] S319, the EC outputs a GPU power state indication signal indicating that each power supply of the GPU has been powered on.

[0251] In some embodiments, the GPU power state indication signal indicating that each power supply of the GPU has been powered on can be a GPU_PWRGD signal at a high level, and the GPU_PWRGD signal is a level signal. In this embodiment, the specific implementation of S319 can be that the EC outputs the GPU_PWRGD signal at a high level.

[0252] In some embodiments, the EC can specifically send the GPU power state indication signal outputting indicating that each power supply of the GPU has been powered on to a first target device. The first target device can be a device in the electronic device that needs to know whether each power supply of the GPU has been powered on, such as a CPU.

[0253] S320, the EC outputs a GPU power state indication signal indicating that each power supply of the GPU has been powered off.

[0254] In some embodiments, the GPU power state indication signal indicating that each power supply of the GPU has been powered off can be a GPU_PWRGD signal at a low level, and the GPU_PWRGD signal is a level signal. In this embodiment, the specific implementation of S320 can be that the EC outputs the GPU_PWRGD signal at a low level.

[0255] In some embodiments, the EC can specifically send a GPU power state indication signal output to the second target device, the GPU power state indication signal output being used to indicate that each power supply of the GPU has been powered off. The second target device can be a device in the electronic device that needs to know whether each power supply of the GPU has been powered off, for example, a CPU.

[0256] It should be noted that, in the case of normal operation of the electronic device, the GPU power enable signal, the FBVDD state indication signal, the over-temperature indication signal, the MSVDD hibernation enable signal, the MSVDD state indication signal, the NVVDD hibernation enable signal, the NVVDD state indication signal, the PEXVDD state indication signal, and the FBVDD hibernation enable signal can be received by the EC in real time, that is, the EC can receive these signals at the same time, rather than at different times. However, the signals received in different cases are different. For example, in the case of powering off the GPU, the GPU power enable signal is used to indicate that each power supply of the GPU is powered off; in the case of powering on the GPU, the GPU power enable signal is used to indicate that each power supply of the GPU is powered on. The remaining signals are the same. The differences in different cases can be referred to the related indications in the foregoing embodiments. In addition, the 1V2 enable signal, the MSVDD enable signal, the NVVDD enable signal, the PEXVDD enable signal, and the FBVDD enable signal are also output by the EC in real time, that is, the EC can output these signals at the same time, rather than at different times. That is, the EC can obtain all the power management signals related to the power on / off of the GPU in real time.

[0257] Based on this, in some embodiments, each time the technical solutions provided in the foregoing embodiments are executed, S302, S305, S308, S309, S314, and S317 (or S318) can be executed at the same time. Each execution can cause the enable signal and the corresponding state indication signal for a certain power supply output by the EC to change, so that the certain power supply is powered on or powered off. Through multiple executions of the foregoing technical solutions, the multiple power supplies of the GPU can be powered on or powered off according to the preset power on / off sequence.

[0258] In combination with the above description, based on the technical solutions provided in S301-S320, in the case that the GPU needs to be powered on and the GPU does not need to enter the sleep state, after the EC receives the GPU power enable signal indicating the power-on of the plurality of power supplies of the GPU, the power-on timing of the plurality of power supplies of the GPU is controlled by the EC as follows: 1V2_POWER->1V8_POWER->MSVDD_POWER->NVVDD_POWER and PEXVDD_POWER->FBVDD_POWER. In the case that the GPU needs to be powered on but the GPU needs to enter the sleep state, then the MSVDD_POWER, NVVDD_POWER and PEXVDD_POWER of the plurality of power supplies of the GPU are not powered on, and the power-on timing of the remaining power supplies is as follows: 1V2_POWER->1V8_POWER->FBVDD_POWER.

[0259] In the case that the GPU needs to be powered off, after the EC receives the GPU power enable signal indicating the power-off of the plurality of power supplies of the GPU, the first execution of the entire scheme can cause the MSVDD_POWER, NVVDD_POWER, PEXVDD_POWER and FBVDD_POWER of the plurality of power supplies of the GPU to be powered off, wherein the MSVDD_POWER, NVVDD_POWER and PEXVDD_POWER are powered off at the same time, and then the FBVDD_POWER is powered off. The second execution of the entire scheme can cause the 1V2_POWER and 1V8_POWER to be powered off in sequence.

[0260] It can be seen that in the case that the GPU needs to be powered on or powered off, the technical solutions provided in the embodiments of the present application can successfully achieve the purpose of controlling the plurality of power supplies of the GPU to be powered on or powered off according to the preset power-on or power-off timing by using the EC built-in the electronic device. Compared with the prior scheme of using a plurality of components to control the power-on or power-off timing of the plurality of power supplies of the GPU, the cost is lower and it is more convenient.

[0261] In summary, based on the technical solutions provided in the present application, the EC possessed by the electronic device itself can be used to fully analyze a plurality of power management signals related to the power state of the GPU, so as to adjust the power enable signal used to control the power state of the plurality of power supplies of the GPU, thereby achieving the purpose of causing the plurality of power supplies of the GPU to be powered on according to the preset power-on timing or powered off according to the preset power-off timing. Since the control of the power-on or power-off timing of the plurality of power supplies of the GPU in the entire technical solution reuses the EC of the electronic device itself, compared with the prior scheme of using a plurality of components to control the power-on or power-off timing of the plurality of power supplies of the GPU, the cost is lower and it is more convenient.

[0262] Further, since the EC is a programmable device, the analysis of the plurality of power management signals and the adjustment of the power enable signal based on the analysis result can be implemented through programming. Once the power-on and power-off timing error occurs or needs to be adjusted, it can be more convenient to debug or adjust, so that the power-on and power-off timing of the GPU is more accurate, the fault handling is faster when a fault occurs, and the user experience is improved.

[0263] Hereinafter, taking the GPU power enable signal as the GPU_PWREN signal, the FBVDD state indication signal as the FBVDD_PWRGD signal, the over-temperature indication signal as the OVERT_N signal, the MSVDD sleep enable signal as the MSVDD_GC6_EN signal, the MSVDD state indication signal as the MSVDD_PWRGD signal, the NVVDD sleep enable signal as the NVVDD_GC6_EN signal, the NVVDD state indication signal as the NVVDD_PWRGD signal, the PEXVDD state indication signal as the PEXVDD_PWRGD signal, the FBVDD sleep enable signal as the FBVDD_GC6_EN signal, the 1V2 enable signal as the 1V2_POWER_EN signal, the MSVDD enable signal as the MSVDD_POWER_EN signal, the NVVDD enable signal as the NVVDD_POWER_EN signal, the PEXVDD enable signal as the PEXVDD_POWER_EN signal, and the FBVDD enable signal as the FBVDD_POWER_EN signal as an example, the specific implementation process of the GPU power control method as shown in Figure 5 Figure 3 will be described. The specific implementation process of the GPU power control method as shown in Figure 5 The specific implementation process of the GPU power control method as shown in

[0264] The related definitions and can be referred to the related descriptions after S301 in the foregoing embodiments, and will not be described here.

[0265] The high-level GPU_PWREN signal is used to indicate the power-on of the plurality of power supplies of the GPU, and the low-level GPU_PWREN signal is used to indicate the power-off of the plurality of power supplies of the GPU. When the electronic device needs the GPU to work, the GPU_PWREN signal is a high-level signal, and at this time, the GPU power control method is specifically a GPU power-on control process; when the electronic device needs the GPU to stop working, the GPU_PWREN signal is a low-level signal, and at this time, the GPU power control method is specifically a GPU power-off control process.

[0266] ​​The related concept of the GPU_PWREN signal can refer to the related description after S301 in the foregoing embodiment, which will not be repeated here.

[0267] S502, the EC judges the first result of the FBVDD_PWRGD signal and the GPU_PWREN signal with an OR gate logic.

[0268] In the case that the first result is high (or logic "1"), the EC can output 1V2_POWER_EN of high level indicating 1V2_POWER power-on to power on 1V2_POWER, that is, S503 is executed; in the case that the first result is low (or logic "0"), the EC can output 1V2_POWER_EN of low level indicating 1V2_POWER power-off to power off 1V2_POWER, that is, S504 is executed.

[0269] S505 is executed at the same time of executing S503 and S504. The specific reason can refer to the related description about executing S305 when executing S303 or executing S304 after S302 in the foregoing embodiment, which will not be repeated here.

[0270] The related definition of the FBVDD_PWRGD signal and the GPU_PWREN signal can refer to the related description after S302 in the foregoing embodiment, which will not be repeated here.

[0271] The specific implementation and related definition of S502 can refer to the related description after S302 in the foregoing embodiment, which will not be repeated here.

[0272] S503, the EC outputs 1V2_POWER_EN signal of high level to power on 1V2_POWER, and further pulls up 1V2_PWRGD signal to power on 1V8_POWER.

[0273] The pulling up of the 1V2_PWRGD signal refers to adjusting the 1V2_PWRGD signal of low level output by the EC before to the 1V2_PWRGD signal of high level.

[0274] The specific implementation of S503 can refer to the related description after S303 in the foregoing embodiment, which will not be repeated here.

[0275] S504, the EC outputs 1V2_POWER_EN of low level to power off 1V2_POWER, and further pulls down 1V2_PWRGD signal to power off 1V8_POWER.

[0276] Wherein, pulling down the 1V2_PWRGD signal refers to adjusting the 1V2_PWRGD signal output by the EC before as high level to the 1V2_PWRGD signal as low level.

[0277] The specific implementation of S504 can refer to the related description after S304 in the foregoing embodiments, which will not be described here.

[0278] S505, the EC judges the second result of the OVERT_N signal, the MSVDD_GC6_EN signal, the 1V2_POWER_EN signal and the GPU_PWREN signal by the AND logic.

[0279] In the case that the second result is high level, the EC can output the MSVDD_POWER_EN signal as high level for indicating the MSVDD_POWER power on, so as to make the MSVDD_POWER power on, that is, S506 is executed; in the case that the second result is low level, the EC can output the MSVDD_POWER_EN signal as low level for indicating the MSVDD_POWER power off, so as to make the MSVDD_POWER power off, that is, S507 is executed.

[0280] The specific implementation of S505 can refer to the related description after S305 in the foregoing embodiments, which will not be described here.

[0281] S506, the EC outputs the MSVDD_POWER_EN signal as high level, so as to make the MSVDD_POWER power on, and pulls up the MSVDD_PWRGD signal.

[0282] Wherein, pulling up the MSVDD_PWRGD signal refers to adjusting the MSVDD_PWRGD signal output by the EC before as low level to the MSVDD_PWRGD signal as high level. The related definition of pulling up the MSVDD_PWRGD signal can refer to the related description after S308 in the foregoing embodiments, which will not be described here.

[0283] The specific implementation of S506 can refer to the related description after S306 in the foregoing embodiments, which will not be described here.

[0284] S508 and S509 are executed after S506, and the specific reason can refer to the related description after S306 in the foregoing embodiments.

[0285] S507, the EC outputs the MSVDD_POWER_EN signal as low level, so as to make the MSVDD_POWER power off, and pulls down the MSVDD_PWRGD signal.

[0286] Wherein, pulling down the MSVDD_PWRGD signal refers to adjusting the high-level MSVDD_PWRGD signal output by the EC before to a low-level MSVDD_PWRGD signal. The related definition of pulling down the MSVDD_PWRGD signal can refer to the related description after S308 in the foregoing embodiment, and will not be repeated here.

[0287] The specific implementation of S507 can refer to the related description after S307 in the foregoing embodiment, and will not be repeated here.

[0288] S507 is followed by S508 and S509, and the specific reasons can refer to the related description after S307 in the foregoing embodiment.

[0289] S508, the EC judges a third result of the OVERT_N signal, the NVVDD_GC6_EN signal, the MSVDD_POWER_EN signal, the MSVDD_PWRGD signal and the GPU_PWREN signal by AND logic.

[0290] In the case that the third result is a high level, the EC can output a high-level NVVDD_POWER_EN signal for indicating the power-on of the NVVDD_POWER, so as to power on the NVVDD_POWER, that is, S510 is executed; in the case that the third result is a low level, the EC can output a low-level NVVDD_POWER_EN signal for indicating the power-off of the NVVDD_POWER, so as to power off the NVVDD_POWER, that is, S511 is executed.

[0291] The specific implementation of S508 can refer to the related description after S308 in the foregoing embodiment, and will not be repeated here.

[0292] S509, the EC judges a fourth result of the MSVDD_POWER_EN signal, the MSVDD_PWRGD signal and the GPU_PWREN signal by AND logic.

[0293] In the case that the fourth result is a high level, the EC can output a high-level PEXVDD_POWER_EN signal for indicating the power-on of the PEXVDD_POWER, so as to power on the PEXVDD_POWER, that is, S512 is executed; in the case that the fourth result is a low level, the EC can output a low-level PEXVDD_POWER_EN signal for indicating the power-off of the PEXVDD_POWER, so as to power off the PEXVDD_POWER, that is, S513 is executed.

[0294] The specific implementation of S509 can refer to the related description after S309 in the foregoing embodiment, and will not be repeated here.

[0295] S510, the EC outputs a high-level NVVDD_POWER_EN signal to power on the NVVDD_POWER and pull up the NVVDD_PWRGD signal.

[0296] The pulling up of the NVVDD_PWRGD signal refers to adjusting the low-level NVVDD_PWRGD signal output by the EC to a high-level NVVDD_PWRGD signal. The related definition of the pulling up of the NVVDD_PWRGD signal can be referred to the related description after S314 in the foregoing embodiment, which will not be repeated here.

[0297] The specific implementation of S510 can be referred to the related description after S310 in the foregoing embodiment, which will not be repeated here.

[0298] S510 is followed by S514, and the specific reason can be referred to the related description after S310 in the foregoing embodiment.

[0299] S511, the EC outputs a low-level NVVDD_POWER_EN signal to power off the NVVDD_POWER and pull down the NVVDD_PWRGD signal.

[0300] The pulling down of the NVVDD_PWRGD signal refers to adjusting the high-level NVVDD_PWRGD signal output by the EC to a low-level NVVDD_PWRGD signal. The related definition of the pulling down of the NVVDD_PWRGD signal can be referred to the related description after S314 in the foregoing embodiment, which will not be repeated here.

[0301] The specific implementation of S511 can be referred to the related description after S311 in the foregoing embodiment, which will not be repeated here.

[0302] S511 is followed by S514, and the specific reason can be referred to the related description after S311 in the foregoing embodiment.

[0303] S512, the EC outputs a high-level PEXVDD_POWER_EN signal to power on the PEXVDD_POWER and pull up the PEXVDD_PWRGD signal.

[0304] The pulling up of the PEXVDD_PWRGD signal refers to adjusting the low-level PEXVDD_PWRGD signal output by the EC to a high-level PEXVDD_PWRGD signal. The related definition of the pulling up of the PEXVDD_PWRGD signal can be referred to the related description after S314 in the foregoing embodiment, which will not be repeated here.

[0305] The specific implementation of S512 can be referred to the related description after S312 in the foregoing embodiment, which will not be repeated here.

[0306] S512 is followed by S514, and the specific reason can refer to the relevant description after S312 in the foregoing embodiments.

[0307] S513, the EC outputs a low-level PEXVDD_POWER_EN signal to power down the PEXVDD_POWER and pull down the PEXVDD_PWRGD signal.

[0308] The pull-down of the PEXVDD_PWRGD signal refers to adjusting the high-level PEXVDD_PWRGD signal output by the EC to a low-level PEXVDD_PWRGD signal. The related definition of the pull-down of the PEXVDD_PWRGD signal can refer to the relevant description after S314 in the foregoing embodiments, and will not be repeated here.

[0309] The specific implementation of S513 can refer to the relevant description after S313 in the foregoing embodiments, and will not be repeated here.

[0310] S513 is followed by S514, and the specific reason can refer to the relevant description after S313 in the foregoing embodiments.

[0311] S514, the EC judges a fifth result of the FBVDD_GC6_EN signal, the NVVDD_PWRGD signal, and the PEXVDD_PWRGD signal by or gate logic.

[0312] In the case where the fifth result is high level, the EC can output a high-level FBVDD_POWER_EN signal indicating the power-up of the FBVDD_POWER to power up the FBVDD_POWER, that is, S515 is performed; in the case where the fifth result is low level, the EC can output a low-level FBVDD_POWER_EN signal indicating the power-down of the FBVDD_POWER to power down the FBVDD_POWER, that is, S516 is performed.

[0313] The specific implementation of S514 can refer to the relevant description after S314 in the foregoing embodiments, and will not be repeated here.

[0314] S515, the EC outputs a high-level FBVDD_POWER_EN signal to power up the FBVDD_POWER and pull up the FBVDD_PWRGD signal.

[0315] The pull-up of the FBVDD_PWRGD signal refers to adjusting the low-level FBVDD_PWRGD signal output by the EC to a high-level FBVDD_PWRGD signal. The related definition of the pull-up of the FBVDD_PWRGD signal can refer to the relevant description after S317 in the foregoing embodiments, and will not be repeated here.

[0316] The specific implementation of S515 can refer to the related description after S315 in the foregoing embodiments, and details are not described herein.

[0317] S515 is followed by S517, and the specific reason can refer to the related description after S315 in the foregoing embodiments.

[0318] S516, the EC outputs the low-level FBVDD_POWER_EN signal to power off the FBVDD_POWER and pull down the FBVDD_PWRGD signal.

[0319] The pull-down of the FBVDD_PWRGD signal refers to adjusting the high-level FBVDD_PWRGD signal output by the EC to a low-level FBVDD_PWRGD signal. The related definition of the pull-down of the FBVDD_PWRGD signal can refer to the related description after S317 in the foregoing embodiments, and details are not described herein.

[0320] The specific implementation of S516 can refer to the related description after S316 in the foregoing embodiments, and details are not described herein.

[0321] S516 is followed by S517, and the specific reason can refer to the related description after S316 in the foregoing embodiments.

[0322] S517, the EC judges a sixth result of the MSVDD_PWRGD signal, the NVVDD_PWRGD signal, the PEXVDD_PWRGD signal and the FBVDD_PWRGD signal by using an AND gate logic.

[0323] In the case that the sixth result is a high level, the EC can output a high-level GPU_PWRGD signal for indicating that each power supply of the GPU is powered on, that is, S519 is executed; in the case that the sixth result is a low level, the EC can reset the GPU_PWREN signal, or judge a first result of the FBVDD_PWRGD signal and the GPU_PWREN signal by using an OR gate logic, that is, S301 or S302 is re-executed.

[0324] The specific implementation of S517 can refer to the related description after S317 in the foregoing embodiments, and details are not described herein.

[0325] S518, the EC judges a seventh result of the MSVDD_PWRGD signal, the NVVDD_PWRGD signal, the PEXVDD_PWRGD signal and the FBVDD_PWRGD signal by using an OR gate logic.

[0326] In a case where the seventh result is low, the EC can output the GPU_PWRGD signal at low level indicating that the power supplies of the GPU have been powered down, i.e., S520 is performed; in a case where the seventh result is high, the EC can re-assert the GPU_PWREN signal, or determine the first result of the FBVDD_PWRGD signal and the GPU_PWREN signal by using an OR gate logic, i.e., S301 or S302 is performed again.

[0327] The implementation of S518 can refer to the related description after S318 in the foregoing embodiments, which will not be repeated here.

[0328] S519, the EC outputs the GPU_PWREN signal at high level.

[0329] The implementation of S519 can refer to the related description after S319 in the foregoing embodiments, which will not be repeated here.

[0330] S520, the EC outputs the GPU_PWREN signal at low level.

[0331] The implementation of S520 can refer to the related description after S320 in the foregoing embodiments, which will not be repeated here.

[0332] It should be noted that, in a case where the electronic device is normally running, the GPU_PWREN signal, the FBVDD_PWRGD signal, the OVERT_N signal, the MSVDD_GC6_EN signal, the MSVDD_PWRGD signal, the NVVDD_GC6_EN signal, the NVVDD_PWRGD signal, the PEXVDD_PWRGD signal and the FBVDD_GC6_EN signal can be received by the EC in real time, i.e., the EC can receive these signals at the same time, instead of receiving them at different times. However, the signals received in different cases are different. For example, in a case where the GPU needs to be powered down, the GPU_PWREN signal is used to indicate that the multiple power supplies of the GPU are powered down; in a case where the GPU needs to be powered up, the GPU_PWREN signal is used to indicate that the multiple power supplies of the GPU are powered up. The remaining signals are the same, and the differences in different cases can refer to the related description in the foregoing embodiments. In addition, the 1V2_POWER_EN signal, the MSVDD_POWER_EN signal, the NVVDD_POWER_EN signal, the PEXVDD_POWER_EN signal and the FBVDD_POWER_EN signal are also output by the EC in real time, i.e., the EC can output these signals at the same time, instead of outputting them at different times.

[0333] Based on this, in some embodiments, the technical solutions provided by the above embodiments can be executed simultaneously at each time of execution of S502, S505, S508, S509, S514 and S517 (or S518), and each execution can cause the enable signal and the corresponding state indication signal output by the EC to change for a certain power supply, so as to cause the power supply to be powered on or powered off. Through multiple executions of the above technical solutions, the multiple power supplies of the GPU can be powered on or powered off according to a preset power-on / off timing.

[0334] In some embodiments, the EC can receive or send 1.8V IO (Input / Output) signals, and therefore the above GPU_PWREN signal, the FBVDD_PWRGD signal, the OVERT_N signal, the MSVDD_GC6_EN signal, the MSVDD_PWRGD signal, the NVVDD_GC6_EN signal, the NVVDD_PWRGD signal, the PEXVDD_PWRGD signal, the FBVDD_GC6_EN, the 1V2_POWER_EN signal, the MSVDD_POWER_EN signal, the NVVDD_POWER_EN signal, the PEXVDD_POWER_EN signal and the FBVDD_POWER_EN are all 1.8V IO signals.

[0335] Based on the above implementation, when the GPU needs to be powered on but does not need to enter a sleep state, the EC receives the GPU_PWREN signal instructing multiple power supplies of the GPU to power on. The power-on sequence of these power supplies is then controlled by the EC as follows: 1V2_POWER->1V8_POWER->MSVDD_POWER->NVVDD_POWER and PEXVDD_POWER->FBVDD_POWER. When the GPU needs to be powered on but needs to enter a sleep state, MSVDD_POWER, NVVDD_POWER, and PEXVDD_POWER are not powered on, and the power-on sequence of the remaining power supplies is: 1V2_POWER->1V8_POWER->FBVDD_POWER. When the GPU needs to be powered down, after the EC receives the GPU_PWREN signal instructing multiple power supplies of the GPU to power down, the first execution of the entire scheme can power down MSVDD_POWER, NVVDD_POWER, PEXVDD_POWER, and FBVDD_POWER of the GPU, with MSVDD_POWER, NVVDD_POWER, and PEXVDD_POWER powering down simultaneously, followed by FBVDD_POWER. The second execution of the entire scheme can then power down 1V2_POWER and 1V8_POWER sequentially. Because this technical solution reuses the EC of the electronic device itself to control the power-on and power-off sequence of multiple power supplies of the GPU, it is more cost-effective and simpler than existing schemes that use multiple components to control the power-on and power-off sequence of multiple power supplies of the GPU.

[0336] To facilitate understanding, the following will be combined with... Figure 6 The thread identifier allocation method provided in the embodiments of this application will be described. For example... Figure 6 As shown, the method may include S601-S603: S601 and EC receive the GPU power enable signal.

[0337] Among them, the GPU power enable signal is used to indicate that multiple target power supplies of the GPU are powered on or powered off.

[0338] In some embodiments, the multiple target power supplies may include: 1V2_POWER, MSVDD_POWER, NVVDD_POWER, PEXVDD_POWER, and FBVDD_POWER.

[0339] The specific implementation of S601 can be referred to the relevant descriptions of S301 and S501 in the aforementioned embodiments, and will not be repeated here.

[0340] S602, in response to the GPU power enable signal, the EC acquires power management signals of the target power supply.

[0341] In the embodiments of the present application, the power management signals of the target power supply can be all signals related to power-on / power-off of the target power supply. For example, if the target power supply includes 1V2_POWER, MSVDD_POWER, NVVDD_POWER, PEXVDD_POWER and FBVDD_POWER, the power management signals of these target power supplies can include GPU_PWREN signal, FBVDD_PWRGD signal, OVERT_N signal, MSVDD_GC6_EN signal, MSVDD_PWRGD signal, NVVDD_GC6_EN signal, NVVDD_PWRGD signal, PEXVDD_PWRGD signal, FBVDD_GC6_EN signal, 1V2_POWER_EN signal, MSVDD_POWER_EN signal, NVVDD_POWER_EN signal, PEXVDD_POWER_EN signal and FBVDD_POWER_EN signal. The corresponding relationship between these power management signals and the target power supply can refer to the foregoing embodiments S301-S320 or S501-S520, and will not be repeated here.

[0342] Among them, the GPU_PWREN signal, the FBVDD_PWRGD signal, the OVERT_N signal, the MSVDD_GC6_EN signal, the MSVDD_PWRGD signal, the NVVDD_GC6_EN signal, the NVVDD_PWRGD signal, the PEXVDD_PWRGD signal and the FBVDD_GC6_EN signal are signals received by the EC, that is, the EC acquires these power management signals by receiving. The 1V2_POWER_EN signal, the MSVDD_POWER_EN signal, the NVVDD_POWER_EN signal, the PEXVDD_POWER_EN signal and the FBVDD_POWER_EN signal are signals output by the EC, so the EC can directly acquire these signals when output.

[0343] Of course, in practice, the acquisition method of the power management signal can also be any other possible implementation, which is not limited in the present application.

[0344] S603, based on the power management signals of the target power supply, the EC controls the power state of the target power supply, so that the multiple target power supplies are powered on according to the preset power-on sequence or powered off according to the preset power-off sequence.

[0345] In some embodiments, the EC controls the power state of the target power supply, specifically, the EC controls the target power supply to power on to enter the power-on state or power off to enter the power-off state.

[0346] In some embodiments, the EC controls the target power supply to power on specifically by sending an enable signal to the power chip of the target power supply to indicate the target power supply to power on, so that the power chip of the target power supply controls the target power supply to power on. In this way, the EC can control the target power supply to power on by sending the enable signal to the power chip of the target power supply.

[0347] In some embodiments, the EC controls the target power supply to power off specifically by sending an enable signal to the power chip of the target power supply to indicate the target power supply to power off, so that the power chip of the target power supply controls the target power supply to power off. In this way, the EC can control the target power supply to power off by sending the enable signal to the power chip of the target power supply.

[0348] The specific implementation of the EC controlling the target power supply to power on or power off can refer to the related descriptions of S301-S320 or S501-S520 in the foregoing embodiments, which will not be described here.

[0349] Based on the technical solutions corresponding to S601-S603, the EC possessed by the electronic device can be used to fully analyze a plurality of power management signals related to the power state of the GPU, so as to adjust the power enable signals for controlling the power state of a plurality of power supplies of the GPU, so as to achieve the purpose of making the plurality of power supplies of the GPU power on according to the preset power-on timing or power off according to the preset power-off timing. Since the control of the power-on and power-off timing of the plurality of power supplies of the GPU in the entire technical solution reuses the EC of the electronic device itself, compared with the prior art of using a plurality of components to control the power-on and power-off timing of the plurality of power supplies of the GPU, the cost is lower and the process is simpler.

[0350] Further, since the EC is a programmable device, the analysis of the plurality of power management signals and the adjustment of the power enable signals based on the analysis results can be realized by programming. Once the power-on and power-off timing is wrong or needs to be adjusted, it can be more convenient to debug or adjust, so that the power-on and power-off timing of the GPU is more accurate, the fault handling is faster when a fault occurs, and the user experience is improved.

[0351] In some embodiments, when the target power supply is the first type of power supply, the power management signal of the target power supply includes a state indication signal of the first power supply; the first type of power supply is the first in the preset power-on sequence in the preset power-on sequence and the last in the preset power-off sequence; in the preset power-off sequence, the power-off sequence of the first power supply is the previous sequence of the power-off sequence of the first type of power supply; the state indication signal of the first power supply is used to indicate that the first power supply has supplied power to the GPU or has not supplied power to the GPU; When the target power supply is the first type of power supply, the EC controls the power state of the target power supply based on the power management signal of the target power supply, including: In the case that the GPU power-on control signal indicates that the multiple target power supplies of the GPU are powered on, or the state indication signal of the first power supply indicates that the first power supply has supplied power to the GPU, the first type of power supply is powered on; in the case that the GPU power-on control signal indicates that the multiple target power supplies of the GPU are powered off, and the state indication signal of the first power supply indicates that the first power supply has not supplied power to the GPU, the first type of power supply is powered off.

[0352] In the GPU power-on control process of controlling the power-on of each power supply of the GPU, since the first type of power supply needs to be powered on first, the EC should first control the first type of power supply to be powered on after receiving the GPU power-on control signal indicating that the multiple power supplies of the GPU are powered on. However, in the GPU power-off control process of controlling the power-off of each power supply of the GPU, the first type of power supply needs to be powered off after the first power supply is powered off, so in the GPU power-off control process, the EC should not first control the first type of power supply to be powered off after receiving the GPU power-off control signal indicating that the multiple power supplies of the GPU are powered off. Instead, the EC controls the first type of power supply to be powered off after determining that the first power supply is powered off. Therefore, if the EC directly controls the first type of power supply to be powered on after receiving the GPU power-on control signal indicating that the multiple power supplies of the GPU are powered on, it will cause the actions performed by the EC after receiving the GPU power-on control signal in the GPU power-on control process and the GPU power-off control process to be significantly different, thereby making the GPU power control method process performed by the EC more complex and the related programming more tedious. Therefore, in order to unify the actions performed by the EC in the GPU power-on control process and the GPU power-off control process as much as possible and reduce the complexity of the corresponding programming, the state indication signal of the first power supply needs to be considered before controlling the first type of power supply to be powered on or powered off.

[0353] For example, the first type of power supply can be 1V2_POWER, the first power supply corresponding to 1V2_POWER can be FBVDD_POWER, and the state indication signal of FBVDD_POWER can be FBVDD_PWRGD signal. For related definitions of FBVDD_PWRGD signal, refer to the related description after S302 in the foregoing embodiment, which will not be repeated here.

[0354] Based on the above technical solution, in the case that the state indication signal of the first power supply is used to indicate that the first power supply has supplied power to the GPU, or the GPU power supply enable signal is used to indicate that the plurality of power supplies of the GPU are powered on, it can be determined that this time is in the GPU power supply power-on process, or this time is in the GPU power supply power-down process and the first power supply is not powered off. Therefore, at this time, the EC can control the first type of power supply to be powered on or to supply power to the GPU. In the case that the state indication signal of the first power supply is used to indicate that the first power supply does not supply power to the GPU, and the GPU power supply enable signal is used to indicate that the plurality of power supplies of the GPU are powered off, it can be determined that this time is in the GPU power supply power-down process and the first power supply has been powered off. Therefore, at this time, the EC can control the first type of power supply to be powered off or to stop supplying power to the GPU. It can be seen that, through the technical solution, the first type of power supply can be powered on in the first type of power supply in the preset power-on sequence and powered off in the first type of power supply in the preset power-down sequence, thereby ensuring the correctness of the power-on and power-down sequence of the first type of power supply. At the same time, since the control actions of the EC on the power-on and power-off of the first type of power supply are implemented based on the same power management signal, the complexity of the entire GPU power control method is also reduced.

[0355] In some embodiments, when the target power supply is the second type of power supply, the power management signal of the target power supply includes: the state indication signal of the previous power supply and the sleep enable signal of the second type of power supply; the second type of power supply does not power off when entering the sleep state and not entering the sleep state; in the preset power-on sequence, the power-on sequence of the previous power supply is the previous sequence of the power-on sequence of the target power supply; the state indication signal of the previous power supply is used to indicate that the previous power supply has supplied power to the GPU or has not supplied power to the GPU; the sleep enable signal of the second type of power supply is used to indicate that the second type of power supply enters the sleep state or does not enter the sleep state; In the case that the target power supply is the second type of power supply, the EC controls the power state of the target power supply based on the power management signal of the target power supply, including: in the case that the state indication signal of the previous power supply indicates that the previous power supply has supplied power to the GPU, or the sleep enable signal of the second type of power supply indicates that the second type of power supply enters the sleep state, the second type of power supply is controlled to be powered on; In the case that the state indication signal of the previous power supply indicates that the previous power supply does not supply power to the GPU, and the sleep enable signal of the second type of power supply indicates that the second type of power supply does not enter the sleep state, the second type of power supply is controlled to be powered off.

[0356] In the GPU power up control flow, the second type of power supply needs to be powered up immediately after its corresponding preceding power supply. In order to ensure the correct power up sequence of the second type of power supply, the state indication signal of the preceding power supply that can reflect whether the preceding power supply has supplied power to the GPU needs to be combined to determine whether the second type of power supply is powered up.

[0357] In addition, since the second type of power supply does not need to be powered down when it enters the sleep state, the second type of power supply can be powered up or powered down when it does not enter the sleep state. Therefore, in the GPU power up control flow, in order to ensure that the second type of power supply is still powered up when it is instructed to enter the sleep state, the sleep enable signal of the second type of power supply also needs to be combined in an OR relationship to determine whether the second type of power supply is powered up. That is, when the state indication signal of the corresponding preceding power supply of the second type of power supply and the sleep enable signal of the second type of power supply are combined to determine whether the second type of power supply is powered up, only one of the two signals needs to meet the power up prerequisite of the second type of power supply. In the GPU power down control flow, when the state indication signal of the corresponding preceding power supply of the second type of power supply and the sleep enable signal of the second type of power supply are combined to determine whether the second type of power supply is powered down, since the GPU will not enter the sleep state when it needs to be powered down in general, the sleep enable signal of the second type of power supply is used to indicate that the second type of power supply does not enter the sleep state at this time. In order to prevent the GPU power down failure caused by the sleep enable signal of the second type of power supply indicating that the second type of power supply enters the sleep state when the GPU needs to be powered down due to possible faults, the sleep enable signal of the second type of power supply also needs to meet the power down requirement of the second type of power supply at this time (i.e., the sleep enable signal of the second type of power supply indicates that the second type of power supply does not enter the sleep state).

[0358] For example, the second type of power supply can be FBVDD_POWER, the corresponding preceding power supply of FBVDD_POWER can be NVVDD_POWER or PEXVDD_POWER, and the state indication signal of NVVDD_POWER can be the NVVDD_PWRGD signal. The state indication signal of PEXVDD_POWER can be the PEXVDD_PWRGD signal. The definitions of the NVVDD_PWRGD signal and the PEXVDD_PWRGD signal can be referred to the related descriptions after S314 in the foregoing embodiments, which will not be described here.

[0359] Based on the technical solution, in the case that the state indication signal of the presequence power supply is used to indicate that the presequence power supply has supplied power to the GPU, or the sleep enable signal of the second power supply is used to indicate that the second power supply enters the sleep state, it can be determined that the GPU power-on process is in progress and the presequence power supply has been powered on, or the GPU power-on process is in progress and the second power supply is about to enter the sleep state. Therefore, the EC can control the second power supply to be powered on or supply power to the GPU at this time. In the case that the state indication signal of the presequence power supply is used to indicate that the presequence power supply has not supplied power to the GPU, and the sleep enable signal of the second power supply is used to indicate that the second power supply does not enter the sleep state, it can be determined that the GPU power-off process is in progress and the presequence power supply has been powered off. Therefore, the EC can control the second power supply to be powered off or stop supplying power to the GPU at this time. It can be seen that, by the technical solution, the second power supply can be powered on according to the power-on sequence of the second power supply in the preset power-on timing sequence, and powered off according to the power-off sequence of the second power supply in the preset power-off timing sequence, thereby ensuring the correctness of the power-on and power-off sequences of the second power supply.

[0360] In some embodiments, when the target power supply is the third power supply, the power management signal of the target power supply includes an enable signal of the presequence power supply; the power-off sequence of the third power supply in the preset power-off timing sequence is the first; in the preset power-on timing sequence, the power-on sequence of the presequence power supply is the sequence before the power-on sequence of the target power supply; the enable signal of the presequence power supply is used to indicate that the presequence power supply is powered on or powered off; when the target power supply is the third power supply, the EC controls the power state of the target power supply based on the power management signal of the target power supply, including: the EC controls the power state of the target power supply based on the power management signal of the target power supply and the GPU power enable signal.

[0361] Exemplarily, the third type of power supply can include MSVDD_POWER, PEXVDD_POWER and NVVDD_POWER. The MSVDD_POWER corresponds to the preceding power supply 1V2_POWER, and the enable signal of the 1V2_POWER can be a 1V2_POWER_EN signal. The PEXVDD_POWER corresponds to the preceding power supply MSVDD_POWER, and the enable signal of the MSVDD_POWER can be a MSVDD_POWER_EN signal. The NVVDD_POWER corresponds to the preceding power supply MSVDD_POWER, and the enable signal of the MSVDD_POWER can be a MSVDD_POWER_EN signal. The related definitions of the 1V2_POWER_EN signal and the MSVDD_POWER_EN signal can refer to the related descriptions in S305, S308 and S309 in the foregoing embodiments, and will not be described here. Based on the foregoing technical solution, since the third type of power supply needs to be powered off first, when controlling the power state of the target power supply, the GPU power supply enable signal can be used, so that when the EC receives the GPU power supply enable signal for indicating the power off of the multiple power supplies of the GPU, the third type of power supply can be timely powered off, and the correctness of the power off sequence of the third type of power supply is ensured.

[0362] In some embodiments, when the target power supply is a first sub-power supply in the third type of power supply, the power management signal of the target power supply further includes: a state indication signal of the preceding power supply; the first sub-power supply does not have a sleep enable signal, and the correlation degree with the GPU temperature is less than a preset threshold; the state indication signal of the preceding power supply is used to indicate that the preceding power supply has supplied power to the GPU or has not supplied power to the GPU; In the case that the target power supply is the first sub-power supply, the EC controls the power state of the target power supply based on the power management signal of the target power supply and the GPU power supply enable signal, including: in the case that the state indication signal of the preceding power supply indicates that the preceding power supply has supplied power to the GPU, the enable signal of the preceding power supply indicates that the preceding power supply is powered on, and the GPU power supply enable signal indicates that the multiple target power supplies of the GPU are powered on, controlling the first sub-power supply to be powered on; in the case that the state indication signal of the preceding power supply indicates that the preceding power supply has not supplied power to the GPU, or the enable signal of the preceding power supply indicates that the preceding power supply is powered off, or the GPU power supply enable signal indicates that the multiple target power supplies of the GPU are powered off, controlling the first sub-power supply to be powered off.

[0363] Exemplarily, the first sub-power supply can be PEXVDD_POWER. The related definitions of the PEXVDD_POWER can refer to the related descriptions of S309, S312 and S313 in the foregoing embodiments, and will not be described here.

[0364] Based on the above technical solution, in the case that the enable signal of the preceding power supply corresponding to the first sub-power supply is used to indicate that the preceding power supply is powered on, the state indication signal of the preceding power supply is used to indicate that the preceding power supply has supplied power to the GPU, and the GPU power supply enable signal is used to indicate that the plurality of power supplies of the GPU are powered on, it can be determined that this time is in the GPU power-on process and the preceding power supply has been powered on. Therefore, at this time, the EC can control the first sub-power supply to be powered on or supply power to the GPU. In the case that the enable signal of the preceding power supply corresponding to the first sub-power supply is used to indicate that the preceding power supply is powered off, or the state indication signal of the preceding power supply is used to indicate that the preceding power supply does not supply power to the GPU, or the GPU power supply enable signal is used to indicate that the plurality of power supplies of the GPU are powered off, it can be determined that this time is in the GPU power-off process. Therefore, at this time, the EC can control the first sub-power supply to be powered off or stop supplying power to the GPU. It can be seen that, by the technical solution, the first sub-power supply can be powered on according to the power-on sequence of the first sub-power supply in the preset power-on sequence on the basis of guaranteeing that the first sub-power supply has less relevance to the GPU temperature and the first sub-power supply is powered off first, thereby guaranteeing the correctness of the power-on and power-off sequence of the first sub-power supply.

[0365] In some embodiments, when the target power supply is a second sub-power supply in the third type of power supply, the power management signal of the target power supply further includes: an over-temperature indication signal and a sleep enable signal of the second sub-power supply; the state indication signal of the preceding power supply of the second sub-power supply cannot be obtained by the EC; the over-temperature indication signal is used to indicate that the GPU temperature does not exceed a preset temperature or exceeds the preset temperature; and the sleep enable signal of the second sub-power supply is used to indicate that the second sub-power supply enters a sleep state or does not enter the sleep state. In the case that the target power supply is the second sub-power supply, the EC controls the power state of the target power supply based on the power management signal of the target power supply and the GPU power supply enable signal, including: In the case that the enable signal of the preceding power supply is used to indicate that the preceding power supply is powered on, the over-temperature indication signal is used to indicate that the GPU temperature does not exceed a preset temperature, the sleep enable signal of the second sub-power supply is used to indicate that the second sub-power supply does not enter the sleep state, and the GPU power supply enable signal indicates that the plurality of target power supplies of the GPU are powered on, the second sub-power supply is controlled to be powered on. In the case that the enable signal of the preceding power supply is used to indicate that the preceding power supply is powered off, or the over-temperature indication signal is used to indicate that the GPU temperature exceeds the preset temperature, or the sleep enable signal of the second sub-power supply is used to indicate that the second sub-power supply enters the sleep state, or the GPU power supply enable signal indicates that the plurality of target power supplies of the GPU are powered off, the second sub-power supply is controlled to be powered off.

[0366] For example, the second sub-power supply can be MSVDD_POWER. The related definition of MSVDD_POWER can refer to the related description of S305, S306 and S307 in the foregoing embodiments, which will not be described here.

[0367] Based on the above technical solution, for the second sub-power supply which cannot obtain the state indication signal of the previous power supply, in the case that the over-temperature indication signal indicates that the GPU temperature is normal, the previous power supply enable signal is used to indicate that the previous power supply is powered on, the sleep enable signal of the second sub-power supply indicates that the second sub-power supply does not enter the sleep state, and the GPU power supply enable signal is used to indicate that the multiple power supplies of the GPU are powered on, it can be determined that this time is in the GPU power supply power-on process and the previous power supply has been powered on. Therefore, at this time, the EC can control the second sub-power supply to be powered on or supply power to the GPU. In the case that the over-temperature indication signal indicates that the GPU temperature exceeds the preset temperature, or the previous power supply enable signal is used to indicate that the previous power supply is powered off, or the sleep enable signal of the second sub-power supply indicates that the second sub-power supply enters the sleep state, or the GPU power supply enable signal is used to indicate that the multiple power supplies of the GPU are powered off, it can be determined that the second sub-power supply needs to be powered off to enter the sleep state, or the second sub-power supply needs to be powered off to reduce the GPU temperature, or it is in the GPU power supply power-off process. Therefore, at this time, the EC can control the second sub-power supply to be powered off or stop supplying power to the GPU. It can be seen that, through the technical solution, the second sub-power supply can be powered on according to the power-on sequence of the second sub-power supply in the preset power-on sequence on the basis of ensuring that the second sub-power supply is associated with the GPU temperature and the first power-off, thereby ensuring the correctness of the power-on and power-off sequence of the second sub-power supply. At the same time, in the case that the GPU is over-temperature or needs to enter the sleep state, the second sub-power supply can also be powered off in time to prevent the GPU from being over-temperature and malfunctioning or generating unnecessary power consumption.

[0368] In some embodiments, when the target power supply is a third sub-power supply other than the first sub-power supply and the second sub-power supply in the third type of power supply, the power management signals of the target power supply further include: a state indication signal of the previous power supply, an over-temperature indication signal, and a sleep enable signal of the third sub-power supply; the first sub-power supply does not have a sleep enable signal and has a correlation with the GPU temperature less than a preset threshold; the state indication signal of the previous power supply of the second sub-power supply cannot be obtained by the EC; the state indication signal of the previous power supply is used to indicate that the previous power supply has supplied power to the GPU or has not supplied power to the GPU; the over-temperature indication signal is used to indicate that the GPU temperature does not exceed the preset temperature or exceeds the preset temperature; the sleep enable signal of the third sub-power supply is used to indicate that the third sub-power supply enters the sleep state or does not enter the sleep state; In a case that the target power supply is the third sub power supply, the EC controls the power supply state of the target power supply based on the power management signal of the target power supply, including: in a case that the enable signal of the precedent power supply is used to indicate that the precedent power supply is powered on, the state indication signal of the precedent power supply is used to indicate that the precedent power supply has supplied power to the GPU, the over-temperature indication signal is used to indicate that the temperature of the GPU does not exceed the preset temperature, the sleep enable signal of the third sub power supply is used to indicate that the third sub power supply does not enter the sleep state, and the GPU power enable signal indicates that the multiple target power supplies of the GPU are powered on, controlling the third sub power supply to be powered on; in a case that the enable signal of the precedent power supply is used to indicate that the precedent power supply is powered off, or the state indication signal of the precedent power supply is used to indicate that the precedent power supply does not supply power to the GPU, or the over-temperature indication signal is used to indicate that the temperature of the GPU exceeds the preset temperature, or the sleep enable signal of the third sub power supply is used to indicate that the third sub power supply enters the sleep state, or the GPU power enable signal indicates that the multiple target power supplies of the GPU are powered off, controlling the third sub power supply to be powered off.

[0369] For example, the third sub power supply can be NVVDD_POWER. The related definition of NVVDD_POWER can refer to the related description of S308, S310 and S311 in the foregoing embodiment, which will not be described here.

[0370] Based on the above technical solution, in the case that the over-temperature indication signal indicates that the temperature of the GPU is normal, the previous power enable signal is used to indicate that the previous power is powered on, the previous power state indication signal is used to indicate that the previous power has supplied power to the GPU, the sleep enable signal of the third sub-power indicates that the third sub-power does not enter the sleep state, and the GPU power enable signal is used to indicate that the plurality of powers of the GPU are powered on, it can be determined that the GPU power on process is in the case and the previous power is powered on. Therefore, at this time, the EC can control the third sub-power to be powered on or supply power to the GPU. In the case that the over-temperature indication signal indicates that the temperature of the GPU exceeds the preset temperature, or the previous power enable signal is used to indicate that the previous power is powered off, or the previous power state indication signal is used to indicate that the previous power does not supply power to the GPU, or the sleep enable signal of the third sub-power indicates that the third sub-power enters the sleep state, or the GPU power enable signal is used to indicate that the plurality of powers of the GPU are powered off, it can be determined that the third sub-power needs to be powered off to enter the sleep state, or the third sub-power needs to be powered off to reduce the temperature of the GPU, or in the GPU power off process. Therefore, at this time, the EC can control the third sub-power to be powered off or stop supplying power to the GPU. It can be seen that, through the technical solution, the third sub-power can be powered on according to the power-on order of the third sub-power in the preset power-on sequence on the basis of guaranteeing the first power-off of the third sub-power associated with the temperature of the GPU and having the sleep enable signal, thereby guaranteeing the correctness of the power-on and power-off order of the third sub-power. At the same time, in the case that the GPU is overheated or needs to enter the sleep state, the third sub-power can also be powered off in time to prevent the GPU from overheating and malfunctioning or unnecessary power consumption.

[0371] In some embodiments, the EC can also determine whether the plurality of target powers of the GPU have been powered on or powered off based on the state indication signals of all target powers except the target power (for example, 1V2_POWER) for which the state indication signal cannot be acquired. In the case that the plurality of target powers of the GPU have been powered on, the EC can output a GPU power state indication signal indicating that the target powers of the GPU have been powered on. In the case that the plurality of target powers of the GPU have been powered off, the EC can output a GPU power state indication signal indicating that the target powers of the GPU have been powered off.

[0372] The specific implementation and effects of the above technical solution can be referred to the related description of S317-S320 in the foregoing embodiments, which will not be described here.

[0373] It can be understood that the electronic device described above includes hardware structures and / or software modules corresponding to each function in order to realize the above functions. Those skilled in the art should easily realize that, in combination with the units and algorithm steps of the examples described in the embodiments disclosed herein, the embodiments of the present application can be realized in the form of hardware or a combination of hardware and computer software. Whether a certain function is realized in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to realize the described functions for each specific application, but such implementation should not be considered beyond the scope of the embodiments of the present application.

[0374] The embodiments of the present application can divide the above electronic device into functional modules according to the above method examples. For example, each functional module can be divided according to each function, or two or more functions can be integrated into one processing module. The integrated module can be realized in the form of hardware or software functional module. It should be noted that the division of modules in the embodiments of the present application is illustrative, and is only a logical functional division. Actual implementation can have another division manner.

[0375] In the case of dividing each functional module according to each function, referring to Figure 7 The embodiments of the present application also provide a GPU power control device applied to an EC of an electronic device. The GPU power control device can include a receiving module 701, an obtaining module 702 and a control module 703.

[0376] The receiving module 701 is configured to receive a GPU power enable signal. The GPU power enable signal is used to indicate power-on of a plurality of target power supplies of a GPU or to indicate power-off of the plurality of target power supplies of the GPU. The obtaining module 702 is configured to obtain a power management signal of a target power supply in response to the GPU power enable signal received by the receiving module 701. The control module 703 is configured to control a power state of the target power supply based on the power management signal of the target power supply obtained by the obtaining module 702, so that the plurality of target power supplies are powered on according to a preset power-on timing or powered off according to a preset power-off timing.

[0377] In addition, the cooperation between the receiving module 701, the obtaining module 702 and the control module 703 can also realize all the process steps of the GPU power control method provided by the foregoing embodiments.

[0378] As to the GPU power control apparatus in the above embodiments, the specific manner in which each module performs operations has been described in detail in the embodiments of the GPU power control method in the foregoing embodiments, and thus will not be elaborated here. The related beneficial effects thereof can also refer to the related beneficial effects of the foregoing GPU power control method, and thus will not be elaborated here.

[0379] The embodiments of the present application further provide an electronic device, which comprises a display screen, a memory, an embedded controller EC and one or more processors; wherein the memory stores computer program codes, the computer program codes comprise computer instructions, and when the computer instructions are executed by the EC, the electronic device performs the GPU power control method provided in the foregoing embodiments. The specific structure of the electronic device can refer to the structure of the electronic device shown in the foregoing embodiments. Figure 2

[0380] The embodiments of the present application further provide a computer readable storage medium, which comprises computer instructions, and when the computer instructions are run on an electronic device, the electronic device performs the GPU power control method provided in the foregoing embodiments.

[0381] The embodiments of the present application further provide an embedded controller, which comprises a processing unit and a memory; wherein the memory is used to store one or more computer program codes, the computer program codes comprise computer instructions, and when the embedded controller executes the computer instructions, the processor executes the GPU power control method provided in the foregoing embodiments.

[0382] The embodiments of the present application further provide a computer program product, which comprises executable instructions, and when the computer program product is run on an electronic device, the electronic device executes the GPU power control method provided in the foregoing embodiments.

[0383] Through the description of the above embodiments, those skilled in the art can clearly understand that, for the convenience and brevity of description, only the division of the above functional modules is taken as an example for illustration, and in actual application, the above functions can be completed by different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above.

[0384] ​In several embodiments provided in the present application, it should be understood that the disclosed apparatuses / devices and methods can be implemented in other manners. For example, the embodiments of the apparatus / device described above are merely schematic. For example, the division of the modules or units is merely logical function division, and there can be another division manner in actual implementation. For example, a plurality of units or components can be combined or integrated into another apparatus, or some features can be ignored or not executed. In addition, the displayed or discussed mutual couplings or direct couplings or communication connections between different apparatuses can be indirect couplings or communication connections through some interfaces, apparatuses or units, and can be in electrical, mechanical or other forms.

[0385] The units described as separate components can or can not be physically separate, and the components shown as units can be one physical unit or multiple physical units, i.e., can be located in one place, or can be distributed to multiple different places. Some or all of the units can be selected according to actual needs to achieve the purpose of the embodiments.

[0386] In addition, each functional unit in the embodiments of the present application can be integrated in one processing unit, or each unit can exist physically, or two or more units can be integrated in one unit. The integrated unit can be implemented in the form of hardware or in the form of a software functional unit.

[0387] When the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solutions of the embodiments of the present application essentially or the part that contributes to the prior art or the whole or part of the technical solutions can be embodied in the form of a software product. The software product is stored in a storage medium, and includes several instructions to make an apparatus (which can be a single-chip machine, a chip, etc.) or a processor execute all or part of the steps of the methods described in the embodiments of the present application. The aforementioned storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and various media that can store program codes.

[0388] The above is merely specific embodiments of the present application, but the protection scope of the present application is not limited thereto. Any changes or replacements within the technical scope disclosed in the present application should be covered in the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A method of GPU power control, the method comprising: The method is applied to an electronic device including an embedded controller (EC), and the method comprises: The EC receives a GPU power enable signal, wherein the GPU power enable signal is used to indicate power-up of a plurality of target power supplies of a GPU or to indicate power-down of the plurality of target power supplies of the GPU; The EC acquires a power management signal of the target power supply in response to the GPU power enable signal; The EC controls a power state of the target power supply based on the power management signal of the target power supply, so that the plurality of target power supplies are powered up according to a preset power-up sequence or are powered down according to a preset power-down sequence.

2. The method of claim 1, wherein, The EC controls the power state of the target power supply, comprising: The EC controls the target power supply to be powered up to a power-up state or to be powered down to a power-down state.

3. The method of claim 2, wherein: The EC controls the target power supply to be powered up, comprising: the EC sending an enable signal to a power chip of the target power supply to indicate power-up of the target power supply, so that the power chip of the target power supply controls the target power supply to be powered up; The EC controls the target power supply to be powered down, comprising: the EC sending an enable signal to a power chip of the target power supply to indicate power-down of the target power supply, so that the power chip of the target power supply controls the target power supply to be powered down.

4. The method according to any one of claims 1 to 3, characterized in that, When the target power supply is a first type of power supply, the power management signal of the target power supply comprises a state indication signal of a first power supply; the first type of power supply is the first in the power-up sequence in the preset power-up sequence and is the last in the preset power-down sequence; in the preset power-down sequence, the power-down sequence of the first power supply is the previous sequence of the power-down sequence of the first type of power supply; the state indication signal of the first power supply is used to indicate that the first power supply has supplied power to the GPU or has not supplied power to the GPU; When the target power supply is the first type of power supply, the EC controls the power state of the target power supply based on the power management signal of the target power supply, comprising: When the GPU power enable signal indicates power-up of the plurality of target power supplies of the GPU or the state indication signal of the first power supply indicates that the first power supply has supplied power to the GPU, the first type of power supply is controlled to be powered up; When the GPU power enable signal indicates power-down of the plurality of target power supplies of the GPU and the state indication signal of the first power supply indicates that the first power supply has not supplied power to the GPU, the first type of power supply is controlled to be powered down.

5. The method according to any one of claims 1 to 3, characterized in that, In a case where the target power supply is the second type of power supply, the power management signal of the target power supply comprises a state indication signal of a preceding power supply and a sleep enable signal of the second type of power supply; the second type of power supply does not power off in a case where the second type of power supply enters a sleep state or does not enter the sleep state; in the preset power-on sequence, a power-on sequence of the preceding power supply is a preceding sequence of a power-on sequence of the target power supply; the state indication signal of the preceding power supply is used to indicate that the preceding power supply has supplied power to the GPU or has not supplied power to the GPU; the sleep enable signal of the second type of power supply is used to indicate that the second type of power supply enters the sleep state or does not enter the sleep state; In a case where the target power supply is the second type of power supply, the EC controls the power state of the target power supply based on the power management signal of the target power supply, and the method comprises: controlling the second type of power supply to power on in a case where the state indication signal of the preceding power supply indicates that the preceding power supply has supplied power to the GPU or the sleep enable signal of the second type of power supply indicates that the second type of power supply enters the sleep state; controlling the second type of power supply to power off in a case where the state indication signal of the preceding power supply indicates that the preceding power supply has not supplied power to the GPU and the sleep enable signal of the second type of power supply indicates that the second type of power supply does not enter the sleep state.

6. The method according to any one of claims 1 to 3, characterized in that, In a case where the target power supply is the third type of power supply, the power management signal of the target power supply comprises an enable signal of a preceding power supply; the third type of power supply is the first to power off in the preset power-off sequence; in the preset power-on sequence, a power-on sequence of the preceding power supply is a preceding sequence of a power-on sequence of the target power supply; the enable signal of the preceding power supply is used to indicate that the preceding power supply is powered on or powered off; In a case where the target power supply is the third type of power supply, the EC controls the power state of the target power supply based on the power management signal of the target power supply, and the method comprises: The EC controls the power state of the target power supply based on the power management signal of the target power supply and the GPU power supply enable signal.

7. The method of claim 6, wherein, In a case where the target power supply is the first sub-power supply in the third type of power supply, the power management signal of the target power supply further comprises a state indication signal of a preceding power supply; the first sub-power supply does not have a sleep enable signal, and a correlation degree of the first sub-power supply with a GPU temperature is less than a preset threshold; the state indication signal of the preceding power supply is used to indicate that the preceding power supply has supplied power to the GPU or has not supplied power to the GPU; In a case where the target power supply is the first sub-power supply, the EC controls the power state of the target power supply based on the power management signal of the target power supply and the GPU power supply enable signal, and the method comprises: controlling the first sub-power supply to power on in a case where the state indication signal of the preceding power supply indicates that the preceding power supply has supplied power to the GPU, the enable signal of the preceding power supply indicates that the preceding power supply is powered on, and the GPU power supply enable signal indicates that a plurality of target power supplies of the GPU are powered on; In a case where the state indication signal of the pre-power supply is used to indicate that the pre-power supply does not supply power to the GPU, or the enable signal of the pre-power supply is used to indicate that the pre-power supply is powered off, or the GPU power supply enable signal indicates that multiple target power supplies of the GPU are powered off, the first sub-power supply is controlled to be powered off.

8. The method of claim 6, wherein, In a case where the target power supply is the second sub-power supply in the third type of power supply, the power management signal of the target power supply further includes an over-temperature indication signal and a sleep enable signal of the second sub-power supply; the state indication signal of the pre-power supply of the second sub-power supply cannot be acquired by the EC; the over-temperature indication signal is used to indicate that the temperature of the GPU does not exceed a preset temperature or exceeds the preset temperature; the sleep enable signal of the second sub-power supply is used to indicate that the second sub-power supply enters a sleep state or does not enter the sleep state; In a case where the target power supply is the second sub-power supply, the EC controls the power state of the target power supply based on the power management signal of the target power supply and the GPU power supply enable signal, and the control includes: In a case where the enable signal of the pre-power supply is used to indicate that the pre-power supply is powered on, the over-temperature indication signal is used to indicate that the temperature of the GPU does not exceed a preset temperature, the sleep enable signal of the second sub-power supply is used to indicate that the second sub-power supply does not enter a sleep state, and the GPU power supply enable signal indicates that multiple target power supplies of the GPU are powered on, the second sub-power supply is controlled to be powered on; In a case where the enable signal of the pre-power supply is used to indicate that the pre-power supply is powered off, or the over-temperature indication signal is used to indicate that the temperature of the GPU exceeds a preset temperature, or the sleep enable signal of the second sub-power supply is used to indicate that the second sub-power supply enters a sleep state, or the GPU power supply enable signal indicates that multiple target power supplies of the GPU are powered off, the second sub-power supply is controlled to be powered off.

9. The method of claim 6, wherein, In a case where the target power supply is a third sub-power supply other than the first sub-power supply and the second sub-power supply in the third type of power supply, the power management signal of the target power supply further includes a state indication signal of a pre-power supply, an over-temperature indication signal, and a sleep enable signal of the third sub-power supply; the first sub-power supply does not have a sleep enable signal, and has a correlation with the temperature of the GPU that is less than a preset threshold; the state indication signal of the pre-power supply of the second sub-power supply cannot be acquired by the EC; the state indication signal of the pre-power supply is used to indicate that the pre-power supply has supplied power to the GPU or has not supplied power to the GPU; the over-temperature indication signal is used to indicate that the temperature of the GPU does not exceed a preset temperature or exceeds the preset temperature; the sleep enable signal of the third sub-power supply is used to indicate that the third sub-power supply enters a sleep state or does not enter the sleep state; In a case where the target power supply is the third sub-power supply, the EC controls the power state of the target power supply based on the power management signal of the target power supply, and the control includes: In a case where the enable signal of the presequence power supply is used to indicate that the presequence power supply is powered on, the state indication signal of the presequence power supply is used to indicate that the presequence power supply has supplied power to the GPU, the over-temperature indication signal is used to indicate that the temperature of the GPU does not exceed a preset temperature, the sleep enable signal of the third sub-power supply is used to indicate that the third sub-power supply does not enter a sleep state, and the GPU power supply enable signal indicates that a plurality of target power supplies of the GPU are powered on, the third sub-power supply is controlled to be powered on. In a case where the enable signal of the presequence power supply is used to indicate that the presequence power supply is powered off, or the state indication signal of the presequence power supply is used to indicate that the presequence power supply has not supplied power to the GPU, or the over-temperature indication signal is used to indicate that the temperature of the GPU exceeds a preset temperature, or the sleep enable signal of the third sub-power supply is used to indicate that the third sub-power supply enters a sleep state, or the GPU power supply enable signal indicates that a plurality of target power supplies of the GPU are powered off, the third sub-power supply is controlled to be powered off.

10. An electronic device, comprising: The electronic device comprises: a display screen, a memory, an embedded controller (EC), and one or more processors; wherein the memory stores computer program code, the computer program code comprising computer instructions that, when executed by the EC, cause the electronic device to perform the GPU power supply control method according to any one of claims 1-9.

11. An embedded controller, characterized by The embedded controller comprises a processing unit and a memory; wherein the memory is configured to store one or more computer program codes, the computer program codes comprising computer instructions that, when executed by the embedded controller, cause the embedded controller to perform the GPU power supply control method according to any one of claims 1-9.

12. A computer-readable storage medium, characterized in that, The computer program product comprises computer instructions that, when executed on an electronic device, cause the electronic device to perform the GPU power supply control method according to any one of claims 1-9.

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