Large rotary equipment assembling coaxiality optimization method based on GPU parallel acceleration and video memory control technology

Abstract

The invention provides a large rotary equipment assembly coaxiality optimization method based on GPU parallel acceleration and a video memory control technology, and the method comprises the steps: constructing a GPU-based parallel acceleration architecture, and carrying out the synchronous parallel processing of a million-level or even more phase combinations through a CUDA kernel function; the speed of aero-engine assembly coaxiality calculation and optimal combination screening is remarkably increased, and compared with a traditional CPU serial method, the overall calculation efficiency is improved by more than 20 times.

Description

Technical Field

[0001] This invention relates to the field of mechanical assembly technology, and in particular to a method for optimizing the coaxiality of large rotating equipment assembly based on GPU parallel acceleration and a video memory control technology. Background Technology

[0002] As a complex power system requiring high performance and high reliability, the assembly accuracy of the multi-stage rotors in an aero-engine directly affects the dynamic balance, shaft stability, and vibration control level of the entire engine. Especially during the rotor stacking process of critical components such as the high-pressure compressor and low-pressure turbine, various geometric error sources (such as eccentricity and tilt) exist between the rotors. Different assembly phases can cause these errors to couple and superimpose in space, leading to significant changes in the coaxiality of the assembly. Therefore, phase optimization methods are needed to achieve complementary cancellation of errors and improve shaft consistency.

[0003] Traditional serial computing methods are extremely inefficient when handling such massive phase combination search tasks, failing to meet the demands of rapid feedback in practical engineering. Furthermore, in large-scale data computations, excessive one-time memory allocation can easily lead to GPU resource exhaustion or even program crashes. This invention provides a coaxiality optimization method for aero-engine stacked assembly that integrates GPU parallel acceleration and memory control strategies. While ensuring computational accuracy, it significantly improves processing efficiency and system stability, laying the foundation for high-precision intelligent assembly. Summary of the Invention

[0004] The purpose of this invention is to solve the phase optimization problem of aero-engine stacking assembly with minimum coaxiality as the objective, and proposes a coaxiality optimization method and memory control technology for large rotating equipment assembly based on GPU parallel acceleration.

[0005] This invention is achieved through the following technical solution: This invention proposes a method for optimizing the coaxiality of large rotating equipment assembly based on GPU parallel acceleration, the method specifically being: Step 1: Construct a space for all possible phase combinations based on the discrete angles of the rotor phases at each stage; then, manage the memory data using a batch calculation strategy based on the memory size required for a single combination calculation and the total number of phase combinations. Step 2: Design a CUDA parallel kernel function to perform parallel calculations on each phase combination on the GPU, and complete the eccentricity rotation, rigid body transformation matrix transfer and coordinate system mapping of each rotor level step by step. This efficiently calculates the coaxiality of each rotor level and significantly improves the calculation speed and accuracy of coaxiality error assessment in a million-level combination space. Step 3: Construct an optimization function based on dual-objective constraints, and sort the results on the CPU to obtain the optimal phase combination.

[0006] Further, input data preparation, get rotor number rotor_num and eccentric vector homogeneous coordinates eccs of each stage, coordinate transformation matrix trans_mat; and according to the number of mounting holes of the assembly surface between each rotor, enumerate all possible phase combinations thetas, and the total number of combinations is zuhe_num.

[0007] Further, calculate the required video memory for single combination, and the calculation formula of Memory_per_combination for each combination is as follows: Memory_per_combination = rotor_num * sizeof(double) / / theta + rotor_num * 4 * sizeof(double) / / eccs + rotor_num * 16 * sizeof(double) / / trans_mat + 2 * sizeof(double) / / ecc_all + ecc_all_last Where, theta is the phase of each rotor in the combination, eccs is the eccentric vector homogeneous coordinates of each rotor in the combination, trans_mat is the coordinate transformation matrix caused by the eccentricity and tilt error of each rotor, ecc_all is the coaxiality of the assembly of the combination, ecc_all_last is the last stage coaxiality of the combination, and sizeof(double) is the video memory size occupied by a double variable.

[0008] Further, calculate the maximum number of combinations max_comb that can be calculated simultaneously by the current GPU video memory according to the following formula, to avoid program crashes due to insufficient video memory in parallel calculation: max_comb = (GPU_memory_available - reserved_memory) / Memory_per_combination Where, GPU_memory_available is the total video memory size available for the current GPU, i.e. the total amount of memory that can be allocated on the device; reserved_memory is the memory size reserved by CUDA runtime; Then, divide the total number of combinations zuhe_num into iterCount batches according to the maximum number of combinations max_comb calculated in a single batch for processing.

[0009] Further, the GPU thread optimal configuration is set, and the thread block size of each batch is set to blockSize = 256. The optimal grid configuration is calculated according to the following formula: gridSizeX = min((max_comb + blockSize - 1) / blockSize, maxGridSizeX) gridSizeY = min((max_comb / (blockSize * gridSizeX)) + 1,maxGridSizeY) Wherein, gridSizeX is the number of thread blocks actually allocated in the X direction, gridSizeY is the number of thread blocks actually allocated in the Y direction, maxGridSizeX is the maximum number of thread blocks in the X direction of the CUDA grid limit, and maxGridSizeY is the maximum number of thread blocks in the Y direction of the CUDA grid limit.

[0010] Further, a CUDA-based coaxiality error parallel computing kernel function is designed. For each set of input phase combination parameters, the kernel function first calculates the global combination number idx through thread index and judges whether it is out of bounds to ensure safety. Then, in each thread, all rotor stages are processed in turn as follows: the phase rotation matrix of the current rotor is constructed, and the eccentricity is transformed from the local coordinate system of itself to the coordinate system of the first stage of the assembly; in the multi-stage assembly structure, the accumulated coordinate transformation matrix transmat_all of the previous stage and the rotation translation transformation matrix trans_mat of the current stage are used to recursively update the overall transformation path; the size of each stage eccentricity is extracted through the Euclidean norm, and the maximum eccentricity of the assembly, i.e. the total assembly coaxiality and the last stage eccentricity, is continuously tracked to support subsequent constraint evaluation or multi-objective optimization.

[0011] Further, all intermediate variables in the kernel function are local variables, which are automatically assigned to the private registers or local memory of each thread, thereby avoiding thread sharing conflicts and improving operation stability and throughput efficiency. The calculation results are stored in the device-side arrays ecc_all and ecc_all_last, which correspond to the maximum coaxiality error of the assembly and the last rotor coaxiality error of each combination, respectively, providing efficient parallel support for subsequent CPU-side optimal solution screening.

[0012] Furthermore, the `ecc_all` and `ecc_all_last` arrays are passed back to the CPU. After all batches have been calculated, the overall coaxiality and final-stage eccentricity for all phase combinations are obtained. Then, a sorting optimization step is performed on the CPU to achieve dual-objective optimization. The specific method is as follows: First, all combinations are sorted in ascending order of overall coaxiality to identify one or more combinations with the minimum coaxiality, forming a candidate set. Then, the final-stage eccentricity is sorted again in the candidate set, and the combination with the smallest final-stage eccentricity is selected as the final optimization result.

[0013] The beneficial effects of this invention are: 1. This invention constructs a GPU-based parallel acceleration architecture and utilizes CUDA kernel functions to perform synchronous parallel processing on millions or even more phase combinations, significantly accelerating the calculation of coaxiality of aero-engine assembly and the selection of optimal combinations. Compared with the traditional CPU serial method, the overall computational efficiency is improved by more than 20 times.

[0014] 2. This invention introduces a memory usage modeling and batch calculation strategy, which performs batch calculations based on the memory required for the combination, avoiding problems such as GPU memory overflow, ensuring stable operation of the program under ultra-large combination space, and improving the reliability and scalability of the system.

[0015] 3. Based on GPU computing, combined with a dual-objective sorting algorithm on the CPU side, the assembly state of the final stage key rotor is further optimized while ensuring that the coaxiality of the whole machine is minimized, thereby improving the consistency of the whole machine assembly, the dynamic characteristics of the rotor shaft system and the stability of the whole machine operation. Attached Figure Description

[0016] Figure 1 This is a flowchart of a method for optimizing the coaxiality of large rotating equipment based on GPU parallel acceleration proposed in this invention. Detailed Implementation

[0017] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0018] See Figure 1 This invention proposes a method for optimizing the coaxiality of large rotating equipment assembly based on GPU parallel acceleration. The method specifically comprises: Step one, according to the phase discrete angle of each level rotor, construct all possible phase combination space; then, according to the required video memory size of single combination calculation and the total number of phase combinations, adopt batch calculation strategy to manage the video memory data; Step two, design CUDA parallel kernel function, parallel calculate each phase combination on GPU, complete the eccentricity rotation of each level rotor, rigid body transformation matrix transmission and coordinate system mapping, efficiently calculate the coaxiality of each level rotor, significantly improve the calculation speed and accuracy of coaxiality error evaluation in million level combination space; Step three, construct optimization function based on double target constraint, sort the results on CPU side to get the optimal phase combination.

[0019] Further, input data preparation, get rotor number rotor_num and eccentric vector homogeneous coordinate eccs of each level, coordinate transformation matrix trans_mat; and according to the number of mounting holes of the assembly surface between each level rotor, enumerate all possible phase combinations thetas, the total number of combinations is zuhe_num.

[0020] Further, calculate the video memory required for single combination, each combination opens the memory amount Memory_per_combination, the calculation formula is as follows: Memory_per_combination = rotor_num * sizeof(double) / / theta + rotor_num * 4 * sizeof(double) / / eccs + rotor_num * 16 * sizeof(double) / / trans_mat + 2 * sizeof(double) / / ecc_all + ecc_all_last Where, theta is the phase of each level rotor in this combination, eccs is the eccentric vector homogeneous coordinate of each level rotor in this combination, trans_mat is the coordinate transformation matrix caused by the eccentricity and tilt error of each level rotor, ecc_all is the assembly coaxiality of this combination, ecc_all_last is the last level coaxiality of this combination, sizeof(double) is the video memory size occupied by a double variable.

[0021] Further, according to the following formula, calculate the maximum number of combinations max_comb that can be calculated simultaneously by the current GPU video memory, to avoid program crash caused by insufficient video memory in parallel calculation: max_comb = (GPU_memory_available - reserved_memory) / Memory_per_combination Wherein, GPU_memory_available is the total GPU available memory size, that is, the total amount of memory that can be allocated on the device; reserved_memory is the memory size reserved by CUDA runtime (such as context management, kernel scheduling, auxiliary variables, cache, etc.), which is set to 500MB in the present application; Then, the total number of combinations zuhe_num is divided into iterCount batches according to the maximum combination number max_comb calculated in a single batch for processing.

[0022] Further, the optimal configuration of GPU threads is set, and the thread block size of each batch is set to blockSize = 256. The optimal grid configuration is calculated according to the following formula: gridSizeX = min((max_comb + blockSize - 1) / blockSize, maxGridSizeX) gridSizeY = min((max_comb / (blockSize * gridSizeX)) + 1,maxGridSizeY) Wherein, gridSizeX is the number of thread blocks actually allocated in the X direction, gridSizeY is the number of thread blocks actually allocated in the Y direction, maxGridSizeX is the maximum number of thread blocks in the X direction of the CUDA grid limit, and maxGridSizeY is the maximum number of thread blocks in the Y direction of the CUDA grid limit.

[0023] Further, a coaxiality error parallel computing kernel based on CUDA is designed. For each input phase combination parameter, the kernel first calculates the global combination number idx through thread index and judges whether it is out of bounds to ensure safety. Then, in each thread, all rotor levels are processed in turn as follows: the phase rotation matrix of the current rotor is constructed, and the eccentricity is transformed from the local coordinate system of itself to the coordinate system of the first level of the assembly; in the multi-level assembly structure, the accumulated coordinate transformation matrix transmat_all of the previous level and the rotation translation transformation matrix trans_mat of the current level are used to recursively update the overall transformation path; the size of each level eccentricity is extracted through the Euclidean norm, and the maximum eccentricity of the assembly, that is, the total assembly coaxiality and the last level eccentricity, is continuously tracked to support subsequent constraint evaluation or multi-objective optimization.

[0024] Further, all intermediate variables in the kernel function are local variables, which are automatically assigned to the private registers or local memory of each thread, thereby avoiding thread sharing conflicts, improving operation stability and throughput efficiency; the calculation results are stored in the device-side arrays ecc_all and ecc_all_last, which correspond to the maximum assembly concentricity error and the last-stage rotor concentricity error of each group of combinations, respectively, providing efficient parallel support for subsequent CPU-side optimal solution screening.

[0025] Further, the ecc_all and ecc_all_last arrays are transmitted back to the CPU side, and after all batch calculations are completed, the assembly concentricity and the last-stage eccentricity under all phase combinations are obtained, and then the sorting optimization step is performed on the CPU side to realize double-target optimization; the specific method is as follows: first, all combinations are sorted according to the assembly concentricity from small to large, and one or several groups of combinations with the minimum concentricity are determined to form a candidate set; then, the last-stage eccentricity is further sorted in the candidate combination set, and the one with the minimum last-stage eccentricity is selected as the final optimization result. The double-layer sorting method takes into account the global assembly geometric accuracy and the local key position quality, and on the premise of ensuring the high concentricity of the whole machine, further optimizes the last-stage rotor assembly state, and improves the dynamic characteristics and working stability of the shaft system.

[0026] Although the present application has been disclosed with the preferred embodiments as above, it is not intended to limit the present application, and any person skilled in the art can make various modifications and modifications without departing from the spirit and scope of the present application, therefore the protection scope of the present application should be defined by the claims.

Claims

1. A large-scale slewing equipment assembly coaxiality optimization method based on GPU parallel acceleration, characterized in that, The method is specifically: Step one, according to the phase discrete angle of each rotor, construct all possible phase combination space; Then, according to the required video memory size of single combination calculation and total phase combination, adopt batch calculation strategy to manage video memory data; Step two, design CUDA parallel kernel function, parallel calculate each phase combination on GPU, complete the eccentricity rotation of each rotor, rigid body transformation matrix transmission and coordinate system mapping, efficiently calculate the coaxiality of each rotor, significantly improve the calculation speed and accuracy of coaxiality error evaluation in million level combination space; Step three, construct optimization function based on double target constraint, sort the results on CPU side to get the optimal phase combination.

2. The method of claim 1, wherein, Input data preparation, get rotor number rotor_num and eccentric vector homogeneous coordinate eccs, coordinate transformation matrix trans_mat of each level; And according to the number of mounting holes of the assembly surface between each rotor, enumerate all possible phase combinations thetas, and the total number of combinations is zuhe_num.

3. The method of claim 2, wherein, Calculate the memory required for single combination, and the calculation formula of Memory_per_combination is as follows: Memory_per_combination = rotor_num * sizeof(double) / / theta + rotor_num * 4 * sizeof(double) / / eccs + rotor_num * 16 * sizeof(double) / / trans_mat + 2 * sizeof(double) / / ecc_all + ecc_all_last Where, theta is the phase of each rotor in the combination, eccs is the eccentric vector homogeneous coordinate of each rotor in the combination, trans_mat is the coordinate transformation matrix caused by the eccentricity and tilt error of each rotor, ecc_all is the assembly coaxiality of the combination, ecc_all_last is the last stage coaxiality of the combination, and sizeof(double) is the memory size occupied by a double variable.

4. The method of claim 3, wherein, According to the following formula, calculate the maximum number of combinations max_comb that can be calculated simultaneously by the current GPU memory, to avoid program crash caused by insufficient memory in parallel calculation: max_comb = (GPU_memory_available - reserved_memory) / Memory_per_combination Where, GPU_memory_available is the total memory size available for the current GPU, that is, the total amount of memory that can be allocated on the device; reserved_memory is the memory size reserved by CUDA runtime; Then, the total number of combinations zuhe_num is divided into iterCount batches according to the maximum number of combinations max_comb calculated in a single batch.

5. The method of claim 4, wherein, The optimal configuration of GPU threads is set, and the thread block size of each batch is set to blockSize = 256. The optimal grid configuration is calculated according to the following formula: gridSizeX = min((max_comb + blockSize - 1) / blockSize, maxGridSizeX) gridSizeY = min((max_comb / (blockSize * gridSizeX)) + 1, maxGridSizeY) where gridSizeX is the actual number of thread blocks allocated in the X direction, gridSizeY is the actual number of thread blocks allocated in the Y direction, maxGridSizeX is the maximum number of thread blocks in the X direction of the CUDA grid, and maxGridSizeY is the maximum number of thread blocks in the Y direction of the CUDA grid.

6. The method of claim 5, wherein, A CUDA-based coaxiality error parallel computing kernel function is designed. For each input phase combination parameter, the kernel function first calculates the global combination index idx through thread indexing and judges whether it is out of bounds to ensure safety. Then, in each thread, the following processing is performed for all rotor stages in turn: the phase rotation matrix of the current rotor is constructed, and the eccentricity is transformed from the local coordinate system of the rotor to the coordinate system of the first stage of the assembly; in the multi-stage assembly structure, the accumulated coordinate transformation matrix transmat_all of the previous stage and the rotation and translation transformation matrix trans_mat of the current stage are used to recursively update the overall transformation path; the size of each eccentricity is extracted through the Euclidean norm, and the maximum eccentricity of the assembly, i.e., the assembly coaxiality and the last-stage eccentricity, is continuously tracked to support subsequent constraint evaluation or multi-objective optimization.

7. The method of claim 6, wherein, All intermediate variables in the kernel function are local variables, which are automatically assigned to private registers or local memory of each thread, thereby avoiding thread sharing conflicts and improving operation stability and throughput efficiency. The calculation results are stored in the device-side arrays ecc_all and ecc_all_last, which correspond to the maximum coaxiality error of the assembly and the last-stage rotor coaxiality error of each combination, respectively, providing efficient parallel support for subsequent CPU-side optimal solution screening.

8. The method of claim 7, wherein, The ecc_all and ecc_all_last arrays are transmitted back to the CPU side, and after all batch calculations are completed, the assembly coaxiality and the last-stage eccentricity under all phase combinations are obtained. Then, the sorting optimization step is executed on the CPU side to achieve double-objective optimization. The specific method is as follows: first, sort all combinations according to the assembly coaxiality from small to large, determine the combination or combinations with the minimum coaxiality, and form a candidate set; Then, the last-stage eccentricity is sorted again in the candidate combination set, and the one with the minimum last-stage eccentricity is selected as the final optimization result.

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