Task processing method and device, storage medium, electronic equipment and program product

Abstract

The invention relates to the technical field of graphic rendering, and provides a task processing method and device, a storage medium, electronic equipment and a program product. The task processing method comprises the steps that a plurality of first calculation tasks are converted into at least one second calculation task, and the number of threads in the first calculation tasks is smaller than the number of threads in the second calculation tasks; and executing the at least one second calculation task in parallel through the plurality of processing units to obtain a task processing result. According to the method, a plurality of small-order first computing tasks with serial execution sequences are converted into at least one large-order second computing task, and the plurality of small-order first computing tasks are compactly arranged, so that the large-order second computing tasks can be simultaneously configured to a plurality of existing processing units to be processed; therefore, parallel processing of the multiple first computing tasks is achieved, multiple existing processing units are fully utilized, GPU computing resource waste is avoided, and task processing efficiency is improved.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of graphics rendering, and in particular, to a task processing method and device, a storage medium, an electronic device, and a program product. BACKGROUND

[0002] The prior art sequentially processes a plurality of small-scale computing tasks in series according to their processing order, and starts to process the next small-scale computing task after the previous small-scale computing task is processed, which has the problem of low efficiency. SUMMARY

[0003] The purpose of the present disclosure is to provide a task processing method, device, storage medium, electronic device, and program product, which converts a plurality of small-scale first computing tasks with serial execution order into one large-scale second computing task, so that the large-scale second computing task can be simultaneously configured to a plurality of existing processing units for processing, thereby improving the task processing efficiency.

[0004] To achieve the above purpose, the present disclosure provides a task processing method, which comprises: Converting a plurality of first computing tasks into at least one second computing task, wherein the number of threads in the first computing task is less than the number of threads in the second computing task; Parallelly executing the at least one second computing task by a plurality of processing units to obtain a task processing result.

[0005] Optionally, the number of threads in the first computing task is determined according to a first thread group structure and a first thread structure corresponding to the first computing task; The number of threads in the second computing task is determined according to a second thread group structure and a second thread structure corresponding to the second computing task.

[0006] Optionally, the converting a plurality of first computing tasks into at least one second computing task comprises: For each first computing task, obtaining an offset allowance in the current second computing task, the offset allowance representing the number of remaining available threads in the current second computing task; In the case where the offset corresponding to the first computing task is less than or equal to the offset allowance, converting the first computing task into the current second computing task, and updating the offset allowance according to the offset corresponding to the first computing task; in a case where the offset corresponding to the first computing task is greater than the offset margin, converting the first computing task into a next second computing task, and updating the offset margin according to the offset corresponding to the first computing task and a thread quantity of the second computing task.

[0007] Optionally, the offset corresponding to the first computing task is obtained by aligning the thread quantity of the first computing task to a minimum integer multiple of a thread bundle size.

[0008] Optionally, the updating of the offset margin according to the offset corresponding to the first computing task comprises: calculating a difference between the offset margin and the offset corresponding to the first computing task to obtain an updated offset margin.

[0009] Optionally, the updating of the offset margin according to the offset corresponding to the first computing task and the thread quantity of the second computing task comprises: calculating a difference between the thread quantity of the second computing task and the offset corresponding to the first computing task to obtain an updated offset margin.

[0010] Optionally, the task processing method further comprises: for any first thread in the second computing task, in a case where it is determined that there is a first computing task corresponding to the first thread, performing the step of converting the first computing task into a second computing task.

[0011] Optionally, the determination of whether there is a first computing task corresponding to the first thread comprises: determining a first global linear index corresponding to the first thread in the second computing task; determining a second global linear index corresponding to the first thread according to the first global linear index and an offset corresponding to the first thread, the offset corresponding to the first thread representing a sum of offsets corresponding to the first computing task converted into the current second computing task; in a case where the second global linear index is greater than or equal to zero and the second global linear index is less than a thread quantity in the first computing task, determining that there is a first computing task corresponding to the first thread.

[0012] Optionally, the task processing method further comprises: determining thread ID information of the first computing task according to thread ID information of the second computing task and a thread ID mapping relationship; the parallel execution of the at least one second computing task by the plurality of processing units to obtain a task processing result comprises: According to thread ID information of the at least one second computing task, the at least one second computing task is allocated to the plurality of processing units for parallel processing, and a task processing result is obtained through the plurality of processing units and the thread ID information of the first computing task.

[0013] Optionally, the thread ID mapping relationship is determined in the following manner: For each second thread, thread ID information of the second thread in the second computing task and thread ID information of the second thread in the first computing task are determined. According to the thread ID information of each second thread in the first computing task and the thread ID information of each second thread in the second computing task, the thread ID mapping relationship is determined.

[0014] Optionally, the thread ID information of the second thread in the first computing task is determined in the following manner: According to a corresponding first global linear index of the second thread in the second computing task and an offset amount corresponding to the second thread, a corresponding second global linear index of the second thread in the first computing task is determined. According to the corresponding second global linear index of the second thread in the first computing task and a first thread group structure and a first thread structure corresponding to the first computing task, the thread ID information of the second thread in the first computing task is determined.

[0015] Optionally, the thread ID information of the second thread in the first computing task is determined in the following manner: According to the first thread structure corresponding to the first computing task, a number of threads in a single group is determined. According to the corresponding second global linear index of the second thread in the first computing task, the number of threads in a single group, and the first thread group structure and the first thread structure corresponding to the first computing task, thread group ID information and intra-group ID information are determined. According to the thread group ID information, the first thread structure corresponding to the first computing task, and the intra-group ID information, the thread ID information of the second thread in the first computing task is obtained.

[0016] Optionally, the thread group ID information and the intra-group ID information are determined in the following manner: determining a thread group index and an intra-group index according to the second global linear index of the second thread in the first computing task and the number of threads in the single group; determining thread group ID information according to the thread group index and a first thread group structure corresponding to the first computing task; determining intra-group ID information according to the intra-group index and a first thread structure corresponding to the first computing task.

[0017] Optionally, the determining of the thread ID information of the second thread in the second computing task comprises: determining the thread ID information of the second thread in the second computing task according to the first global linear index of the second thread in the second computing task, and a second thread group structure and a second thread structure corresponding to the second computing task.

[0018] The present disclosure also provides a task processing apparatus, which comprises: a first processing module configured to convert a plurality of first computing tasks into at least one second computing task, wherein the number of threads in the first computing task is less than the number of threads in the second computing task; a second processing module configured to execute the at least one second computing task in parallel by a plurality of processing units to obtain a task processing result.

[0019] The present disclosure also provides a computer readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the task processing method.

[0020] The present disclosure also provides an electronic device, which comprises: a memory having a computer program stored thereon; a processor configured to execute the computer program in the memory to implement the steps of the task processing method.

[0021] The present disclosure also provides a computer program product comprising a computer program, which, when executed by a processor, implements the steps of the task processing method.

[0022] Through the above technical solution, a plurality of small-scale first computing tasks with serial execution order are converted into at least one large-scale second computing task, and the plurality of small-scale first computing tasks are arranged compactly, so that the large-scale second computing task can be simultaneously configured to a plurality of existing processing units for processing, thereby realizing parallel processing of the plurality of first computing tasks, fully utilizing the plurality of existing processing units, avoiding waste of GPU computing resources, and improving task processing efficiency.

[0023] Other features and advantages of the present disclosure will be made apparent from the following detailed description of a specific embodiment. BRIEF DESCRIPTION OF DRAWINGS

[0024] The accompanying drawings are included to provide a further understanding of the present disclosure and constitute a part of the specification, illustrate embodiments of the present disclosure and together with the detailed description help to explain the present disclosure. In the drawings: Figure 1 is a schematic diagram of a task processing method according to an exemplary embodiment.

[0025] Figure 2 is a schematic diagram of another task processing method according to an exemplary embodiment.

[0026] Figure 3 is a flowchart of a task processing method according to an exemplary embodiment.

[0027] Figure 4 is a schematic diagram of another task processing method according to an exemplary embodiment.

[0028] Figure 5 is a flowchart of a sub-step of step S1 according to an exemplary embodiment.

[0029] Figure 6 is a flowchart of another task processing method according to an exemplary embodiment.

[0030] Figure 7 is a flowchart of determination of a thread ID mapping relationship according to an exemplary embodiment.

[0031] Figure 8 is a flowchart of a sub-step of step S41 according to an exemplary embodiment.

[0032] Figure 9 is a flowchart of a sub-step of step S412 according to an exemplary embodiment.

[0033] Figure 10 is a flowchart of a sub-step of step S4122 according to an exemplary embodiment.

[0034] Figure 11 is a block diagram of a task processing apparatus according to an exemplary embodiment.

[0035] Figure 12 is a block diagram of an electronic device according to an exemplary embodiment. DETAILED DESCRIPTION

[0036] The specific embodiments of the present disclosure are described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are intended to explain and illustrate the present disclosure, but not to limit the present disclosure.

[0037] In the following description, the words "first", "second", etc. are used only to distinguish the described purposes, and cannot be understood as indicating or implying relative importance, nor indicating or implying order.

[0038] In the field of graphics rendering, with the rise of graphics processing unit (GPU) driving technology, more and more computing tasks are transferred from central processing unit (CPU) to GPU for calculation using compute shader. GPU hardware has high acceleration effect on large-scale parallel tasks.

[0039] Taking a thread group structure Dispatch (8, 8, 1) as an example, the thread group size in it, that is, the calculation task of the thread structure numthreads (16, 16, 1), is executed on a GPU with 8 processing units Core, each processing unit Core corresponding to a thread bundle warp (the smallest unit of thread scheduling), and the thread bundle size warpSize being 256. The task is allocated as shown in Figure 1 .

[0040] The specific process is as follows: first, the calculation task is grouped according to the thread bundle size warpSize. The number of threads in one workgroup WorkGroup is exactly 256 (16x16x1), and each workgroup WorkGroup corresponds to a thread bundle warp. Then, the thread bundle warp is scheduled to each processing unit Core of the GPU for execution in a round-robin manner.

[0041] If another thread group structure Dispatch (x0, y0, z0) corresponds to a thread structure numthreads (t0x, t0y, t0z) in the compute shader, assuming that the thread bundle size warpSize of the GPU is w, there are n processing units Core, each processing unit Core can execute m thread bundles warp at the same time, and the scheduling method of the GPU is round-robin, then when x0·y0·z0·t0x·t0y·t0z is less than n·m·w, some processing units Core will be in an idle state.

[0042] When processing as Figure 2The large-scale small-scale serial computing tasks shown, for example, n thread group structure Dispatch (1, 1, 1), because each computing task is small, even only 1 thread bundle warp is needed. All thread bundles warp of these thread group structure Dispatch may be scheduled to execute on processing unit Core0, so that processing unit Core0 is full, processing units Core1-7 are empty, and the overall efficiency of the GPU is low. The situation is more and more common with the development of GPU driver technology. There are more than 120 consecutive thread group structure Dispatch (1, 1, 1) computing tasks in some games.

[0043] That is, for multiple serial small-scale computing tasks, they are processed in turn according to their processing order, and the next small-scale computing task is processed after the previous small-scale computing task is processed. The processing unit used when processing the small-scale task is relatively small, and there is a problem of low efficiency.

[0044] To solve the above problems, by converting multiple small-scale first computing tasks with serial execution order into one large-scale second computing task, the multiple small-scale first computing tasks are arranged compactly, so that the large-scale second computing task can be configured to multiple existing processing units for processing, thereby realizing parallel processing of multiple first computing tasks, fully utilizing the existing multiple processing units, avoiding waste of GPU computing resources, and improving task processing efficiency.

[0045] Figure 3 is a flowchart of a task processing method according to an example embodiment, which can be applied to an electronic device, please refer to Figure 3 The task processing method can include steps S1 and S2.

[0046] Step S1, converting multiple first computing tasks into at least one second computing task.

[0047] Among them, the number of threads in the first computing task is less than the number of threads in the second computing task.

[0048] The first computing task is composed of multiple thread groups, each thread group contains multiple threads, and the number of threads in the first computing task is determined according to the first thread group structure corresponding to the first computing task and the first thread structure.

[0049] The first thread group structure can be the size and dimension of a thread group in the first computing task, and the first thread group structure can be denoted as (x1, y1, z1), for example, Dispatch(1, 1, 1); the first thread structure can be the arrangement of threads in a thread group in the first computing task, and the first thread structure can be denoted as (t1x, t1y, t1z), for example, numthreads(16, 16, 1).

[0050] According to the first thread group structure, the number of threads in a single thread group in the first computing task can be obtained.

[0051] The calculation formula of the number of threads in a single thread group in the first computing task threadsPerOriginalGroup1 is: threadsPerOriginalGroup1 = t1x·t1y·t1z.

[0052] According to the first thread group structure, the number of thread groups in the first computing task, i.e., the thread group size, can be obtained.

[0053] The calculation formula of the thread group size threadsPerGroup1 in the first computing task is: threadsPerGroup1 = x1·y1·z1.

[0054] According to the number of threads in a single thread group in the first computing task and the thread group size in the first computing task, the number of threads in the first computing task can be obtained.

[0055] The calculation formula of the number of threads totalThreadsOriginal1 in the first computing task is: totalThreadsOriginal1 = threadsPerGroup1·threadsPerOriginalGroup1.

[0056] The second computing task is composed of a plurality of thread groups, each thread group containing a plurality of threads, and the number of threads in the second computing task is determined according to the second thread group structure corresponding to the second computing task and the second thread structure.

[0057] The second thread group structure can be the size and dimension of a thread group in the second computing task, and the second thread group structure can be denoted as (x2, y2, z2), for example, Dispatch(1, 8, 1); the second thread structure can be the arrangement of threads in a thread group in the second computing task, and the second thread structure can be denoted as (t2x, t2y, t2z), for example, numthreads(16, 16, 1).

[0058] The number of threads in a single group in the second computing task can be obtained through the second thread structure.

[0059] The calculation formula of the number of threads in a single group in the second computing task is as follows: threadsPerOriginalGroup2 = t2x · t2y · t2z.

[0060] The number of thread groups in the second computing task, i.e., the thread group size, can be obtained through the second thread group structure.

[0061] The calculation formula of the thread group size in the second computing task is as follows: threadsPerGroup2 = x2 · y2 · z2.

[0062] The number of threads in the second computing task can be obtained according to the number of threads in a single group in the second computing task and the thread group size in the second computing task.

[0063] The calculation formula of the number of threads in the second computing task is as follows: totalThreadsOriginal2 = threadsPerGroup2 · threadsPerOriginalGroup2.

[0064] It should be understood that the number of threads in the second computing task does not exceed the Spec specified limit and the total number of threads that can be supported by the GPU driver. The Spec specified limit can be a value such as a “maximum number of threads” or “upper limit per block / SM” given in the official document / programming manual. If this value is exceeded, the program cannot be compiled or an error is reported when starting. The Spec specified limit is the maximum number of threads supported under the hardware specification limit. The GPU driver can be the number of threads that can be supported by the current GPU remaining available resources, and can even include additional limits of kernel level or driver strategy. The total number of threads that can be supported by the GPU driver is the maximum number of threads supported under the driver program limit.

[0065] The conversion of the plurality of first computing tasks into at least one second computing task can be understood as the plurality of first computing tasks being sequentially converted into second computing tasks. If the total number of threads of a second computing task can accommodate the total number of threads of the plurality of first computing tasks, the plurality of first computing tasks can be converted into one second computing task. If the total number of threads of a second computing task cannot accommodate the total number of threads of the plurality of first computing tasks, the remaining first computing tasks in the plurality of first computing tasks are converted into the next second computing task, and the step of sequentially converting the plurality of first computing tasks into second computing tasks is returned to be executed until all the first computing tasks are converted into second computing tasks, and at least one second computing task is obtained.

[0066] In step S2, at least one second computing task is executed in parallel by a plurality of processing units to obtain a task processing result.

[0067] Since the second computing task is large, the threads in the second computing task can be evenly distributed to each processing unit in the GPU, and each processing unit is responsible for executing a part of the task. The results processed by each processing unit are integrated together to obtain a task processing result.

[0068] In an embodiment, the computing tasks originally concentrated on Core0 (or the first few Cores) can be evenly distributed to a plurality of Cores. Parallel processing of large-scale small tasks by a plurality of Cores can make the running efficiency higher (up to warp times improvement). Figure 4 As shown in the figure, the first thread group structure Dispatch (1, 1, 1) in the first computing task, the first thread structure numthreads (16, 16, 1), the second thread group structure Dispatch (1, 8, 1) in the second computing task, and the second thread structure numthreads (16, 16, 1) are evenly distributed to 8 processing units Core0~Core7, the parallelism is improved by 8 times, and the computing efficiency is greatly improved.

[0069] In an image processing task scenario, a plurality of small images need to be processed. The processing of each small image can be regarded as a first computing task, and the number of threads contained in each first computing task is small (for example, each first computing task processes an image block, and each first computing task has 16 threads). A plurality of small first computing tasks are combined into at least one large second computing task, so that the parallel computing capability of the GPU can be more efficiently utilized.

[0070] By converting a plurality of small-scale first computing tasks with serial execution order into at least one large-scale second computing task, compactly arranging the plurality of small-scale first computing tasks, and enabling the large-scale second computing task to be simultaneously configured to a plurality of existing processing units for processing, parallel processing of the plurality of first computing tasks is realized, the existing plurality of processing units is fully utilized, GPU computing resource waste is avoided, and task processing efficiency is improved.

[0071] In a possible implementation, before converting a new first computing task into a second computing task each time, it can be determined whether the current second computing task has sufficient remaining thread space to accommodate the new first computing task for conversion. If the current second computing task can accommodate the new first computing task, the new first computing task can be converted into the current second computing task; if the current second computing task cannot accommodate the new first computing task, a new second computing task can be created to accommodate the new first computing task for conversion.

[0072] Referring to Figure 5 , step S1 can include steps S11-S13.

[0073] In step S11, for each first computing task, an offset margin in a current second computing task is obtained.

[0074] The offset margin represents the number of remaining available threads in the current second computing task, that is, the size of the remaining thread space.

[0075] In step S12, in a case where an offset corresponding to the first computing task is less than or equal to the offset margin, the first computing task is converted into the current second computing task, and the offset margin is updated according to the offset corresponding to the first computing task.

[0076] In the case where the offset corresponding to the first computing task is less than or equal to the offset margin, it indicates that the current second computing task has sufficient remaining thread space to accommodate the new first computing task for conversion, that is, the new first computing task can be converted into the current second computing task. With the conversion of the new first computing task, the offset margin in the current second computing task also decreases accordingly, and the offset corresponding to the currently processed first computing task is the decrease amount of the offset margin.

[0077] In step S13, in a case where the offset corresponding to the first computing task is greater than the offset margin, the first computing task is converted into a next second computing task, and the offset margin is updated according to the offset corresponding to the first computing task and the number of threads of the second computing task.

[0078] In a case where the offset corresponding to the first computing task is greater than the offset margin, it is represented that the current second computing task does not have enough remaining thread space to accommodate the new first computing task for transformation, that is, the new first computing task can be executed to be transformed into the next second computing task. With the transformation of the new first computing task, the offset margin of the next second computing task will also be reduced accordingly. In this case, the initial offset margin of the next second computing task is the thread number of the second computing task, the offset margin is 0, and the offset corresponding to the first computing task being processed is the reduction of the offset margin.

[0079] It should be understood that the next second computing task is the next second computing task of the current second computing task. The next second computing task can be created when the current second computing task does not have enough remaining thread space to accommodate the new first computing task for transformation, or can be pre-set. The present embodiment does not limit this. The next second computing task can be the same in size and structure as the current second computing task.

[0080] By setting that the first computing task can be transformed into the current second computing task only in a case where the offset corresponding to the first computing task is less than or equal to the offset margin, it can be ensured that the thread capacity of the current second computing task will not be exceeded when the first computing task is transformed into the current second computing task, thereby ensuring stable operation of the transformation. And in a case where the offset corresponding to the first computing task is greater than the offset margin, the first computing task is transformed into the next second computing task, which further ensures stable operation of the transformation.

[0081] In a possible implementation, the offset corresponding to the first computing task is obtained by aligning the thread number of the first computing task to the smallest integer multiple of the thread bundle size upwards.

[0082] If the number of threads contained in a first computing task is not an integer multiple of the thread bundle size, it needs to be rounded up to the nearest integer multiple as the offset corresponding to the first computing task.

[0083] For example, if the number of threads contained in the first computing task is 100 and the thread bundle size is 32, the offset corresponding to the first computing task is 128.

[0084] By aligning the thread number of the first computing task to the integer multiple of the thread bundle upwards to calculate the memory offset, the global memory access address can be aligned, the hardware merge access mechanism can be activated, multiple scattered accesses can be merged into a small number of efficient transactions, and the memory bandwidth utilization and overall program performance can be greatly improved.

[0085] In a possible implementation, the updating of the offset margin according to the offset corresponding to the first computing task in step S12 can include: The difference between the offset amount corresponding to the first computing task and the offset amount is calculated to obtain an updated offset amount.

[0086] After the new first computing task is converted into the current second computing task, the offset amount in the current second computing task is also reduced accordingly with the conversion of the new first computing task, and the offset amount corresponding to the first computing task is the reduction amount of the offset amount. Therefore, the updated offset amount is equal to the difference between the current offset amount and the offset amount corresponding to the first computing task (the reduction amount of the offset amount).

[0087] In a possible implementation, the updating of the offset amount according to the offset amount corresponding to the first computing task and the thread number of the second computing task in step S13 can include: The difference between the thread number of the second computing task and the offset amount corresponding to the first computing task is calculated to obtain an updated offset amount.

[0088] After the new first computing task is converted into the next second computing task, the offset amount in the next second computing task is also reduced accordingly with the conversion of the new first computing task. In this case, since the new first computing task is the first to be converted into the next second computing task, the initial offset amount of the next second computing task is the thread number of the next second computing task, which is also equal to the thread number of the current second computing task, and is collectively referred to as the thread number of the second computing task. The offset amount corresponding to the first computing task is the reduction amount of the offset amount. Therefore, the updated offset amount is equal to the difference between the thread number of the second computing task and the offset amount corresponding to the first computing task (the reduction amount of the offset amount).

[0089] Through the above process, the thread resource of the second computing task can be dynamically managed to ensure that the resource limit is not exceeded when the new first computing task is converted into the second computing task.

[0090] In a possible implementation, in order to improve the stability and accuracy of task processing, the conversion process of the converted computing task can also be verified before the first computing task is converted into the second computing task. The task processing method can further include: For any first thread in the second computing task, if it is determined that there is a first computing task corresponding to the first thread, the step of converting the first computing task into the second computing task is performed.

[0091] In a possible implementation, the determination of the existence of the first computing task corresponding to the first thread can be realized by steps (1) to (3).

[0092] (1) Determine the first global linear index corresponding to the first thread in the second computing task.

[0093] The first thread is any thread in the second computing task.

[0094] The first global linear index corresponding to the first thread in the second computing task represents the sequential position of the first thread among all threads in the second computing task.

[0095] The first global linear index and the second global linear index both comply with the following calculation principle of the global linear index: The global linear index is the product of the thread group index and the thread group size, plus the local index of the thread in the group, that is, global linear index = thread group index × thread group size + group index. The thread group index is the sequential position of the thread among all thread groups in the computing task. The group index is the sequential position of the thread in the thread group in the computing task.

[0096] The calculation formula of the first global linear index globalIndex corresponding to the first thread in the second computing task is as follows: globalIndex = (((gz·y2+gy)·x2+gx)·threadsPerGroup2+(lz·t2y·t2x+ly·t2x+lx) Where (gx, gy, gz) is the thread group ID information of the first thread in the second computing task, (lx, ly, lz) is the group ID information of the first thread in the second computing task, and threadsPerGroup2 is the thread group size in the second computing task.

[0097] (2) According to the first global linear index and the offset corresponding to the first thread, determine the second global linear index corresponding to the first thread.

[0098] The offset corresponding to the first thread represents the sum of the offset corresponding to the first computing task in the current second computing task.

[0099] The second global linear index corresponding to the first thread represents the sequential position of the first thread among all threads in the first computing task.

[0100] The second global linear index corresponding to the first thread is the difference between the first global linear index and the offset corresponding to the first thread.

[0101] The calculation formula of the second global linear index orgGlobalIndex corresponding to the first thread is as follows: orgGlobalIndex =globalIndex– threadShift; Wherein, the globalIndex represents the first global linear index, and the threadShift represents the first thread corresponding to the offset amount.

[0102] (3) In the case that the second global linear index is greater than or equal to zero, and the second global linear index is less than the thread number in the first computing task, it is determined that there is the first computing task corresponding to the first thread.

[0103] In the case that the second global linear index corresponding to the first thread is greater than or equal to zero, and the second global linear index corresponding to the first thread is less than the thread number in the first computing task, it is represented that the first thread exists in one thread in the first computing task, the transformation process of the transformed computing task is verified, and the transformation can continue, that is, the step of transforming the first computing task to the second computing task can be executed.

[0104] In the case that the second global linear index corresponding to the first thread is greater than the thread number in the first computing task, it is represented that the first thread does not exist in one thread in the first computing task, and the transformation process of the transformed computing task is not verified. The transformation can be directly ended.

[0105] In a possible implementation, please refer to Figure 6 , Figure 6 is a flow chart of another task processing method according to an exemplary embodiment, which can be applied to an electronic device, and the task processing method can include steps S201-S203.

[0106] Step S201, transforming a plurality of first computing tasks into at least one second computing task.

[0107] Wherein, the thread number in the first computing task is less than the thread number in the second computing task.

[0108] Step S202, determining the thread ID information of the first computing task according to the thread ID information of the second computing task and the thread ID mapping relationship.

[0109] The thread ID information of the first computing task represents the position identifier of each thread in the first computing task.

[0110] The thread ID information of the second computing task represents the position identifier of each thread in the second computing task.

[0111] The thread ID mapping relationship represents the corresponding relationship between the thread ID information of the first computing task and the thread ID information of the second computing task.

[0112] In step S203, the at least one second computing task is allocated to the plurality of processing units for parallel processing according to thread ID information of the at least one second computing task, and a task processing result is obtained through the plurality of processing units and the thread ID information of the first computing task.

[0113] It can be understood that, according to the thread ID information of the at least one second computing task, a thread group in the at least one second computing task is allocated to the plurality of processing units, and each processing unit independently executes the allocated thread group, so as to realize parallel processing of the plurality of processing units.

[0114] The mapping relationship between the thread group represented by the thread ID information of the second computing task and the processing unit can be statically bound in advance through a pre-allocation strategy, so that the thread group in the second computing task can be directly determined by the thread ID information of the second computing task which processing unit should process.

[0115] For example, please continue to refer to Figure 4 , the thread group WorkGroup (0, 0, 0) is processed by the processing unit Core0, the thread group WorkGroup (0, 1, 0) is processed by the processing unit Core1, the thread group WorkGroup (0, 2, 0) is processed by the processing unit Core2, the thread group WorkGroup (0, 3, 0) is processed by the processing unit Core3, the thread group WorkGroup (0, 4, 0) is processed by the processing unit Core4, the thread group WorkGroup (0, 5, 0) is processed by the processing unit Core5, the thread group WorkGroup (0, 6, 0) is processed by the processing unit Core6, and the thread group WorkGroup (0, 7, 0) is processed by the processing unit Core7.

[0116] It can also be understood that the second computing task is divided according to the thread bundle size warpsize to obtain a plurality of sub-computing tasks, each sub-computing task is dynamically polled and allocated to the plurality of processing units in turn, the processing unit processes the received sub-computing task, and receives the next sub-computing task after executing the sub-computing task, so as to realize parallel processing of the plurality of processing units.

[0117] The task processing result obtained through the plurality of processing units and the thread ID information of the first computing task can be understood as follows: when the processing unit processes the allocated sub-computing task, the ID information of the original position needs to be used in the calculation process, that is, the thread ID information in the first computing task is used, so the task processing result needs to be calculated according to the thread ID information of the first computing task by the plurality of processing units.

[0118] It should be noted that step S201 can refer to the description of step S1, and the present embodiment will not be repeated here.

[0119] By the thread ID information in the second computing task, at least one second computing task is evenly allocated to the plurality of processing units dynamically or statically, the execution efficiency is optimized, and the processing unit allocation needs to comply with the thread bundle scheduling mechanism of the GPU to avoid branch divergence.

[0120] In a possible implementation, referring to Figure 7 , the thread ID mapping relationship is determined through step S41 and step S42.

[0121] Step S41, for each second thread, determine the thread ID information of the second thread in the second computing task and the thread ID information of the second thread in the first computing task.

[0122] Step S42, according to the thread ID information of each second thread in the first computing task and the thread ID information of each second thread in the second computing task, determine the thread ID mapping relationship.

[0123] Among them, the second thread is any thread in the second computing task when the mapping relationship is calibrated.

[0124] For each second thread in the second computing task, step S41 is executed, that is, the thread ID information of each second thread in the first computing task and the thread ID information of each second thread in the second computing task in the second computing task are obtained, the thread ID information of the second thread in the first computing task and the thread ID information of the second thread in the second computing task are established thread ID mapping relationship, the thread ID mapping relationship can be represented as a function or table, which maps the thread ID information in the first computing task and the thread ID information in the second computing task.

[0125] Through the thread ID mapping relationship, the threads in the second computing task can be accurately located in the first computing task, and through the thread ID mapping relationship, the threads in the first computing task and the threads in the second computing task are one-to-one mapped, which guarantees the correctness of the calculation result. The thread ID mapping relationship can be stored in a fixed buffer for the calculation shader to query when executing.

[0126] In a possible implementation, referring to Figure 8 , the determination of the thread ID information of the second thread in the first computing task in step S41 can include step S411 and step S412.

[0127] Step S411: determining, according to the first global linear index corresponding to the second thread in the second computing task and the offset corresponding to the second thread, a second global linear index corresponding to the second thread in the first computing task.

[0128] The second global linear index corresponding to the second thread in the first computing task represents the sequential position of the second thread among all threads in the first computing task.

[0129] The offset corresponding to the second thread represents the sum of the offsets corresponding to the first computing task that have been converted into the current second computing task before the second thread is converted.

[0130] The second global linear index corresponding to the second thread in the first computing task is the difference between the first global linear index corresponding to the second thread in the second computing task and the offset corresponding to the second thread.

[0131] Step S412: determining, according to the second global linear index corresponding to the second thread in the first computing task and the first thread group structure and the first thread structure corresponding to the first computing task, thread ID information of the second thread in the first computing task.

[0132] First, the thread group index and the intra-group index are determined according to the second global linear index and the first thread structure; then, the thread group ID information and the intra-group ID information are determined according to the thread group index, the intra-group index, the first thread group structure and the first thread structure; finally, the thread ID information of the second thread in the first computing task is obtained according to the thread group ID information, the intra-group ID information and the first thread group structure.

[0133] In a possible implementation, referring to Figure 9 , step S412 can include steps S4121-S4123.

[0134] Step S4121: determining the number of threads per group according to the first thread structure corresponding to the first computing task.

[0135] The calculation formula of the number of threads per group threadsPerOriginalGroup1 in a thread group in the first computing task is: threadsPerOriginalGroup1 =t1x·t1y·t1z.

[0136] Step S4122: determining the thread group ID information and the intra-group ID information according to the second global linear index corresponding to the second thread in the first computing task, the number of threads per group, and the first thread group structure and the first thread structure corresponding to the first computing task.

[0137] In a possible implementation, referring to Figure 10 , step S4122 can include step S41221-S41223.

[0138] In step S41221, a thread group index and an intra-group index are determined according to the second global linear index of the second thread in the first computing task and the number of threads per group.

[0139] The thread group index is the second global linear index divided by the number of threads per group and rounded.

[0140] The calculation formula of the thread group index orgGroupIndex is: orgGroupIndex = orgGlobalIndex / threadsPerOriginalGroup1; Wherein, orgGlobalIndex represents the second global linear index.

[0141] The intra-group index is the second global linear index divided by the number of threads per group and rounded.

[0142] The calculation formula of the intra-group index orgLocalIndex is: orgLocalIndex = orgGlobalIndex % threadsPerOriginalGroup1.

[0143] In step S41222, thread group ID information is determined according to the thread group index and the first thread group structure corresponding to the first computing task.

[0144] The calculation formula of the thread group ID information (orgGroupID.x, orgGroupID.y, orgGroupID.z) is: orgGroupID.x=orgGroupIndex%x1; orgGroupID.y=(orgGroupIndex / x1)%y1; orgGroupID.z=orgGroupIndex / (x1·y1); Wherein, (x1, y1, z1) represents the first thread group structure.

[0145] In step S41223, intra-group ID information is determined according to the intra-group index and the first thread structure corresponding to the first computing task.

[0146] The calculation formula of the orgGroupThreadID information (orgGroupThreadID.x, orgGroupThreadID.y, orgGroupThreadID.z) is as follows: orgGroupThreadID.x = orgLocalIndex % t1x; orgGroupThreadID.y = (orgLocalIndex / t1x) % t1y; orgGroupThreadID.z = orgLocalIndex / (t1x·t1y); Where (t1x, t1y, t1z) represents the first thread structure.

[0147] In step S4123, the thread ID information of the second thread in the first computing task is obtained according to the thread group ID information, the first thread structure corresponding to the first computing task, and the intra-group ID information.

[0148] The thread ID information of the second thread in the first computing task is the product of the thread group ID information and the first thread structure, plus the intra-group ID information.

[0149] The calculation formula of the thread ID information of the second thread in the first computing task orgDispatchThreadID is as follows: orgDispatchThreadID = orgGroupID·(t1x, t1y, t1z) + orgGroupThreadID.

[0150] It should be understood that the above-mentioned related information (first thread group structure, first thread structure) corresponding to the first computing task is replaced by the related information (second thread group structure, second thread structure) corresponding to the second computing task, and the thread ID information of the second thread in the second computing task can be obtained.

[0151] In one possible implementation, the determination of the thread ID information of the second thread in the second computing task in step S41 can include: According to the first global linear index corresponding to the second thread in the second computing task, and the second thread group structure and the second thread structure corresponding to the second computing task, the thread ID information of the second thread in the second computing task is determined.

[0152] The first global linear index corresponding to the second thread in the second computing task represents the sequential position of the second thread in all threads in the second computing task.

[0153] Firstly, the thread group index and the intra-group index are determined according to the first global linear index and the second thread structure; then, the thread group ID information and the intra-group ID information are determined according to the thread group index, the intra-group index, the second thread group structure and the second thread structure; finally, the thread ID information of the second thread in the second computing task is obtained according to the thread group ID information, the intra-group ID information and the second thread group structure.

[0154] It should be understood that the specific process of determining the thread ID information of the second thread in the second computing task in step S41 can refer to the specific process of determining the thread ID information of the second thread in the first computing task in step S41, and the embodiment will not be repeated here.

[0155] Through the thread offset technology, the serial large-scale small magnitude first computing task is compactly and uniformly distributed to the multi-core of the GPU for parallel execution, the multi-core utilization rate is improved, and the computing efficiency is improved.

[0156] Based on the same inventive concept, the embodiment also provides a task processing apparatus, as shown in Figure 11 Figure 11 is a block diagram of a task processing apparatus according to an exemplary embodiment, which can be applied to an electronic device, the task processing apparatus 500 can include: The first processing module 501 is configured to convert a plurality of first computing tasks into at least one second computing task, wherein the number of threads in the first computing task is less than the number of threads in the second computing task; The second processing module 502 is configured to execute the at least one second computing task in parallel through a plurality of processing units to obtain a task processing result.

[0157] Optionally, the number of threads in the first computing task is determined according to a first thread group structure corresponding to the first computing task and a first thread structure; The number of threads in the second computing task is determined according to a second thread group structure corresponding to the second computing task and a second thread structure.

[0158] Optionally, the first processing module 501 can include: The first sub-processing module is configured to, for each first computing task, obtain an offset margin in the current second computing task, the offset margin representing the number of remaining available threads in the current second computing task; The second sub-processing module is configured to, in a case where the offset corresponding to the first computing task is less than or equal to the offset margin, convert the first computing task into the current second computing task, and update the offset margin according to the offset corresponding to the first computing task; ​The third sub-processing module is configured to, in a case where the offset corresponding to the first computing task is greater than the offset margin, convert the first computing task into a next second computing task, and update the offset margin according to the offset corresponding to the first computing task and the thread quantity of the second computing task.

[0159] Optionally, the offset corresponding to the first computing task is obtained by up-aligning the thread quantity of the first computing task to a minimum integer multiple of the thread bundle size.

[0160] Optionally, the second sub-processing module can be specifically configured to: calculate a difference between the offset margin and the offset corresponding to the first computing task to obtain the updated offset margin.

[0161] Optionally, the third sub-processing module can be specifically configured to: calculate a difference between the thread quantity of the second computing task and the offset corresponding to the first computing task to obtain the updated offset margin.

[0162] Optionally, the task processing apparatus 500 can further include: The third processing module is configured to, for any first thread in the second computing task, in a case where it is determined that the first computing task corresponding to the first thread exists, perform the step of converting the first computing task into the second computing task.

[0163] Optionally, the third processing module can include: The fourth sub-processing module is configured to determine the first global linear index corresponding to the first thread in the second computing task; The fifth sub-processing module is configured to determine the second global linear index corresponding to the first thread according to the first global linear index and the offset corresponding to the first thread, the offset corresponding to the first thread representing a sum of the offset corresponding to the first computing task converted into the current second computing task; The sixth sub-processing module is configured to, in a case where the second global linear index is greater than or equal to zero and the second global linear index is less than the thread quantity in the first computing task, determine that the first computing task corresponding to the first thread exists.

[0164] Optionally, the task processing apparatus 500 can further include: The fourth processing module is configured to determine the thread ID information of the first computing task according to the thread ID information of the second computing task and the thread ID mapping relationship. The second processing module 502 can include: The seventh sub-processing module is configured to allocate the at least one second computing task to the plurality of processing units for parallel processing according to thread ID information of the at least one second computing task, and obtain a task processing result through the plurality of processing units and the thread ID information of the first computing task.

[0165] Optionally, the task processing apparatus 500 can further include: The fifth processing module is configured to determine, for each second thread, thread ID information of the second thread in the second computing task and thread ID information of the second thread in the first computing task. The sixth processing module is configured to determine a thread ID mapping relationship according to the thread ID information of each second thread in the first computing task and the thread ID information of each second thread in the second computing task.

[0166] Optionally, the fifth processing module includes: The eighth sub-processing module is configured to determine a second global linear index corresponding to the second thread in the first computing task according to the first global linear index corresponding to the second thread in the second computing task and the offset amount corresponding to the second thread. The ninth sub-processing module is configured to determine the thread ID information of the second thread in the first computing task according to the second global linear index corresponding to the second thread in the first computing task, and the first thread group structure and the first thread structure corresponding to the first computing task.

[0167] Optionally, the ninth sub-processing module can include: The first processing unit is configured to determine the number of threads in a group according to the first thread structure corresponding to the first computing task. The second processing unit is configured to determine thread group ID information and intra-group ID information according to the second global linear index corresponding to the second thread in the first computing task, the number of threads in a group, and the first thread group structure and the first thread structure corresponding to the first computing task. The third processing unit is configured to obtain the thread ID information of the second thread in the first computing task according to the thread group ID information, the first thread structure corresponding to the first computing task, and the intra-group ID information.

[0168] Optionally, the second processing unit can include: The first sub-processing unit is configured to determine a thread group index and an intra-group index according to the second global linear index corresponding to the second thread in the first computing task and the number of threads in a group. The second sub-processing unit is configured to determine the thread group ID information according to the thread group index and the first thread group structure corresponding to the first computing task. The third sub-processing unit is configured to determine the ID information in the group according to the index in the group and the first thread structure corresponding to the first computing task.

[0169] Optionally, the fifth processing module can include: The tenth sub-processing module is configured to determine the thread ID information of the second thread in the second computing task according to the first global linear index corresponding to the second thread in the second computing task, and the second thread group structure and the second thread structure corresponding to the second computing task.

[0170] As to the task processing apparatus in the above-mentioned embodiments, the specific manners in which the various modules perform operations have been described in detail in the embodiments of the task processing method, and thus will not be described in detail here.

[0171] Figure 12 is a block diagram of an electronic device 700 according to an example embodiment. As shown in Figure 12 The electronic device 700 can include one or more of a processor 701, a memory 702, a multimedia component 703, an input / output (I / O) interface 704, and a communication component 705.

[0172] The processor 701 is configured to control overall operations of the electronic device 700 to complete all or part of the steps of the task processing method described above. The memory 702 is configured to store various types of data to support operations of the electronic device 700, which can include, for example, instructions of any application or method operating on the electronic device 700, and application-related data, such as contact data, transmitted and received messages, pictures, audio, video, and the like. The memory 702 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as a static random access memory (SRAM), an electrically erasable programmable read-only memory (EEPROM), an erasable programmable read-only memory (EPROM), a programmable read-only memory (PROM), a read-only memory (ROM), a magnetic memory, a flash memory, a magnetic disk, or an optical disk. The multimedia component 703 can include a screen and an audio component. The screen can be, for example, a touch screen, and the audio component is configured to output and / or input audio signals. For example, the audio component can include a microphone configured to receive external audio signals. The received audio signals can be further stored in the memory 702 or transmitted through the communication component 705. The audio component further includes at least one speaker configured to output audio signals. The I / O interface 704 provides an interface between the processor 701 and other interface modules, which can be a keyboard, a mouse, a button, and the like. The buttons can be virtual buttons or physical buttons. The communication component 705 is configured to perform wired or wireless communication between the electronic device 700 and other devices. The wireless communication, such as Wi-Fi, Bluetooth, near field communication (NFC), 2G, 3G, or 4G, or a combination of one or more of them, so the corresponding communication component 705 can include a Wi-Fi module, a Bluetooth module, and an NFC module.

[0173] In an exemplary embodiment, the electronic device 700 can be implemented by one or more Application Specific Integrated Circuits (ASICs), Digital Signal Processors (DSPs), Digital Signal Processing Devices (DSPDs), Programmable Logic Devices (PLDs), Field Programmable Gate Arrays (FPGAs), controllers, micro-controllers, microprocessors, or other electronic elements for performing the above-mentioned task processing method.

[0174] In another exemplary embodiment, a computer-readable storage medium including program instructions is also provided, which, when executed by a processor, implement the steps of the above-mentioned task processing method. For example, the computer-readable storage medium can be the above-mentioned memory 702 including program instructions, which can be executed by the processor 701 of the electronic device 700 to complete the above-mentioned task processing method.

[0175] In another exemplary embodiment, a computer program product is also provided, which contains a computer program capable of being executed by a processor, and when the computer program is executed by the processor, the steps of the above-mentioned task processing method are implemented.

[0176] The preferred embodiments of the present disclosure are described in detail above with reference to the accompanying drawings, but the present disclosure is not limited to the specific details in the above-described embodiments. Within the technical concept scope of the present disclosure, various simple modifications can be made to the technical solutions of the present disclosure, and these simple modifications all belong to the protection scope of the present disclosure.

[0177] In addition, it should be noted that each specific technical feature described in the above-described specific embodiments can be combined in any appropriate manner without contradiction. In order to avoid unnecessary repetition, various possible combinations are not described again in the present disclosure.

[0178] Furthermore, any combination of the various different embodiments of the present disclosure can also be made, as long as it does not deviate from the idea of the present disclosure, and it should also be considered as the disclosed content of the present disclosure.

Claims

1. A task processing method characterized by, The task processing method comprises: transforming a plurality of first computing tasks into at least one second computing task, wherein a number of threads in the first computing task is less than a number of threads in the second computing task; parallel execution of the at least one second computing task by a plurality of processing units to obtain a task processing result.

2. The task processing method of claim 1, wherein: the number of threads in the first computing task is determined according to a first thread group structure corresponding to the first computing task and a first thread structure; the number of threads in the second computing task is determined according to a second thread group structure corresponding to the second computing task and a second thread structure.

3. The task processing method of claim 1, wherein, The transformation of the plurality of first computing tasks into at least one second computing task comprises: for each of the first computing tasks, obtaining an offset margin in a current second computing task, the offset margin representing a number of remaining available threads in the current second computing task; in a case where an offset corresponding to the first computing task is less than or equal to the offset margin, transforming the first computing task into the current second computing task and updating the offset margin according to the offset corresponding to the first computing task; in a case where the offset corresponding to the first computing task is greater than the offset margin, transforming the first computing task into a next second computing task and updating the offset margin according to the offset corresponding to the first computing task and the number of threads in the second computing task.

4. The task processing method according to claim 3, characterized by, The offset corresponding to the first computing task is obtained by aligning the number of threads of the first computing task to a minimum integer multiple of a thread bundle size.

5. The task processing method according to claim 3, characterized by, The updating of the offset margin according to the offset corresponding to the first computing task comprises: calculating a difference between the offset margin and the offset corresponding to the first computing task to obtain an updated offset margin.

6. The task processing method according to claim 3, characterized by, The updating of the offset margin according to the offset corresponding to the first computing task and the number of threads in the second computing task comprises: calculating a difference between the number of threads in the second computing task and the offset corresponding to the first computing task to obtain an updated offset margin.

7. The task processing method according to any one of claims 3 to 6, characterized by, The task processing method further comprises, for any first thread in the second computing task, in a case where it is determined that there is a first computing task corresponding to the first thread, performing the step of transforming the first computing task into the second computing task.

8. The task processing method according to claim 7, characterized by, The determination of the first computing task corresponding to the first thread comprises: determining a first global linear index corresponding to the first thread in the second computing task; determining a second global linear index corresponding to the first thread according to the first global linear index and an offset corresponding to the first thread, the offset corresponding to the first thread representing a sum of offsets corresponding to the first computing tasks transformed into the current second computing task; in a case where the second global linear index is greater than or equal to zero and the second global linear index is less than the number of threads in the first computing task, it is determined that there is the first computing task corresponding to the first thread.

9. The task processing method of claim 1, wherein, The task processing method further comprises: According to the thread ID information of the second computing task and the thread ID mapping relationship, thread ID information of the first computing task is determined; The parallel execution of the at least one second computing task by the plurality of processing units to obtain a task processing result comprises: According to the thread ID information of the at least one second computing task, the at least one second computing task is distributed to the plurality of processing units for parallel processing, and a task processing result is obtained through the plurality of processing units and the thread ID information of the first computing task.

10. The task processing method according to claim 9, wherein The thread ID mapping relationship is determined in the following manner: For each second thread, thread ID information of the second thread in the second computing task and thread ID information of the second thread in the first computing task are determined; According to the thread ID information of each second thread in the first computing task and the thread ID information of each second thread in the second computing task, the thread ID mapping relationship is determined.

11. The task processing method according to claim 10, wherein Determining the thread ID information of the second thread in the first computing task comprises: According to the corresponding first global linear index of the second thread in the second computing task and the corresponding offset amount of the second thread, a corresponding second global linear index of the second thread in the first computing task is determined; According to the corresponding second global linear index of the second thread in the first computing task and the corresponding first thread group structure and first thread structure of the first computing task, the thread ID information of the second thread in the first computing task is determined.

12. The task processing method according to claim 11, wherein According to the corresponding second global linear index of the second thread in the first computing task and the corresponding first thread group structure and first thread structure of the first computing task, the thread ID information of the second thread in the first computing task is determined, comprising: According to the corresponding first thread structure of the first computing task, the number of threads in a single group is determined; According to the corresponding second global linear index of the second thread in the first computing task, the number of threads in a single group, and the corresponding first thread group structure and first thread structure of the first computing task, thread group ID information and intra-group ID information are determined; According to the thread group ID information, the corresponding first thread structure of the first computing task, and the intra-group ID information, the thread ID information of the second thread in the first computing task is obtained.

13. The task processing method according to claim 12, wherein According to the corresponding second global linear index of the second thread in the first computing task, the number of threads in a single group, and the corresponding first thread group structure and first thread structure of the first computing task, thread group ID information and intra-group ID information are determined, comprising: According to the corresponding second global linear index of the second thread in the first computing task and the number of threads in a single group, thread group index and intra-group index are determined; According to the thread group index and the corresponding first thread group structure of the first computing task, thread group ID information is determined; According to the thread group index and the corresponding first thread group structure of the first computing task, thread group ID information is determined; According to the index in the group and the first thread structure corresponding to the first computing task, group ID information is determined.

14. The task processing method according to any one of claims 10 to 13, characterized by, The determination of the thread ID information of the second thread in the second computing task comprises: According to the first global linear index corresponding to the second thread in the second computing task, and the second thread group structure and the second thread structure corresponding to the second computing task, the thread ID information of the second thread in the second computing task is determined.

15. A task processing apparatus characterized by comprising: The task processing device comprises: A first processing module configured to convert a plurality of first computing tasks into at least one second computing task, wherein the number of threads in the first computing task is less than the number of threads in the second computing task; A second processing module configured to execute the at least one second computing task in parallel through a plurality of processing units to obtain a task processing result.

16. A computer readable storage medium having stored thereon a computer program, characterized in that, The program is executed by the processor to implement the steps of the task processing method of any one of claims 1-14.

17. An electronic device, comprising: Comprise: A memory having a computer program stored thereon; A processor for executing the computer program in the memory to implement the steps of the task processing method of any one of claims 1-14.

18. A computer program product comprising a computer program, characterized in that, The computer program is executed by the processor to implement the steps of the task processing method of any one of claims 1-14. The computer program is executed by the processor to implement the steps of the task processing method of any one of claims 1-14.

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