Isolated MMCDCT non-lockout fault ride-through method, system and device

Abstract

The invention discloses an isolation type MMCDCT non-locking fault ride-through method, system and device, and relates to the field of isolation type MMCDCTs, and the method comprises the steps: employing a double-closed-loop control strategy under a dq coordinate system at an inversion side and a rectification side, obtaining the AC voltage modulation waves of the inversion side and the rectification side, and calculating the bridge arm voltage modulation waves of the inversion side and the rectification side; carrying out modulation and voltage-sharing control on the bridge arm voltage modulation waves of the inversion side and the rectification side to obtain trigger signals of the inversion side and the rectification side; and the inverter side and the rectifier side are controlled based on the trigger signal, the rectifier side is switched to operate at negative DC voltage, the fault current is cleared, and when the fault current is reduced to be close to 0, the rectifier side is switched to operate at zero DC voltage from the negative DC voltage, and no-blocking fault ride-through based on the zero DC voltage is carried out. According to the invention, fault current removal of the isolated MMCDCT in a controllable state can be realized, capacitor voltage balance of sub-modules in the converter during fault ride-through is ensured, and the fault restart speed is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of isolated MMCDCT, and particularly relates to an isolated MMCDCT non-blocking fault ride-through method, system and equipment. BACKGROUND

[0002] For deep-sea wind power, "shaguo desert" and other large-scale new energy gathering and sending scenarios, compared with the AC gathering-DC transmission mode, the DC gathering-DC transmission mode has better applicability in this scenario, and the high-voltage large-capacity sending DC / DC converter is the key equipment of the DC gathering wind power plant. There are two networking schemes for the DC gathering wind power plant, namely the series type and the parallel type. The parallel type wind power sending scheme using the MMC type DC / DC converter (MMCDCT) with electrical isolation is considered as the preferred structure of the DC gathering wind power plant because it has many advantages such as low coupling degree between wind turbines, high reliability, strong fault ride-through capability and the like.

[0003] In order to enable the isolated MMCDCT to have the fault ride-through capability, current researches are mostly focused on using sub-modules with fault current blocking capability. After the fault of one side of the MMCDCT, the fault current can be cleared by only blocking the fault side. Some researchers also propose to add a fault transfer branch in the MMCDCT, which cooperates with the DC circuit breaker and the fast mechanical switch to clear the fault current. However, the above methods have problems such as high cost of the DC circuit breaker, unbalanced capacitor voltage of the sub-modules after blocking, slow system restart under instantaneous short-circuit fault and the like. SUMMARY

[0004] In order to solve the above problems, the present application provides an isolated MMCDCT non-blocking fault ride-through method, system and equipment, which can realize the fault current clearing of the isolated MMCDCT in the controllable state, ensure the balanced capacitor voltage of the sub-modules in the converter during the fault ride-through, and improve the fault restart speed of the isolated MMCDCT.

[0005] To achieve the above purpose, the present application provides the following solutions:

[0006] In a first aspect, the present application provides an isolated MMCDCT non-blocking fault ride-through method, the upper bridge arm and the lower bridge arm of the rectifier side of the isolated MMCDCT each include a plurality of full-bridge sub-modules and a plurality of half-bridge sub-modules, the upper bridge arm and the lower bridge arm of the inverter side each include a plurality of half-bridge sub-modules, and the method comprises:

[0007] adopting a double closed-loop control strategy in the dq coordinate system on the inverter side to obtain an inverter side alternating current voltage modulation wave;

[0008] The inverter side AC voltage modulation wave is subjected to Park inverse transformation, and a DC voltage bias and a two-frequency circulating current control output are added to obtain an inverter side bridge arm voltage modulation wave;

[0009] A double closed loop control strategy in a dq coordinate system is adopted at the rectifier side to obtain a rectifier side AC voltage modulation wave;

[0010] Based on the rectifier side AC voltage modulation wave, a phase-to-phase and bridge arm-to-bridge arm capacitor voltage balance control strategy is adopted to obtain a rectifier side bridge arm voltage modulation wave;

[0011] The inverter side bridge arm voltage modulation wave and the rectifier side bridge arm voltage modulation wave are subjected to modulation and voltage balance control to obtain inverter side trigger signals and rectifier side trigger signals;

[0012] Based on the inverter side trigger signals and the rectifier side trigger signals, the inverter side and the rectifier side are controlled respectively, the rectifier side is switched to negative DC voltage operation to clear the fault current, and when the fault current decreases to close to 0, the rectifier side is switched from negative DC voltage operation to zero DC voltage operation for zero DC voltage based non-blocking fault ride-through.

[0013] In a second aspect, the present application provides an isolated MMCDCT non-blocking fault ride-through system, comprising:

[0014] An inverter side AC voltage modulation wave determination module is configured to adopt a double closed loop control strategy in a dq coordinate system at the inverter side to obtain an inverter side AC voltage modulation wave;

[0015] An inverter side bridge arm voltage modulation wave determination module is configured to add a DC voltage bias and a two-frequency circulating current control output to the inverter side AC voltage modulation wave after Park inverse transformation to obtain an inverter side bridge arm voltage modulation wave;

[0016] A rectifier side AC voltage modulation wave determination module is configured to adopt a double closed loop control strategy in a dq coordinate system at the rectifier side to obtain a rectifier side AC voltage modulation wave;

[0017] A rectifier side bridge arm voltage modulation wave determination module is configured to adopt a phase-to-phase and bridge arm-to-bridge arm capacitor voltage balance control strategy based on the rectifier side AC voltage modulation wave to obtain a rectifier side bridge arm voltage modulation wave;

[0018] A trigger signal determination module is configured to subject the inverter side bridge arm voltage modulation wave and the rectifier side bridge arm voltage modulation wave to modulation and voltage balance control to obtain inverter side trigger signals and rectifier side trigger signals;

[0019] The non-locking fault ride-through module is configured to control the inverter side and the rectifier side based on the inverter side trigger signal and the rectifier side trigger signal respectively, the rectifier side is switched to a negative DC voltage operation to clear the fault current, and when the fault current decreases to close to 0, the rectifier side is switched from the negative DC voltage operation to a zero DC voltage operation for zero DC voltage-based non-locking fault ride-through.

[0020] In a third aspect, the present application provides a computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, and the processor executes the computer program to implement the above-mentioned isolated MMCDCT non-locking fault ride-through method.

[0021] According to the specific embodiments provided by the present application, the present application has the following technical effects:

[0022] The present application provides an isolated MMCDCT non-locking fault ride-through method, system and device, the inverter side and the rectifier side are triggered by the trigger signal calculated, the switching of the rectifier side negative / zero DC voltage is realized, the fault current clearing speed can be improved while preventing the impact of the fault point reverse feedback current on the converter. And because the inter-phase and bridge arm capacitor voltage balance control strategy is adopted when calculating the rectifier side bridge arm voltage modulation wave, the balance of the internal capacitor voltage of the fault side during the fault ride-through can be realized, and the converter can be quickly restored to a stable state after the fault ends. BRIEF DESCRIPTION OF DRAWINGS

[0023] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings needed in the embodiments will be briefly introduced as follows. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0024] Figure 1 It is a parallel two-stage boost topology diagram for a wind farm;

[0025] Figure 2 It is an isolated MMCDCT topology diagram;

[0026] Figure 3 It is a control strategy block diagram of the inverter side and the rectifier side in the steady state of the isolated MMCDCT; wherein (a) is a control strategy block diagram of the inverter side, and (b) is a control strategy block diagram of the rectifier side;

[0027] Figure 4 It is an upper and lower bridge arm voltage waveform schematic diagram during non-locking fault ride-through of the rectifier side a phase;

[0028] Figure 5A flowchart of an isolation type MMCDCT non-blocking fault ride-through method provided by an embodiment of the present application is shown in the figure;

[0029] Figure 6 A control block diagram of the isolation type MMCDCT non-blocking fault ride-through strategy is shown in the figure, wherein (a) is a control block diagram of the inverter side, and (b) is a control block diagram of the rectifier side;

[0030] Figure 7 A schematic diagram of a DC current waveform of the rectifier side is shown in the figure;

[0031] Figure 8 A schematic diagram of a DC voltage waveform of the rectifier side is shown in the figure;

[0032] Figure 9 A schematic diagram of a capacitor voltage waveform of the rectifier side full-bridge sub-module without inter-phase and inter-arm capacitor voltage balance control is shown in the figure;

[0033] Figure 10 A schematic diagram of a capacitor voltage waveform of the rectifier side full-bridge sub-module with inter-phase and inter-arm capacitor voltage balance control is shown in the figure. DETAILED DESCRIPTION

[0034] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the present application.

[0035] A parallel two-stage boost topology of a wind farm is shown in the figure Figure 1 The DC output type direct drive wind turbine is composed of a permanent magnet wind generator, a machine-side rectifier converter DC / AC, and a collection DC / DC converter. The electrical energy generated by the wind turbine is collected to a medium voltage collection DC bus after the first boost by the collection DC / DC converter, and then is boosted again by a sending DC / DC converter, and is sent to a grid-connected converter through a high voltage DC transmission line, and finally is connected to an AC system at the receiving end.

[0036] Figure 2 A structure diagram of the isolation type MMCDCT is shown in the figure. The isolation type MMCDCT includes two MMCs and an AC transformer, and is connected by using a rectifier. According to the electrical energy conversion mode, the rectifier side of the isolation type MMCDCT is the inverter side MMC1, and the inverter side of the isolation type MMCDCT is the rectifier side MMC2. Figure 2 As shown in the figure, the upper bridge arm and the lower bridge arm of the rectifier side each include a plurality of full-bridge sub-modules FBSM and a plurality of half-bridge sub-modules HBSM, and the upper bridge arm and the lower bridge arm of the inverter side each include a plurality of half-bridge sub-modules HBSM.

[0037] Figure 3 (a) and (b) in FIG. are the control strategy block diagrams of the inverter side and the rectifier side of the isolated MMCDCT in steady state, respectively, and both the inverter side and the rectifier side adopt double closed-loop control strategy in dq coordinate system in steady state, wherein the outer loop controller of the inverter side controls the direct current voltage and the reactive power, and the inner loop controller controls the dq components I d1 and I q1 of the three-phase alternating current of the inverter side; the outer loop controller of the rectifier side controls the dq components U d2 and U q2 of the alternating current voltage, and the inner loop controller controls the dq components I d2 and I q2 of the three-phase alternating current of the rectifier side; the voltage phase of the rectifier side is obtained by integrating the angular frequency with respect to time, and the voltage phase of the inverter side is obtained by locking the voltage phase of the rectifier side through a phase-locked loop; the alternating current voltage in dq coordinate system obtained by the double closed-loop control of the inverter side and the rectifier side is obtained by Park inverse transformation to obtain alternating current voltage modulation waves u ABC and u abc , and then the upper and lower bridge arm voltage modulation waves are obtained by adding the direct current voltage bias and the two-frequency circulating current control output, and finally the trigger signals of the inverter side and the rectifier side sub-modules are obtained through the modulation and voltage sharing control link.

[0038] Figure 4 FIG. is the voltage waveform of the upper and lower bridge arms during the no-latching fault ride-through period with the rectifier side a phase as an example, and i' dc2 is the critical direct current of the rectifier side. When i dc2 >i' dc2 , the no-latching fault ride-through strategy provided in the present application is started for the isolated MMCDCT to realize fault current clearing, and the direct current voltage reference value is switched from U dcN2 in steady state to the minimum negative direct current voltage U dc2min , and when i dc2 ≤i' dc2 , the direct current voltage reference value is switched from U dc2min to 0.

[0039] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the present application will be further described in detail below with reference to the drawings and specific embodiments.

[0040] In an exemplary embodiment, the rectifier side outlet fault is taken as an example, as shown in Figure 5As shown, an isolation type MMCDCT non-blocking fault ride-through method is provided, which is executed by a computer device, specifically, can be executed by a terminal or a server alone, or can be executed by a terminal and a server together, in the embodiments of the present application, the method is taken as an example applied to the server, and includes the following steps S1 to S6.

[0041] S1: A double closed-loop control strategy in the dq coordinate system is adopted on the inverter side to obtain an inverter side alternating voltage modulation wave.

[0042] The double closed-loop control strategy in the dq coordinate system includes active outer loop control, reactive outer loop control and inner loop current feedforward decoupling control.

[0043] The double closed-loop control strategy in the dq coordinate system is adopted on the inverter side during non-blocking fault ride-through, the outer loop controller controls active power and reactive power, and the inner loop controller controls the dq components of three-phase alternating current I d1 and I q1 , and the rectifier side voltage phase is locked by a phase-locked loop.As shown in (a) of FIG. 1, the specific process is as follows. Figure 6

[0044] (1) Based on the rectifier side submodule capacitor voltage reference value and the rectifier side submodule capacitor voltage actual value, the active outer loop control is adopted to obtain a first active current control instruction value.

[0045] The active outer loop control of the inverter side is active power control, in which the active power reference value is composed of two parts, one is a given active power reference value P 1ref , which is 0 during the fault; and the other is an active power compensation value ΔP 1ref , which is obtained by subtracting the rectifier side submodule capacitor voltage actual value U c2ref from the rectifier side submodule capacitor voltage reference value U c2ave and then passing through a PI link, wherein U c2ref is equal to the rated submodule capacitor voltage of the rectifier side, and U c2ave is obtained by averaging all submodule capacitor voltages of the rectifier side; the difference between the active power reference value (P 1ref + ΔP 1ref ) and the actual active power P1 is passed through a PI link to obtain a first active current control instruction value I d1ref , and the active power compensation value is added to balance the rectifier side submodule capacitor voltage.

[0046] (2) Based on the reactive power reference value and the actual reactive power, the reactive outer loop control is adopted to obtain a first reactive current control instruction value.

[0047] The reactive outer loop control of the inverter is reactive power control, and the reactive power reference value Q 1refThe first reactive current control instruction value I is obtained after the actual value Q1 of the reactive power is subtracted through a PI link q1ref .

[0048] (3) Based on the first active current control instruction value and the first reactive current control instruction value, an inverter-side alternating current voltage modulation wave is obtained by adopting inner loop current feedforward decoupling control.

[0049] Inverter inner loop current feedforward decoupling control: I d1ref and I q1ref The inverter-side alternating current voltage dq components U d1 and U q1 instruction values are obtained through the current feedforward decoupling control link.

[0050] S2: After Park inverse transformation is performed on the inverter-side alternating current voltage modulation wave, a direct current voltage bias and a two-frequency circulating current control output are added, to obtain an inverter-side bridge arm voltage modulation wave.

[0051] The instruction values of U d1 and U q1 obtained in step S1 are subjected to Park inverse transformation to obtain the modulation signal u ABC of the inverter-side three-phase voltage; and a direct current voltage bias and a two-frequency circulating current control output are added to obtain the inverter-side bridge arm voltage modulation wave.

[0052] S3: A double closed loop control strategy in the dq coordinate system is adopted at the rectifier side to obtain a rectifier-side alternating current voltage modulation wave.

[0053] During the no-locking fault ride-through period of the rectifier side, a double closed loop control strategy in the dq coordinate system is adopted, an outer loop controller controls the dq components U d2 and U q2 of the alternating current voltage, an inner loop controller controls the dq components I d2 and I q2 of the three-phase alternating current, and the voltage phase is obtained by integrating the angular frequency with respect to time, and the inter-phase and inter-bridge arm capacitor voltage balance control and the direct current voltage reference value selection link are added on the basis of the double closed loop control. Specifically, as shown in (b) in Figure 6 :

[0054] (1) Based on the alternating current voltage d-axis component reference value and the alternating current voltage d-axis component actual value, an active second current control instruction value is obtained by adopting active outer loop control.

[0055] The rectifier side active outer loop control is the alternating current voltage d-axis component control, specifically, the alternating current voltage d-axis component reference value U d2ref is subtracted from the alternating current voltage d-axis component actual value U d2 to obtain the second active current control instruction value I d2ref through a PI link.

[0056] (2) Based on the AC voltage q-axis component reference value and the AC voltage q-axis component actual value, a second reactive current control instruction value is obtained by reactive outer loop control.

[0057] The rectifier side reactive outer loop control is AC voltage q-axis component control, specifically, the AC voltage q-axis component reference value U q2ref and the AC voltage q-axis component actual value U q2 are subtracted to obtain a second active current control instruction value I q2ref after passing through a PI link.

[0058] (3) Based on the second active current control instruction value and the second reactive current control instruction value, a rectifier side AC voltage modulation wave is obtained by inner loop current feedforward decoupling control.

[0059] Rectifier side inner loop current feedforward decoupling control: I d2ref and I q2ref pass through a current feedforward decoupling control link to obtain the instruction value of the rectifier side AC voltage dq component U d2 and U q2 .

[0060] S4: Based on the rectifier side AC voltage modulation wave, a phase-to-phase and bridge arm-to-bridge arm capacitor voltage balance control strategy is adopted to obtain a rectifier side bridge arm voltage modulation wave. The phase-to-phase and bridge arm-to-bridge arm capacitor voltage balance control is realized by adjusting the phase angle of the AC voltage component in each bridge arm voltage. The phase-to-phase and bridge arm-to-bridge arm capacitor voltage balance control includes phase-to-phase capacitor voltage balance control and bridge arm-to-bridge arm capacitor voltage balance control. Specifically, as shown in (b) of Figure 6

[0061] (1) Calculate the amplitude and phase angle of the rectifier side AC voltage modulation wave.

[0062] The amplitude U d2 and the phase angle Δθ of the rectifier side AC voltage modulation wave are calculated from the instruction values of U q2 and U 2m , the amplitude U 2m and the phase angle Δθ satisfy the following relationship:

[0063]

[0064] Δθ = arctan(U q2 / U d2 )

[0065] (2) Based on the rectifier side phase unit average capacitor voltage and the rectifier side sub-module capacitor voltage reference value, a first phase angle adjustment amount is calculated.

[0066] ​Inter-phase capacitor voltage balance control: the average capacitor voltage of the three phase units on the rectifier side (i.e. the sum of the capacitor voltage of each phase unit sub-module divided by the number of phase unit sub-modules) is respectively subtracted from the capacitor voltage reference value U c2ref After the difference, the first phase angle adjustment amount Δθ is obtained through the PI link x1 (x=a, b, c).

[0067] (3) Calculate the second phase angle adjustment amount based on the average capacitor voltage of the upper bridge arm of the rectifier side and the average capacitor voltage of the lower bridge arm of the rectifier side.

[0068] Inter-phase capacitor voltage balance control: the average capacitor voltage of the three phase units on the rectifier side (i.e. the sum of the capacitor voltage of each phase unit sub-module divided by the number of phase unit sub-modules) is respectively subtracted from the capacitor voltage reference value U x2 (x=a, b, c).

[0069] (4) Based on the amplitude, phase angle, first phase angle adjustment amount, second phase angle adjustment amount and three-phase phase difference of the rectifier side alternating voltage modulation wave, calculate the alternating voltage component in the rectifier side bridge arm voltage modulation wave. The alternating voltage component in the rectifier side upper bridge arm voltage modulation wave and the alternating voltage component in the rectifier side lower bridge arm voltage modulation wave.

[0070] 1) Based on the phase angle, first phase angle adjustment amount, second phase angle adjustment amount and three-phase phase difference of the rectifier side alternating voltage modulation wave, respectively calculate the phase angle of the alternating voltage component in the rectifier side upper bridge arm voltage modulation wave and the phase angle of the alternating voltage component in the rectifier side lower bridge arm voltage modulation wave.

[0071] The phase angle θ of the alternating voltage component in the rectifier side upper bridge arm voltage modulation wave is x_p (x=a, b, c) is the phase angle θ obtained by integrating the rectifier side angular frequency with respect to time, plus the phase angle Δθ, plus Δθ x1 and Δθ x2 , respectively plus the phase difference 0, -2π / 3, 2π / 3 of the three-phase.

[0072] The phase angle θ of the alternating voltage component in the rectifier side lower bridge arm voltage modulation wave is x_n (x=a, b, c) is the phase angle θ obtained by integrating the rectifier side angular frequency with respect to time, plus the phase angle Δθ, plus Δθ x1 and minus Δθ x2 , respectively plus the phase difference 0, -2π / 3, 2π / 3 of the three-phase.

[0073] 2) Calculate the AC voltage component in the upper arm voltage modulation wave on the rectifier side based on the phase angle of the AC voltage component in the upper arm voltage modulation wave on the rectifier side and the amplitude of the AC voltage on the rectifier side.

[0074] From amplitude U 2m and phase angle θ x_p The AC voltage component in the voltage modulation wave of the upper bridge arm on the rectifier side can be obtained as U. 2m sinθ x_p .

[0075] 3) Calculate the AC voltage component in the lower arm voltage modulation wave on the rectifier side based on the phase angle of the AC voltage component in the voltage modulation wave on the rectifier side and the amplitude of the AC voltage on the rectifier side.

[0076] From amplitude U 2m and phase angle θ x_n Therefore, the AC voltage component in the lower bridge arm voltage modulation wave can be obtained as U. 2m sinθ x_n .

[0077] (5) Calculate the voltage modulation wave of the rectifier side arm based on the AC voltage component and DC voltage reference value in the voltage modulation wave of the rectifier side arm.

[0078] DC voltage reference value U dc2ref Selection process: The entire fault ride-through process involves switching between negative and zero DC voltage. In the early stages of fault ride-through, when the fault current is large, the rectifier side operates in a negative DC voltage state. At this time, the DC voltage reference value is negative, and fault ride-through without blocking is performed based on negative DC voltage to clear the fault current more quickly. When the fault current drops to almost zero, the DC voltage reference value switches to zero, and the system operates in a zero DC voltage state to perform fault ride-through without blocking based on zero DC voltage.

[0079] DC voltage reference value U dc2ref During negative DC voltage operation, select the minimum negative DC voltage U that can be output from the rectifier side. dc2min U dc2min It is related to the proportion of the full-bridge submodule on the rectifier side; the larger the proportion of the full-bridge submodule, the better the U... dc2min The smaller the value, the more likely it is to satisfy the relation U. dc2min =(N H -N F )U dcN2 / N, where N H N F U and N represent the number of half-bridge submodules, full-bridge submodules, and total number of submodules on the rectifier side, respectively. dcN2 When the rated DC voltage on the rectifier side is 100%, U dc2min equal to -U dcN2 .

[0080] DC voltage reference value U dc2ref / 2 minus U 2m sinθ x_p The rectifier side three-phase upper bridge arm voltage modulation wave, DC voltage reference value U dc2ref / 2 plus U obtained in step 12) 2m sinθ x_n The rectifier side three-phase lower bridge arm voltage modulation wave can be obtained.

[0081] S5: modulate and voltage-sharing control the inverter side bridge arm voltage modulation wave and the rectifier side bridge arm voltage modulation wave to obtain inverter side trigger signals and rectifier side trigger signals.

[0082] The inverter side and rectifier side upper and lower bridge arm voltage modulation waves are subjected to nearest level approximation modulation algorithm to obtain the number of sub-modules required to be put into each bridge arm, and finally the sub-module voltage-sharing sorting algorithm confirms the state of each sub-module of the bridge arm to be put into or cut off, that is, the trigger signals of each sub-module of the inverter side and rectifier side bridge arms are obtained.

[0083] S6: control the inverter side and the rectifier side based on the inverter side trigger signals and the rectifier side trigger signals respectively, the rectifier side switches to negative DC voltage operation to clear the fault current, when the fault current drops to close to 0, the rectifier side switches from negative DC voltage operation to zero DC voltage operation for zero DC voltage based non-locking fault ride-through.

[0084] The trigger signals of the inverter side and the rectifier side are obtained through step S5, at this time the rectifier side switches to negative DC voltage operation first, the inverter side controls the power transmitted by the converter to be 0, and the surplus power will cause the inverter side DC voltage to rise, so a DC power consumption device needs to be installed on the inverter side, when the inverter side DC voltage U dc1 rises to 1.1U dcN1 , a power consumption resistor is put into to absorb the surplus power so that it no longer continues to rise, wherein U dcN1 is the rated DC voltage of the inverter side.

[0085] The rectifier side operates in negative DC voltage state, at this time the voltage difference between the rectifier side and the fault point will cause the fault current to drop rapidly, when it drops to close to 0, the rectifier side switches to zero DC voltage operation.

[0086] After the fault current is cleared, a period of time is allowed for fault recovery, the isolation type MMCDCT switches to the control strategy in the steady state, if it is a transient fault, then the normal operation is restored; if it is a permanent fault, then the converter is locked and the isolation switch is opened.

[0087] The application can realize fault ride-through without lockout of the isolated MMCDCT, through switching of negative / zero DC voltage, while improving the fault current clearing speed, preventing the impact of reverse feedback current at the fault point on the converter, and balancing the internal capacitor voltage of the fault side during fault ride-through, facilitating quick recovery of the converter to a stable state after the fault ends.

[0088] The application simultaneously adds a first phase angle adjustment amount Dtheta to the AC voltage component in the upper and lower arm voltage modulation waves x1 , which is equivalent to directly adjusting the phase angle of each phase AC voltage modulation wave to adjust the active power flowing into each phase, so that the capacitor voltage of each phase can reach the rated value state, thereby realizing balancing of the inter-phase capacitor voltage, and adding and subtracting a second phase angle adjustment amount Dtheta to the AC voltage component in the upper and lower arm voltage modulation waves x2 , to speed up the balancing speed of the capacitor voltage between the bridge arms. The presence of Dtheta x1 will not affect the effect of Dtheta x2 , and since Dtheta x1 and Dtheta x2 are of different orders of magnitude, the presence of Dtheta x2 will also not affect the effect of Dtheta x1 .

[0089] According to the description of the application, the topology of the isolated MMCDCT in the simulation model is shown in Figure 2 , the DC voltage at the inverter side is 60kV, the number of bridge arm sub-modules is 10, the sub-module capacitor is 7.5mF, the DC voltage at the rectifier side is 150kV, the number of bridge arm sub-modules is 20, the sub-module capacitor is 2.4mF, the proportion of full-bridge sub-modules is 75%, a fault occurs at 1s, the fault strategy starts at 1.002s, and the Matlab / Simulink simulation result is shown in Figures 7-10 .

[0090] As shown in Figure 7 , in the steady state, the DC current at the rectifier side is maintained at 1kA, the fault current reaches the peak value at 1.002s, and the fault current decays to 0 at 4.7ms after the fault strategy starts, so that the fault current can be quickly cleared.

[0091] As shown in Figure 8 , in the steady state, the DC voltage at the rectifier side is maintained at 150kV, the DC voltage quickly drops to-75kV after the fault ride-through strategy starts, and then switches to 0.

[0092] Figure 9 The waveform of the full-bridge sub-module capacitor voltage at the rectifier side without inter-phase and bridge arm capacitor voltage balancing control is shown in Figure 9 , it can be seen that the capacitor voltage between the bridge arms can be balanced after a period of time, but the inter-phase capacitor voltage cannot be balanced.

[0093] Figure 10 The capacitor voltage waveform of the rectifier side full-bridge sub-module with the inter-phase and inter-bridge arm capacitor voltage balance control is as follows: Figure 10 It can be seen that the inter-phase and inter-bridge arm capacitor voltages reach balance after 0.058 s. The inter-phase and inter-bridge arm capacitor voltage balance control provided in the application can effectively realize the inter-phase capacitor voltage balance and shorten the time required for the upper and lower bridge arm capacitor voltage balance.

[0094] Based on the same inventive concept, the application also provides an isolated MMCDCT non-locking fault ride-through system. The implementation scheme for solving the problem provided by the system is similar to the implementation scheme described in the above method, so the specific limitations in one or more isolated MMCDCT non-locking fault ride-through system embodiments provided below can be referred to the limitations of the isolated MMCDCT non-locking fault ride-through method in the above, which will not be described here again.

[0095] In one exemplary embodiment, an isolated MMCDCT non-locking fault ride-through system is provided, comprising:

[0096] An inverter side alternating current voltage modulation wave determination module is configured to obtain an inverter side alternating current voltage modulation wave by using a double closed loop control strategy in a dq coordinate system at the inverter side.

[0097] An inverter side bridge arm voltage modulation wave determination module is configured to obtain an inverter side bridge arm voltage modulation wave by performing Park inverse transformation on the inverter side alternating current voltage modulation wave, adding a direct current voltage bias and a two times frequency circulating current control output.

[0098] A rectifier side alternating current voltage modulation wave determination module is configured to obtain a rectifier side alternating current voltage modulation wave by using a double closed loop control strategy in a dq coordinate system at the rectifier side.

[0099] A rectifier side bridge arm voltage modulation wave determination module is configured to obtain a rectifier side bridge arm voltage modulation wave by using an inter-phase and inter-bridge arm capacitor voltage balance control strategy based on the rectifier side alternating current voltage modulation wave.

[0100] A trigger signal determination module is configured to obtain an inverter side trigger signal and a rectifier side trigger signal by modulating and voltage balancing controlling the inverter side bridge arm voltage modulation wave and the rectifier side bridge arm voltage modulation wave.

[0101] A non-locking fault ride-through module is configured to control the inverter side and the rectifier side based on the inverter side trigger signal and the rectifier side trigger signal respectively, switch the rectifier side to negative direct current voltage operation to clear the fault current, and when the fault current decreases to close to 0, switch the rectifier side from negative direct current voltage operation to zero direct current voltage operation to perform zero direct current voltage based non-locking fault ride-through.

[0102] In an example embodiment, a computer device is provided, including a memory and a processor, the memory storing a computer program, and the processor implementing the steps in the above method embodiments when executing the computer program. The computer device can be a server or a terminal. The computer device includes a processor, a memory, an input / output interface (I / O) and a communication interface. The processor, the memory and the input / output interface are connected through a system bus, and the communication interface is connected to the system bus through the input / output interface. The processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operating system and the computer program in the non-volatile storage medium to run. The database of the computer device is configured to store data to be processed. The input / output interface of the computer device is configured to exchange information between the processor and external devices. The communication interface of the computer device is configured to communicate with external terminals through network connection. The computer program is executed by the processor to implement an isolation type MMCDCT non-blocking fault ride-through method.

[0103] In an example embodiment, a computer readable storage medium is provided, storing a computer program, which is executed by a processor to implement the steps in the above method embodiments.

[0104] In an example embodiment, a computer program product is provided, including a computer program, which is executed by a processor to implement the steps in the above method embodiments.

[0105] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data for analysis, stored data, displayed data, etc.) involved in the present application are all information and data authorized by the user or authorized by all parties, and the collection, use and processing of related data need to comply with relevant regulations.

[0106] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a non-volatile computer readable storage medium, and when the computer program is executed, the processes of the above-mentioned embodiments of the methods can be included. Any reference to memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical storage, high-density embedded non-volatile memory, resistive memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration but not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM), etc.

[0107] The database involved in the embodiments provided in the present application can include at least one of a relational database and a non-relational database. The non-relational database can include a distributed database based on a blockchain, etc., without being limited thereto. The processor involved in the embodiments provided in the present application can be a general-purpose processor, a central processing unit, a graphics processing unit, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, etc., without being limited thereto.

[0108] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, all possible combinations of the technical features in the above embodiments are not described, however, as long as the combinations of the technical features do not exist contradictory, they should be considered as the scope of the present application.

[0109] The principles and implementation modes of the present application are described by applying specific examples herein, and the above-mentioned embodiments are only used to help understand the method and its core idea of the present application; meanwhile, for those skilled in the art, according to the idea of the present application, the specific implementation mode and application range can be changed. In conclusion, the content of the present application should not be understood as a limitation.

Claims

1. An isolated MMCDCT non-lockout fault ride-through method, the upper and lower bridge arms of the rectifier side of the isolated MMCDCT each comprising a plurality of full-bridge sub-modules and a plurality of half-bridge sub-modules, and the upper and lower bridge arms of the inverter side each comprising a plurality of half-bridge sub-modules, characterized in that, The method comprises: adopting a double closed-loop control strategy under dq coordinate system on the inverter side to obtain an inverter-side alternating current voltage modulation wave; performing Park inverse transformation on the inverter-side alternating current voltage modulation wave, adding a direct current voltage bias and a two-frequency circulating current control output to obtain an inverter-side bridge arm voltage modulation wave; adopting a double closed-loop control strategy under dq coordinate system on the rectifier side to obtain a rectifier-side alternating current voltage modulation wave; based on the rectifier-side alternating current voltage modulation wave, adopting an inter-phase and inter-bridge arm capacitor voltage balance control strategy to obtain a rectifier-side bridge arm voltage modulation wave; modulating and voltage balance controlling the inverter-side bridge arm voltage modulation wave and the rectifier-side bridge arm voltage modulation wave to obtain inverter-side trigger signals and rectifier-side trigger signals; based on the inverter-side trigger signals and the rectifier-side trigger signals, controlling the inverter side and the rectifier side respectively, the rectifier side switches to negative direct current voltage operation to clear the fault current, when the fault current drops to close to 0, the rectifier side switches from negative direct current voltage operation to zero direct current voltage operation to perform zero direct current voltage-based non-blocking fault ride-through.

2. The isolated MMCDCT latchup-free fault ride through method of claim 1, wherein, The double closed-loop control strategy under dq coordinate system comprises active outer loop control, reactive outer loop control and inner loop current feedforward decoupling control.

3. The isolated MMCDCT latchup-free fault ride through method of claim 2, wherein, adopting a double closed-loop control strategy under dq coordinate system on the inverter side to obtain an inverter-side alternating current voltage modulation wave, specifically comprising: based on the rectifier-side sub-module capacitor voltage reference value and the rectifier-side sub-module capacitor voltage actual value, adopting active outer loop control to obtain a first active current control instruction value; based on the reactive power reference value and the reactive power actual value, adopting reactive outer loop control to obtain a first reactive current control instruction value; based on the first active current control instruction value and the first reactive current control instruction value, adopting inner loop current feedforward decoupling control to obtain the inverter-side alternating current voltage modulation wave.

4. The isolated MMCDCT latchup-free fault ride through method of claim 2, wherein, adopting a double closed-loop control strategy under dq coordinate system on the rectifier side to obtain a rectifier-side alternating current voltage modulation wave, specifically comprising: based on the alternating current voltage d-axis component reference value and the alternating current voltage d-axis component actual value, adopting active outer loop control to obtain a second active current control instruction value; based on the alternating current voltage q-axis component reference value and the alternating current voltage q-axis component actual value, adopting reactive outer loop control to obtain a second reactive current control instruction value; based on the second active current control instruction value and the second reactive current control instruction value, adopting inner loop current feedforward decoupling control to obtain the rectifier-side alternating current voltage modulation wave.

5. The isolated MMCDCT latchup-free fault ride through method of claim 1, wherein, The inter-phase and inter-bridge arm capacitor voltage balance control comprises inter-phase capacitor voltage balance control and inter-bridge arm capacitor voltage balance control.

6. The isolated MMCDCT latchup-free fault ride through method of claim 1, wherein, based on the rectifier-side alternating current voltage modulation wave, adopting an inter-phase and inter-bridge arm capacitor voltage balance control strategy to obtain a rectifier-side bridge arm voltage modulation wave, specifically comprising: calculating the amplitude and phase angle of the rectifier-side alternating current voltage modulation wave; based on the rectifier-side phase unit average capacitor voltage and the rectifier-side sub-module capacitor voltage reference value, calculating a first phase angle adjustment amount; based on the rectifier-side upper bridge arm average capacitor voltage and the rectifier-side lower bridge arm average capacitor voltage, calculating a second phase angle adjustment amount; The AC voltage component in the rectifier side bridge arm voltage modulation wave is calculated based on the amplitude, phase angle, the first phase angle adjustment, the second phase angle adjustment and three-phase phase difference of the rectifier side AC voltage modulation wave. The rectifier side bridge arm voltage modulation wave is calculated based on the AC voltage component in the rectifier side bridge arm voltage modulation wave and the DC voltage reference value.

7. The isolated MMCDCT latchup-free fault ride through method of claim 6, wherein, The AC voltage component in the rectifier side bridge arm voltage modulation wave includes the AC voltage component in the rectifier side upper bridge arm voltage modulation wave and the AC voltage component in the rectifier side lower bridge arm voltage modulation wave. The AC voltage component in the rectifier side bridge arm voltage modulation wave is calculated based on the amplitude, phase angle, the first phase angle adjustment, the second phase angle adjustment and three-phase phase difference of the rectifier side AC voltage modulation wave, specifically including: The phase angle of the AC voltage component in the rectifier side upper bridge arm voltage modulation wave and the phase angle of the AC voltage component in the rectifier side lower bridge arm voltage modulation wave are respectively calculated based on the phase angle, the first phase angle adjustment, the second phase angle adjustment and three-phase phase difference of the rectifier side AC voltage modulation wave; The AC voltage component in the rectifier side upper bridge arm voltage modulation wave is calculated based on the phase angle of the AC voltage component in the rectifier side upper bridge arm voltage modulation wave and the amplitude of the rectifier side AC voltage; The AC voltage component in the rectifier side lower bridge arm voltage modulation wave is calculated based on the phase angle of the AC voltage component in the rectifier side lower bridge arm voltage modulation wave and the amplitude of the rectifier side AC voltage.

8. The isolated MMCDCT latchup-free fault ride through method of claim 6, wherein, During the negative DC voltage operation, the DC voltage reference value is the minimum negative DC voltage output by the rectifier side.

9. An isolated MMCDCT no-latch-up fault ride-through system, characterized in that, The method comprises: The rectifier side AC voltage modulation wave determination module is configured to obtain the rectifier side AC voltage by adopting a double closed loop control strategy in a dq coordinate system on the rectifier side; The rectifier side bridge arm voltage modulation wave determination module is configured to obtain the rectifier side bridge arm voltage modulation wave by performing Park inverse transformation on the rectifier side AC voltage modulation wave, adding a DC voltage bias and a two-frequency circulating current control output; The rectifier side AC voltage modulation wave determination module is configured to obtain the rectifier side AC voltage by adopting a double closed loop control strategy in a dq coordinate system on the rectifier side; The rectifier side bridge arm voltage modulation wave determination module is configured to obtain the rectifier side bridge arm voltage modulation wave by adopting an inter-phase and inter-bridge arm capacitor voltage balance control strategy based on the rectifier side AC voltage modulation wave; The trigger signal determination module is configured to obtain the inverter side trigger signal and the rectifier side trigger signal by performing modulation and voltage balance control on the inverter side bridge arm voltage modulation wave and the rectifier side bridge arm voltage modulation wave; The non-locking fault ride-through module is configured to control the inverter side and the rectifier side based on the inverter side trigger signal and the rectifier side trigger signal respectively, switch the rectifier side to the negative DC voltage operation to clear the fault current, and switch the rectifier side from the negative DC voltage operation to the zero DC voltage operation when the fault current decreases to close to 0 to perform the non-locking fault ride-through based on the zero DC voltage.

10. A computer device comprising: The memory, the processor and the computer program stored in the memory and executable on the processor are characterized in that the processor executes the computer program to implement the isolation type MMCDCT non-locking fault ride-through method in any one of claims 1-8.

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