Digital moving die relay protection constant value checking method in novel energy storage system

Abstract

The invention relates to a digital moving die relay protection constant value checking method in a novel energy storage system, and belongs to the technical field of power system relay protection. Aiming at the technical problems of insufficient simulation precision and low test condition matching efficiency in the existing digital dynamic simulation test, the method comprises the following steps of: establishing a digital dynamic simulation model comprising a battery energy storage unit and a power grid equivalent impedance network; a data acquisition device is adopted to obtain the direct current side voltage in real time, and the simulation current waveform error is controlled within the range of + / -1% by dynamically adjusting the charging and discharging rate and the voltage response time constant parameter; a plurality of test working conditions are preset, transient test waveforms are generated at the actual operation state matching degree, and the transient test waveforms are output to the relay protection device through the digital-to-analog conversion device and are synchronously recorded; and performing linear correction by comparing the difference between the actual action time and the simulation trigger time. The method is mainly used for automatically checking the constant value of the relay protection device in the novel energy storage system, and can effectively improve the accuracy of protection action and the reliability of the system.

Description

Technical Field

[0001] This invention belongs to the field of power system relay protection and automation technology, specifically relating to a new method for verifying the setting value of digital dynamic mode relay protection in an energy storage system. Background Technology

[0002] New energy storage systems refer to systems that differ from traditional energy storage technologies such as pumped hydro storage and lead-acid batteries, utilizing more advanced technologies to store and release electrical energy. Their core objective is to address the volatility and intermittency issues of renewable energy sources (such as wind and solar power), improve grid stability, and promote energy structure transformation.

[0003] In the field of power system energy storage applications, the accuracy of relay protection settings is closely related to the reliability of system operation. With the large-scale integration of new energy storage systems into the grid, their operating conditions exhibit characteristics such as rapid charge-discharge switching and dynamic response across multiple time scales. Traditional setting verification methods based on offline simulation and static testing are gradually revealing their insufficient adaptability. In existing technologies, digital dynamic simulation testing systems typically use energy storage unit models with fixed parameters. Their charge-discharge characteristic parameters are mostly set based on typical operating conditions. However, actual energy storage units are affected by state of charge, temperature changes, and aging effects during operation, resulting in significant deviations between their dynamic characteristics and the simulation model. This leads to an error in the amplitude of the AC current waveform output from the simulation often exceeding ±3%, directly affecting the accuracy of subsequent protection action time calculations. Furthermore, existing test condition libraries mostly adopt discrete preset modes, lacking a dynamic matching mechanism with actual operating conditions. When the energy storage system is in mixed operating conditions (such as the superposition of charge-discharge switching and grid disturbances), the matching accuracy of manually selected test conditions is usually less than 60%, requiring at least 30 seconds of judgment time, which is insufficient to meet real-time verification requirements. In the setting correction stage, existing systems largely rely on manual comparison of waveform recordings and simulation results. The accuracy of identifying action time differences is limited by the oscilloscope sampling rate (typically 100kHz), making it difficult to effectively capture time deviations below 10ms. Furthermore, manual setting correction is prone to introducing human error. More significantly, the clock synchronization accuracy between existing data acquisition systems and simulation models is insufficient, with time delay differences between different sampling channels exceeding 0.5ms. This causes misalignment of the simulation input data's time axis, leading to distortion in transient process simulations. The root cause of these problems lies in the fact that energy storage units exhibit strong time-varying and nonlinear dynamic characteristics, making it impossible for traditional linear modeling methods to accurately describe the coupling relationship between their charging / discharging rates and voltage responses. Intelligent matching of test conditions requires real-time correlation analysis of multi-dimensional operating parameters, while existing pattern recognition algorithms suffer from computational efficiency bottlenecks in dynamic weight allocation and rapid decision-making. Simultaneously, achieving closed-loop automation of the verification process requires overcoming technical obstacles such as cross-system data synchronization, high-precision time calibration, and reverse control of protection devices. These challenges have long constrained the in-depth application of digital dynamic model testing technology in energy storage protection setting verification. Summary of the Invention

[0004] One objective of this invention is to address the problems in digital dynamic model testing, such as insufficient simulation accuracy leading to large errors in protection setting verification, low efficiency in test condition matching, and limited automation in the verification process. Traditional methods suffer from drawbacks such as deviations between the simulation model and actual dynamic characteristics exceeding ±3%, operating condition matching accuracy below 60%, and significant errors in manual setting correction.

[0005] This paper addresses the issue of inaccurate parameter settings for energy storage units and power conversion systems in digital dynamic simulation models. Existing technologies use parameter settings based on typical operating conditions, neglecting the switching frequency characteristics of actual converter controllers, leading to distortion in the dynamic response of the simulation model.

[0006] This addresses the issue of limited test condition presets and a lack of coverage for typical fault scenarios. Traditional test condition libraries do not include combined scenarios such as full-power discharge of energy storage units, grid short circuits, and frequency fluctuations, making it difficult to simulate real-world operating environments.

[0007] This addresses the issues of insufficient security and data synchronization accuracy during the setting modification process. Existing methods that directly overwrite the storage area pose a risk of accidental operation, and the asynchronous sampling clocks of the data acquisition device and the protection device cause time delay deviations in the simulation input data.

[0008] This addresses the issue of low matching between test condition parameter settings and actual dynamic processes. Existing full-power discharge conditions do not consider DC-side voltage disturbances, short-circuit fault models neglect arc transient characteristics, and frequency fluctuation conditions lack voltage amplitude coupling effects.

[0009] This addresses the issues of insufficient data integrity and operational traceability during the modification of fixed values. Traditional human-machine interfaces that directly write fixed values ​​lack multiple verification mechanisms, posing a risk of unauthorized tampering and making it impossible to quickly roll back abnormal modifications.

[0010] This addresses the issue of insufficient time-domain alignment accuracy in multi-channel data acquisition. Existing data acquisition systems employ simple interpolation algorithms, resulting in synchronization errors exceeding 0.5ms, and lack a real-time clock skew compensation mechanism.

[0011] This paper addresses the challenges of clock synchronization and data consistency verification in multi-source heterogeneous data acquisition systems. Time-scale misalignment exists in the acquisition of DC-side voltage, AC-side current, and grid-connected point phase angle; traditional methods lack dynamic compensation and consistency verification mechanisms.

[0012] This addresses the issues of insufficient efficiency and accuracy in calculating the matching degree of test conditions. Existing weighted algorithms do not consider the dynamic correlation of parameters, and the generated test waveforms do not incorporate pre-disturbance and actual operating condition deviation compensation.

[0013] This addresses the issue of insufficient synchronization accuracy between digital-to-analog conversion output and waveform recording data. Traditional methods fail to achieve microsecond-level time alignment and lack real-time verification of the output waveform and a mechanism for tracing the testing process.

[0014] To address this, the present invention provides a novel method for verifying the setting of a digital dynamic simulation relay protection in an energy storage system. This method establishes a digital dynamic simulation model of the energy storage system. During system operation, the voltage sampling values ​​on the DC side of the energy storage unit, the three-phase current sampling values ​​on the AC side of the converter, and the voltage phase angle at the grid connection point are acquired in real time using a data acquisition device. The acquired voltage, current, and phase angles are input into the digital dynamic simulation model. Based on the deviation between the actual operating parameters and the simulation parameters, the charging / discharging rate parameters and voltage response time constant parameters of the battery energy storage unit in the simulation model are dynamically adjusted to control the amplitude error of the AC side current waveform output by the simulation model within the range of the measured current waveform amplitude. Within ±1% range; multiple test conditions are preset in the digital dynamic simulation model. When the matching degree between the actual operating state of the energy storage system and any test condition exceeds 85%, the transient process test waveform of the corresponding test condition is automatically generated. The generated transient process test waveform is output to the voltage and current input terminals of the relay protection device through the digital-to-analog converter. The waveform recording function of the relay protection device is started simultaneously to record the action time of the relay protection device and the trigger time of the preset protection setting in the simulation model. When the difference between the actual action time of the relay protection device and the trigger time calculated by the simulation model exceeds 10ms, the overcurrent protection delay setting of the relay protection device is linearly corrected according to the time difference.

[0015] Preferably, the digital dynamic simulation model of the present invention includes a battery energy storage unit, a power conversion system, and an equivalent impedance network connected to the power grid, wherein the charging and discharging characteristic parameters of the battery energy storage unit are set according to the factory test data of the actual energy storage unit, and the switching frequency of the power conversion system is set to the carrier frequency of the pulse width modulation module in the actual converter controller.

[0016] Preferably, the test conditions of the present invention include the energy storage unit at full power discharge, the three-phase short-circuit fault state of the power grid, and the power grid frequency fluctuation state.

[0017] Preferably, the modified setpoint of the present invention is written into the setpoint storage area after being confirmed a second time through the human-machine interface of the relay protection device; and the sampling frequency of the data acquisition device is set to an integer multiple of the sampling frequency of the relay protection device.

[0018] Preferably, the full-power discharge state of the energy storage unit of the present invention is specifically set as a continuous discharge process in which the state of charge of the energy storage unit decreases from 95% to 20%, the discharge duration is set to 5 seconds, and a disturbance condition of DC side voltage dropping to 70% of rated voltage is forcibly superimposed during the discharge process; the three-phase short-circuit fault state of the power grid is specifically set as a metallic short-circuit model with a transition resistance of 0.1Ω is set at the grid connection point, and the arc model parameters are associated to make the short-circuit current exhibit a secondary transient drop of 20% amplitude 15ms after the fault occurs; the power grid frequency fluctuation state is specifically set as the power grid frequency continuously fluctuates within the range of 49.5Hz to 50.5Hz at a rate of change of 0.5Hz / s, and a voltage amplitude fluctuation of ±5% for 3 cycles is superimposed at each frequency extreme point.

[0019] Preferably, when the corrected setting value of the present invention is confirmed a second time through the human-machine interface of the relay protection device, the following steps are specifically performed: a dynamic verification code containing a timestamp and the operator's employee number is generated based on the difference between the setting value before and after the correction, and the original setting value parameter before correction, the new setting value parameter after correction, and the dynamic verification code are displayed side by side on the human-machine interface; when it is detected that the operator has entered the correct dynamic verification code through the touch screen, the new setting value parameter is automatically written into the first storage partition of the setting value storage area, while the original setting value parameter is retained in the second storage partition; after the writing is completed, the new setting value parameter in the first storage partition is XORed through a verification algorithm, and the verification result is compared with the original setting value parameter in the second storage partition in reverse. When the verification consistency rate exceeds 99.9%, the storage partition switching command is activated to make the setting value in the first storage partition effective.

[0020] Preferably, the sampling frequency of the data acquisition device of the present invention is set to an integer value that is four times the sampling frequency of the relay protection device, and a clock synchronization module based on the phase-locked loop principle is configured in the data acquisition device. The clock synchronization module establishes a synchronization relationship with the sampling clock of the relay protection device through a GPS clock module or an IRIG-B time code receiver. The voltage and current sampling values ​​acquired by the data acquisition device are divided into four consecutive sub-sampling points according to each sampling period of the relay protection device. A cubic spline interpolation algorithm is used to perform time-domain alignment processing on the sub-sampling point data to generate a value that matches the sampling frequency of the relay protection device. The system generates interpolated data that is strictly synchronized. During the interpolation data generation process, the clock deviation between the data acquisition device and the relay protection device is monitored in real time. When the clock deviation exceeds ±20μs, the clock synchronization module is triggered to perform phase compensation operation, and a synchronization alarm signal is displayed on the human-machine interface. Before inputting the interpolated data that has undergone time-domain alignment into the digital dynamic simulation model, the system performs discrete Fourier transform verification on the 16 sub-sampling points within the sampling period of two adjacent relay protection devices. When the difference in amplitude of the fundamental frequency component exceeds 2%, the system automatically removes abnormal data segments and starts the self-test program of the data acquisition device.

[0021] Preferably, the data acquisition device of the present invention includes a DC-side voltage acquisition module, an AC-side current acquisition module, and a grid-connected point synchronization measurement unit. The DC-side voltage acquisition module uses a Hall voltage sensor with a sampling rate of 10kHz. The AC-side current acquisition module uses three independent fiber optic current sensors, each with a sampling rate of 20kHz. The grid-connected point synchronization measurement unit uses a combination of a resistor divider and a phase-locked loop circuit with a sampling rate of 20kHz. A distributed clock synchronization unit is configured in the data acquisition device. This clock synchronization unit synchronizes the leading edge of the sampling pulses of the DC-side voltage acquisition module, the leading edge of the sampling pulses of the AC-side current acquisition module, and the phase measurement time of the grid-connected point synchronization measurement unit to the same time reference via an IRIG-B time code receiver, with the synchronization deviation controlled within ±10μs. Time-stamp alignment processing is performed on the acquired DC-side voltage sampling values, specifically including: grouping the 10kHz sampling data from the Hall voltage sensor into time windows of 10ms each, and performing linear interpolation within each time window. The system generates a voltage interpolation sequence aligned with the AC side current sampling time; performs dynamic compensation on the measured phase angle of the grid-connected voltage; automatically switches to the phase angle calculation mode based on the sliding window discrete Fourier transform when the phase angle change rate of the phase-locked loop circuit output exceeds 10° per second, and displays a phase tracking mode switching flag on the human-machine interface; performs time consistency verification on the DC side voltage interpolation sequence, AC side current sampling sequence, and grid-connected phase angle sequence before inputting data into the digital dynamic simulation model; triggers the data acquisition device to reinitialize the clock synchronization unit and discard abnormal data segments when the timestamp interval deviation between two adjacent data packets exceeds ±0.5ms; when transmitting the verified data stream to the digital dynamic simulation model, performs a reasonableness verification of the DC side voltage value (50%-120% of the rated voltage), an amplitude limit verification of the AC side current value (instantaneous value not exceeding twice the rated current), and a gradient verification of the phase angle change rate (not exceeding 20° per second); automatically terminates the simulation process and activates a data acquisition anomaly alarm when any verification item is not met.

[0022] Preferably, the calculation of the test condition matching degree of the present invention specifically performs the following steps: Obtain the actual operating parameter set of the energy storage system, including DC-side voltage fluctuation rate, AC-side current harmonic distortion rate, and grid connection point frequency change rate; dynamically weight each parameter with the benchmark parameters of the preset test condition, wherein the weight coefficient of DC-side voltage fluctuation rate is set to 0.4, the weight coefficient of AC-side current harmonic distortion rate is set to 0.3, and the weight coefficient of grid connection point frequency change rate is set to 0.3; when the weighted overall matching degree exceeds 85%, extract the actual operating data of the previous 200ms as the initial condition of the transient process, and compare it with the preset model of the corresponding test condition using a dynamic time warping algorithm to generate a transient process test waveform with a time step of 50μs; when generating the test waveform, a pre-disturbance process with a DC-side voltage drop slope of 10V / ms is superimposed on the full-power discharge state of the energy storage unit, and a three-phase short-circuit fault state of the power grid is also considered. A probability model for arc reignition within 20ms after a fault is set up, and a random modulation component with ±2% voltage amplitude is added to the power grid frequency fluctuation state. Before inputting the generated test waveform into the transient process test module, waveform validity verification is performed: the transient energy distribution of the test waveform is decomposed using a discrete wavelet transform algorithm. When the energy proportion of the fundamental frequency component exceeds 85% and the energy proportion of the third harmonic component is less than 5%, it is determined to be a valid test waveform. After the test waveform passes the validity verification, the amplitude parameter of the test waveform is linearly compensated by ±0.5% according to the parameter deviation between the actual operating condition and the test condition, and the time axis parameter is corrected by a time scale of 0.1ms. During the test waveform injection process, the dynamic deviation between the response data of the digital dynamic simulation model and the measured data is monitored in real time. When the effective current value deviation exceeds 2% or the phase angle deviation exceeds 3°, the current test condition is automatically terminated and the transition state of the adjacent test mode is switched.

[0023] Preferably, the digital-to-analog converter of the present invention is configured with 16-bit resolution and a conversion rate of 1MS / s, and integrates a pre-trigger logic module. This pre-trigger logic module sends a zero-level synchronization signal to the relay protection device 50ms before the output test waveform. During the test waveform output stage, the output timestamp of the digital-to-analog converter is aligned with the recording start time of the relay protection device at the microsecond level using the IEEE 1588 precise time protocol, with the alignment deviation controlled within ±5μs. Real-time verification is performed on the output transient process test waveform, specifically including: connecting a high-precision sampling resistor in parallel in the output circuit of the digital-to-analog converter to sample the actual output voltage and current waveforms back to the verification module; when the output voltage amplitude error exceeds ±0.5% or the waveform distortion rate exceeds 1%, the self-calibration mode of the digital-to-analog converter is triggered; when the recording function is activated, the digital dynamic simulation model output is synchronously recorded. The theoretical action time stamp and the actual action time stamp of the relay protection device are generated and embedded in the waveform recording file as time reference source identifiers. After the relay protection device operates, the time difference data from the protection start time to the action contact closing time in the waveform recording file is extracted and compared with the trigger time calculated by the simulation model. When the absolute value of the time difference exceeds 5ms, an invalid test identifier is automatically marked in the waveform recording file header. After the test waveform injection is completed, the waveform recording data is subjected to time domain integrity verification: the cross-correlation algorithm is used to calculate the time delay difference between the waveform output by the simulation model and the waveform recorded by the waveform recording device. When the time delay difference exceeds ±0.1ms, the retest process is automatically triggered and a clock calibration record is generated. When the verified waveform recording data and the simulation model data are packaged to generate a test report, the test waveform hash value, the digital-to-analog converter serial number, and the waveform recording device sampling rate parameter are embedded in the report header file to form an immutable test process traceability chain.

[0024] The present invention has the following beneficial effects: By dynamically adjusting simulation model parameters, the current waveform error is controlled within ±1%, significantly improving simulation accuracy. Test waveforms are automatically generated based on an 85% matching threshold, shortening the operating condition matching time to milliseconds. Closed-loop verification is achieved through linear correction of setpoints, reducing human intervention errors. Factory test data is used to set energy storage unit parameters, combined with actual converter switching frequency modeling, reducing the dynamic response error of the simulation model by over 40%. The system covers three typical scenarios: full-power discharge of the energy storage unit, grid short circuit, and frequency fluctuations, increasing test condition coverage to over 90%. Integer multiple sampling frequency design improves data synchronization accuracy to ±20μs; a secondary confirmation mechanism reduces the probability of misoperation by 80%. By superimposing DC voltage disturbances, arc reignition models, and voltage modulation components, the similarity between the test waveform and the actual transient process is increased to 92%. Dynamic verification codes and dual storage partitioning design enable full traceability of setpoint modifications, reducing the risk of data tampering by over 95%. The cubic spline interpolation algorithm controls the time-domain alignment error within ±5μs, and combined with discrete Fourier transform verification to eliminate outlier data, improving the reliability of simulation input data. Multi-channel clock synchronization deviation is controlled within ±10μs, and the dynamic phase compensation mechanism reduces phase angle measurement error to within 0.5°. Dynamic weight calculation combined with time warping algorithm improves the operating condition matching accuracy to 88%; waveform validity verification reduces invalid tests by 60%. The IEEE 1588 protocol achieves ±5μs-level time alignment, hash value embedding technology ensures the test report is tamper-proof, and the traceability chain integrity reaches 99.99%. Attached Figure Description

[0025] Figure 1 This is a flowchart of one embodiment of this application. Detailed Implementation

[0026] The present invention will now be described in further detail with reference to the accompanying drawings, so that those skilled in the art can implement it based on the description.

[0027] This invention provides a method for verifying the setting of a digital dynamic simulation relay protection system. The digital dynamic simulation model is a mathematical simulation system based on physical characteristics, including a dynamic interactive model of battery cells, power converters, and grid impedance. Real-time simulation technology is used to achieve μs-level step-size calculations. Dynamic parameter adjustment is a closed-loop control process that automatically corrects the internal parameters of the model based on the deviation between measured data and simulation output.

[0028] The present invention first constructs a simulation model.

[0029] Battery modeling: A second-order RC equivalent circuit model is adopted, in which the open-circuit voltage (OCV) is fitted as a piecewise function using charge-discharge experimental data at multiple temperatures (-20℃~60℃). The parameter identification was optimized using a genetic algorithm, with a fitting error ≤0.5%.

[0030] Power conversion system: A two-level converter model is built on the RT-LAB platform. The switching device is an IGBT module (such as Infineon FF450R12ME4). The carrier frequency is set to the actual controller parameters (such as 2kHz±5%). The dead time compensation module is configured according to the actual drive circuit delay (typical value 3μs).

[0031] Equivalent impedance of the power grid: Based on the positive sequence impedance matrix derived from PSS / E software, it is implemented as an RL series circuit in the simulation. The impedance value is calculated based on the short-circuit capacity at the grid connection point (e.g., 100MVA). Next, the data acquisition system is set up, specifically including: Hardware architecture: It adopts NIPXIe-6368 data acquisition card, configured with 16-bit ADC, DC side voltage channel range ±1000V (resolution 30.5mV), AC current channel range ±100A (resolution 15.25mA), and the sampling rate is set to 4 times the sampling frequency of the protection device (e.g. 4kHz) (16kHz).

[0032] Clock synchronization: A 1PPS signal is generated by GPS disciplined clock (such as SymmetricomSyncServerS650), with a synchronization error of ≤100ns, ensuring that the sampling time of multiple channels is aligned.

[0033] Then execute the parameter dynamic adjustment algorithm: Error calculation: The difference ΔI between the fundamental effective value of the measured current and the simulated current is extracted every 100ms. The calculation formula is as follows: Adjustment strategy: Update the charge / discharge rate parameter K using a proportional-integral (PI) controller. Where Kp=0.02, Ki=0.005, the adjustment range is limited to ±5% per second.

[0034] Test condition matching and waveform generation Matching degree calculation: The cosine similarity algorithm is used to perform weighted calculations on DC voltage fluctuation rate (10ms window RMS), AC current THD (calculated up to the 31st harmonic), and frequency change rate (5s linear fitting slope). The threshold is set to 85%, and a preset working condition template (such as COMTRADE format) is called after triggering.

[0035] Waveform generation: Set the time step to 50μs in the RTDS simulator, superimpose a pre-disturbance signal (such as a DC voltage falling at a slope of 10V / ms), and verify the waveform spectral characteristics through FFT.

[0036] Final results: Simulated current error was reduced from ±3% using traditional methods to ±0.7%, and dynamic adjustment response time was ≤50ms. Test condition matching accuracy was improved to 89.3%, and waveform generation delay was ≤3ms (compared to ≥30ms using traditional methods). After setting correction, protection action time deviation was ≤2ms (typical value 10ms before correction).

[0037] The digital dynamic model relay protection setting verification method is based on high-precision real-time simulation and dynamic parameter matching technology. Its core lies in constructing a digital dynamic simulation model and verifying the protection setting through data closed loop.

[0038] The digital dynamic simulation model is based on the actual component parameters of the energy storage system and accurately characterizes the battery characteristics through the Thevenin equivalent circuit model: a SOC-voltage lookup table is established based on laboratory constant current charge and discharge test data (each 5% SOC corresponds to a segmented voltage value), and an internal resistance-SOC relationship table is generated by combining the measured dynamic internal resistance using the pulse discharge method; a two-level voltage source converter model is built in MATLAB / Simulink, which strictly matches the actual controller's 2kHz switching frequency, 3.2μs dead time, and current loop parameters (proportional gain 2.5, integral time 0.02 seconds). The equivalent impedance of the power grid was calculated as an RL series circuit based on the short-circuit capacity (100MVA) at the grid connection point (positive sequence impedance 0.1 + j0.3Ω, zero sequence impedance 0.2 + j0.6Ω). The impedance characteristic error was verified to be ≤1.5% by frequency scanning. The data acquisition system uses a LEMLV25-P Hall sensor (±1000V range) and an ABBFOCS-100 fiber optic sensor (±100A range) to acquire DC side voltage and AC side current, respectively. Signal conditioning and analog-to-digital conversion are achieved through AD8479 / AD7606 (200kS / s) and HCNR201 / AD7656 (250kS / s). A 16kHz sampling clock system is constructed using a GPS disciplined clock (SymmetricomSyncServerS650) and a PXIe-6674T synchronization module to ensure that the time delay difference of each channel is ≤8μs.

[0039] The dynamic parameter adjustment stage extracts the fundamental effective value of AC current every 100ms (calculated using FFT + Hanning window). When the measured and simulated error exceeds ±1%, the battery charge and discharge rate is adjusted in steps of 0.05% / s, and the voltage response time constant is optimized (50-200ms). The test waveform generation system calculates the DC voltage fluctuation rate (10ms RMS), AC current THD (up to the 31st harmonic), and frequency change rate in real time. It calculates the comprehensive matching degree with weights of 40% / 30% / 30%. When it exceeds 85%, it triggers the generation of standardized transient process test waveforms: based on the dynamic time warping algorithm, it aligns with the preset operating condition template, generates a COMTRADE format waveform with a step size of 50μs, and superimposes a disturbance signal (such as a 10V / ms DC voltage drop). Finally, it is injected into the protection device through the AD5755 digital-to-analog converter module (16-bit, 1MS / s).

[0040] Verification has shown that this method can achieve a simulation current error of ≤±0.7%, an operating condition matching accuracy of 89.5%, and a protection action time deviation controlled within 2ms after setting correction.

[0041] According to another embodiment of the present invention, in the battery modeling stage, basic data is first obtained through charge-discharge experiments in a laboratory constant temperature environment (25℃±0.5℃). A small-rate current of 0.05C is used for charge-discharge cycles, and the battery is allowed to rest for 1 hour after each 5% SOC change, and the stable open-circuit voltage is measured. These discrete data points are used to generate a continuous SOC-voltage curve using a cubic spline interpolation algorithm, with the interpolation error controlled within ±0.3%. The dynamic internal resistance parameter is obtained through a 1C high-current pulse discharge test. During a 10-second discharge, the voltage drop value is recorded at 1ms intervals, ultimately forming a two-dimensional SOC-internal resistance lookup table that supports linear interpolation lookup in 1% SOC steps.

[0042] For converter modeling, hardware-in-the-loop (HIL) testing was used to achieve precise parameter matching. An actual converter controller (such as TITMS320F28379D) was connected to the simulation system via a fiber optic interface, and the timing differences between the simulated waveforms and the actual switching signals were compared in real time. The dead time parameter (adjustable from 2.8-3.2μs) and drive circuit delay (reference value 3.1μs) in the simulation model were adjusted to ensure that the simulation error at IGBT turn-on and turn-off times was ≤0.2μs. Simultaneously, the controller parameters (current loop Kp=2.5, Ti=0.02s) were strictly consistent with the actual device parameters to ensure a good match in dynamic response characteristics.

[0043] To verify the accuracy of the equivalent impedance of the power grid, a frequency sweep method was used for actual measurement comparison. Within the frequency range of 0.1Hz to 2kHz, a voltage disturbance of ±1% was injected into the actual power grid in 10Hz steps, and the impedance amplitude and phase angle were measured using a power analyzer (such as Yokogawa WT1800). The measured data were compared with the simulation results, requiring amplitude deviation ≤1.5% and phase angle deviation ≤2°. For frequency bands exceeding the thresholds, iterative optimization was achieved by adjusting the RL parameters until the entire frequency band met the requirements.

[0044] According to another embodiment of the present invention, for the full-power discharge condition of the energy storage unit, a continuous discharge process in the simulation model is set where the State of Charge (SOC) linearly decreases from 95% to 20%, and the discharge current is set to a 1C rate (e.g., 100A for a 100Ah battery). During the middle of the discharge (t=150 seconds), a DC-side voltage disturbance is injected, causing the voltage to drop to 70% of the rated value at a rate of 10V / ms for 50ms to simulate a capacitor failure. The timing of the disturbance injection is triggered in real time by the SOC value, ensuring a dynamic correlation with the battery state.

[0045] The three-phase short-circuit condition of the power grid adopts a metallic short-circuit model with a transition resistance of 0.1Ω, and a secondary transient sag is superimposed 15ms after the fault occurs. The dynamic characteristics of the arc are simulated by the Cassie-Mayr hybrid arc equation. The arc reignition condition is set as the voltage recovers to 300V within 50μs after the current crosses zero, and the trigger probability is set to 30%. The arc resistance drops sharply to 0.1Ω at the moment of reignition, generating a 20% secondary current sag, accurately reproducing the actual fault characteristics.

[0046] For grid frequency fluctuation conditions, the speed governor parameters of the equivalent synchronous machine model are adjusted to allow the system frequency to continuously vary within the range of 49.5-50.5Hz at a rate of 0.5Hz / s. When the frequency reaches its extreme point, a sinusoidal modulation component with ±5% of the voltage amplitude is superimposed, with a duration covering three power frequency cycles (60ms). The bandwidth of the modulation component is limited to 0-5Hz to avoid high-frequency components interfering with the sampling of the protection device.

[0047] According to another embodiment of the present invention, a setting modification safety module is developed in the human-machine interface of a relay protection device. The 7-inch capacitive touchscreen adopts a split-column layout, displaying the original setting parameters (e.g., overcurrent stage I 50A / 0.1s) on the left, the proposed new setting value (e.g., 52A / 0.09s) on the right, and a dynamically generated 6-digit verification code in the center. The verification code is calculated in real-time using the HMAC-SHA256 algorithm, integrating the operator's employee number, Unix timestamp, and the original setting data, with an effective time window set to ±2.5 minutes.

[0048] The Flash memory is divided into two independent partitions: Bank1 (0x0000-0x3FFF) and Bank2 (0x4000-0x7FFF). Before writing the new setting to Bank1, a sector erase operation is performed (4KB / time). After the write is complete, the CRC32 checksum of the data in Bank1 is calculated and compared byte by byte with the original data in Bank2. When the checksum consistency rate is ≥99.9% (allowing a difference of 4 bytes), a 0x55AA switching command is sent to the protection CPU to complete the setting taking effect.

[0049] The data acquisition device uses an AD9548 clock generator to receive a 16kHz master clock (4 kHz multiples of the protection device's 4kHz) from a GPS 1PPS signal. Four acquisition points are evenly distributed within each protection sampling period (250μs) (t0=0μs, t1=62.5μs, t2=125μs, t3=187.5μs). Nanosecond-level alignment of multi-channel trigger pulses is achieved through an FPGA, ensuring a time delay difference ≤8μs.

[0050] According to another embodiment of the present invention, a pre-perturbation feature is embedded in the full-power discharge test waveform. When the SOC drops to 50%, the DC-side capacitor voltage is triggered to drop linearly at a fixed slope of 10V / ms, with the minimum voltage limited to 70% of the rated value (e.g., 700V). The perturbation duration is set to 50ms, and the start time is dynamically correlated with the SOC value to ensure that the test can be triggered at different discharge stages.

[0051] An arc reignition event model is established within 20ms after a short-circuit fault. When the voltage at the fault point recovers to 300V and lasts for 10μs, a reignition process is triggered with a 30% probability. At the moment of reignition, the arc resistance drops sharply from the initial value of 10Ω to 0.1Ω, resulting in a secondary current drop of 20%. This process is implemented through a real-time logic judgment module.

[0052] To address frequency fluctuations, a ±2% voltage amplitude modulation is applied at two extreme points, 49.5Hz and 50.5Hz. The modulation signal uses bandwidth-limited Gaussian white noise (0-5Hz), and high-frequency components are eliminated using an FIR low-pass filter. Each modulation event lasts for three power frequency cycles, strictly synchronized with the frequency change rate, ensuring accurate reproduction of the amplitude-frequency coupling characteristics.

[0053] According to another embodiment of the present invention, when an operator initiates a value modification, the system concatenates the employee ID (8-bit BCD encoding), the current timestamp (32-bit Unix time), and the original value (16-bit floating-point number) into an input data stream. The HMAC-SHA1 algorithm is used for encryption, and the first 6 hexadecimal digits of the output are used as a dynamic verification code with a validity period of 5 minutes; it must be regenerated after the timeout.

[0054] Before the new value is written to the Bank1 active area, a three-step verification is performed: 1) Check that the remaining space in the target sector is ≥512 bytes; 2) Verify that the dynamic verification code matches the input; 3) Calculate the XOR check value of the new data in Bank1. When the verification consistency rate is ≥99.9%, the Bank1 enable signal is activated, and the old value is retained in the Bank2 backup area until the next update.

[0055] The setting switching instruction 0x55AA requires dual security authentication: first, HMAC-SHA256 is used to verify the integrity of the instruction, and then the digital signature is verified using the RSA-2048 algorithm. During instruction transmission, AES-128 encryption is used, and the key is stored in a dedicated hardware security module (HSM) to prevent man-in-the-middle attacks.

[0056] According to another embodiment of the present invention, the data acquisition device is equipped with an AD9548 phase-locked loop chip to receive GPS 1PPS signals and generate a 16kHz sampling clock. A TDC7200 time-to-digital converter monitors the clock deviation between the acquisition device and the protection device in real time. When the deviation exceeds ±20μs, a phase compensation circuit is triggered to adjust the clock output, ensuring synchronization accuracy ≤5μs.

[0057] Four sub-sampling points (t0-t3) acquired within each protection sampling cycle (250μs) are used to generate synchronous data using a cubic spline interpolation algorithm. The interpolation coefficient matrix is ​​pre-calculated using the LU decomposition method, with single-point interpolation taking ≤5μs. The interpolated data timescale is strictly aligned with the sampling time of the protection device, with a time delay difference ≤2μs.

[0058] Perform Discrete Fourier Transform on the data from two adjacent cycles (16 sub-sampling points) to calculate the amplitude of the 50Hz fundamental component. When the amplitude difference between adjacent cycles exceeds 2% (e.g., 100A → ±2A), the data segment is determined to be abnormal, automatically discarded, and the self-test program of the acquisition device is triggered to ensure that the reliability of the data input to the simulation model is ≥99.2%.

[0059] According to another embodiment of the present invention, the DC-side voltage measurement employs a LEMLV25-P Hall sensor with a range of ±1000V and a 5th-order Butterworth anti-aliasing filter (cutoff frequency 4kHz) configured at a 10kHz sampling rate. The AC-side phase current is measured using an ABBFOCS-100 fiber optic sensor with a range of ±100A and a signal-to-noise ratio ≥80dB at a 20kHz sampling rate. The grid-connected point synchronization unit uses a 0.1% accuracy resistive voltage divider in conjunction with an AD654V / F converter to achieve phase angle measurement.

[0060] Synchronization pulses are generated using an IRIG-B code receiver (DatumTymServe2100), and the three-channel sampling trigger signals are controlled by an FPGA (Xilinx Kintex-7). The alignment error of the pulse leading edge of DC voltage, AC current, and phase measurements is ≤±8μs. If the error exceeds this tolerance, the clock synchronization unit is automatically reset and reinitialized.

[0061] Before inputting data into the simulation model, a triple check is performed: 1) DC voltage value is within 50%-120% of the rated value; 2) AC current instantaneous value does not exceed twice the rated value; 3) Phase angle change rate is ≤20° / s. If any condition is not met, the simulation process is immediately terminated and an audible and visual alarm is activated, while the abnormal data packet is recorded for subsequent analysis.

[0062] According to another embodiment of the present invention, the DC voltage fluctuation rate (RMS value within a 10ms window), AC current THD (up to the 31st harmonic), and frequency change rate (linear slope over a 5-second period) are collected in real time and assigned weighting coefficients of 0.4, 0.3, and 0.3, respectively. When the weighted overall matching degree is ≥85%, the test waveform generation module is triggered, and the matching calculation cycle is shortened to 50ms.

[0063] The actual running data in the 200ms before the matching trigger is extracted and aligned with the preset working condition template using the DTW algorithm. By finding the path with the minimum cumulative distance, the time axis of the actual data is stretched or compressed to generate a standardized test waveform with a step size of 50μs, and the time alignment error is ≤0.05%.

[0064] The generated test waveform is subjected to a discrete wavelet transform (Daubechies4 wavelet basis) to decompose five levels of detail coefficients. The waveform is considered valid when the fundamental frequency (50Hz) energy accounts for ≥85% and the third harmonic (150Hz) energy is ≤5%. Invalid waveforms are automatically discarded and regenerated to ensure that the waveform quality injected into the protection device meets the standards.

[0065] According to another embodiment of the present invention, an AD5755 digital-to-analog converter module is used, with 16-bit resolution ensuring an output voltage accuracy of ±0.003%, and a conversion rate of 1MS / s meeting the transient waveform requirements. A zero-level synchronization pulse is sent to the protection device 50ms before the output, triggering the waveform recording function to pre-record 100ms of data, ensuring complete capture of the transient process.

[0066] The digital-to-analog converter and the waveform recording device are synchronized at the microsecond level using the IEEE 1588 protocol, with the master clock (Meinberg M600) achieving a synchronization accuracy of ±50ns. A 0.01Ω shunt resistor is connected in parallel to the output circuit to sample waveforms in real time for amplitude (error ±0.5%) and distortion rate (THD≤1%) verification. In case of an anomaly, a self-calibration mode is triggered.

[0067] When the test report is generated, the SHA-256 hash value of the COMTRADE waveform file, the digital-to-analog converter serial number, and the waveform recording sampling rate are written into the PDF metadata. The report is digitally signed using the RSA-2048 algorithm; any modification to the content will result in a change in the hash value, achieving traceability and tamper-proofing throughout the entire testing process.

[0068] Although embodiments of the present invention have been disclosed above, they are not limited to the applications listed in the specification and embodiments. They can be applied to various fields suitable for the present invention. For those skilled in the art, other modifications can be easily made. Therefore, without departing from the general concept defined by the claims and their equivalents, the present invention is not limited to the specific details and illustrations shown and described herein.

Claims

1. A novel method for verifying the setting values ​​of digital dynamic mode relay protection in an energy storage system, characterized in that, Includes the following steps: Establish a digital dynamic simulation model of the energy storage system; During the operation of the energy storage system, the voltage sampling value on the DC side of the energy storage unit, the three-phase current sampling value on the AC side of the converter, and the voltage phase angle at the grid connection point are obtained in real time through the data acquisition device. The real-time voltage sampling value, current sampling value, and phase angle are input into the digital dynamic simulation model. The charging and discharging rate parameters and voltage response time constant parameters of the battery energy storage unit in the simulation model are dynamically adjusted according to the deviation between the actual operating parameters and the simulation parameters, so that the amplitude error of the AC side current waveform output by the simulation model is controlled within ±1% of the measured current waveform amplitude. Multiple test conditions are preset in the digital dynamic simulation model. When the matching degree between the actual operating state of the energy storage system and any test condition exceeds 85%, the transient process test waveform of the corresponding test condition is automatically generated. The generated transient process test waveform is output to the voltage and current input terminals of the relay protection device through a digital-to-analog converter. The waveform recording function of the relay protection device is started simultaneously to record the action time of the relay protection device and the preset protection setting trigger time in the simulation model. When the difference between the actual operating time of the relay protection device and the trigger time calculated by the simulation model exceeds 10ms, the overcurrent protection delay setting of the relay protection device is linearly corrected based on the time difference.

2. The method for verifying the digital dynamic mode relay protection settings in the novel energy storage system as described in claim 1, characterized in that, The digital dynamic simulation model includes a battery energy storage unit, a power conversion system, and an equivalent impedance network connected to the power grid. The charging and discharging characteristic parameters of the battery energy storage unit are set according to the factory test data of the actual energy storage unit, and the switching frequency of the power conversion system is set to the carrier frequency of the pulse width modulation module in the actual converter controller.

3. The method for verifying the digital dynamic mode relay protection settings in the novel energy storage system as described in claim 1, characterized in that, The test conditions include the energy storage unit at full power discharge, the three-phase short-circuit fault of the power grid, and the power grid frequency fluctuation.

4. The method for verifying the digital dynamic mode relay protection settings in the novel energy storage system as described in claim 1, characterized in that, The corrected setting is written into the setting storage area after being confirmed a second time through the human-machine interface of the relay protection device; and the sampling frequency of the data acquisition device is set to an integer multiple of the sampling frequency of the relay protection device.

5. The method for verifying the digital dynamic mode relay protection settings in the novel energy storage system as described in claim 3, characterized in that: The full-power discharge state of the energy storage unit is specifically set as a continuous discharge process in which the state of charge of the energy storage unit decreases from 95% to 20%, with a discharge duration of 5 seconds. During the discharge process, a disturbance condition of the DC side voltage dropping to 70% of the rated voltage is forcibly superimposed. The three-phase short-circuit fault state of the power grid is specifically set as a metallic short-circuit model with a transition resistance of 0.1Ω at the grid connection point, and the arc model parameters are associated to make the short-circuit current experience a secondary transient drop of 20% amplitude 15ms after the fault occurs. The power grid frequency fluctuation state is specifically set as the power grid frequency continuously fluctuates within the range of 49.5Hz to 50.5Hz at a rate of change of 0.5Hz / s, and a voltage amplitude fluctuation of ±5% for 3 cycles is superimposed at each frequency extreme point.

6. The method for verifying the digital dynamic mode relay protection settings in the novel energy storage system as described in claim 4, characterized in that: When the corrected setting value is confirmed a second time through the human-machine interface of the relay protection device, the following steps are performed: A dynamic verification code containing a timestamp and the operator's employee number is generated based on the difference between the setting value before and after the correction. The original setting value parameter before correction, the new setting value parameter after correction, and the dynamic verification code are displayed side-by-side on the human-machine interface. When the operator is detected to have entered the correct dynamic verification code via the touchscreen, the new setting value parameter is automatically written to the first storage partition of the setting value storage area, while the original setting value parameter is retained in the second storage partition. After writing, an XOR check is performed on the new setting value parameter in the first storage partition using a verification algorithm. The check result is then compared in reverse with the original setting value parameter in the second storage partition. When the check consistency rate exceeds 99.9%, a storage partition switching command is activated to make the setting value in the first storage partition effective.

7. The method for verifying the digital dynamic mode relay protection settings in the novel energy storage system as described in claim 4, characterized in that: The sampling frequency of the data acquisition device is set to an integer value that is four times the sampling frequency of the relay protection device, and a clock synchronization module based on the phase-locked loop principle is configured in the data acquisition device. The clock synchronization module establishes a synchronization relationship with the sampling clock of the relay protection device through a GPS clock module or an IRIG-B time code receiver. The voltage and current sampling values ​​collected by the data acquisition device are divided into four consecutive sub-sampling points according to the sampling period of each relay protection device. The sub-sampling point data are time-domain aligned using a cubic spline interpolation algorithm to generate interpolated data that is strictly synchronized with the sampling time of the relay protection device. During the interpolation data generation process, the clock deviation between the data acquisition device and the relay protection device is monitored in real time. When the clock deviation exceeds ±20μs, the clock synchronization module is triggered to perform phase compensation operation, and a synchronization alarm signal is displayed on the human-machine interface. Before inputting the interpolated data after time-domain alignment into the digital dynamic simulation model, discrete Fourier transform verification is performed on the data of 16 sub-sampling points within the sampling period of two adjacent relay protection devices. When the difference in amplitude of the fundamental frequency component exceeds 2%, abnormal data segments are automatically removed and the self-test program of the data acquisition device is started.

8. The method for verifying the digital dynamic mode relay protection settings in the novel energy storage system as described in claim 1, characterized in that: The data acquisition device includes a DC-side voltage acquisition module, an AC-side current acquisition module, and a grid-connected point synchronous measurement unit. The DC-side voltage acquisition module uses a Hall voltage sensor with a sampling rate of 10kHz. The AC-side current acquisition module uses three independent fiber optic current sensors with a sampling rate of 20kHz for each group. The grid-connected point synchronous measurement unit uses a combination structure of a resistor voltage divider and a phase-locked loop circuit with a sampling rate of 20kHz. A distributed clock synchronization unit is configured in the data acquisition device. The clock synchronization unit synchronizes the sampling pulse leading edge of the DC side voltage acquisition module, the sampling pulse leading edge of the AC side current acquisition module, and the phase measurement time of the grid connection point synchronization measurement unit to the same time reference through the IRIG-B time code receiver. The synchronization deviation is controlled within ±10μs. The collected DC-side voltage sampling values ​​are time-stamp aligned, specifically including: grouping the 10kHz sampling data of the Hall voltage sensor into time windows of 10ms each, and generating a voltage interpolation sequence aligned with the AC-side current sampling time through linear interpolation within each time window; Dynamic compensation is performed on the measured voltage phase angle of the grid connection point. When the phase angle change rate of the phase-locked loop circuit output exceeds 10° per second, it automatically switches to the phase angle calculation mode based on the sliding window discrete Fourier transform and displays the phase tracking mode switching indicator on the human-machine interface. Before the data is input into the digital dynamic simulation model, the time coherence of the DC side voltage interpolation sequence, AC side current sampling sequence and grid connection point phase angle sequence is checked. When the timestamp interval deviation between two adjacent data packets is detected to exceed ±0.5ms, the data acquisition device is triggered to reinitialize the clock synchronization unit and discard the abnormal data segment. When transmitting the verified data stream to the digital dynamic simulation model, a reasonableness check is performed on the DC side voltage value (50%-120% of the rated voltage), an amplitude limit check is performed on the AC side current value (the instantaneous value does not exceed twice the rated current), and a gradient check is performed (the phase angle change rate does not exceed 20° per second). If any check item is not met, the simulation process is automatically terminated and a data acquisition anomaly alarm is activated.

9. The method for verifying the setting value of digital dynamic mode relay protection in the novel energy storage system as described in claim 1, characterized in that: The calculation of the test condition matching degree is specifically performed in the following steps: The actual operating parameters of the energy storage system are obtained, including DC-side voltage fluctuation rate, AC-side current harmonic distortion rate, and grid connection point frequency change rate. The parameters are dynamically weighted with the benchmark parameters of the preset test conditions. The weighting coefficients for DC-side voltage fluctuation rate, AC-side current harmonic distortion rate, and grid connection point frequency change rate are all set to 0.

3. When the overall matching degree after weighted calculation exceeds 85%, the actual operating data of the previous 200ms is extracted as the initial conditions of the transient process and compared with the preset model of the corresponding test conditions using a dynamic time warping algorithm to generate a transient process test waveform with a time step of 50μs. When generating test waveforms, a pre-disturbance process with a DC side voltage drop slope of 10V / ms is superimposed on the full-power discharge state of the energy storage unit. An arc reignition probability model is set within 20ms after the fault for the three-phase short-circuit fault state of the power grid. A random modulation component of ±2% voltage amplitude is added to the power grid frequency fluctuation state. Before inputting the generated test waveform into the transient process test module, a waveform validity check is performed: the transient energy distribution of the test waveform is decomposed using the discrete wavelet transform algorithm. When the energy proportion of the fundamental frequency component exceeds 85% and the energy proportion of the third harmonic component is less than 5%, it is determined to be a valid test waveform. After the test waveform passes the validity verification, the amplitude parameter of the test waveform is compensated with ±0.5% linearly based on the parameter deviation between the actual operating conditions and the test conditions, and the time axis parameter is corrected with a time scale of 0.1ms. During the waveform injection test, the dynamic deviation between the response data of the digital dynamic simulation model and the measured data is monitored in real time. When the deviation of the effective current value exceeds 2% or the phase angle deviation exceeds 3°, the current test condition is automatically terminated and the transition state of the adjacent test mode is switched.

10. The method for verifying the digital dynamic mode relay protection settings in the novel energy storage system as described in claim 1, characterized in that: The digital-to-analog converter is configured with 16-bit resolution and a conversion rate of 1MS / s. A pre-trigger logic module is integrated into the digital-to-analog converter. The pre-trigger logic module sends a zero-level synchronization signal to the relay protection device 50ms before the output test waveform. During the waveform output test, the output timestamp of the digital-to-analog converter is aligned with the waveform recording start time of the relay protection device at the microsecond level using the IEEE1588 precise time protocol, with the alignment deviation controlled within ±5μs. Real-time verification is performed on the output transient process test waveform, specifically including: connecting a high-precision sampling resistor in parallel in the output circuit of the digital-to-analog converter, sampling the actual output voltage and current waveform back to the verification module, and triggering the self-calibration mode of the digital-to-analog converter when the output voltage amplitude error exceeds ±0.5% or the waveform distortion rate exceeds 1%. When the waveform recording function is started, the theoretical action time tag output by the digital dynamic simulation model and the actual action time tag of the relay protection device are recorded synchronously, and the time reference source identifier is embedded in the waveform recording file. When the relay protection device operates, the time difference data from the protection start time to the closing time of the action contact is extracted from the waveform file, and the difference is calculated with the trigger time calculated by the simulation model. When the absolute value of the time difference exceeds 5ms, an invalid test mark is automatically marked in the header of the waveform file. After the test waveform injection is completed, the time domain integrity is checked on the recorded waveform data: the cross-correlation algorithm is used to calculate the time delay difference between the output waveform of the simulation model and the waveform recorded by the recording device. When the time delay difference exceeds ±0.1ms, the retest process is automatically triggered and a clock calibration record is generated. When packaging the verified waveform data and simulation model data to generate a test report, the test waveform hash value, the digital-to-analog converter serial number, and the waveform recording device sampling rate parameter are embedded in the report header file to form an unalterable traceability chain for the test process.

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