Electromagnetic noise source analysis and optimization method for EPS motor driving system

Abstract

The invention discloses an EPS motor driving system electromagnetic noise source analysis and optimization method comprising the following steps: S1, carrying out interference source test according to a preset steering system EMC test condition, and identifying an interference source causing conduction emission noise to exceed a standard in an EPS motor driving system; if the interference source is identified to be generated by the ringing of the MOSFET switch in the three-phase inverter circuit in the EPS motor driving system, entering the step S2, otherwise, positioning the interference source by adopting other preset methods, and ending; s2, analyzing the characteristics of a noise source loop of the EPS motor driving system, establishing a simulation circuit, and reproducing a formation mechanism that the conducted emission noise exceeds the standard due to the ringing of an MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) switch; s3, proposing an optimization method to reduce conducted emission noise according to a simulation result; the optimization method comprises the following steps: reducing parasitic inductance of a noise source loop; and S4, revising the schematic diagram and the PCB of the EPS motor driving system according to the optimization method, and carrying out conducted emission noise detection. According to the invention, the optimal EMC design can be realized in a product development stage.

Description

Technical Field

[0001] This invention belongs to the field of automotive electronic electromagnetic compatibility technology, and in particular relates to a method for analyzing and optimizing electromagnetic noise sources in an electric power steering motor drive system. Background Technology

[0002] With the rapid growth of new energy vehicles, the density of automotive electronic and electrical equipment is constantly increasing, and the power and signal transmission speed are continuously improving. Automakers (OEMs) are also placing increasingly higher demands on the electromagnetic compatibility (EMC) performance of automotive components. Electric power steering (EPS), as a key automotive component, must meet the relevant standards for EMC performance. EPS frequently fails in conducted emission (CE) tests due to excessive noise, with the main source of electromagnetic noise being the motor drive system. Current rectification measures for conducted emission in this system are based on continuous trial-and-error component testing, often employing measures such as adding grounding points around the electric drive unit, adding filtering components, and shielding. The drawback of this method is that it cannot detect EMC risks during the product design phase, increasing R&D costs and development cycles, and even risking delays in vehicle launches. Furthermore, repeated soldering of filtering components during rectification can increase parasitic inductance, often resulting in excellent rectification results, yet the final production prototype still fails CE testing. The EMC solution of testing, rectification, and then testing again is no longer sufficient to meet the engineering needs of rapid automotive development. To address the noise source analysis and optimization problem in EPS motor drive systems, a simple, reliable, and highly operable method is urgently needed. Summary of the Invention

[0003] To address the aforementioned technical problems, this invention provides a method for analyzing and optimizing electromagnetic noise sources in an EPS motor drive system, comprising:

[0004] Step S1: Perform interference source testing according to the preset EMC test conditions of the steering system to identify the interference source in the EPS motor drive system that causes the conducted emission noise to exceed the standard; if the interference source is identified as the ringing of the MOSFET switch in the three-phase inverter circuit of the EPS motor drive system, proceed to step S2; otherwise, use other preset methods to locate the interference source and end.

[0005] Step S2: Analyze the characteristics of the noise source circuit of the EPS motor drive system, establish a simulation circuit, and reproduce the formation mechanism of excessive conducted emission noise caused by MOSFET switching ringing;

[0006] Step S3: Based on the simulation results, propose an optimization method to reduce conducted emission noise; the optimization method includes reducing the parasitic inductance of the noise source circuit.

[0007] Step S4: Modify the schematic diagram and PCB layout of the EPS motor drive system according to the optimization method, and perform conducted emission noise detection.

[0008] Preferably, in step S1, the method for identifying whether the interference source is generated by the ringing of the MOSFET switch in the three-phase inverter circuit of the EPS motor drive system is as follows: determine whether the three-phase drive terminal can drive the three-phase circuit normally; if the drive terminal can drive the three-phase circuit normally, measure the MOSFET switch node voltage and the noise voltage of the bus at the same time; compare the switch node voltage with the noise voltage to determine whether the noise ringing and the rising or falling edge of the switch node are synchronized. If they are synchronized in time, it can be determined that the interference source is generated by the ringing of the MOSFET switch in the three-phase inverter circuit of the EPS motor drive system.

[0009] Preferably, the method for determining whether the three-phase drive terminal can drive the three-phase circuit normally is as follows: simultaneously measure the voltage of the MOSFET switching node and the three-phase drive terminal; compare the drive signal and the switching node waveform; if they are synchronized in time, it indicates that the drive terminal can drive the three-phase circuit normally.

[0010] Preferably, other preset methods include near-field testing, real-time spectrum analyzer monitoring, oscilloscope pre-testing, circuit breaking method, or shielding method.

[0011] Preferably, in step S3, the parasitic inductance of the noise source circuit is reduced by changing the component lead or surface mount inductance and by changing the planar inductance.

[0012] Preferably, the planar inductance is changed by altering the PCB layout design.

[0013] Preferably, in step S3, the optimization method further includes reducing conducted emission noise by adding a high-frequency signal buffer circuit.

[0014] Preferably, the high-frequency signal buffer circuit includes a series resistor R. S and series capacitor C S The series resistor R S One end is connected to the switch node SW, and the other end is connected to the series capacitor C. S One end is connected in series with capacitor C. S The other end is connected to the circuit grounding point.

[0015] Preferably, the series capacitor C SThe following two conditions must be met: Condition 1, the absorption frequency of the buffer circuit is greater than the oscillation frequency of the switching node; Condition 2, the conversion efficiency of the motor drive system is not lower than the preset efficiency.

[0016] The present invention also provides a method for reducing conducted emission noise caused by MOSFET switch ringing in the three-phase inverter circuit of an EPS motor drive system, characterized by reducing the parasitic inductance of the noise source circuit or adding a high-frequency signal buffer circuit.

[0017] Compared with existing EMC rectification technologies, this invention has the following significant advantages:

[0018] (1) By combining simulation and testing, the components that cause CE exceedances can be accurately located;

[0019] (2) Build a simulation model, find design deviations, and quickly obtain the optimal state of component parameters;

[0020] (3) By establishing standards through simulation, the best EMC design can be achieved in the product development stage, thereby reducing the high-frequency electromagnetic noise of the EPS system, helping new products pass the EMC test on the first try, saving development costs and shortening development time.

[0021] If we further generate a checklist of optimization solutions, and use simulation methods to conduct risk assessments of CE (Consumer Error) issues during the next-generation product development phase, we can close CE issues at the product development stage. Attached Figure Description

[0022] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments:

[0023] Figure 1 This is a schematic diagram illustrating the steps of the electromagnetic noise source analysis and optimization method for the EPS motor drive system described in this invention.

[0024] Figure 2 This is a schematic diagram of the electromagnetic noise source analysis and optimization method for the EPS motor drive system described in Example 1;

[0025] Figure 3 This is a schematic diagram of the test environment for CE noise detection as described in Example 1;

[0026] Figure 4 This is a schematic diagram of the test principle for CE noise detection as described in Example 1;

[0027] Figure 5 This is a schematic diagram showing the voltage comparison between the switching node and the drive circuit as described in Example 1;

[0028] Figure 6 This is a schematic diagram comparing the noise levels of the switching node and the busbar as described in Example 1;

[0029] Figure 7 This is a schematic diagram of the high-frequency current path described in Example 1;

[0030] Figure 8 This is a schematic diagram of voltage ringing caused by loop inductance as described in Example 1;

[0031] Figure 9 This is a schematic diagram of the loop inductance simulation process described in Example 1;

[0032] Figure 10 This is a schematic diagram of the loop inductor simulation model based on Q3D described in Example 1;

[0033] Figure 11 This is a schematic diagram comparing the loop inductance before and after optimization as described in Example 1;

[0034] Figure 12 This is a schematic diagram comparing the ringing before and after reducing the circuit inductance as described in Example 1;

[0035] Figure 13 This is a schematic diagram of the high-frequency current path after adding RC Snubber as described in Example 1;

[0036] Figure 14 This is a schematic diagram comparing the ringing after adding RC Snubber as described in Example 1;

[0037] Figure 15 This is a schematic diagram comparing the busbar ringing before and after optimization as described in Example 1; Detailed Implementation

[0038] The following specific embodiments illustrate the implementation of the present invention. Those skilled in the art can fully understand other advantages and technical effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through different specific embodiments, and the details in this specification can also be applied based on different viewpoints, with various modifications or changes made without departing from the overall design concept of the invention. It should be noted that, unless otherwise specified, the following embodiments and features can be combined with each other. The following exemplary embodiments of the present invention can be implemented in many different forms and should not be construed as being limited to the specific embodiments set forth herein. It should be understood that these embodiments are provided to make the disclosure of the present invention thorough and complete, and to fully convey the technical solutions of these exemplary embodiments to those skilled in the art.

[0039] like Figure 1 As shown, this invention provides a method for analyzing and optimizing electromagnetic noise sources in an EPS motor drive system, including:

[0040] Step S1: Perform interference source testing according to the preset EMC test conditions of the steering system to identify the interference source in the EPS motor drive system that causes the conducted emission noise to exceed the standard; if the interference source is identified as the ringing of the MOSFET switch in the three-phase inverter circuit of the EPS motor drive system, proceed to step S2; otherwise, use other preset methods to locate the interference source and end.

[0041] Step S2: Analyze the characteristics of the noise source circuit of the EPS motor drive system, establish a simulation circuit, and reproduce the formation mechanism of excessive conducted emission noise caused by MOSFET switching ringing;

[0042] Step S3: Based on the simulation results, propose an optimization method to reduce conducted emission noise; the optimization method includes reducing the parasitic inductance of the noise source circuit.

[0043] Step S4: Modify the schematic diagram and PCB layout of the EPS motor drive system according to the optimization method, and perform conducted emission noise detection.

[0044] Example 1

[0045] This embodiment provides a detailed explanation of the electromagnetic noise source analysis and optimization method for the EPS motor drive system through detailed and specific examples.

[0046] like Figure 2 As shown, step S1 is specifically implemented through the CE noise test procedure of the electric drive system.

[0047] The interference source test includes a CE noise detection system, such as... Figure 3 As shown, the testing system consists of a KEYSIGHT@Infiniium MXR oscilloscope, a 12V vehicle battery, a BHSS@EPS assembly, a DC bus, a Tektronix@TPP0201 voltage probe, and an R&S@EZ-17 RF current clamp.

[0048] The first interface of the oscilloscope 31 is connected to one end of the coaxial cable 310, and the other end of the coaxial cable 310 is connected to the radio frequency current clamp 37, which clamps the positive terminal 38 of the DC bus. The second interface of the oscilloscope 31 is connected to a voltage probe 34, the third interface of the oscilloscope is connected to a voltage probe 35, and the fourth interface of the oscilloscope is connected to a voltage probe 36. One end of the positive DC bus 38 is connected to the positive terminal of the battery 32, and the other end of the positive DC bus 38 is connected to the positive terminal of the steering electronic control unit 33. One end of the negative DC bus 39 is connected to the negative terminal of the battery 32, and the other end of the negative DC bus 39 is connected to the negative terminal of the steering electronic control unit 33.

[0049] In this embodiment, the radio frequency current is clamped to the positive terminal of the DC bus.

[0050] Interference source testing was conducted according to the preset EMC test conditions for the steering system. Figure 4 This is a schematic diagram of the test principle for CE noise detection. Two voltage probes are used; voltage probe 34 measures the switching node SW. U Voltage probe 35 measuring chip driver port U hg The oscilloscope screen displays the measured voltage curve. U-phase switching node SW U With drive circuit voltage U hg For example Figure 5 As shown, when the drive terminal is high, the high-side MOS is turned on, and the switching node displays a high level. When the drive terminal is low, the high-side MOS is turned off, and the switching node displays a low level. Testing shows that the drive signal and the switching node waveform are synchronized in time, and the drive terminal U can normally drive the three-phase circuit.

[0051] Continue testing of phases V and W. Two voltage probes are used; voltage probe 34 measures the switching node SW. V Voltage probe 35 measures chip drive port V hg The oscilloscope screen displays the measured voltage curve to determine whether the drive terminal V can normally drive the three-phase circuit. Two voltage probes are used; voltage probe 34 measures the switching node SW. W Voltage probe 35 measuring chip driver port W hg The oscilloscope screen displays the measured voltage curve to determine whether the drive terminal W can drive the three-phase circuit normally.

[0052] Compare the drive signal and the switching node waveform. If they are synchronized in time, it means that the drive end can drive the three-phase circuit normally. Otherwise, check the three-phase drive circuit, retest and rectify it until the EPS product works normally and the two voltages are synchronized in time.

[0053] Furthermore, three voltage probes were used, with voltage probe 34 measuring the switching node SW. U Voltage probe 35 measures switch node SW V Voltage probe 36 measures switch node SW W Using an RF current clamp 37, the bus T was measured. B Noise voltage at the point. Test results are as follows: Figure 6 As shown, ringing noise occurs at the rising / falling edges of the switching node, and the two are synchronized in time. The MOSFETs in the inverter circuit generate a large number of high-order harmonics during switching, which are coupled to the DC bus via capacitive or inductive coupling. The RF current clamp detects this ringing noise on the DC bus. The experiment demonstrates that the three-phase inverter circuit is the main cause of CE exceeding the limit, and the switching node is the primary noise source.

[0054] Otherwise, the interference source is located, and then the interference source and noise path are optimized separately until the standard EMC certification test is passed. The interference source location methods include near-field testing, real-time spectrum analyzer monitoring, oscilloscope pre-testing, circuit breaking methods, shielding methods, etc. Appropriate instruments and tools are used comprehensively, multiple experiments are conducted, and various methods are employed to evaluate the experimental results, ultimately locating the interference source. The interference source and noise path optimization methods need to be tailored to the specific EMC problem being addressed.

[0055] Figure 2 The CE noise simulation optimization process includes steps S2 and S3.

[0056] Step S2: Analyze the noise source circuit characteristics of the EPS motor drive system, establish a simulation circuit, and reproduce the formation mechanism of excessive conducted emission noise caused by MOSFET switching ringing. The simulation circuit includes DC V in Filter capacitor C f High-side power switching device MOS1, low-side power switching device MOS2, switching node SW, load motor, high-side drive signal U hg Low-side drive signal U lg DC V in Parasitic inductance L between the filter capacitor and the drain D of MOS1 CD Parasitic inductance L of the source S of MOS1 SS1 Parasitic inductance L between the drain and D of MOS2 ss2 DC V in Parasitic inductance L between MOS2 CS .

[0057] Preferably, the switching device consists of a switching transistor, a diode, and an internal parasitic capacitance connected in parallel.

[0058] The DC V in The positive terminal and the filter capacitor C f One end, parasitic inductance L CD One end is connected to the other, the filter capacitor C f The other end is grounded, and the parasitic inductance L CD The other end is connected to the drain D of the switching device MOS1, and the source S of the switching device MOS1 is connected to the source parasitic inductance L. SS1 Connected, the source parasitic inductance L of MOS1 SS1 At the other end, the drain parasitic inductance L of MOS2 SS2 One end, connected to the motor, serves as a switching node SW, and the drain parasitic inductance L of MOS2. SS2 The other end is connected to the drain (D) of MOS2, and the source (S) of MOS2 is connected to the parasitic inductance (L). CS One end is connected, parasitic inductance L CS The other end is connected to the DC power supply V.in The negative terminals are connected.

[0059] like Figure 7 As shown, the simulation of the motor drive system is divided into two parts according to different switching states. The first part is the state where the high-side power switching device MOS1 is on and the low-side power switching device MOS2 is off. When V in and C f When MOS1 charges the switching node SW, the charge stored in the parasitic capacitance and inductance from the previous switching cycle also charges SW. These two current sources are the root cause of ringing on the rising edge.

[0060] Second, the high-side power switching device MOS1 is off, and the low-side power switching device MOS2 is on. At this time, MOS2 provides a low-impedance path for the current. When the load motor winding charges the switching node SW, the charge stored in the parasitic capacitance and parasitic inductance also charges SW. These two current sources are the root cause of ringing on the falling edge.

[0061] The ringing frequency is the series resonant point of the capacitor and inductor in the circuit. The ringing frequency can be obtained by calculating the series resonant point. The formula for the ringing frequency is as follows:

[0062]

[0063] In the formula, the total parasitic inductance in the high-frequency current loop is represented by L, the total parasitic capacitance in the high-frequency current loop is represented by C, and f1 represents the ringing frequency. The total parasitic capacitance C mainly consists of the parasitic capacitances within the two MOS transistors, and the total parasitic inductance L mainly includes the component lead / surface inductance, planar inductance, and internal parasitic inductance.

[0064] Change the parasitic inductance L and observe the voltage ringing change at the switching node SW. For example... Figure 8 As shown, the ringing of the switching node SW disappears when the parasitic inductance is ignored, but ringing appears when the parasitic inductance is considered. This is due to the series resonance characteristics of the capacitor and the inductor. The simulation results show that reducing the parasitic inductance L has the effect of suppressing ringing.

[0065] Step S3: Based on the simulation results, propose methods to reduce the ringing noise of the motor drive system, quantify the solution using simulation, and observe the effect of the proposed optimization method through simulation.

[0066] Furthermore, simulations show that reducing the parasitic inductance L helps suppress ringing. The parasitic parameters within a MOSFET are determined by the device characteristics and cannot be changed. The only variable parameters are the component lead / surface inductance and the planar inductance. The planar inductance can be optimized by directly modifying the PCB layout, making it the quickest, most convenient, and lowest-cost solution.

[0067] For multilayer PCB structures, evaluating loop inductance through measurement is complex, time-consuming, and has low accuracy. The tool used for simulating loop inductance is ANSYS Q3D. As a low-frequency electromagnetic field simulation tool, Q3D only considers conduction current and not displacement current, making it very suitable for extracting loop inductance from PCBs. The loop inductance simulation process is as follows: Figure 9 As shown, the simulation process includes: importing the ODB++ model into HFSS 3D Layout, simplifying the PCB model in HFSS 3D Layout, exporting the model to Q3D, setting the excitation source in Q3D, setting simulation parameters, and viewing the simulation results of the loop inductance. Figure 10 This is a schematic diagram of the circuit inductance simulation model described in this embodiment. Due to the high complexity of the full model, which reduces the simulation speed, it is necessary to delete the parts that are not related to the motor drive circuit before simulation.

[0068] In this embodiment, before optimizing the loop inductance, the U-phase loop inductance is 2.355nH, the V-phase loop inductance is 2.65nH, and the W-phase loop inductance is 2.83nH. Figure 11 The diagram shows a comparison of the loop inductance before and after optimization. CE certification testing requires consideration of test results in the 150kHz-108MHz range; therefore, the loop inductance simulation also needs to take this frequency band into account. After the revision and optimization, the loop inductance simulation was performed again. The U-phase loop inductance decreased by 1.33nH to 1.025nH; the V-phase loop inductance decreased by 1.515nH to 1.135nH; and the W-phase loop inductance decreased by 1.732nH to 1.098nH. Through Q3D simulation optimization, the final loop inductance was reduced by approximately 60%.

[0069] Furthermore, Figure 12 The diagram shows a comparison of ringing at point SW after reducing the loop inductance. Simulation results show that reducing the loop inductance significantly reduces the ringing amplitude at point SW. This is because the value of L before and after inductance optimization differs, leading to different LC resonant frequencies. Figure 12 The ringing frequencies before and after optimization are different. By comparing the noise spectrum and the voltage ringing of each circuit, the noise source can be located.

[0070] Furthermore, by adding an RC series snubber circuit, a grounding path is provided for the high-frequency current, reducing the oscillation period. Harmonics generated during switching flow directly into the ground plane through the series snubber circuit, thereby reducing the number of oscillations. Figure 13 The high-frequency current path diagram after adding RC snubber is shown. The high-frequency signal buffer circuit includes a series resistor R. S and series capacitor C S The series resistor R SOne end is connected to the switch node SW, and the other end is connected to the series capacitor C. S One end is connected in series with capacitor C. S The other end is connected to the circuit grounding point.

[0071] Furthermore, the series resistor R S The value is 4.7Ω, and the series capacitor C S Two conditions need to be met:

[0072] (1) The absorption frequency of the buffer circuit is greater than the oscillation frequency of the switching node.

[0073] (2) The conversion efficiency of the motor drive system shall not be lower than the preset efficiency.

[0074] The formula for the absorption frequency of the buffer circuit is as follows:

[0075]

[0076] The power loss formula for the buffer circuit is:

[0077]

[0078] Where Q represents the energy consumed by the RC snubber circuit. The voltage across the capacitor is represented by t, and the time of one switching cycle is represented by t.

[0079] The total energy provided in each switching cycle is:

[0080] W = V in *I*T

[0081] Where I represents the load current and T represents one switching cycle.

[0082] The conversion efficiency formula is:

[0083] E = Q / W

[0084] Adding a buffer circuit effectively alleviates voltage oscillations, but the charging and discharging process of the capacitor reduces the energy conversion efficiency of the motor drive system. Therefore, energy transfer efficiency needs to be considered when selecting the capacitor value to ensure that the transmission efficiency is above 90%. In this example, the capacitor is determined to be 6.8nF.

[0085] Furthermore, for the proposed optimization scheme, the more relevant parameters in the simulation circuit are re-simulated. Figure 14This diagram illustrates the comparison of ringing at point SW after adding an RC snubber circuit. As can be seen from the diagram, the number of voltage oscillations at point SW significantly decreases after adding the RC snubber circuit, and the ringing stabilizes after five oscillation cycles. This indicates that the high-frequency current is rapidly attenuated by passing through the RC series circuit to the ground plane. Simulation results demonstrate the effectiveness of the noise path optimization, significantly reducing ringing noise within the motor drive system.

[0086] The steps are as follows: modify the schematic and PCB layout according to the proposed optimization scheme, and test the modified product according to the proposed CE noise detection method for EPS motor drive system.

[0087] Figure 15 This is a schematic diagram comparing the bus ringing optimization before and after the implementation of the optimization scheme described in this invention. Before adopting the optimization scheme described in this invention, T... B The ringing noise at the point reached as high as 100mV. After redesigning and optimizing the schematic and PCB, the ringing noise became negligible, with an amplitude of only 20mV, submerged in higher-frequency but smaller-amplitude noise. This example uses a combination of simulation and testing to analyze the noise source, providing an effective optimization method, and the measured results show good consistency with the simulation results.

[0088] The present invention has been described in detail above through specific embodiments and examples, but these are not intended to limit the invention. Many modifications and improvements can be made by those skilled in the art without departing from the principles of the invention, and these should also be considered within the scope of protection of the present invention.

Claims

1. A method for analyzing and optimizing electromagnetic noise sources in an EPS motor drive system, characterized in that, include: Step S1: Perform interference source testing according to the preset EMC test conditions of the steering system to identify the interference sources in the EPS motor drive system that cause conducted emission noise to exceed the standard. If the interference source is identified as ringing of the MOSFET switch in the three-phase inverter circuit of the EPS motor drive system, proceed to step S2; otherwise, use other preset methods to locate the interference source and end the process. Step S2: Analyze the characteristics of the noise source circuit of the EPS motor drive system, establish a simulation circuit, and reproduce the formation mechanism of excessive conducted emission noise caused by MOSFET switching ringing; Step S3: Based on the simulation results, propose an optimization method to reduce conducted emission noise; the optimization method includes reducing the parasitic inductance of the noise source circuit. Step S4: Modify the schematic diagram and PCB layout of the EPS motor drive system according to the optimization method, and perform conducted emission noise detection.

2. The method for analyzing and optimizing electromagnetic noise sources in an EPS motor drive system according to claim 1, characterized in that, In step S1, the method for identifying whether the interference source is caused by ringing of the MOSFET switches in the three-phase inverter circuit of the EPS motor drive system is as follows: Determine whether the three-phase drive terminal can drive the three-phase circuit normally; if the drive terminal can drive the three-phase circuit normally, simultaneously measure the MOSFET switch node voltage and the noise voltage of the bus; compare the switch node voltage with the noise voltage to determine whether the noise ringing and the rising or falling edge of the switch node are synchronized. If they are synchronized in time, the interference source can be determined to be the MOSFET switch ringing in the three-phase inverter circuit of the EPS motor drive system.

3. The method for analyzing and optimizing electromagnetic noise sources in an EPS motor drive system according to claim 2, characterized in that, The method to determine whether the three-phase drive terminal can drive the three-phase circuit normally is as follows: Simultaneously measure the voltage at the MOSFET switching node and the three-phase drive terminal; compare the drive signal and the switching node waveform. If they are synchronized in time, it indicates that the drive terminal can drive the three-phase circuit normally.

4. The method for analyzing and optimizing electromagnetic noise sources in an EPS motor drive system according to claim 1, characterized in that, Other preset methods include near-field testing, real-time spectrum analyzer monitoring, oscilloscope pre-testing, circuit breaking method, or shielding method.

5. The method for analyzing and optimizing electromagnetic noise sources in an EPS motor drive system according to claim 1, characterized in that, In step S3, the parasitic inductance of the noise source circuit is reduced by changing the component lead wire or surface mount inductance and by changing the planar inductance.

6. The method for analyzing and optimizing electromagnetic noise sources in an EPS motor drive system according to claim 5, characterized in that, The planar inductance can be altered by changing the PCB layout design.

7. The method for analyzing and optimizing electromagnetic noise sources in an EPS motor drive system according to claim 1, characterized in that, In step S3, the optimization method further includes reducing conducted emission noise by adding a high-frequency signal buffer circuit.

8. The method for analyzing and optimizing electromagnetic noise sources in an EPS motor drive system according to claim 7, characterized in that, The high-frequency signal buffer circuit includes a series resistor R. S and series capacitor C S The series resistor R S One end is connected to the switch node SW, and the other end is connected to the series capacitor C. S One end is connected in series with capacitor C. S The other end is connected to the circuit grounding point.

9. The method for analyzing and optimizing electromagnetic noise sources in an EPS motor drive system according to claim 8, characterized in that, The series capacitor C S The following two conditions must be met: Condition 1: The absorption frequency of the buffer circuit is greater than the oscillation frequency of the switching node; Condition 2: The conversion efficiency of the motor drive system is not lower than the preset efficiency.

10. A method for reducing conducted emission noise caused by MOSFET switching ringing in a three-phase inverter circuit of an EPS motor drive system, characterized in that, Reduce the parasitic inductance of the noise source circuit, or add a high-frequency signal buffer circuit.

11. The method for reducing conducted emission noise caused by MOSFET switching ringing in the three-phase inverter circuit of an EPS motor drive system according to claim 10, characterized in that, Parasitic inductance in noise source circuits can be reduced by changing component lead or surface mount inductance, as well as by changing planar inductance.

12. The method for reducing conducted emission noise caused by MOSFET switching ringing in the three-phase inverter circuit of an EPS motor drive system according to claim 10, characterized in that, The high-frequency signal buffer circuit includes a series resistor R. S and series capacitor C S The series resistor R S One end is connected to the switch node SW, and the other end is connected to the series capacitor C. S One end is connected in series with capacitor C. S The other end is connected to the circuit ground point; the series capacitor C S The following two conditions must be met: Condition 1, the absorption frequency of the buffer circuit is greater than the oscillation frequency of the switching node; Condition 2, the conversion efficiency of the motor drive system is not lower than the preset efficiency.

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