Surge current suppression circuit

Abstract

The surge current suppression circuit comprises an auxiliary power supply module, a constant current control module, a voltage-controlled current source module, a current acquisition module and an equivalent load module, the equivalent load module, the voltage-controlled current source module and the current acquisition module are sequentially connected in series in a circuit, the input end of the equivalent load module is connected with a power supply positive electrode Vin +, and the output end of the current acquisition module is connected with the input end of the constant current control module and a power supply negative electrode Vin-. The input end of the constant current control module is connected with the output end of the auxiliary power supply module, and the output end of the constant current control module is connected with the input end of the voltage-controlled current source module. Surge current is suppressed in the circuit, when a capacitor exists in a post-stage load, the capacitor in a post-stage circuit can be charged, meanwhile, the requirement for on-load starting is met, and a post-stage time sequence does not need to be controlled.

Description

Technical Field

[0001] This invention relates to the field of electronic circuit technology, and in particular to a surge current suppression circuit. Background Technology

[0002] According to relevant technologies, surge current refers to the instantaneous and drastic change in current in a power system caused by factors such as load connection, equipment startup, switching operation, or power fluctuations. It is typically characterized by a rapid increase in current, exceeding the normal current by several times or even tens of times, and lasting for several milliseconds to several seconds.

[0003] Surge current is mainly caused by the following situations: ① When a load is connected to the power supply: When a new load is suddenly connected to the power supply, the current will increase sharply in a short period of time, forming a surge current. ② When equipment starts up: If motors, inductive loads, transformers, and other equipment start up, due to the characteristics of components such as resistors and inductors, a large current will be generated for a short period of time. ③ Switching operations: Switching of electrical equipment, relay switching, and other operations may also cause sudden fluctuations in current. ④ External electromagnetic interference: Such as lightning, equipment failure, etc., may cause current surges in the system.

[0004] The effects of surge currents on power systems and equipment include: ① Equipment damage: Surge currents can cause overload or burnout of electrical components (capacitors, resistors, integrated circuits, etc.) within equipment. ② Power system instability: Surge currents may cause voltage fluctuations, affecting the stability of the entire power system. ③ Data loss or malfunction: In computers or precision electronic equipment, surge currents may lead to data loss, malfunction, or equipment failure. ④ Electromagnetic interference (EMI): Surge currents may generate strong electromagnetic radiation, interfering with other surrounding electronic equipment.

[0005] Currently, the main technical means to suppress surge current include the following: ① Negative temperature coefficient thermistors (NTC): By connecting a thermistor in series in the main circuit, the amplitude of the surge circuit is limited. ② Delayed soft-start circuit: By connecting a fixed blocking resistor in series in the main circuit, and during the switching process with a switch connected in parallel across the resistor, the switching device closes after a delay at one end, thus limiting the current during equipment startup and reducing the generation of surge current.

[0006] Despite the existence of numerous surge current suppression technologies, several limitations remain: ① Power limitation: Some surge current suppression devices have limited power handling capacity, and prolonged high current can damage the components; ② Wide frequency range: Some suppression technologies may only be effective within a specific frequency range, while surge currents have a wide frequency range, meaning they cannot comprehensively suppress surge currents; ③ Size and cost: Some high-efficiency surge current suppression modules are large or expensive, limiting their use in low-cost or space-constrained applications.

[0007] In circuits without surge suppression technology, the presence of capacitors in the downstream load will generate a large inrush current when the load is connected to the circuit, interfering with the power supply circuit. Figure 1 As shown, when switch SW1 is closed, I1 in the circuit will generate a large impact on the circuit. The reason for this is that there are components such as capacitors in the load, which cause overcharging of the circuit. Simulation is performed based on the current, and the simulation results are as follows. Figure 2 As shown, an inrush current of approximately 850A was generated. When a capacitor is present in the circuit, connecting the circuit to the power supply circuit will generate a very large inrush current. When an excessively large inrush current is generated, it will cause a great impact and interference to the power supply circuit, leading to power supply circuit failure. The large current generated by the transient will generate extremely strong electromagnetic interference to nearby chips, causing various electromagnetic compatibility problems. Therefore, it is necessary to suppress the inrush current to protect the electrical components in the circuit.

[0008] The core of the existing technology is a delayed start-up circuit. It delays the turn-on of the MOSFET, uses a parallel resistor to pre-charge the downstream load capacitor, and turns on the MOSFET after a period of charging, thus fully powering on the circuit. Figure 3 As shown, the specific principle is as follows: When SW1 is closed, it is equivalent to the input switch being closed. At this time, due to the presence of capacitors in the equivalent load C1 and R1, C1 is equivalent to a circuit at the instant SW1 is turned on. At this time, a current I1 will be generated in the circuit. The existing technology connects a resistor R2 in series in the circuit to suppress the surge current peak when the power is first turned on. Therefore, the maximum current in the circuit is:

[0009] I1 = Vdc1 / R2

[0010] When the circuit is powered on, the delayed start circuit is powered on synchronously. The Vg drive signal output by the delayed start control circuit will be output within 50ms, driving Q1 to turn on, reducing circuit dissipation, and completing the power-on. At this time, due to the presence of load current in the equivalent load:

[0011] I1 = Vdc / (R1 + R2)

[0012] Because of the load current, a voltage will be generated across resistor R2. When Q1 is turned on, this will cause a change in the voltage across capacitor C1, meaning C1 will undergo secondary charging. This will result in a secondary inrush current, such as... Figure 4 As shown.

[0013] However, in existing technologies, the downstream load cannot be started under load. When there is a load in the downstream stage, there is always a voltage drop across the pre-charge resistor. When the MOSFET connected in parallel with the pre-charge resistor closes, it will cause a large and uncontrollable secondary inrush current. The larger the downstream load, the larger the inrush current. Figure 5 and Figure 6 As shown, when the load changes in the downstream stage, the surge current suppression circuit will not be able to fully match, causing the inrush current to exceed the limit. Summary of the Invention

[0014] The present invention aims to at least solve one of the technical problems existing in the prior art. To this end, the present invention proposes a surge current suppression circuit that suppresses surge current in the circuit, and when there is a capacitor in the downstream load, it can charge the capacitor in the downstream circuit, while meeting the requirements for load start-up, without the need to control the timing of the downstream stage.

[0015] To achieve the purpose of this invention, a surge current suppression circuit is provided, comprising an auxiliary power supply module, a constant current control module, a voltage-controlled current source module, a current acquisition module, and an equivalent load module; the equivalent load module, the voltage-controlled current source module, and the current acquisition module are connected in series in the circuit; the input terminal of the equivalent load module is connected to the positive terminal Vin+ of the power supply; the output terminal of the current acquisition module is connected to the input terminal of the constant current control module and the negative terminal Vin- of the power supply, respectively; the input terminal of the constant current control module is connected to the output terminal of the auxiliary power supply module; and the output terminal of the constant current control module is connected to the input terminal of the voltage-controlled current source module.

[0016] In some embodiments, the equivalent load module of the present invention includes an electrolytic capacitor C and a resistor R, wherein the electrolytic capacitor C and the resistor R are connected in parallel in the circuit, wherein one end of the resistor R is connected to the positive terminal Vin+ of the DC270V bus power supply, and the other end is connected to the input terminal of the voltage-controlled current source module.

[0017] In some embodiments, the auxiliary power supply module of the present invention includes a voltage regulator U2, resistors R9, R10, R11, and R12, capacitors C4 and C5, and diode D1; wherein, pin 1 of the voltage regulator U2 is connected to the power input terminal VIN+ through resistor R9; pin 2 of the voltage regulator U2 is connected to pin 1 of the voltage regulator U2 through diode D1; pin 2 of the voltage regulator U2 is connected to the negative terminal Vin- of the power supply through resistors R10 and R11 in sequence; pin 3 of the voltage regulator U2 is connected in the circuit between resistors R10 and R11; one end of resistor R12, capacitor C4, and capacitor C5 is connected to pin 2 of the voltage regulator U2, and the other end is connected to the negative terminal Vin- of the power supply.

[0018] 4. In some embodiments, the constant current control module of the present invention includes an operational amplifier U1, resistors R1, R2, and R3, and capacitors C1, C2, and C3; wherein, pin 1 of the operational amplifier U1 is connected to pin 4 of the operational amplifier U1 through capacitor C2, and is also connected to the input terminal of the voltage-controlled current source; pin 2 of the operational amplifier U1 is grounded, and is also connected to pin 5 of the operational amplifier U1 through capacitor C3; pin 3 of the operational amplifier U1 is grounded through capacitor C1; resistor R2 is connected in parallel with capacitor C2; resistor R2 is connected to the positive terminal Vin+ of the power supply through resistor R1, diode D1, and resistor R9 in sequence; pin 4 of the operational amplifier U1 is connected to the input terminal of the voltage-controlled current source module through resistor R3; and pin 5 of the operational amplifier U1 is connected to the positive terminal of diode D1.

[0019] In some embodiments, the current acquisition module of the present invention is a shunt, a sampling resistor, an isolation operational amplifier, a linear optocoupler, a Hall sensor, or a current transformer.

[0020] In some embodiments, the current acquisition circuit of the present invention is a sampling resistor R7.

[0021] In some embodiments, the voltage-controlled current source module of the present invention is mainly composed of multiple field-effect transistors connected in parallel. The gate of each field-effect transistor is connected in series with a resistor, and each of the resistors is connected in parallel and connected to pin 1 of the operational amplifier U1 in the constant current control module. The source of each field-effect transistor is connected in parallel and connected to one end of the sampling resistor R7, and also to the resistor R3. The other end of the sampling resistor R7 is connected to pin 5 of U1 through the capacitor C3, and also to the negative terminal Vin- of the power supply. The drain of each field-effect transistor is connected in parallel to the output terminal of the equivalent load module.

[0022] In some embodiments, the voltage-controlled current source module of the present invention is provided with four field-effect transistors, namely field-effect transistors Q1, Q2, Q3 and Q4. The field-effect transistors Q1, Q2, Q3 and Q4 are connected in series with resistors R4, R5, R6 and R8 respectively. The resistors R4, R5, R6 and R8 are connected in parallel and then connected to pin 1 of the operational amplifier U1 in the constant current control module.

[0023] Compared with existing technologies, this invention utilizes the voltage-controlled current source characteristics of MOSFETs to collect loop current and use control current for closed-loop load control, thereby achieving stable control of the current in the loop. At the same time, it uses constant current to charge the equivalent capacitance in the downstream load, preventing multiple inrush currents during the entire charging process and enabling load-bearing start-up. The downstream load circuit does not require timing control, which speeds up the charging process and protects the load in the circuit, extending the load's lifespan.

[0024] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0025] Figure 1 It is an equivalent circuit that does not use surge suppression technology;

[0026] Figure 2 The simulation results are from a circuit that does not use surge suppression technology.

[0027] Figure 3 This is an equivalent principle diagram of existing surge suppression technology;

[0028] Figure 4 It is the voltage circuit waveform during the startup process of the existing circuit;

[0029] Figure 5 The existing circuit startup voltage and current waveforms Figure 1 ;

[0030] Figure 6 The existing circuit startup voltage and current waveforms Figure 2 ;

[0031] Figure 7 This is an electrical block diagram of a surge current suppression circuit according to an embodiment of the present invention;

[0032] Figure 8 This is a circuit diagram of a surge current suppression circuit according to an embodiment of the present invention;

[0033] Figure 9 This is an equivalent simulation circuit diagram of a surge current suppression circuit according to an embodiment of the present invention;

[0034] Figure 10 This is an equivalent simulation circuit diagram of the constant current control module of the surge current suppression circuit according to an embodiment of the present invention;

[0035] Figure 11 This is a voltage and current waveform during the startup process of a surge current suppression circuit according to an embodiment of the present invention. Figure 1 ;

[0036] Figure 12 This is a voltage and current waveform during the startup process of a surge current suppression circuit according to an embodiment of the present invention. Figure 2 ;

[0037] Figure 13 This is a measured waveform diagram of a surge current suppression circuit according to an embodiment of the present invention. Detailed Implementation

[0038] Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain the present invention, and should not be construed as limiting the present invention.

[0039] The following disclosure provides numerous different embodiments or examples for implementing various structures of the invention. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the invention. Furthermore, reference numerals and / or letters may be repeated in different examples. Such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. Additionally, examples of various specific processes and materials are provided in this invention; however, those skilled in the art will recognize the applicability of other processes and / or the use of other materials.

[0040] The following is for reference. Figures 7 to 13 A surge current suppression circuit according to an embodiment of the present invention is described, with reference to... Figure 7 As shown, the surge current suppression circuit includes an auxiliary power supply circuit, a constant current control current, a voltage-controlled current source module, a current acquisition circuit, and an equivalent load module. The equivalent load module, the voltage-controlled current source module, and the current acquisition module are connected in series in the circuit. The input terminal of the equivalent load module is connected to the positive terminal Vin+ of the power supply. The output terminal of the current acquisition module is connected to the input terminal of the constant current control module and the negative terminal Vin- of the power supply, respectively. The input terminal of the constant current control module is connected to the output terminal of the auxiliary power supply module, and the output terminal of the constant current control module is connected to the input terminal of the voltage-controlled current source module.

[0041] refer to Figure 7 As shown, specifically, the equivalent load module in this embodiment includes an electrolytic capacitor C and a resistor R. The electrolytic capacitor C and the resistor R are connected in parallel in the circuit. One end of the resistor R is connected to the DC270V bus power input terminal, and the other end is connected to the Vout- port of the voltage-controlled current source module. In this embodiment, the Vout- port can also be defined as the input terminal according to the current direction, which is the current inflow pin.

[0042] refer to Figure 8As shown, in some embodiments, the auxiliary power supply module of the present invention includes a voltage regulator U2, resistors R9, R10, R11, and R12, capacitors C4 and C5, and diode D1; wherein, pin 1 of the voltage regulator U2 is connected to the power input terminal VIN+ through resistor R9; pin 2 of the voltage regulator U2 is connected to pin 1 of the voltage regulator U2 through diode D1; pin 2 of the voltage regulator U2 is connected to the negative terminal Vin- of the power supply through resistors R10 and R11 in sequence; pin 3 of the voltage regulator U2 is connected in the circuit between resistors R10 and R11; one end of resistor R12, capacitor C4, and capacitor C5 is connected to pin 2 of the voltage regulator U2, and the other end is connected to the negative terminal Vin- of the power supply.

[0043] In this embodiment, the auxiliary power supply module provides feedback voltage to the voltage regulator U2 through a voltage divider using resistors R10 and R11, thereby setting its output voltage level VOUT. The output of voltage regulator U2, through two filter capacitors C4 and C5, provides a stable operating power supply to the subsequent constant current control circuit, ensuring the performance of the subsequent circuit.

[0044] refer to Figure 8 As shown, in some embodiments, the constant current control module of the present invention calculates the output current through operational amplifier U1, forms a negative feedback circuit based on the output current, and controls the output voltage through feedback. This circuit specifically includes operational amplifier U1, resistors R1, R2, and R3, and capacitors C1, C2, and C3. Pin 1 of operational amplifier U1 is connected to pin 4 of operational amplifier U1 via capacitor C2, and is also connected to the input terminal of the voltage-controlled current source. Pin 2 of operational amplifier U1 is grounded and connected to pin 5 of operational amplifier U1 via capacitor C3. Pin 3 of operational amplifier U1 is grounded via capacitor C1. Resistor R2 is connected in parallel with capacitor C2. Resistor R2 is connected to the positive terminal Vin+ of the power supply via resistor R1, diode D1, and resistor R9. Pin 4 of operational amplifier U1 is connected to the input terminal of the voltage-controlled current source module via resistor R3, and pin 5 of operational amplifier U1 is connected to the positive terminal of diode D1.

[0045] In some embodiments, the current acquisition circuit of the present invention is implemented by a device connected in series in the main circuit. The sampling circuit can be implemented in the form of a shunt, a sampling resistor, an isolation operational amplifier, a linear optocoupler, a Hall sensor, a current transformer, etc., to convert the current in the circuit into a voltage or current signal and transmit the signal to the constant current control circuit. In this embodiment, the sampling resistor R7 is preferred to realize current acquisition, which is low in cost and high in stability.

[0046] refer to Figure 8As shown, in some embodiments, the voltage-controlled current source module of the present invention mainly utilizes the device characteristics of MOSFETs. Multiple MOSFETs can be connected in parallel according to the current requirements and charging voltage drop dissipation. This module mainly consists of multiple MOSFETs connected in parallel. Each MOSFET's gate is connected in series with a resistor, and each resistor, after being connected in parallel, is connected to pin 1 of the operational amplifier U1 in the constant current control module. The sources of each MOSFET, after being connected in parallel, are connected to one end of the sampling resistor R7 and simultaneously to resistor R3. The other end of the sampling resistor R7 is connected to pin 5 of U1 through capacitor C3 and simultaneously to the negative power supply Vin-. The drains of each MOSFET, after being connected in parallel, serve as the Vout- port connected to the output terminal of the equivalent load module.

[0047] For details, please refer to Figure 8 As shown, this embodiment has four field-effect transistors, namely field-effect transistors Q1, Q2, Q3 and Q4. The field-effect transistors Q1, Q2, Q3 and Q4 are connected in series with resistors R4, R5, R6 and R8 respectively. The resistors R4, R5, R6 and R8 are connected in parallel and then connected to pin 1 of the operational amplifier U1 in the constant current control module.

[0048] refer to Figure 9 The diagram shows the equivalent circuit simulation for this embodiment. In the diagram, DC1 is the equivalent input voltage source, i.e., the DC270V bus. Capacitor C11 and resistor R11 (corresponding to...) Figure 7 The capacitor and resistor in the circuit are connected in parallel to form the equivalent load circuit. SW1 is the control switch, which powers on the control loop. Resistor Rs is the current sampling resistor (corresponding to...). Figure 8 The circuit uses resistor R7, and the voltage generated by the current flowing through the current sampling resistor Rs reflects the current in the circuit. Q5 is a voltage-controlled current source module, and the main circuit current is controlled by controlling the Vgs voltage of Q5.

[0049] refer to Figure 10 The diagram shown is the equivalent simulation circuit diagram of the constant current control circuit. Vref is the input reference voltage of the operational amplifier OP1, Vref / Rs = the designed current limit value, resistor R13 introduces current feedback, capacitor C12 introduces single-pole feedback for the control loop, and resistor R13 prevents the output of the operational amplifier circuit from oscillating.

[0050] refer to Figure 11 and Figure 12 The diagram shown is a simulation result of the circuit in this implementation. Figure 11 The voltage and current waveforms during the startup process of this implementation circuit are shown below. Figure 1 , Figure 12 The voltage and current waveforms during the circuit startup process in this embodiment are shown. Figure 2 .

[0051] refer to Figure 13As shown, the actual circuit test was performed according to the circuit of this embodiment. The yellow waveform is the voltage waveform across the load capacitor, and the blue waveform is the loop current waveform, which is consistent with the circuit design and simulation results of this embodiment.

[0052] This embodiment uses constant current to charge the equivalent capacitance in the downstream load. There will be no multiple inrush currents during the entire charging process, and it can start under load. The downstream load circuit does not need to be controlled by timing, and the charging speed is significantly better than the traditional method.

[0053] contrast Figure 5 and Figure 11 , Figure 6 and Figure 12 Under the same load conditions, the circuit in this embodiment will not experience multiple inrush currents, and the charging speed is significantly better than that of the existing technology. Furthermore, the existing technology has excessive inrush currents during load start-up, which cannot meet the requirements. The circuit in this embodiment is constant current controlled and has no inrush currents, which has obvious advantages.

[0054] This invention utilizes the voltage-controlled current source characteristics of a MOSFET to collect the loop current and use the control current for closed-loop negative feedback control, thereby achieving stable control of the current in the loop to meet the requirements.

[0055] The remaining components of the surge current suppression circuit according to embodiments of the present invention, such as voltage regulators, operational amplifiers, resistors, capacitors, etc., and their operation, are known to those skilled in the art and will not be described in detail here.

[0056] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0057] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0058] In this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection, an electrical connection, or a communication connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0059] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "over," and "on top" of the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0060] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0061] Although embodiments of the invention have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.

Claims

1. A surge current suppression circuit, characterized in that, It includes an auxiliary power supply module, a constant current control module, a voltage-controlled current source module, a current acquisition module, and an equivalent load module; The equivalent load module, the voltage-controlled current source module, and the current acquisition module are connected in series in the circuit. The input terminal of the equivalent load module is connected to the positive terminal Vin+ of the power supply. The output terminal of the current acquisition module is connected to the input terminal of the constant current control module and the negative terminal Vin- of the power supply, respectively. The input terminal of the constant current control module is connected to the output terminal of the auxiliary power supply module. The output terminal of the constant current control module is connected to the input terminal of the voltage-controlled current source module.

2. The surge current suppression circuit according to claim 1, characterized in that, The equivalent load module includes an electrolytic capacitor C and a resistor R, which are connected in parallel in the circuit. One end of the resistor R is connected to the positive terminal Vin+ of the DC270V bus power supply, and the other end is connected to the Vout- port of the voltage-controlled current source module.

3. The surge current suppression circuit according to claim 1, characterized in that, The auxiliary power supply module includes a voltage regulator U2, resistors R9, R10, R11, and R12, capacitors C4 and C5, and a diode D1. Specifically, pin 1 of voltage regulator U2 is connected to the power input terminal VIN+ through resistor R9; pin 2 of voltage regulator U2 is connected to pin 1 of voltage regulator U2 through diode D1; pin 2 of voltage regulator U2 is connected to the negative terminal Vin- of the power supply through resistors R10 and R11 in sequence; pin 3 of voltage regulator U2 is connected in the circuit between resistors R10 and R11; one end of resistor R12, capacitor C4, and capacitor C5 are connected to pin 2 of voltage regulator U2, and the other end is connected to the negative terminal Vin- of the power supply.

4. The surge current suppression circuit according to claim 1, characterized in that, The constant current control module includes an operational amplifier U1, resistors R1, R2, and R3, and capacitors C1, C2, and C3. Specifically, pin 1 of operational amplifier U1 is connected to pin 4 of operational amplifier U1 via capacitor C2, and is also connected to the input terminal of the voltage-controlled current source. Pin 2 of operational amplifier U1 is grounded, and is also connected to pin 5 of operational amplifier U1 via capacitor C3. Pin 3 of operational amplifier U1 is grounded via capacitor C1. Resistor R2 is connected in parallel with capacitor C2, and resistor R2 is connected to the positive terminal Vin+ of the power supply via resistor R1, diode D1, and resistor R9. Pin 4 of operational amplifier U1 is connected to the input terminal of the voltage-controlled current source module via resistor R3, and pin 5 of operational amplifier U1 is connected to the positive terminal of diode D1.

5. A surge current suppression circuit according to claim 1, characterized in that, The current acquisition module is a shunt, sampling resistor, isolation operational amplifier, linear optocoupler, Hall sensor or current transformer.

6. A surge current suppression circuit according to claim 5, characterized in that, The current acquisition circuit is a sampling resistor R7.

7. A surge current suppression circuit according to claim 6, characterized in that, The voltage-controlled current source module is mainly composed of multiple field-effect transistors connected in parallel. The gate of each field-effect transistor is connected in series with a resistor, and the parallel connection of each resistor is connected to pin 1 of the operational amplifier U1 in the constant current control module. The sources of each field-effect transistor are connected in parallel and then connected to one end of the sampling resistor R7, and simultaneously connected to the resistor R3. The other end of the sampling resistor R7 is connected to pin 5 of U1 through the capacitor C3, and simultaneously connected to the negative terminal Vin- of the power supply. The drains of each field-effect transistor are connected in parallel and then used as the Vout- port to connect to the output terminal of the equivalent load module.

8. A surge current suppression circuit according to claim 7, characterized in that, The voltage-controlled current source module is equipped with four field-effect transistors, namely field-effect transistors Q1, Q2, Q3 and Q4. Each of the field-effect transistors Q1, Q2, Q3 and Q4 is connected in series with resistors R4, R5, R6 and R8 respectively. The resistors R4, R5, R6 and R8 are connected in parallel and then connected to pin 1 of the operational amplifier U1 in the constant current control module.

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