Ultra-high gain non-isolated DC-DC converter based on Sepic structure

Abstract

The invention discloses an ultrahigh gain non-isolated DC-DC (Direct Current-Direct Current) converter based on a Sepic structure. Comprising a DC power supply, a switching tube, a coupling inductor unit, an input energy storage inductor, a first energy storage capacitor, a second energy storage capacitor, a third energy storage capacitor, a fourth energy storage capacitor, a fifth energy storage capacitor, an output energy storage capacitor, a first diode, a second diode, a third diode, a fourth diode, an output diode and a load unit. The coupling inductor unit comprises a first coupling inductor, a second coupling inductor, a third coupling inductor, an excitation inductor and a leakage inductor; the input energy storage inductor, the first energy storage capacitor, the second energy storage capacitor, the first diode, the first coupling inductor and the second coupling inductor form a Sepic structure; the second diode, the third diode, the fourth diode, the third energy storage capacitor, the fourth energy storage capacitor, the fifth energy storage capacitor, the first coupling inductor and the second coupling inductor N2 form a plurality of voltage-multiplying units.

Description

Technical Field

[0001] This invention belongs to the technical field of DC-DC conversion equipment, specifically relating to an ultra-high gain non-isolated DC-DC converter based on the Sepic structure. Background Technology

[0002] To alleviate the environmental and resource problems caused by fossil fuels, renewable energy is developing rapidly. New energy sources such as photovoltaics and fuel cells have low output voltages due to their inherent characteristics; therefore, a boost converter capable of stable output is needed to meet grid connection requirements.

[0003] Xuefeng Hu et al. proposed a DC-DC converter with a three-winding coupled-inductor DC-DC converter topology with high voltage gain and reduced switch stress in their paper "A Three-Winding Coupled-Inductor DC-DC Converter Topology with High Voltage Gain and Reduced Switch Stress". However, this converter does not fully utilize the transformer's step-up capability.

[0004] In their paper "A New Three-Winding Coupled Inductor High Step-Up DC-DC Converter Integrating With Switched-Capacitor Technique", Tao Jin et al. proposed an improved DC-DC converter based on a quasi-Z source structure. This converter has lower switching voltage stress and a larger duty cycle variable range. However, the converter has limited boost capability, and a larger duty cycle is required to achieve higher boost for low input voltage scenarios.

[0005] Sara Hasanpour et al., in their paper "Analysis of a New Soft-Switched Step-Up Trans-Inverse DC / DC Converter Based on Three-Winding Coupled-Inductor," proposed a modified Sepic-based DC-DC converter. This converter features low input current ripple, quasi-resonant switching current, and soft-switching capability for some switching devices. However, its boost capability is insufficient, failing to achieve high boost voltage under suitable duty cycle and turns ratio conditions.

[0006] In summary, a DC-DC converter with low input current ripple, low switching voltage stress, high boost capability, and reasonable transformer utilization has good application scenarios. Summary of the Invention

[0007] This invention aims to address the shortcomings of existing technologies and provides the following solutions:

[0008] An ultra-high gain non-isolated DC-DC converter based on Sepic architecture, comprising: a DC power supply V g Switching transistor, coupling inductor unit, input energy storage inductor L1, first energy storage capacitor C1, second energy storage capacitor C2, third energy storage capacitor C3, fourth energy storage capacitor C4, fifth energy storage capacitor C5, output energy storage capacitor C o Diode D1, Diode D2, Diode D3, Diode D4, Output Diode D o and load unit;

[0009] The coupled inductor unit includes: a first coupled inductor N1, a second coupled inductor N2, a third coupled inductor N3, and a magnetizing inductor L. m and leakage L k ;

[0010] The input energy storage inductor L1, the first energy storage capacitor C1, the second energy storage capacitor C2, the first diode D1, the first coupling inductor N1, and the second coupling inductor N2 constitute a Sepic structure;

[0011] The second diode D2, the third diode D3, the fourth diode D4, the third energy storage capacitor C3, the fourth energy storage capacitor C4, the fifth energy storage capacitor C5, and the third coupling inductor N3 constitute several voltage multiplier units.

[0012] Preferably, the DC power supply V g The positive terminal is connected to one end of the input energy storage inductor L1, and the other end of the energy storage inductor L1 is connected to the common point of the negative terminal of the first diode D1, the first energy storage capacitor C1 and the drain of the switching transistor S.

[0013] The cathode of the first diode D1 is connected to the negative terminal of the fourth energy storage capacitor C4 and the leakage inductance L, respectively. k One end of the first energy storage capacitor C1 is connected to the common point of the positive terminal of the fifth energy storage capacitor C5. The positive terminal of the first energy storage capacitor C1 is connected to the common point of the anode of the second diode D2 and the same-name terminal of the second coupling inductor N2. The cathode of the second diode D2 is connected to the common point of the negative terminal of the third energy storage capacitor C3 and the opposite-name terminal of the third coupling inductor N3.

[0014] The negative terminal of the second energy storage capacitor C2 is connected to the common point of the opposite terminals of the first coupling inductor N1 and the second coupling inductor N2. The positive terminal of the second energy storage capacitor is connected to the common point of the opposite terminal of the third coupling inductor N3 and the anode of the third diode D3. The cathode of the third diode D3 is connected to the common point of the positive terminal of the fourth energy storage capacitor C4 and the anode of the fourth diode D4. The cathode of the fourth diode D4 is connected to the positive terminal of the third energy storage capacitor C3 and the output diode D4. o The common point of the anode is connected, and the output diode D o The cathodes are respectively connected to the output energy storage capacitor C o The positive terminal of the load R is connected to the common point of the positive terminal of the load R, and the negative terminal of the load R is connected to the output energy storage capacitor C. o The negative terminal of the transistor, the negative terminal of the fifth energy storage capacitor C5, the source terminal of the switching transistor, and the DC power supply V g The negative terminal connection.

[0015] Preferably, the switching transistor includes: an N-channel MOSFET (S) and a diode (D). s and buffer capacitor C s The diode Ds and the buffer capacitor Cs are connected in parallel;

[0016] The cathode of the diode Ds is connected to the anode of the buffer capacitor Cs and the drain of the N-channel MOS transistor S, respectively, and the anode of the diode Ds is connected to the cathode of the buffer capacitor Cs and the source of the N-channel MOS transistor S, respectively.

[0017] Preferably, the gate of the switching transistor is connected to a control signal from an external controller to control the switching transistor's on and off states.

[0018] Preferably, the turns ratio of the first coupling inductor N1, the second coupling inductor N2, and the third coupling inductor N3 is 1:n1:n2, where n1 = T N2 :T N1 n2 = T N3 :T N1 T N1 T represents the number of turns of the first coupled inductor N1. N2 T represents the number of turns of the second coupled inductor N2. N3 This indicates the number of turns of the third coupling inductor N3.

[0019] Preferably, the external controller is a TMS320F28335 DSP control chip.

[0020] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0021] (1) The converter of the present invention selects a three-winding coupled inductor to transmit energy. Instead of adjusting the voltage gain by a single duty cycle D, the voltage gain is adjusted by three control factors: duty cycle D and the turns ratio n1 and n2 of the coupled inductor, thus realizing flexible adjustment of the voltage gain.

[0022] (2) The converter stage of the present invention adopts a method of integrating multiple voltage-receiving units to further improve the boost capability of the converter. Compared with the method of directly stacking voltage-receiving units, it can reduce the number of capacitors and diodes to a certain extent.

[0023] (3) The converter of the present invention is based on the Sepic structure and has the advantages of low input current ripple and low voltage stress of the switching transistor. By constructing a resonant circuit of Sepic and coupled inductor, the current of the switching transistor is made to present a quasi-resonant state, and at the same time, some switching devices can realize soft switching.

[0024] (4) The converter of the present invention utilizes a passive clamping unit to reduce the voltage stress of the switching transistor, and at the same time makes reasonable use of the capacitor in the passive clamping unit to improve the voltage gain of the converter. Attached Figure Description

[0025] To more clearly illustrate the technical solution of the present invention, the drawings used in the embodiments are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0026] Figure 1 This is a schematic diagram of the circuit structure according to an embodiment of the present invention;

[0027] Figure 2 This is a schematic diagram of the switching transistor control signal according to an embodiment of the present invention;

[0028] Figure 3 This is a schematic diagram of the power switch transistor's on-state operation according to an embodiment of the present invention;

[0029] Figure 4 This is a schematic diagram of the power switch transistor in the off-state operation according to an embodiment of the present invention.

[0030] Figure 5 This is a graph showing the relationship between converter voltage gain and duty cycle in an embodiment of the present invention.

[0031] Figure 6 This is a graph showing the relationship between the converter voltage gain and turns ratio in an embodiment of the present invention.

[0032] Figure 7 The image shows a Saber simulation of the converter in an embodiment of the present invention. Detailed Implementation

[0033] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0034] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0035] Example

[0036] In this embodiment, as Figure 1 As shown, an ultra-high gain non-isolated DC-DC converter based on a Sepic structure includes: a DC power supply V g Switching transistor, coupling inductor unit, input energy storage inductor L1, first energy storage capacitor C1, second energy storage capacitor C2, third energy storage capacitor C3, fourth energy storage capacitor C4, fifth energy storage capacitor C5, output energy storage capacitor C o Diode D1, Diode D2, Diode D3, Diode D4, Output Diode D o And load units.

[0037] The coupled inductor unit includes: a first coupled inductor N1, a second coupled inductor N2, a third coupled inductor N3, and a magnetizing inductor L. m and leakage L k .

[0038] The input energy storage inductor L1, the first energy storage capacitor C1, the second energy storage capacitor C2, the first diode D1, the first coupling inductor N1, and the second coupling inductor N2 constitute a Sepic structure.

[0039] The second diode D2, the third diode D3, the fourth diode D4, the third energy storage capacitor C3, the fourth energy storage capacitor C4, the fifth energy storage capacitor C5, and the third coupling inductor N3 constitute several voltage multiplier units.

[0040] DC power supply V g The positive terminal is connected to one end of the energy storage inductor L1, and the other end of the energy storage inductor L1 is connected to the common point of the negative terminal of the first diode D1, the first energy storage capacitor C1, and the drain of the switching transistor S.

[0041] The cathode of the first diode D1 is connected to the negative terminal of the fourth energy storage capacitor C4 and the leakage inductance L, respectively. kOne end of the first energy storage capacitor C1 is connected to the common point of the positive terminal of the fifth energy storage capacitor C5. The positive terminal of the first energy storage capacitor C1 is connected to the common point of the anode of the second diode D2 and the same-name terminal of the second coupling inductor N2. The cathode of the second diode D2 is connected to the common point of the negative terminal of the third energy storage capacitor C3 and the opposite-name terminal of the third coupling inductor N3.

[0042] The negative terminal of the second energy storage capacitor C2 is connected to the common point of the opposite terminals of the first coupling inductor N1 and the second coupling inductor N2. The positive terminal of the second energy storage capacitor is connected to the common point of the opposite terminal of the third coupling inductor N3 and the anode of the third diode D3. The cathode of the third diode D3 is connected to the common point of the positive terminal of the fourth energy storage capacitor C4 and the anode of the fourth diode D4. The cathode of the fourth diode D4 is connected to the positive terminal of the third energy storage capacitor C3 and the output diode D4. o The common point of the anode is connected, and the output diode D is connected. o The cathodes are respectively connected to the output energy storage capacitor C o The positive terminal of the load R is connected to the common point of its positive terminal, and the negative terminal of the load R is connected to the output energy storage capacitor C. o The negative terminal of the transistor, the negative terminal of the fifth energy storage capacitor C5, the source terminal of the switching transistor, and the DC power supply V. g The negative terminal connection.

[0043] Switching transistors include: N-channel MOSFET (S) and diode (D). s and buffer capacitor C s The diode Ds and the buffer capacitor Cs are connected in parallel; the cathode of the diode Ds is connected to the anode of the buffer capacitor Cs and the drain of the N-channel MOSFET S, respectively, and the anode of the diode Ds is connected to the cathode of the buffer capacitor Cs and the source of the N-channel MOSFET S, respectively.

[0044] The gate of the switching transistor is connected to the control signal of an external controller to control the switching transistor's on and off states.

[0045] The turns ratio of the first coupling inductor N1, the second coupling inductor N2, and the third coupling inductor N3 is 1:n1:n2, where n1 = T. N2 :T N1 n2 = T N3 :T N1 T N1 T represents the number of turns of the first coupled inductor N1. N2 T represents the number of turns of the second coupled inductor N2. N3 This indicates the number of turns of the third coupling inductor N3.

[0046] The external controller is the TMS320F28335 DSP control chip.

[0047] like Figure 2The figure shows the control signal waveform of the switch S in one steady-state operating cycle of this embodiment. In one cycle, the switch is turned on during DTS and turned off during (1-D)TS.

[0048] The converter in this embodiment has a total of 6 operating states in one duty cycle. To simplify the analysis, the leakage inductance L... k In steady-state analysis, this is ignored; the transformer is an ideal transformer with a turns ratio of 1:n1:n2, where n1 = T. N2 :T N1 n2 = T N3 :T N1 Meanwhile, power device losses are not considered; only modes 3 and 6 under CCM operation are considered, because the time intervals between other modes within a cycle are very short. Modes 3 and 6 are respectively as follows: Figure 3 and Figure 4 As shown.

[0049] like Figure 3 As shown, due to the diode D connected in anti-parallel with the switching transistor... S The switching transistor is turned on prematurely under soft-switching conditions. The power supply charges the input energy storage inductor L1; the magnetizing inductance current i of the first coupling inductor N1... Lm1 Gradually increasing. Fourth energy storage capacitor C4, fifth energy storage capacitor C5, output energy storage capacitor C... o Discharge occurs, and the first energy storage capacitor C1, the second energy storage capacitor C2, and the third energy storage capacitor C3 are charged. The second diode D2 and the fourth diode D4 are forward-biased, while the first diode D1, the third diode D3, and the output diode D... o Reverse cutoff.

[0050] Based on the circuit's current operating state, the voltage relationship in the circuit under mode 3 can be obtained as follows:

[0051]

[0052] Among them, V L_ON V N1_ON V N2_ON V N3_ON Let V be the voltage across the input energy storage inductor L1, the first coupling inductor N1, the second coupling inductor N2, and the third coupling inductor N3 when the corresponding topology switch is in the shoot-through state. in V is the input voltage. C1 V C2 V C3 V C4 V C5 The first energy storage capacitor C1, the second energy storage capacitor C2, the third energy storage capacitor C3, the fourth energy storage capacitor C4, and the output energy storage capacitor C are respectively.o The voltage across the two ends.

[0053] like Figure 4 As shown, the switch is off. The first input inductor L1 discharges, and the magnetizing inductance current i of the first coupling inductor N1... Lm1 The discharge gradually decreases. The first energy storage capacitor C1, the second energy storage capacitor C2, and the third energy storage capacitor C3 discharge; the fourth energy storage capacitor C4, the fifth energy storage capacitor C5, and the output energy storage capacitor C... o Charging. First diode D1, third diode D3, output diode D o When forward-biased, diodes D2 and D4 are reverse-biased and cut off.

[0054] Based on the circuit's current operating state, the voltage relationship in the circuit under mode 6 can be obtained as follows:

[0055]

[0056] Among them, V L_OFF V N1_OFF V N2_OFF V N3_OFF These are the voltages across the input energy storage inductor L1, the first coupling inductor N1, the second coupling inductor N2, and the third coupling inductor N3 when the corresponding switch is in the off state.

[0057] By applying the voltage volt-second balance rule to the energy storage inductor L1 and the first coupling inductor N1, second coupling inductor N2, and third coupling inductor N3 in modes 3 and 6, the voltage gain B of the DC-DC converter in this embodiment under CCM is obtained:

[0058]

[0059] Where D is the duty cycle.

[0060] like Figure 5 The figure shown is a curve showing the relationship between voltage gain and duty cycle of the converter in this embodiment when the turns ratio n1 = 0.5 and n2 = 1.5. If the design requires the circuit structure to achieve a boost gain of 18 times, when the through duty cycle D is 0.5, the number of turns of the coupling winding only needs to meet n1 = 0.5 and n2 = 1.5 to meet the output requirements.

[0061] like Figure 6 The figure shown is a graph showing the relationship between voltage gain and turns ratio when the duty cycle is 0.5 and different turns ratios for the converter in this embodiment. It can be seen that the converter has a very strong boost capability.

[0062] like Figure 7The figure shown is a Saber simulation diagram of the converter in this embodiment. As can be seen from the figure, some switching devices can achieve soft switching. Soft switching can effectively reduce switching losses and improve converter efficiency.

[0063] As the above analysis shows, the converter described in this embodiment has ultra-high voltage gain, which can effectively boost low-voltage DC to grid-connected voltage. Furthermore, some switching devices in this converter can achieve soft switching, improving the overall efficiency of the converter. Therefore, this converter can be widely used in new energy voltage boosting scenarios.

[0064] The embodiments described above are merely preferred embodiments of the present invention and are not intended to limit the scope of the present invention. Various modifications and improvements made to the technical solutions of the present invention by those skilled in the art without departing from the spirit of the present invention should fall within the protection scope defined by the claims of the present invention.

Claims

1. A high-gain non-isolated DC-DC converter based on a Sepic structure, characterized in that, include: DC power supply V g Switching transistor, coupling inductor unit, input energy storage inductor L1, first energy storage capacitor C1, second energy storage capacitor C2, third energy storage capacitor C3, fourth energy storage capacitor C4, fifth energy storage capacitor C5, output energy storage capacitor C o Diode D1, Diode D2, Diode D3, Diode D4, Output Diode D o and load unit; The coupled inductor unit includes: a first coupled inductor N1, a second coupled inductor N2, a third coupled inductor N3, and a magnetizing inductor L. m and leakage L k ; The input energy storage inductor L1, the first energy storage capacitor C1, the second energy storage capacitor C2, the first diode D1, the first coupling inductor N1, and the second coupling inductor N2 constitute a Sepic structure; The second diode D2, the third diode D3, the fourth diode D4, the third energy storage capacitor C3, the fourth energy storage capacitor C4, the fifth energy storage capacitor C5, and the third coupling inductor N3 constitute several voltage multiplier units.

2. The ultra-high gain non-isolated DC-DC converter based on the Sepic structure according to claim 1, characterized in that, The DC power supply V g The positive terminal is connected to one end of the energy storage inductor L1, and the other end of the energy storage inductor L1 is connected to the common point of the negative terminal of the first diode D1, the first energy storage capacitor C1, and the drain of the switching transistor S. The cathode of the first diode D1 is connected to the negative terminal of the fourth energy storage capacitor C4 and the leakage inductance L, respectively. k One end of the first energy storage capacitor C1 is connected to the common point of the positive terminal of the fifth energy storage capacitor C5. The positive terminal of the first energy storage capacitor C1 is connected to the common point of the anode of the second diode D2 and the same-name terminal of the second coupling inductor N2. The cathode of the second diode D2 is connected to the common point of the negative terminal of the third energy storage capacitor C3 and the opposite-name terminal of the third coupling inductor N3. The negative terminal of the second energy storage capacitor C2 is connected to the common point of the opposite terminals of the first coupling inductor N1 and the second coupling inductor N2. The positive terminal of the second energy storage capacitor is connected to the common point of the opposite terminal of the third coupling inductor N3 and the anode of the third diode D3. The cathode of the third diode D3 is connected to the common point of the positive terminal of the fourth energy storage capacitor C4 and the anode of the fourth diode D4. The cathode of the fourth diode D4 is connected to the positive terminal of the third energy storage capacitor C3 and the output diode D4. o The common point of the anode is connected, and the output diode D o The cathodes are respectively connected to the output energy storage capacitor C o The positive terminal of the load R is connected to the common point of the positive terminal of the load R, and the negative terminal of the load R is connected to the output energy storage capacitor C. o The negative terminal of the transistor, the negative terminal of the fifth energy storage capacitor C5, the source terminal of the switching transistor, and the DC power supply V g The negative terminal connection.

3. The ultra-high gain non-isolated DC-DC converter based on the Sepic structure according to claim 2, characterized in that, The switching transistors include: an N-channel MOSFET (S) and a diode (D). s and buffer capacitor C s The diode Ds and the buffer capacitor Cs are connected in parallel; The cathode of the diode Ds is connected to the anode of the buffer capacitor Cs and the drain of the N-channel MOS transistor S, respectively, and the anode of the diode Ds is connected to the cathode of the buffer capacitor Cs and the source of the N-channel MOS transistor S, respectively.

4. The ultra-high gain non-isolated DC-DC converter based on the Sepic structure according to claim 3, characterized in that, The gate of the switching transistor is connected to the control signal of an external controller to control the switching transistor's on and off states.

5. The ultra-high gain non-isolated DC-DC converter based on the Sepic structure according to claim 1, characterized in that, The turns ratio of the first coupling inductor N1, the second coupling inductor N2, and the third coupling inductor N3 is 1:n1:n2, where n1 = T N2 :T N1 n2 = T N3 :T N1 T N1 T represents the number of turns of the first coupled inductor N1. N2 T represents the number of turns of the second coupled inductor N2. N3 This indicates the number of turns of the third coupling inductor N3.

6. The ultra-high gain non-isolated DC-DC converter based on the Sepic structure according to claim 4, characterized in that, The external controller uses the TMS320F28335 DSP control chip.

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