Control method of three-phase PMSM six-tube commutator of weak two-phase current control mode

Abstract

The application provides a control method of a three-phase PMSM six-tube commutator in a weak two-phase current control mode, and the method comprises the following steps: after the PMSM is started and operated, the NMOS tube power module group with the maximum absolute value of the phase average current in three-phase currents is always in a normal-on state during the period when the absolute value of the phase average current is the maximum, and the group is defined as a normal-on phase; the other two NMOS tube power module groups are defined as adjustment phases, the control of the three-phase PMSM is realized by controlling the two adjustment phases; wherein the phase average current refers to the current arithmetic average value of the phase current in a carrier cycle; the control signals of the two adjustment phases all include a charge current area, a first dead zone, a freewheeling area and a second dead zone in all carrier cycles; and the control signals of the two adjustment phases include the charge current area, the first dead zone, the freewheeling area, a zero current area and the second dead zone in part of the carrier cycles.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of motor drive control, in particular to a PWM control method of a six NMOS tube electronic commutator of a three-phase PMSM controller. BACKGROUND

[0002] In a three-phase PMSM (Permanent Magnet Synchronous Motor) controller, a six NMOS tube electronic commutator circuit principle diagram is shown in FIG. 1. The commutator includes six control signal input ends, three NMOS tube power module groups, and three-phase drive ends. Each NMOS tube power module group includes an upper bridge NMOS tube and a lower bridge NMOS tube. The source of the upper bridge NMOS tube and the drain of the lower bridge NMOS tube are connected and then connected to a certain phase drive end. In this way, the six control signal input ends send control signals to the gates of the six NMOS tubes of the three NMOS tube power module groups to generate three phase currents at the three-phase drive ends. Figure 1

[0003] The traditional PWM control method of the commutator is to equally divide the modulation wave N by the carrier wave, calculate the positive and negative pulse widths of the control signals of the six NMOS tubes of the electronic commutator in each equal division carrier cycle, that is, the time and direction of the conduction, control the conduction of the NMOS tubes of each NMOS tube power module group, and the other NMOS tube is closed. By accurately controlling the conduction and closing of the six NMOS tubes of the three NMOS tube power module groups, a drive signal is generated to control the operation of the motor.

[0004] However, in the existing PWM control method of the commutator, the conduction and closing of each NMOS tube need to be adjusted frequently in each carrier cycle, resulting in a large number of total switching times of all NMOS tubes, a large loss of all NMOS tubes, and further poor reliability and short service life of the commutator. SUMMARY

[0005] The present application provides a three-phase PMSM six-tube commutator PWM control method with small loss and improved reliability and service life of the commutator. To solve the technical problem that the existing three-phase PMSM six-tube commutator PWM control method has a large loss of all NMOS tubes, and further poor reliability and short service life of the commutator.

[0006] The embodiment of the present application provides a PWM control method (such as sinusoidal pulse width modulation) of a three-phase PMSM six-tube commutator in a weak two-phase current control mode. The three-phase PMSM six-tube commutator includes three NMOS tube power module groups and three-phase drive ends, and the three NMOS tube power module groups generate three phase currents at the three-phase drive ends. The method includes:

[0007] ​After the PMSM starts running, the NMOS power module group with the largest absolute value of phase average current in three phase currents is always in a normal on state during the period of the largest absolute value of phase average current, and is defined as a normal on phase; the other two NMOS power module groups are defined as regulating phases, and the control of the three-phase PMSM is realized by controlling the two regulating phases; wherein the phase average current refers to the current arithmetic average value of the phase current in a carrier cycle;

[0008] The control signals of the two regulating phases include a charge current region, a first dead zone, a freewheeling region and a second dead zone in all carrier cycles;

[0009] The control signals of the two regulating phases include a charge current region, a first dead zone, a freewheeling region, a zero current region and a second dead zone in some carrier cycles.

[0010] The actual implementation of the application: without changing the hardware basis of the controller, by increasing and improving the control signal software of six NMOS tubes, the NMOS power module group with the largest absolute value of phase average current in three phase currents is always in a normal on state during the period of the largest absolute value of phase average current, which greatly reduces the overall power consumption and working environment temperature of all NMOS tubes, and improves the reliability and service life of the motor controller. BRIEF DESCRIPTION OF DRAWINGS

[0011] Figure 1 It is a structural schematic diagram of a six-NMOS electronic commutator;

[0012] Figure 2 It is a waveform diagram of the control signals of the NMOS power module group, the phase current and the total drive current in a carrier cycle at about 61 degrees of the phase current cycle of the six-NMOS electronic commutator;

[0013] Figure 3 It is a waveform diagram of the control signals of the NMOS power module group, the phase current and the total drive current in a carrier cycle at about 61 degrees of the phase current cycle of the six-NMOS electronic commutator;

[0014] Figure 4 It is a waveform diagram of the control signals of the NMOS power module group, the phase current and the total drive current in a carrier cycle at about 61 degrees of the phase current cycle of the six-NMOS electronic commutator; Figure 3

[0015] Figures 5a to 5g It is a waveform diagram of the control signals of the NMOS power module group, the phase current and the total drive current in a carrier cycle at about 61 degrees of the phase current cycle of the six-NMOS electronic commutator; Figure 3

[0016] Figure 6 It is a waveform diagram of the control signals of the NMOS power module group, the phase current and the total drive current in a carrier cycle at about 61 degrees of the phase current cycle of the six-NMOS electronic commutator; Figure 3

[0017] Figure 7a to 7g It is a waveform diagram of the control signals of the NMOS power module group, the phase current and the total drive current in a carrier cycle at about 61 degrees of the phase current cycle of the six-NMOS electronic commutator;​​​Figure 3 Fig. 4 is a schematic diagram of specific current trends corresponding to each transformation point of a carrier cycle control signal at a phase current cycle of about 299 degrees. DETAILED DESCRIPTION

[0018] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by a person skilled in the art without creative work fall within the protection scope of the present application.

[0019] Please refer to Figure 1 and Figure 2 , Figure 1 Fig. 1 is a structural schematic diagram of a six-NMOS electronic commutator, Figure 2 Fig. 2 is a schematic diagram of a sinusoidal pulse width modulation three-phase current signal generated by the six-NMOS electronic commutator. The three-phase current signals are iR, iG and iB respectively. The commutator includes six control signal input ends (uRup, uGup, uBup, uRdn, uGdn, uBdn), three NMOS power module groups and three-phase drive ends (R, G, B). Each NMOS power module group includes an upper bridge NMOS and a lower bridge NMOS, and each upper bridge NMOS and lower bridge NMOS is provided with a parallel drain-source diode.

[0020] In the embodiment, each phase current cycle is 360 degrees. In the prior art, the 360-degree phase current cycle is divided into multiple carrier cycles. The number of specific carrier cycles is set according to the control frequency of the motor by the user, such as 10 kHz-20 kHz. In each carrier cycle, the commutator drives the conduction and turn-off of each NMOS of the three NMOS power module groups based on the phase current to be generated.

[0021] In the embodiment of the present application, after the PMSM is started to operate, the NMOS power module group with the maximum absolute value of phase average current in three phase currents is always in the always-on state during the period when the absolute value of phase average current thereof is the largest, which is defined as the always-on phase; the other two NMOS power module groups are defined as the regulating phases, and the control of the three-phase PMSM is realized by controlling the two regulating phases. Since the on and off of the NMOS tubes of the two regulating phases need to be controlled only in each carrier cycle, the switching times of the NMOS tubes can be reduced. Here, the phase current refers to the current size of the instantaneous time point of the upper bridge NMOS tube or the lower bridge NMOS tube of the NMOS power module group, and the phase current has polarity, which is positive polarity when the current direction is the same as that in the drawing, and is negative polarity when the current direction is opposite to that in the drawing. The phase average current refers to the current arithmetic average value of the phase current in one carrier cycle. The phase average current has polarity, which is positive polarity when the current direction is the same as that in the drawing, and is negative polarity when the current direction is opposite to that in the drawing.

[0022] Specifically, please refer to Figure 3 , Figure 3 which is a control signal diagram of six NMOS tubes in one phase current cycle of the control method of the present application. Here, one phase current cycle of 360 degrees is divided into six sectors (such as sector I, sector II, sector III, sector IV, sector V, and sector VI), each sector is 60 degrees, and each sector is provided with one always-on phase and two regulating phases.

[0023] In the embodiment, each sector corresponds to the phase average current of a certain phase current, and the 60-degree interval (90-degree ± 30-degree interval, i.e. 60-degree ~ 120-degree interval) with the maximum absolute value of current flowing in or out in the middle of 180 degrees; in the sector, the phase is the always-on phase, and the other two phases are the regulating phases. The absolute value of the phase average current of the always-on phase in the sector is equal to the sum of the absolute values of the phase average currents of the other two phases; the absolute value of the phase average current of the always-on phase in the sector is greater than or equal to the absolute values of the phase average currents of the other two phases.

[0024] Specifically, Figure 3 The working states of the three NMOS power module groups (hereinafter referred to as R phase, G phase and B phase) in each sector are as follows:

[0025] (Sector I) 000-degree ~ 060-degree interval: the lower bridge NMOS tube of the R phase is always on, the upper bridge NMOS tube is always off, the R phase is the always-on phase, and the G phase and the B phase are the regulating phases;

[0026] (Sector II) 060-degree ~ 120-degree interval: the upper bridge NMOS tube of the B phase is always on, the lower bridge NMOS tube is always off, the B phase is the always-on phase, and the R phase and the G phase are the regulating phases;

[0027] (Sector III) 120°-180° interval: G-phase lower bridge NMOS tube is always on, upper bridge NMOS tube is always off, G-phase is always on phase, R-phase and B-phase are adjustment phases;

[0028] (Sector IV) 180°-240° interval: R-phase upper bridge NMOS tube is always on, lower bridge NMOS tube is always off, R-phase is always on phase, G-phase and B-phase are adjustment phases;

[0029] (Sector V) 240°-300° interval: B-phase lower bridge NMOS tube is always on, upper bridge NMOS tube is always off, B-phase is always on phase, R-phase and G-phase are adjustment phases;

[0030] (Sector VI) 300°-360° interval: G-phase upper bridge NMOS tube is always on, lower bridge NMOS tube is always off, G-phase is always on phase, R-phase and B-phase are adjustment phases.

[0031] In the control method of the application, the six sector division points of each phase current cycle are: if one of the adjustment phases crosses zero, the zero crossing point is two sector division points, at the beginning of the next carrier cycle, a new sector is started. The adjustment phase whose phase average current crosses zero or whose absolute value reduces to zero continues to be the adjustment phase in the next sector; the always on phase before the zero crossing point becomes the adjustment phase in the next sector; the other adjustment phase before the zero crossing point becomes the always on phase in the next sector. As described above, the control signal of the always on phase of each sector does not change, the upper bridge is always on and the lower bridge is always off or the upper bridge is always off and the lower bridge is always on. In each carrier cycle of the sector, two adjustment phases are accurately controlled to realize accurate control of the motor.

[0032] Therefore, the control method of the application increases the sector identification operation, that is, after the motor is started and runs in the traditional method, the CPU detects the bus current, detects the phase current, detects the terminal voltage and detects the hall signal (hall) before the beginning of each carrier cycle, the system will judge and identify whether the current two adjustment phases cross zero in the carrier cycle; if not, the existing always on phase and adjustment phase do not change; if yes, the next carrier cycle starts, which is the division point of the end of the previous sector and the beginning of the new sector; the phase continues to be the adjustment phase, the other adjustment phase is the new always on phase, and the original always on phase is the new adjustment phase.

[0033] The always on phase of the new sector is set to the upper bridge NMOS tube always on and the lower bridge NMOS tube always off or the lower bridge NMOS tube always on and the upper bridge NMOS tube always off; the two adjustment phases of the new sector continue to control the opening and closing of the upper and lower bridge NMOS tubes based on the generated phase current.

[0034] In the control method of the application, all phase current cycles are sequentially and sequentially circulated, Figure 3The shadow part in the control signal is the control signal of many carrier cycles. The always-on phase controls the signal without change in each carrier cycle, the upper bridge NMOS transistor is always on, the lower bridge NMOS transistor is always off (such as the R phase of sector IV) or the lower bridge NMOS transistor is always on, and the upper bridge NMOS transistor is always off (such as the R phase of sector I); the control signals of the two regulating phases each include a charging region, a first dead zone, a freewheeling region, and a second dead zone in each carrier cycle; the control signals of the two regulating phases include a charging region, a first dead zone, a freewheeling region, a zero current region, and a second dead zone in part of the carrier cycles.

[0035] The meanings of the charging region, the first dead zone, the freewheeling region, the zero current region, and the second dead zone are described below.

[0036] Charging region: In a certain time period of a carrier cycle, the gate signal of an NMOS transistor of the NMOS power module group is high, the NMOS transistor is turned on, and the current flows from the drain to the source of the NMOS transistor; the gate signal of another NMOS transistor of the NMOS power module group is low, and the NMOS transistor is turned off. The turned-on NMOS transistor becomes a charging tube, and the on-time period of the charging tube is the charging region of the NMOS power module group in the carrier cycle.

[0037] Freewheeling region: In a certain time period of a carrier cycle, the gate signal of an NMOS transistor of the NMOS power module group is high, the NMOS transistor is turned on, and the current flows from the source to the drain of the NMOS transistor; the gate signal of another NMOS transistor of the NMOS power module group is low, and the NMOS transistor is turned off. The turned-on NMOS transistor becomes a freewheeling tube, and the on-time period of the freewheeling tube is the freewheeling region of the NMOS power module group in the carrier cycle.

[0038] Dead zone: In a carrier cycle, the upper and lower bridge NMOS transistors of the NMOS power module group are turned on alternately, in order to prevent the upper and lower bridge NMOS transistors from being commonly turned on, a time period is inserted between the charging region and the freewheeling region, in which time period the upper and lower bridge NMOS transistors are turned off at the same time, which is the dead zone of the NMOS power module group in the carrier cycle, wherein the dead zone from the charging region to the freewheeling region is called the first dead zone, and the dead zone from the freewheeling region to the charging region of the next carrier cycle is called the second dead zone.

[0039] Zero current region: in a carrier cycle, the absolute value of the freewheeling current (phase current) through a certain freewheeling tube decreases to zero or crosses zero point, in order to prevent current from flowing from the drain to the source of the freewheeling tube, the gate signal of the freewheeling tube is switched to low level, the freewheeling tube is turned off, and the time period between the turning-off time point of the freewheeling tube and the start time of the second dead zone is called the zero current region. Therefore, the time when the phase current crosses zero point is the dividing point of the freewheeling region and the zero current region. In the ideal case of accurate design, there is no current in the drain-source diode of the upper and lower bridge NMOS tubes of the corresponding NMOS power module group during the zero current region; in the case of slight error, there is a slight current in the drain-source diode of the upper and lower bridge NMOS tubes of the corresponding NMOS power module group during the zero current region (here, the maximum value of the slight current is about 2.73% of the maximum value of the corresponding phase current, and the slight current is caused by the difference in signal control accuracy).

[0040] If the absolute value of the freewheeling current of the freewheeling tube decreases to zero or crosses zero point in a carrier cycle, i.e. the freewheeling current is small, a zero current region is set in the carrier cycle; if the absolute value of the freewheeling current of the freewheeling tube does not decrease to zero, i.e. the freewheeling current is large, no zero current region is set in the carrier cycle, and the second dead zone is directly set after the freewheeling region to switch to the charging region of the next carrier cycle. If there is no zero current region set in the control signal of the NMOS power module group in a carrier cycle, the control signals of the upper and lower bridge NMOS of the regulating phase are complementary (except for the dead zone).

[0041] Based on the above setting principle of the zero current region, in the control program of the traditional six-NMOS electronic commutator, the identification processing of the zero current region needs to be added, i.e. before the start of each carrier cycle, it is necessary to identify whether the phase current crosses zero point in the freewheeling region of the two regulating phases in the carrier cycle, if not, the control program of the freewheeling region and the second dead zone of the two regulating phases in the next carrier cycle remains unchanged; if it does, the corresponding time point is calculated, and the corresponding freewheeling tube is turned off after reaching the corresponding time point at the start of the next carrier cycle, and the corresponding zero current region is set in the next carrier cycle.

[0042] Specifically, after the motor is running, the absolute value of the phase current crossing zero point can be accurately calculated by bus current detection, phase current detection, terminal voltage detection and hall signal detection before the start of the carrier cycle, i.e. whether the zero current time point appears in the freewheeling region. When the regulating phase is in the zero current region, the upper and lower bridge NMOS tubes of the corresponding regulating phase are in the off state, and the corresponding drain-source diode of the upper and lower bridge NMOS tubes of the corresponding regulating phase also has no current passing through. After adding the control signal of the zero current region, the direction of the freewheeling tube current in each carrier cycle will not change. In each carrier cycle, the direction of the motor current of each phase will not change.

[0043] The specific working principle of the PWM control method of the six NMOS electronic commutator of the embodiment is explained below by the changes of the control signals of the NMOS power module group, the phase current and the total drive current in a specific carrier cycle in the phase current cycle.

[0044] In the embodiment, the PWM control method of the six NMOS electronic commutator is as follows. Figure 3 Taking the carrier cycle at about 61 degrees of the phase current cycle as an example, at this time, the B phase is a constant-on phase, and the G phase and the R phase are adjustment phases. At this time, the phase current of the B phase is positively maximum, the phase current of the G phase is negatively close to zero, and the phase current of the R phase is negatively large. The phase current iB of the B phase is the sum of the phase current iR of the R phase and the phase current iG of the G phase, i.e. iB=iR+iG. Since the phase current of the R phase is large, the phase average current of the R phase in the carrier cycle is also large, and the phase current of the R phase is highly likely to have no zero point in the carrier cycle. Since the phase current of the G phase is small, the phase average current of the G phase in the carrier cycle is also small, and the phase current of the G phase is highly likely to pass through zero point (in the embodiment, it is set that the phase current of the G phase passes through zero point). The specific phase current iB, the phase current iR and the phase current iG can be set based on the specific three-phase current of the current demand of the motor (such as setting the corresponding phase current based on the required motor coil magnetic flux).

[0045] The waveform diagram of the control signals of the NMOS power module group, the phase current and the total drive current in the carrier cycle is as shown in Figure 4 .

[0046] In the entire carrier cycle, the upper bridge NMOS tube of the B phase is always on, and the lower bridge NMOS tube is always off (the control signal input end uBup receives a high-level signal, and the control signal input end uBdn receives a low-level signal); the R phase includes a freewheeling region, a first dead zone, a freewheeling region and a second dead zone in the carrier cycle. The G phase includes a freewheeling region, a first dead zone, a freewheeling region, a zero current region and a second dead zone in the carrier cycle. According to the phase current change sequence of the R phase and the G phase, the carrier cycle is divided into eight stages.

[0047] Stage 1: The R phase and the G phase are switched to the freewheeling region, the upper bridge NMOS tube of the R phase is turned off, and the lower bridge NMOS tube is turned on (the control signal input end uRup receives a low-level signal, and the control signal input end uRdn receives a high-level signal), and the lower bridge NMOS tube of the R phase is in the freewheeling state (the current flows from the drain to the source of the freewheeling NMOS tube); the upper bridge NMOS tube of the G phase is turned off, and the lower bridge NMOS tube is turned on (the control signal input end uGup receives a low-level signal, and the control signal input end uGdn receives a high-level signal), and the lower bridge NMOS tube of the G phase is in the freewheeling state. The specific current direction is as shown in Figure 5a .

[0048] Phase 2: R phase switches from the charging region to the first dead region, G phase continues to be the charging region, the upper bridge NMOS tube and the lower bridge NMOS tube of the R phase are both turned off, the drain-source diode of the upper bridge NMOS tube of the R phase is in the dead region freewheeling state; the upper bridge NMOS tube of the G phase is turned off, the lower bridge NMOS tube is turned on, and the lower bridge NMOS tube of the G phase is in the charging state. The specific current flow is as shown in Figure 5b .

[0049] Phase 3: R phase switches from the first dead region to the freewheeling region, G phase continues to be the charging region, the upper bridge NMOS tube of the R phase is turned on, the lower bridge NMOS tube is turned off, and the upper bridge NMOS tube of the R phase is in the freewheeling state (the current flows from the source to the drain of the freewheeling NMOS tube); the upper bridge NMOS tube of the G phase is turned off, the lower bridge NMOS tube is turned on, and the lower bridge NMOS tube of the G phase is in the charging state. The specific current flow is as shown in Figure 5c .

[0050] Phase 4: R phase continues to be the freewheeling region, G phase switches from the charging region to the first dead region, the upper bridge NMOS tube of the R phase is turned on, the lower bridge NMOS tube is turned off, and the upper bridge NMOS tube of the R phase is in the freewheeling state; the upper bridge NMOS tube and the lower bridge NMOS tube of the G phase are both turned off, and the drain-source diode of the upper bridge NMOS tube of the G phase is in the dead region freewheeling state (the phase current of the adjusting phase flows through the corresponding drain-source diode of the freewheeling NMOS tube). The specific current flow is as shown in Figure 5d .

[0051] Phase 5: R phase continues to be the freewheeling region, G phase switches from the first dead region to the freewheeling region, the upper bridge NMOS tube of the R phase is turned on, the lower bridge NMOS tube is turned off, and the upper bridge NMOS tube of the R phase is in the freewheeling state; the upper bridge NMOS tube of the G phase is turned on, the lower bridge NMOS tube is turned off, and the upper bridge NMOS tube of the G phase is in the freewheeling state. The specific current flow is as shown in Figure 5e .

[0052] Phase 6: Since the phase current of the G phase is small, when it is detected that the phase current of the G phase decreases to zero, the G phase switches from the freewheeling region to the zero flow region, the upper bridge NMOS tube and the lower bridge NMOS tube of the G phase are both turned off (the control signal of the freewheeling NMOS tube is lowered), and the upper bridge NMOS tube and the corresponding drain-source diode of the G phase are both substantially without current passing through. R phase continues to be the freewheeling region, the upper bridge NMOS tube of the R phase is turned on, the lower bridge NMOS tube is turned off, and the upper bridge NMOS tube of the R phase is in the freewheeling state. The specific current flow is as shown in Figure 5f .

[0053] Phase 7: If the carrier cycle R phase also has zero flow area (low probability), that is, when the phase current of R phase is detected to decrease to zero, the R phase is switched from the freewheeling area to the zero flow area, the upper bridge NMOS tube and the lower bridge NMOS tube of the R phase are both turned off (the control signal of the freewheeling NMOS tube is low), and the upper bridge NMOS tube and the corresponding drain-source diode of the R phase are both substantially no current passing; the G phase maintains the zero flow area, the upper bridge NMOS tube and the lower bridge NMOS tube of the G phase are both turned off, and the state is unchanged. There is no current in the RGB three phases in this time period.

[0054] If the carrier cycle R phase has no zero flow area (high probability), phase 6 is continued, that is, there is no phase 7.

[0055] Phase 8: The G phase is switched from the zero flow area to the second dead zone, the upper bridge NMOS tube and the lower bridge NMOS tube of the G phase are both turned off, and the state is unchanged; the R phase is switched from the zero flow area to the second dead zone or from the freewheeling area to the second dead zone, the upper bridge NMOS tube and the lower bridge NMOS tube of the R phase are both turned off, and the drain-source diode of the upper bridge NMOS tube of the R phase is in the dead zone freewheeling state. The specific current flow is shown in Figure 5g When the R phase also has a zero flow area, the thick dashed line in the figure is that the R phase current is zero.

[0056] After the above phase 8, it is switched to phase 1 of the next carrier cycle, and the R phase and the G phase are both switched from the second dead zone to the charging area.

[0057] As described above, Figure 5f The upper bridge NMOS tube of the G phase is turned off when the phase current of the G phase decreases to zero, and the G phase is switched from the freewheeling area to the zero flow area, which is the most important difference between the control method of the present application and the existing control method. At the same time Figure 4 The total drive current iE in

[0058] In Figure 3 The carrier cycle at about 299 degrees of the phase current cycle is taken as an example, at this time, the B phase is a constant-on phase, and the G phase and the R phase are adjustment phases, at this time, the phase current of the B phase is reversely maximum, the phase current of the R phase is close to zero in the positive direction, and the phase current of the G phase is relatively large in the positive direction, the phase current iB of the B phase is the sum of the phase current iR of the R phase and the phase current iG of the G phase, that is, iB=iR+iG. Since the phase current of the G phase is large, the phase average current of the G phase in the carrier cycle is also large, and the phase current of the G phase in the carrier cycle is highly likely to have no zero point; since the phase current of the R phase is small, the phase average current of the R phase in the carrier cycle is also small, and the phase current of the R phase in the carrier cycle is highly likely to pass through the zero point (in this embodiment, it is set that the phase current of the R phase passes through the zero point).

[0059] The waveform diagrams of the control signals of the NMOS tube power module group, the phase current and the total drive current in the carrier cycle are shown in Figure 6 .

[0060] In the whole carrier cycle, the lower bridge NMOS tube of phase B is always on, and the upper bridge NMOS tube is always off; the R phase includes the current charging area, the first dead zone, the current continuation area, the zero current area and the second dead zone in the carrier cycle. The G phase includes the current charging area, the first dead zone, the current continuation area and the second dead zone in the carrier cycle. According to the sequence of the phase current change of the R phase and the G phase, the carrier cycle is divided into eight stages.

[0061] Stage 1: The R phase and the G phase are switched to the current charging area, the upper bridge NMOS tube of the R phase is turned on, and the lower bridge NMOS tube is turned off, and the upper bridge NMOS tube of the R phase is in the current charging state; the upper bridge NMOS tube of the G phase is turned on, and the lower bridge NMOS tube is turned off, and the upper bridge NMOS tube of the G phase is in the current charging state. The specific current flow is as shown in Figure 7a .

[0062] Stage 2: The R phase is switched from the current charging area to the first dead zone, and the G phase continues to be the current charging area, the upper bridge NMOS tube and the lower bridge NMOS tube of the R phase are both turned off, and the drain-source diode of the lower bridge NMOS tube of the R phase is in the dead zone current continuation state; the lower bridge NMOS tube of the G phase is turned off, and the upper bridge NMOS tube is turned on, and the upper bridge NMOS tube of the G phase is in the current charging state. The specific current flow is as shown in Figure 7b .

[0063] Stage 3: The R phase is switched from the first dead zone to the current continuation area, and the G phase continues to be the current charging area, the lower bridge NMOS tube of the R phase is turned on, and the upper bridge NMOS tube is turned off, and the lower bridge NMOS tube of the R phase is in the current continuation state; the lower bridge NMOS tube of the G phase is turned off, and the upper bridge NMOS tube is turned on, and the upper bridge NMOS tube of the G phase is in the current charging state. The specific current flow is as shown in Figure 7c .

[0064] Stage 4: Since the phase current of the R phase is small and in a downward trend, when it is detected that the phase current of the R phase decreases to zero, the R phase is switched from the current continuation area to the zero current area, the upper bridge NMOS tube and the lower bridge NMOS tube of the R phase are both turned off, and the lower bridge NMOS tube and the corresponding drain-source diode of the R phase are both substantially no current passing through. The G phase continues to be the current charging area, the lower bridge NMOS tube of the G phase is turned off, and the upper bridge NMOS tube is turned on, and the upper bridge NMOS tube of the G phase is in the current charging state. The specific current flow is as shown in Figure 7d .

[0065] Stage 5: The R phase maintains the zero current area, the upper bridge NMOS tube and the lower bridge NMOS tube of the R phase are both turned off, and the state is unchanged; the G phase is switched from the current charging area to the first dead zone, the upper bridge NMOS tube and the lower bridge NMOS tube of the G phase are both turned off, and the drain-source diode of the lower bridge NMOS tube of the G phase is in the dead zone current continuation state. The specific current flow is as shown in Figure 7e .

[0066] Phase 6: R phase maintains zero flow area, the upper bridge NMOS tube and the lower bridge NMOS tube of R phase are both turned off, the state is unchanged; G phase is switched from the first dead zone to the freewheeling area, the lower bridge NMOS tube of G phase is turned on, the upper bridge NMOS tube is turned off, and the lower bridge NMOS tube of G phase is in the freewheeling state. The specific current flow direction is as shown in Figure 7f .

[0067] Phase 7: As the carrier cycle G phase also has a zero flow area (with a lower probability), when the phase current of G phase is detected to decrease to zero, G phase is switched from the freewheeling area to the zero flow area, the upper bridge NMOS tube and the lower bridge NMOS tube of G phase are both turned off (the control signal of the freewheeling NMOS tube is lowered), and the upper bridge NMOS tube and the corresponding drain-source diode of G phase are both substantially without current passing through; R phase maintains the zero flow area, the upper bridge NMOS tube and the lower bridge NMOS tube of R phase are both turned off, and the state is unchanged. There is no current in the RGB three-phase in this time period.

[0068] If the carrier cycle G phase does not have a zero flow area (with a higher probability), phase 6 is continued, i.e., there is no phase 7.

[0069] Phase 8: R phase is switched from the zero flow area to the second dead zone, the upper bridge NMOS tube and the lower bridge NMOS tube of R phase are both turned off, and the state is unchanged; G phase is switched from the zero flow area to the second dead zone or from the freewheeling area to the second dead zone, the upper bridge NMOS tube and the lower bridge NMOS tube of G phase are both turned off, and the drain-source diode of the lower bridge NMOS tube of G phase is in the dead zone freewheeling state. The specific current flow direction is as shown in Figure 7g . When the G phase also has a zero flow area, the thick dashed line in the figure indicates that the G phase current is zero.

[0070] After the above phase 8 ends, it is switched to phase 1 of the next carrier cycle, and R phase and G phase are both switched from the second dead zone to the charging area.

[0071] As described above, Figure 7d , the lower bridge NMOS tube of R phase is turned off when the phase current of R phase decreases to zero, and R phase is switched from the freewheeling area to the zero flow area, which is the most important difference between the control method of the present application and the existing control method. At the same time Figure 6 , the total driving current iE in the

[0072] In the present embodiment, the voltage E of the battery power supply Bat is set to 48V, the maximum current Imax is 30.0A, and the average current Ie is Imax = 0.637 * Imax = 19.1 A (i.e. three-phase motor power is about 48V * 19.1A = 917W), carrier frequency 16KHz (period Tw = 62.5us), dead time Tdie = 1.5us, conduction process time Ton = 0.4us, turn-off process time Toff = 0.1us, NMOS tube conduction resistance Rds = 3.7mΩ, NMOS tube drain-source diode conduction voltage Vsd = 1.2v.

[0073] The actual calculation and test results are as follows:

[0074] Using the traditional SPWM (no harmonic) three-phase current control method for control, the various losses of each phase are about:

[0075] Each phase of the charging pipe conduction loss and the freewheeling pipe conduction loss:

[0076] Pon + Poff ≈ Ie * Ie * Rds * (Tw - 2 * Tdie - Ton - Toff) / Tw ≈ 1.27w;

[0077] Each phase of the charging pipe conduction process and turn-off process loss:

[0078] PH = PHup + PHdown ≈ E * (Ie * 0.637) * ((Ton + Toff) / Tw) ≈ 4.67w;

[0079] Each phase of the freewheeling pipe conduction process and turn-off process loss (if there is current, the drain-source diode has been turned on):

[0080] PL = PLup + PLdown ≈ Ie * Ie * Rds * ((Ton + Toff) / Tw) ≈ 0.01w;

[0081] Each phase of the first dead zone loss: PHdie ≈ 0.00w.

[0082] Each phase of the second dead zone loss: PLdie ≈ Vsd * (Ie * 0.637) * (2 * Tdie / Tw) ≈ 0.70w.

[0083] In the traditional SPWM (no harmonic) three-phase current control method, the total loss of three-phase six NMOS tubes and the proportion are about:

[0084] The total loss of three-phase six NMOS tubes:

[0085] Pall = 3 * (PH + PL + Pon + Poff + PHdie + PLdie) ≈ 3 * 7.05w = 19.95w;

[0086] The conduction loss of three-phase six NMOS tubes:

[0087] 3*(Pon+Poff)≈3.81w;

[0088] Conduction and turn-off loss of three-phase six NMOS:

[0089] 3*(PH+PL)≈14.04w;

[0090] Dead zone loss of three-phase six NMOS:

[0091] 3*(PHdie+PLdie)≈2.10w.

[0092] Using the control method of the embodiment for control, the various losses of each phase are calculated as:

[0093] Average current of always-on phase (60°):

[0094] IHsum≈Imax* =0.955*Imax=28.65A;

[0095] Average current of regulating phase (60°):

[0096] ILsum≈Imax* =0.477*Imax=14.32A;

[0097] Conduction loss of three-phase six NMOS:

[0098] 3*Ie*Ie*Rds*(Tw-2*Tdie-Ton-Toff) / Tw≈3.81w;

[0099] Conduction and turn-off loss of three-phase six NMOS:

[0100] 2*(E*(ILsum*0.637)+ILsum*ILsum*Rds)*((Ton+Toff) / Tw)≈7.02w;

[0101] Dead zone loss of three-phase six NMOS:

[0102] 2*Vsd*(ILsum*0.637)*(2*Tdie / Tw)≈1.05w

[0103] Total loss and proportion of three-phase six NMOS of the control method of the embodiment are about:

[0104] Total loss of three-phase six NMOS: Pall≈3.81+7.02+1.05=11.88w;

[0105] Conduction and turn-off loss of three-phase six NMOS≈3.81w;

[0106] The conduction loss and the turn-off loss of the three-phase six NMOS transistor are about 7.02w;

[0107] The dead-time loss of the three-phase six NMOS transistor is about 1.05w.

[0108] Under the same working condition, the total loss of the control method of the embodiment is reduced by about 40.45% compared with the traditional method.

[0109] (19.95-11.88) / 19.95≈40.45%.

[0110] In the traditional method and the control method of the embodiment, the main losses of the six NMOS transistor electronic commutator include:

[0111] The conduction loss and the turn-off loss are about 60% to 70%, the higher the carrier frequency, the greater the loss proportion, and the greater the phase current, the greater the loss.

[0112] The dead-time leakage diode freewheeling conduction loss is about 9% to 11%, the higher the carrier frequency, the greater the loss proportion, the longer the dead-time, the greater the loss proportion, and the greater the phase current, the greater the loss.

[0113] The conduction loss (the NMOS transistor in the charging region) and the turn-off loss (the NMOS transistor in the freewheeling region) are about 19% to 32%, the greater the phase current, the greater the loss, and the carrier frequency and the dead-time have little effect on the loss, which mainly depends on the conduction resistance of the NMOS transistor.

[0114] In the weak two-phase current control method of the embodiment, the loss of the always-on phase in each sector is only the conduction loss, and there is no other loss, which mainly depends on the conduction resistance of the NMOS transistor. The always-on phase is in this 60° sector, the absolute value of the average phase current is the largest, the two NMOS transistors of the upper and lower bridges of the always-on phase do not change, the total switching times of the NMOS transistors of the always-on phase are reduced, and the always-on phase only has the conduction loss and no other loss. Therefore, the overall power consumption of the motor controller is reduced, the working environment temperature is reduced, the reliability and the service life are improved.

[0115] In the weak two-phase current control method of the embodiment, the absolute values of the average currents of the two regulating phases are small, the four NMOS transistors of the two regulating phases change, and the switching loss caused by the change is correspondingly small. Meanwhile, the current of the two regulating phases is small when the two regulating phases work in the dead-time, and the conduction loss of the leakage diode is also small.

[0116] The control method of the embodiment can accurately control the time point of the zero-flow region of the four NMOS transistors of the two regulating phases: when the power output is large, the current carrier period is large, and the NMOS transistor freewheeling to the battery is eliminated or reduced.

[0117] The PWM control method of the six NMOS electronic commutator of the three-phase PMSM controller does not change the hardware basis of the controller, and by increasing and improving the control signal software of the six NMOS, the NMOS power module group with the maximum absolute value of the phase average current in the three-phase current is always in the normal on state during the period with the maximum absolute value of the phase average current, the overall power consumption and the working environment temperature of all NMOS are greatly reduced, and the reliability and the service life of the motor controller are improved.

[0118] In summary, although the present application has been disclosed with preferred embodiments as above, the above preferred embodiments are not intended to limit the present application, and those skilled in the art can make various modifications and decorations without departing from the spirit and scope of the present application. Therefore, the protection scope of the present application is defined by the scope of the claims.

Claims

1. A control method for a three-phase PMSM six-transistor commutator with weak two-phase current control, the three-phase PMSM six-transistor commutator comprising three NMOS transistor power module groups and three-phase drive terminals, wherein the three NMOS transistor power module groups generate three phase currents at the three-phase drive terminals, characterized in that, The method includes: After the PMSM starts running, the NMOS power module group with the largest absolute value of the phase average current among the three phase currents is always in the normally on state during the period when the absolute value of the phase average current is the largest, and is defined as the normally on phase; the other two NMOS power module groups are defined as the regulating phases. The control of the three-phase PMSM is realized by controlling the two regulating phases; wherein the phase average current refers to the arithmetic mean of the phase current in one carrier cycle. The control signals for the two regulation phases include the following in all carrier cycles: the current-filling region, the first dead zone, the freewheeling region, and the second dead zone; The control signals for the two regulation phases include, in part of the carrier cycle: the current-filling region, the first dead zone, the freewheeling region, the zero-current region, and the second dead zone; During a certain time period of a carrier cycle, the gate signal of one NMOS transistor in the NMOS power module group is high, and the NMOS transistor is turned on, with current flowing from the drain to the source of the NMOS transistor; the gate signal of the other NMOS transistor in the NMOS power module group is low, and the NMOS transistor is turned off; the turned-on NMOS transistor becomes the charging transistor, and the time period during which the charging transistor is turned on is the charging region of the NMOS power module group in that carrier cycle; During a certain time period of a carrier cycle, the gate signal of one NMOS transistor in the NMOS power module group is high, and the NMOS transistor is turned on, with current flowing from the source to the drain of the NMOS transistor; the gate signal of the other NMOS transistor in the NMOS power module group is low, and the NMOS transistor is turned off; the turned-on NMOS transistor becomes the freewheeling transistor, and the conduction time of the freewheeling transistor is the freewheeling region of the NMOS power module group in that carrier cycle; During a carrier cycle, when the upper and lower bridge NMOS transistors of the NMOS power module group are alternately turned on, in order to prevent the upper and lower bridge NMOS transistors from being turned on simultaneously, a time period is inserted between the charging region and the freewheeling region. During this time period, the upper and lower bridge NMOS transistors are turned off at the same time. This time period is the dead zone of the NMOS power module group in that carrier cycle. The dead zone from the charging region to the freewheeling region is called the first dead zone, and the dead zone from the freewheeling region to the charging region of the next carrier cycle is called the second dead zone. During a carrier cycle, when the absolute value of the freewheeling current through a freewheeling diode decreases to zero or crosses zero, the gate signal of the freewheeling diode is switched to a low level, and the freewheeling diode is turned off. The time period between this turn-off time and the start time of the second dead zone is called the zero current zone.

2. The control method for a three-phase PMSM six-transistor commutator with weak two-phase current control according to claim 1, characterized in that, During a carrier cycle, the zero current region is set only when the freewheeling current of the regulating phase crosses zero or its absolute value decreases to zero, and the control signal of the regulating phase switches from the freewheeling region to the zero current region. When the regulating phase enters the zero-current region, the control signal of the freewheeling NMOS transistor of the regulating phase is set low; both the upper and lower bridge NMOS transistors of the regulating phase are in the off state, and the drain-source diodes corresponding to the upper and lower bridge NMOS transistors of the regulating phase also have no current flowing through them; the phase current of the regulating phase is zero during the zero-current region period.

3. The control method for a three-phase PMSM six-transistor commutator with weak two-phase current control according to claim 1, characterized in that, When the control signal of the regulating phase is in the first dead zone, both the upper and lower bridge NMOS transistors of the regulating phase are turned off, and the phase current of the regulating phase flows through the drain-source diode corresponding to its freewheeling NMOS transistor.

4. The control method for a three-phase PMSM six-transistor commutator with weak two-phase current control according to claim 1, characterized in that, When the control signal of the regulating phase is in the second dead zone, both the upper and lower bridge NMOS transistors of the regulating phase are turned off, and the phase current of the regulating phase flows through the drain-source diode corresponding to its freewheeling NMOS transistor.

5. The control method for a three-phase PMSM six-transistor commutator with weak two-phase current control according to claim 1, characterized in that, When the control signal of the regulating phase is in the zero-current region, both the upper and lower bridge NMOS transistors of the regulating phase are turned off, and the drain-source diodes corresponding to the upper and lower bridge NMOS transistors of the regulating phase have virtually no current flowing through them.

6. The control method for a three-phase PMSM six-transistor commutator with weak two-phase current control according to claim 1, characterized in that, When the charging NMOS transistor in the NMOS power module group is turned on, current flows from the drain to the source of the charging NMOS transistor.

7. The control method for a three-phase PMSM six-transistor commutator with weak two-phase current control according to claim 1, characterized in that, When the freewheeling NMOS transistor in the NMOS power module group is turned on, current flows from the source to the drain of the freewheeling NMOS transistor.

8. The control method for a three-phase PMSM six-transistor commutator with weak two-phase current control according to claim 1, characterized in that, The absolute value of the phase average current of the normally operating phase is greater than or equal to the absolute value of the phase average current of the other two regulating phases.

9. The control method for a three-phase PMSM six-transistor commutator with weak two-phase current control according to claim 1, characterized in that, Each 360-degree phase current cycle includes six sectors, each sector being 60 degrees, with the normally connected phase switching once per sector.

10. The control method for a three-phase PMSM six-transistor commutator with weak two-phase current control according to claim 9, characterized in that, The regulating phase in the current sector whose average phase current crosses zero or whose absolute value decreases to zero will continue to be the regulating phase in the next sector; the normally connected phase in the current sector will become the regulating phase in the next sector; another regulating phase in the current sector will become the normally connected phase in the next sector.

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