Back contact solar cell, cell assembly and photovoltaic system
By setting overlapping groove structures in the P and N regions of the non-light-receiving surface of the silicon substrate of the back-contact solar cell, the problem of slippage between the silicon wafer and the roller is solved, the yield rate and photoelectric conversion efficiency of the cell are improved, and the electrode adhesion and carrier collection capability are enhanced.
Patent Information
- Application Number
- CN202511468992.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-15
- Publication Date
- 2025-11-11
- Estimated Expiration
- 2045-10-15
AI Technical Summary
In the production process of back-contact solar cells, an overly smooth polished surface of the silicon substrate can cause slippage between the silicon wafer and the rollers, resulting in wafer slippage and stacking issues, which affect the production cycle and photoelectric conversion efficiency.
Several overlapping groove structures are set on the non-light-receiving surface P and N regions of the silicon substrate to increase surface roughness, prevent slippage, and increase photon absorption path through diffuse reflection, thereby improving carrier collection efficiency.
This solved the slippage problem between the silicon wafer and the roller, improved the yield rate and photoelectric conversion efficiency of the solar cells, enhanced electrode adhesion, reduced contact resistance, and increased short-circuit current.
Smart Images

Figure CN120936148A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of photovoltaic technology, and in particular to a back-contact solar cell, a battery module, and a photovoltaic system. Background Technology
[0002] In back-contact solar cell modules, since the positive and negative electrodes of the cells are on their back side (non-light-receiving surface), there is no need to weld grid lines to conduct current on the light-receiving surface. The light-receiving area is increased compared to ordinary solar cells, which helps to improve the photoelectric conversion efficiency of the photovoltaic system.
[0003] In the fabrication of back-contact solar cells, the non-light-receiving surface of the cell is primarily polished, requiring all or part of the silicon substrate to be a flat, polished surface. This facilitates the deposition of the passivation antireflection film, resulting in fewer carrier recombination sites and higher photoelectric conversion efficiency. However, in actual production, an overly flat polished silicon substrate surface leads to lower surface roughness, such as... Figure 1 As shown, during wet cleaning and etching using a chain machine, insufficient friction between silicon wafer 1′ and roller 2′ causes slippage, resulting in uneven running of silicon wafer 1′ on roller 2′ and wafer stacking. This affects subsequent production cycle time and damages the structure of silicon wafer 1′, leading to defective solar cells and increased production costs. Furthermore, an overly smooth polished surface of the silicon substrate can also affect the photoelectric conversion efficiency of the solar cells.
[0004] Therefore, there is an urgent need for a back-contact solar cell, battery module, and photovoltaic system to solve the aforementioned problems in the existing technology. Summary of the Invention
[0005] The purpose of this invention is to provide a back-contact solar cell, a battery module, and a photovoltaic system that, without affecting the passivation effect of the silicon wafer surface, avoids slippage between the silicon wafer and the roller, eliminates problems of misaligned silicon wafers and stacking, and improves the photoelectric conversion efficiency of the solar cell.
[0006] To achieve this objective, the present invention adopts the following technical solution:
[0007] In a first aspect, a back-contact solar cell is provided, comprising a silicon substrate having a light-receiving surface and a non-light-receiving surface disposed opposite to each other, the non-light-receiving surface having a P-region and an N-region;
[0008] The P region is provided with a plurality of first grooves, and at least some of the first grooves overlap each other to form a first overlapping region;
[0009] The N region is provided with a number of second grooves, and at least some of the second grooves overlap each other to form a second overlapping region.
[0010] As an alternative embodiment of the back-contact solar cell provided by the present invention, at least one third groove is provided on the surface of the second groove.
[0011] As an optional embodiment of the back-contact solar cell provided by the present invention, the surface of the second groove is provided with a plurality of the third grooves, and there is a gap between adjacent third grooves or they overlap to form a third overlapping area.
[0012] As an optional embodiment of the back-contact solar cell provided by the present invention, the distance between the two farthest points in the orthographic projection of the third groove on the silicon substrate is 0.5 μm to 20 μm.
[0013] As an optional embodiment of the back-contact solar cell provided by the present invention, the number of third grooves provided in a single second groove is 4 to 30.
[0014] As an alternative embodiment of the back-contact solar cell provided by the present invention, at least a portion of the first grooves are distributed in a linear array to form a first array structure;
[0015] And / or, at least a portion of the second grooves are distributed in a linear array to form a second array structure.
[0016] As an alternative embodiment of the back-contact solar cell provided by the present invention, at least one of the first array structures penetrates the P region;
[0017] And / or, at least one of the second array structures extends through the N region.
[0018] As an optional embodiment of the back-contact solar cell provided by the present invention, an isolation region is provided between the P region and the N region, at least one of the first array structures and at least one of the second array structures are collinear, and the collinear positions pass through the isolation region.
[0019] As an optional embodiment of the back-contact solar cell provided by the present invention, the back-contact solar cell has a cut-out region, and the first array structure and the second array structure are collinear in the cut-out region.
[0020] As an optional embodiment of the back-contact solar cell provided by the present invention, the P region is provided with a first electrode, and the first array structure is arranged at an angle to the first electrode;
[0021] And / or, the N region is provided with a second electrode, and the second array structure is arranged at an angle to the second electrode.
[0022] As an optional embodiment of the back-contact solar cell provided by the present invention, the angle between the first array structure and the first electrode is greater than 0° and less than or equal to 15° or greater than or equal to 90° and less than or equal to 105°.
[0023] And / or, the angle between the second array structure and the second electrode is greater than 0° and less than or equal to 15° or greater than or equal to 90° and less than or equal to 105°.
[0024] As an optional embodiment of the back-contact solar cell provided by the present invention, the P region is provided with a plurality of the first array structures, which are arranged parallel to each other or at an angle.
[0025] And / or, the N region is provided with a plurality of the second array structures, which are arranged parallel to each other or at an angle.
[0026] As an optional embodiment of the back-contact solar cell provided by the present invention, the area of the first overlapping region is A1, the orthogonal projection area of the first groove on the silicon substrate is B1, and the ratio of A1 to B1 is 15% to 90%.
[0027] And / or, the area of the second overlapping region is A2, the orthographic projection area of the second groove on the silicon substrate is B2, and the ratio of A2 to B2 is 15% to 90%.
[0028] As an optional embodiment of the back-contact solar cell provided by the present invention, the distance between the two farthest points in the orthographic projection of the first groove on the silicon substrate is 5μm to 40μm;
[0029] And / or, the distance between the two furthest points in the orthographic projection of the second groove onto the silicon substrate is 5 μm to 40 μm.
[0030] As an optional embodiment of the back-contact solar cell provided by the present invention, the depth of the first groove is 0.05 μm to 2.5 μm;
[0031] And / or, the depth of the second groove is 0.05μm to 2.5μm.
[0032] As an alternative embodiment of the back-contact solar cell provided by the present invention, the orthographic projection of the first groove on the silicon substrate is an N-sided shape or the outer contour is at least partially curved.
[0033] And / or, the orthographic projection of the second groove onto the silicon substrate is N-sided or the outer contour is at least partially curved;
[0034] Where N is a positive integer greater than or equal to 3.
[0035] In a second aspect, a battery assembly is provided, including a back-contact solar cell as described above.
[0036] Thirdly, a photovoltaic system is provided, including the battery module as described above.
[0037] The beneficial effects of this invention are:
[0038] This invention provides a back-contact solar cell, a cell module, and a photovoltaic system. A first groove is formed in the P-region and a second groove is formed in the N-region on the non-light-receiving surface of the silicon substrate. Because several first grooves overlap, the P-region has increased edges and height differences, thereby increasing its roughness. Similarly, several second grooves overlap, increasing the N-region's edges and height differences, thus increasing its roughness. By increasing the roughness of the P-region and N-region, the roughness of the entire non-light-receiving surface of the silicon substrate is uniformly increased. During transport via a roller structure, slippage between the silicon substrate and the rollers is avoided, eliminating issues of misaligned silicon wafers and wafer stacking, preventing disruption to production cycle time and damage to the silicon substrate structure, and improving the yield rate of the solar cells.
[0039] Furthermore, because both the P-region and N-region of the non-light-receiving surface have rough groove structures, photons undergo diffuse reflection rather than specular reflection when they reach the non-light-receiving surface. This increases the probability of photons returning to the silicon substrate and the propagation path length within the cell, thereby improving the cell's light absorption. The rough groove structures in the P-region and N-region increase the actual surface area of the non-light-receiving surface, thus increasing the area of the PN junction. This allows for more separation and collection of charge carriers (electrons and holes), shortens the average distance that charge carriers need to diffuse to the PN junction region, reduces the recombination probability of charge carriers, and improves the charge carrier collection efficiency, which helps to increase the short-circuit current of the solar cell. Moreover, because the surface area of the non-light-receiving surface of the silicon substrate is increased more uniformly, the surface area of the passivation contact structure subsequently placed on the non-light-receiving surface can be increased, thereby increasing the contact area between the cell's electrodes and the passivation contact structure, enhancing electrode adhesion, reducing contact resistance, improving the electrode's charge carrier collection efficiency, and ultimately improving the photoelectric conversion efficiency of the solar cell. Furthermore, by fabricating groove structures in both the P and N regions of the non-light-receiving surface, the optical and electrical properties of the entire non-light-receiving surface are uniformly and evenly enhanced, while improving the collection capacity of electrons and holes, thus avoiding mismatch problems caused by optimization in one region while neglecting optimization in another. Attached Figure Description
[0040] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the content of the embodiments of the present invention and these drawings without creative effort.
[0041] Figure 1 This is a schematic diagram of silicon wafers being conveyed on chain machine rollers in existing technology;
[0042] Figure 2 This is a first electron microscope image of a silicon substrate provided in a specific embodiment of the present invention;
[0043] Figure 3 This is a first electron microscope image of the P-region of a silicon substrate provided in a specific embodiment of the present invention;
[0044] Figure 4 This is a schematic diagram of the first array structure of the P region of the silicon substrate provided in a specific embodiment of the present invention;
[0045] Figure 5 This is an electron microscope image of the N-region of a silicon substrate provided in a specific embodiment of the present invention;
[0046] Figure 6 This is a schematic diagram of the second array structure of the N-region of the silicon substrate provided in a specific embodiment of the present invention;
[0047] Figure 7 This is a schematic diagram of the transfer of a silicon substrate on the roller structure of a chain machine according to a specific embodiment of the present invention;
[0048] Figure 8 This is a second electron microscope image of a silicon substrate provided in a specific embodiment of the present invention;
[0049] Figure 9 This is a second electron microscope image of the P-region of a silicon substrate provided in a specific embodiment of the present invention;
[0050] Figure 10 This is an electron microscope image of the first groove in region P provided in a specific embodiment of the present invention;
[0051] Figure 11 This is an electron microscope image of the second groove in the N region provided in a specific embodiment of the present invention.
[0052] Figure 1 middle:
[0053] 1′, silicon wafer; 2′, roller.
[0054] Figures 2 to 11 middle:
[0055] 100. Silicon substrate; 200. Roller structure;
[0056] 1. P-region; 2. N-region; 3. Isolation region; 4. Cutting region; 5. First electrode; 6. Second electrode;
[0057] 11. First groove; 12. First overlapping area; 10. First array structure;
[0058] 21. Second groove; 22. Second overlapping area; 23. Third groove; 24. Third overlapping area; 20. Second array structure. Detailed Implementation
[0059] The technical solution of the present invention will be further described below with reference to the accompanying drawings and specific embodiments.
[0060] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.
[0061] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.
[0062] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.
[0063] In the description of this invention, it should be noted that the terms "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product of this invention is in use. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first," "second," and "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance. In the description of this invention, unless otherwise stated, "a plurality of" means two or more.
[0064] In the description of this invention, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set," "connect," and "fix" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.
[0065] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.
[0066] In this embodiment, the term "and / or" is merely a description of the relationship between associated objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, in this invention, the character " / " generally indicates that the preceding and following associated objects have an "or" relationship.
[0067] Embodiments of the present invention are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.
[0068] This embodiment provides a back-contact solar cell, including a silicon substrate 100. The silicon substrate 100 has a light-receiving surface (front) and a non-light-receiving surface (back) arranged opposite to each other. For a back-contact solar cell, the electrodes used to collect charge carriers are all arranged on the non-light-receiving surface, which allows the light-receiving surface to have a larger area to receive light.
[0069] like Figure 2 As shown, the non-light-receiving surface of the silicon substrate 100 has a P-region 1 and an N-region 2. Combined with... Figure 3 and Figure 4 Region P1 has several first grooves 11 distributed thereon, and at least some of the first grooves 11 overlap to form a first overlapping region 12. (Refer to...) Figure 3 The two adjacent first grooves 11 at positions C and D, as marked in the diagram, overlap, increasing the edge and height difference on the non-light-receiving surface P area 1, thus increasing the roughness of P area 1. Combined with... Figure 5 and Figure 6 In region N2, there are several second grooves 21, and at least some of the second grooves 21 overlap each other to form a second overlapping region 22.
[0070] It is understandable that adjacent first grooves 11 may be spaced apart or overlap each other. In the non-light-receiving surface P region 1, only a portion of the first grooves 11 may overlap each other, or all of the first grooves 11 may overlap with their adjacent first grooves 11. Adjacent second grooves 21 may be spaced apart or overlap each other. In the non-light-receiving surface N region 2, only a portion of the second grooves 21 may overlap each other, or all of the second grooves 21 may overlap with their adjacent second grooves 21.
[0071] The back-contact solar cell provided in this embodiment has a first groove 11 in the P-region 1 and a second groove 21 in the N-region 2 on the non-light-receiving surface of the silicon substrate 100. Because the first grooves 11 overlap, the P-region 1 has increased edges and height differences, thereby increasing the roughness of the P-region 1. Similarly, the second grooves 21 overlap, increasing the N-region 2 has increased edges and height differences, thereby increasing the roughness of the N-region 2. By increasing the roughness of the P-region 1 and N-region 2, the roughness of the entire non-light-receiving surface of the silicon substrate 100 can be uniformly increased. Figure 7 As shown, when the silicon substrate 100 is conveyed through the roller structure 200, slippage between the silicon substrate 100 and the roller can be avoided, eliminating problems such as misalignment and stacking of silicon wafers, preventing disruption to the production cycle and damage to the structure of the silicon substrate 100, and improving the yield of solar cells.
[0072] Furthermore, since both P-region 1 and N-region 2 on the non-light-receiving surface have rough groove structures, photons will undergo diffuse reflection rather than specular reflection when they reach the non-light-receiving surface. This increases the probability of photons returning to the silicon substrate 100 and the propagation path length inside the cell, thereby improving the cell's light absorption. The rough groove structures in P-region 1 and N-region 2 increase the actual surface area of the non-light-receiving surface, thus increasing the area of the PN junction. This allows for more separation and collection of charge carriers (electrons and holes), shortens the average distance that charge carriers need to diffuse to the PN junction region, reduces the recombination probability of charge carriers, and improves the charge carrier collection efficiency, which helps to improve the short-circuit current of the solar cell. Moreover, since the surface area of the non-light-receiving surface of the silicon substrate 100 is increased more uniformly, the surface area of the passivation contact structure subsequently placed on the non-light-receiving surface can be increased, thereby increasing the contact area between the cell's electrodes and the passivation contact structure, enhancing electrode adhesion, reducing contact resistance, improving the electrode's charge carrier collection efficiency, and improving the photoelectric conversion efficiency of the solar cell. Furthermore, since groove structures are fabricated in both P-region 1 and N-region 2 of the non-light-receiving surface, the optical and electrical properties of the entire non-light-receiving surface are uniformly and evenly enhanced, while improving the collection capacity of electrons and holes, thus avoiding mismatch problems caused by optimization of one region while the other region is not optimized.
[0073] like Figure 4As shown, in two adjacent overlapping first grooves 11, the area of the first overlapping region 12 is A1, and the orthographic projection area of the first groove 11 on the silicon substrate 100 is B1. The ratio of A1 to B1 is defined as the overlap rate of the adjacent first grooves 11, and the value of this overlap rate ranges from 15% to 90%. Limiting the overlap rate of the adjacent first grooves 11 to between 15% and 90% serves two purposes: firstly, it prevents the edge length formed by the overlap of the P-region 1 grooves from being too short, resulting in no significant increase in roughness and causing slippage between the silicon substrate 100 and the roller structure 200, which does not significantly improve the problems of uneven wafer movement and wafer stacking; secondly, it prevents the edge length formed by the overlap of the P-region 1 grooves from being too long, resulting in an excessive increase in roughness, thereby affecting the passivation effect of the non-light-receiving surface.
[0074] For example, the overlap rate of adjacent first grooves 11 can be 15%, 20%, 25%, 30%, 35%, 40%, 45%, 50%, 55%, 60%, 65%, 70%, 75%, 80%, 85%, 90%, etc., but is not limited to the values and ranges listed above.
[0075] like Figure 6 As shown, in two adjacent overlapping second grooves 21, the area of the second overlapping region 22 is A2, and the orthographic projection area of the second groove 21 on the silicon substrate 100 is B2. The ratio of A2 to B2 is defined as the overlap rate of the adjacent second grooves 21, and the value of this overlap rate ranges from 15% to 90%. Limiting the overlap rate of the adjacent second grooves 21 to between 15% and 90% serves two purposes: firstly, it prevents the edge length formed by the overlap of the N-region 2 grooves from being too short, resulting in no significant increase in roughness and causing slippage between the silicon substrate 100 and the roller structure 200, which does not significantly improve the problems of uneven wafer movement and wafer stacking; secondly, it prevents the edge length formed by the overlap of the N-region 2 grooves from being too long, resulting in an excessive increase in roughness, thereby affecting the passivation effect of the non-light-receiving surface.
[0076] For example, the overlap rate of adjacent second grooves 21 can be 15%, 20%, 25%, 30%, 35%, 40%, 45%, 50%, 55%, 60%, 65%, 70%, 75%, 80%, 85%, 90%, etc., but is not limited to the values and ranges listed above.
[0077] In some alternative embodiments, the distance between the two farthest points in the orthographic projection of the first groove 11 onto the silicon substrate 100 is 5 μm to 40 μm. This size limitation ensures that the size of the first groove 11 is moderate, thereby distributing the first grooves 11 at an appropriate density in the P-region 1. This avoids the situation where the number of first grooves 11 is too small, resulting in an insignificant increase in roughness, and also avoids the situation where the number of first grooves 11 is too large, resulting in excessive roughness and affecting the passivation effect.
[0078] For example, the distance between the two farthest points in the orthographic projection of the first groove 11 onto the silicon substrate 100 can be 5μm, 10μm, 15μm, 20μm, 25μm, 30μm, 35μm, 40μm, etc., but is not limited to the values and ranges listed above.
[0079] In some optional embodiments, the distance between the two farthest points in the orthographic projection of the second groove 21 onto the silicon substrate 100 is 5 μm to 40 μm. This size limitation ensures that the size of the second groove 21 is moderate, thereby distributing the second grooves 21 at an appropriate density in the N-region 2. This avoids the situation where the number of second grooves 21 is too small, resulting in an insignificant increase in roughness, and avoids the situation where the number of second grooves 21 is too large, resulting in excessive roughness and affecting the passivation effect.
[0080] For example, the distance between the two farthest points in the orthographic projection of the second groove 21 onto the silicon substrate 100 can be 5μm, 10μm, 15μm, 20μm, 25μm, 30μm, 35μm, 40μm, etc., but is not limited to the values and ranges listed above.
[0081] In some embodiments, the orthographic projection of the first groove 11 onto the silicon substrate 100 and the orthographic projection of the second groove 21 onto the silicon substrate 100 are both N-sided, where N is a positive integer greater than or equal to 3. The N-sided first groove 11 and the second groove 21 have relatively regular shapes, which can form relatively straight edges to increase roughness. Moreover, a plurality of N-sided first grooves 11 and a plurality of second grooves 21 can be formed in the P region 1 and the N region 2 respectively by means of the same process (such as etching with an etchant).
[0082] For example, see Figure 4 and Figure 6 The orthographic projection of the first groove 11 onto the silicon substrate 100 and the orthographic projection of the second groove 21 onto the silicon substrate 100 are both quadrilaterals, i.e., N is 4. Of course, in other embodiments, they can also be triangles, pentagons, hexagons, etc., which will not be listed one by one.
[0083] In other embodiments, the outer contours of the orthographic projection of the first groove 11 on the silicon substrate 100 and the orthographic projection of the second groove 21 on the silicon substrate 100 are at least partially curved, such as the orthographic projections of the two being circular, elliptical, or other regular or irregular shapes containing curved outer contours, which are not limited here.
[0084] In this embodiment, the orthographic projections of the first groove 11 and the second groove 21 onto the silicon substrate 100 are both quadrilaterals. The distance between the two farthest points in the orthographic projections of the first groove 11 onto the silicon substrate 100 is the diagonal length of the first groove 11, and the distance between the two farthest points in the orthographic projections of the second groove 21 onto the silicon substrate 100 is the diagonal length of the second groove 21. The diagonal lengths of both are between 5 μm and 40 μm.
[0085] In some embodiments of this application, such as Figure 5 and Figure 6 As shown, at least one third groove 23 is provided on the surface of the second groove 21. By forming the third groove 23 on the surface of the second groove 21, the number of edges formed on the surface of the second groove 21 can be increased, thereby increasing the surface roughness of region N 2. That is, by providing the third groove 23 in the second groove 21, the roughness of region N 2 can be made greater than the roughness of region P 1. By setting the roughness of region N 2 to be greater than the roughness of region P 1, photons will be efficiently scattered back into the battery regardless of whether they reach region P 1 or region N 2, extending the path length of light inside the battery, significantly increasing the light absorption rate, improving the light trapping ability of the entire back side of the battery, and thus improving the photoelectric conversion efficiency. Moreover, the texture structure formed by the grooves can be processed in the same process (such as wet etching or dry etching) on the entire back side of the battery, simplifying the manufacturing process and reducing production complexity and cost.
[0086] It should be noted that although the roughness of region N2 is greater than that of region P1, the roughness of region N2 should be limited to a range that does not affect the passivation effect.
[0087] It should be noted that the roughness described above can be measured by the number of edges formed in region N2 and region P1. The more edges there are, the greater the roughness. Since the second groove 21 in region N2 has a third groove 23, an edge can be formed in the area where the second groove 21 is located. However, the first groove 11 in region P1 does not contain small grooves, so the total number of edges in region N2 is greater than the total number of edges in region P1, resulting in a roughness in region N that is greater than that in region P1.
[0088] It should be emphasized that in this embodiment, the dimensions of the first groove 11 and the second groove 21 are approximately the same. If the second groove 21 does not contain the third groove 23, then the roughness of the N region 2 and the P region 1 are almost the same.
[0089] The number of edges mentioned above can be obtained through microstructure analysis techniques. The microstructure of the silicon substrate is photographed using a microscope, and the number of edges is counted.
[0090] Furthermore, the surface of the second groove 21 is provided with a plurality of third grooves 23, and there are gaps between adjacent third grooves 23 or they overlap to form a third overlapping region 24. The overlapping third grooves 23 can increase the number of edges distributed in the second groove 21, so that more positions in the second groove 21 form a height difference, thereby increasing the surface roughness of region N 2.
[0091] like Figure 5 and Figure 6 As shown, the third groove 23 has a distinct boundary. Figure 5 The boundary of the third groove 23 in each second groove 21 can be clearly seen in the electron microscope image shown.
[0092] For example, the distance between the two farthest points of the third groove 23 in the orthographic projection on the silicon substrate 100 is 0.5 μm to 20 μm. This size limitation makes the size of the third groove 23 moderate, so that the third groove 23 is distributed in a suitable density within the second groove 21 of the N region 2, avoiding the situation where the number of third grooves 23 is too small, resulting in an insignificant increase in roughness, and avoiding the situation where the number of third grooves 23 is too large, resulting in an excessive increase in roughness and affecting the passivation effect.
[0093] For example, the distance between the two farthest points in the orthographic projection of the third groove 23 onto the silicon substrate 100 can be 0.5μm, 1μm, 1.5μm, 2μm, 2.5μm, 3μm, 5μm, 8μm, 10μm, 11μm, 15μm, 17μm, 18μm, 20μm, etc., but is not limited to the values and ranges listed above.
[0094] In some embodiments, the number of third grooves 23 provided in a single second groove 21 is 4 to 30, which ensures that the number of edges in the second groove 21 can be increased to a certain extent, thereby increasing the roughness of the N region 2, and avoiding the problem that the roughness of the N region 2 is too large due to the excessive number of edges in the second groove 21, which would affect the passivation effect.
[0095] For example, the number of third grooves 23 provided in a single second groove 21 can be 4, 7, 8, 11, 14, 19, 22, 25, 28, 33, 37, 38, or 40. However, it is not limited to the specific numbers and ranges listed. Furthermore, the number of third grooves 23 in each second groove 21 can be the same or different, and the specific number can be odd or even; there is no strict limitation here.
[0096] In some embodiments, the orthographic projection of the third groove 23 onto the silicon substrate 100 is an M-sided polygon, where M is a positive integer greater than or equal to 3. For example, the orthographic projection of the third groove 23 onto the silicon substrate 100 is a quadrilateral, i.e., M is 4. The distance between the two farthest points in the orthographic projection of the third groove 23 onto the silicon substrate 100 is the diagonal length of the third groove 23, which is in the range of 0.5 μm to 20 μm.
[0097] In other embodiments, the outer contour of the orthographic projection of the third groove 23 onto the silicon substrate 100 is at least partially curved, such as a circle, an ellipse, or other regular or irregular shape containing a curved outer contour, which is not limited here.
[0098] like Figure 3 As shown, at least a portion of the first grooves 11 are distributed in a linear array to form a first array structure 10; as Figure 5 As shown, at least some of the second grooves 21 are arranged in a linear array to form a second array structure 20. By forming a first array structure 10 with several grooves in P region 1 and forming a second array structure 20 with several second grooves 21 in N region 2, the roughness of P region 1 and N region 2 can be uniformly increased, and the overall morphology of the non-light-receiving surface of silicon substrate 100 is more regular.
[0099] In the first array structure 10, gaps may exist between adjacent first grooves 11, or they may overlap to form a first overlapping region 12. Furthermore, some or all of the first grooves 11 in the first array structure 10 may overlap. In the second array structure 20, gaps may exist between adjacent second grooves 21, or they may overlap to form a second overlapping region 22. Furthermore, some or all of the second grooves 21 in the second array structure 20 may overlap.
[0100] like Figure 3 and Figure 5 As shown, at least one first array structure 10 penetrates region P 1, thereby forming relatively regularly distributed edges and height difference positions in region P 1 along the extension direction of the first array structure 10, resulting in a uniform increase in roughness in that direction. At least one second array structure 20 penetrates region N 2, thereby forming relatively regularly distributed edges and height difference positions in region N 2 along the extension direction of the second array structure 20, resulting in a uniform increase in roughness in that direction.
[0101] Of course, the first array structure 10 may not penetrate P region 1, and the second array structure 20 may not penetrate N region 2.
[0102] In some embodiments, region P1 is provided with a plurality of first array structures 10, which are arranged parallel to each other or at an angle. Among the plurality of first array structures 10 in region P1, they may all be parallel to each other, all be arranged at an angle, or some of the first array structures 10 may be parallel to each other and some of the first array structures 10 may be arranged at an angle.
[0103] In some embodiments, region N 2 is provided with a plurality of second array structures 20, which are arranged parallel to each other or at an angle. Among the plurality of second array structures 20 in region N 2, they may all be parallel to each other, all be arranged at an angle, or some of the second array structures 20 may be parallel to each other and some of the second array structures 20 may be arranged at an angle.
[0104] like Figure 2 As shown, the non-light-receiving surface of the silicon substrate 100 is provided with a plurality of P-regions 1 and a plurality of N-regions 2, which are alternately distributed in sequence, and an isolation region 3 is provided between the P-regions 1 and N-regions 2 to achieve automatic isolation between different regions. At least one first array structure 10 and at least one second array structure 20 are collinear, and their collinear positions pass through the isolation region 3. That is, the first array structure 10 and the second array structure 20 located on the same straight line penetrate through the P-regions 1 and N-regions 2, and the roughness of the non-light-receiving surface can be uniformly increased in the direction of extension of this straight line.
[0105] Specifically, the back-contact solar cell has a cutting region 4, and cutting along this region allows the cell to be slicing. The first array structure 10 and the second array structure 20 are collinear in the cutting region 4; that is, there is a row of grooves in the cutting region 4 that runs through the P-region 1 and the N-region 2, creating a weak line at this location. When slicing, stress preferentially spreads along this row of grooves, resulting in a neater and more controllable final breakage of the cell. Moreover, the collinear grooves in the cutting region 4 result in a larger surface area at the cut edge, providing sufficient light reflection and trapping capabilities, minimizing the loss of effective optical area caused by cutting, and helping to maintain a high short-circuit current.
[0106] like Figure 2 and Figure 8 As shown, a first electrode 5 is disposed in region P1, and a second electrode 6 is disposed in region N2. The first electrode 5 and the second electrode 6 have different polarities and are used to collect charge carriers. See also Figure 3 , Figure 5 as well as Figure 9The first array structure 10 is set at an angle to the first electrode 5. The second array structure 20 is set at an angle to the second electrode 6. After photons are absorbed on the front side of the battery, charge carriers (electrons and holes) are generated. The charge carriers diffuse laterally within the silicon substrate 100 and are collected at the positions of the first electrode 5 and the second electrode 6 on the non-light-receiving surface. The longer the diffusion path of the charge carriers, the greater the recombination probability. Since the first array structure 10 and the first electrode 5 are set at an angle, and the second array structure 20 and the second electrode 6 are set at an angle, the grooves of the two array structures can form a high-speed channel for charge carriers, allowing the charge carriers to first diffuse longitudinally into the nearest array structure and then be transported to the electrode, shortening the diffusion path of the charge carriers and reducing the recombination probability.
[0107] In some embodiments, the angle α between the first array structure 10 and the first electrode 5 is greater than 0° and less than or equal to 15°, and the angle β between the second array structure 20 and the second electrode 6 is greater than 0° and less than or equal to 15°. This limitation of the angle range allows the first array structure 10 and the second array structure 20 to extend further, thereby forming more edges and height difference positions in their extension direction, which helps to increase the roughness of the entire non-light-receiving surface.
[0108] In other embodiments, the angle α between the first array structure 10 and the first electrode 5 is greater than or equal to 90° and less than or equal to 105°, and the angle β between the second array structure 20 and the second electrode 6 is greater than or equal to 90° and less than or equal to 105°. This limitation of the angle range allows the first array structure 10 and the second array structure 20 to greatly shorten the carrier diffusion path and significantly reduce the carrier recombination probability.
[0109] like Figure 10 As shown, the depth h1 of the first groove 11 is 0.05μm to 2.5μm. For the overlapping first grooves 11, the depth h1 is the height difference formed by the overlap. The height difference is limited to the range of 0.05μm to 2.5μm, so that it is not too small and the increase in roughness is not obvious, nor too large and the non-light-receiving surface is too rough and thus affects the passivation effect.
[0110] For example, the depth h1 of the first groove 11 is 0.05μm, 0.1μm, 0.15μm, 0.17μm, 0.2μm, 0.4μm, 0.5μm, 0.8μm, 1μm, 1.2μm, 1.5μm, 1.8μm, 1.9μm, 2μm, 2.1μm, 2.2μm, 2.5μm, etc., but is not limited to the listed values and ranges.
[0111] like Figure 11As shown, the depth h2 of the second groove 21 is 0.05μm to 2.5μm. For the overlapping second grooves 21, the depth h2 is the height difference formed by the overlap. The height difference is limited to the range of 0.05μm to 2.5μm, so that it is not too small and the increase in roughness is not obvious, nor too large and the non-light-receiving surface is too rough and thus affects the passivation effect.
[0112] For example, the depth h2 of the second groove 21 is 0.05μm, 0.1μm, 0.15μm, 0.17μm, 0.2μm, 0.4μm, 0.5μm, 0.8μm, 1μm, 1.2μm, 1.5μm, 1.8μm, 1.9μm, 2μm, 2.1μm, 2.2μm, 2.5μm, etc., but is not limited to the listed values and ranges.
[0113] This embodiment also provides a battery module, including the back-contact solar cell described above. Because the back-contact solar cell has a high yield rate and high photoelectric conversion efficiency, it can improve the quality of the battery module, reduce production costs, and enable the battery module to have high photoelectric conversion efficiency. It should be noted that this battery module has the same or similar beneficial effects as the aforementioned back-contact solar cell, and the related aspects between the two can be referred to each other; to avoid repetition, they will not be repeated here.
[0114] This embodiment also provides a photovoltaic system, including at least one battery module as described above. Because this photovoltaic system includes the aforementioned high-yield and high-photovoltaic-conversion-efficiency battery module, it can improve power generation efficiency and reduce construction costs.
[0115] Photovoltaic systems can be applied in photovoltaic power plants, such as ground-mounted, rooftop, and floating power plants, as well as in equipment or devices that utilize solar energy to generate electricity, such as user solar power supplies, solar streetlights, solar cars, and solar buildings. Of course, it's understandable that the application scenarios of photovoltaic systems are not limited to these; that is, photovoltaic systems can be applied in all fields that require solar energy to generate electricity. Taking a photovoltaic power generation network as an example, a photovoltaic system can include photovoltaic arrays, combiner boxes, and inverters. A photovoltaic array can be a combination of multiple battery modules; for example, multiple battery modules can form multiple photovoltaic arrays. The photovoltaic arrays are connected to combiner boxes, which collect the current generated by the photovoltaic arrays. The collected current flows through an inverter and is converted into AC power required by the mains grid before being connected to the mains grid to achieve solar power supply.
[0116] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not intended to limit the implementation of the present invention. Those skilled in the art will be able to make various obvious changes, readjustments, and substitutions without departing from the scope of protection of the present invention. It is neither necessary nor possible to exhaustively describe all embodiments here. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the claims of the present invention.
Claims
1. A back-contact solar cell, characterized in that, Includes a silicon substrate (100), the silicon substrate (100) having a light-receiving surface and a non-light-receiving surface disposed opposite to each other, the non-light-receiving surface having a P region (1) and an N region (2); The P region (1) is provided with a plurality of first grooves (11), and at least some of the first grooves (11) overlap each other to form a first overlapping region (12). The N region (2) is provided with a number of second grooves (21), and at least some of the second grooves (21) overlap each other to form a second overlapping region (22).
2. The back-contact solar cell according to claim 1, characterized in that, The surface of the second groove (21) is provided with at least one third groove (23).
3. The back-contact solar cell according to claim 2, characterized in that, The surface of the second groove (21) is provided with a plurality of the third grooves (23), and there is a gap between adjacent third grooves (23) or they overlap to form a third overlapping area (24).
4. The back-contact solar cell according to claim 3, characterized in that, The distance between the two furthest points of the third groove (23) in the orthographic projection on the silicon substrate (100) is 0.5μm to 20μm.
5. The back-contact solar cell according to claim 2, characterized in that, The number of the third grooves (23) provided in a single second groove (21) is 4 to 30.
6. The back-contact solar cell according to claim 1, characterized in that, At least a portion of the first grooves (11) are arranged in a linear array to form a first array structure (10); And / or, at least a portion of the second groove (21) is distributed in a linear array to form a second array structure (20).
7. The back-contact solar cell according to claim 6, characterized in that, At least one of the first array structures (10) penetrates the P region (1); And / or, at least one of the second array structures (20) extends through the N region (2).
8. The back-contact solar cell according to claim 6, characterized in that, An isolation zone (3) is provided between the P region (1) and the N region (2), at least one of the first array structures (10) and at least one of the second array structures (20) are collinear, and the collinear positions pass through the isolation zone (3).
9. The back-contact solar cell according to claim 8, characterized in that, The back-contact solar cell has a cut area (4), and the first array structure (10) and the second array structure (20) are collinear in the cut area (4).
10. The back-contact solar cell according to claim 6, characterized in that, The P region (1) is provided with a first electrode (5), and the first array structure (10) is arranged at an angle to the first electrode (5); And / or, the N region (2) is provided with a second electrode (6), and the second array structure (20) is arranged at an angle to the second electrode (6).
11. The back-contact solar cell according to claim 10, characterized in that, The angle between the first array structure (10) and the first electrode (5) is greater than 0° and less than or equal to 15° or greater than or equal to 90° and less than or equal to 105°; And / or, the angle between the second array structure (20) and the second electrode (6) is greater than 0° and less than or equal to 15° or greater than or equal to 90° and less than or equal to 105°.
12. The back-contact solar cell according to claim 6, characterized in that, The P region (1) is provided with a plurality of the first array structures (10), which are arranged parallel to each other or at an angle. And / or, the N region (2) is provided with a plurality of the second array structures (20), which are parallel to each other or at an angle to each other.
13. The back-contact solar cell according to any one of claims 1-12, characterized in that, The area of the first overlapping region (12) is A1, and the orthographic projection area of the first groove (11) on the silicon substrate (100) is B1. The ratio of A1 to B1 is 15% to 90%. And / or, the area of the second overlapping region (22) is A2, the orthographic projection area of the second groove (21) on the silicon substrate (100) is B2, and the ratio of A2 to B2 is 15% to 90%.
14. The back-contact solar cell according to any one of claims 1-12, characterized in that, The distance between the two farthest points of the first groove (11) in the orthographic projection on the silicon substrate (100) is 5 μm to 40 μm; And / or, the distance between the two furthest points of the second groove (21) in the orthographic projection on the silicon substrate (100) is 5 μm to 40 μm.
15. The back-contact solar cell according to any one of claims 1-12, characterized in that, The depth of the first groove (11) is 0.05μm to 2.5μm; And / or, the depth of the second groove (21) is 0.05μm to 2.5μm.
16. The back-contact solar cell according to any one of claims 1-12, characterized in that, The orthographic projection of the first groove (11) onto the silicon substrate (100) is an N-sided shape or the outer contour is at least partially curved; And / or, the orthographic projection of the second groove (21) onto the silicon substrate (100) is N-sided or the outer contour is at least partially curved; Where N is a positive integer greater than or equal to 3.
17. A battery assembly, characterized in that, Including the back-contact solar cell as described in any one of claims 1-16.
18. A photovoltaic system, characterized in that, Includes the battery assembly as described in claim 17.
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