Program detection system, program detection method and device, equipment and storage medium

Abstract

The embodiment of the invention provides a program detection system, a program detection method, a program detection device, equipment and a storage medium, and relates to the technical field of automobile electronic embedded software, the system comprises a first chip and a second chip; the first chip is configured to run a first program, and the first program is used for providing a first program function; the first chip is configured to periodically send a detection data frame to the second chip, and the detection data frame is used for indicating the first chip to feed back program running information of the first program; the second chip is further configured to generate a feedback data frame in response to the received detection data frame, and the feedback data frame is used for indicating the second chip to feed back the program running state of the first program; the first chip is further configured to receive the feedback data frame and obtain the program running state of the first program based on the feedback data frame.

Description

Technical Field

[0001] This application relates to the field of automotive electronic embedded software technology, and in particular to a program testing system, program testing method, device, equipment and storage medium. Background Technology

[0002] With the rapid development of the automotive industry and the continuous improvement of people's living standards, the number of cars on the road is increasing. Automobiles are shifting from mechanical to electronic and electrical systems, resulting in a growing number of vehicle controllers and a gradual development towards software-defined vehicles. The security requirements for automotive software are also gradually increasing.

[0003] In related technologies, the microcontroller of a car is used to detect the operating status of automotive software.

[0004] However, the above method relies on the operating status of the microcontroller. That is, the detection of automotive software is achieved when the microcontroller is running normally; when the microcontroller itself malfunctions, the detection of automotive software fails, the operating status of automotive software cannot be obtained, and the detection efficiency of automotive software is reduced. Summary of the Invention

[0005] This application provides a program detection system, program detection method, apparatus, device, and storage medium. The technical solution is as follows:

[0006] In one aspect, a program detection system is provided, the system comprising a first chip and a second chip;

[0007] The first chip is configured to run a first program, which provides first program functions;

[0008] The first chip is configured to periodically send detection data frames to the second chip, the detection data frames including program execution information of the first program;

[0009] The second chip is further configured to generate a feedback data frame in response to receiving the detection data frame, the feedback data frame including the program running state of the first program; and to send the feedback data frame to the first chip;

[0010] The first chip is also configured to receive the feedback data frame and obtain the program running status of the first program based on the feedback data frame.

[0011] On the other hand, a program detection method is provided, executed by a first chip, the method comprising:

[0012] Run the first program, which provides the functions of the first program.

[0013] The detection data frame, which includes program running information, is periodically sent to the second chip.

[0014] The program receives a feedback data frame generated by the second chip based on the detection data frame and obtains the program running status of the first program.

[0015] On the other hand, a program detection method is provided, executed by a second chip, the method comprising:

[0016] The system receives detection data frames periodically sent by the first chip. The detection data frames include program execution information of the first program, which runs on the first chip and is used to provide the functions of the first program.

[0017] Based on the detection data frame, a feedback data frame is generated, which is used to obtain the program running status of the first program;

[0018] The feedback data frame is sent to the first chip.

[0019] On the other hand, a program detection device is provided, executed by a first chip, the device comprising:

[0020] The execution module is used to run the first program, which provides the functions of the first program.

[0021] The first sending module is used to periodically send detection data frames to the second chip, the detection data frames including program running information;

[0022] The first receiving module is used to receive the feedback data frame generated by the second chip based on the detection data frame, and to obtain the program running status of the first program.

[0023] On the other hand, a program detection method is provided, executed by a second chip, the device comprising:

[0024] The second receiving module is used to receive detection data frames periodically sent by the first chip. The detection data frames include program running information of the first program, which runs on the first chip and is used to provide the functions of the first program.

[0025] A generation module is used to generate a feedback data frame based on the detection data frame, wherein the feedback data frame is used to obtain the program running status of the first program;

[0026] The second sending module is used to send the feedback data frame to the first chip.

[0027] On the other hand, a computer-readable storage medium is provided, wherein at least one segment is stored in the storage medium, the at least one segment being loaded and executed by a processor to implement the program detection method as described above.

[0028] On the other hand, a computer program product or computer program is provided, which includes computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computer device to perform the program detection method as described above.

[0029] The beneficial effects of the technical solutions provided in this application include at least the following:

[0030] A new chip (second chip) is introduced into the vehicle terminal to independently detect the program execution status of the first program run by the first chip. This second chip works in conjunction with the first chip to complete the detection of the program execution status of the first program. This avoids situations where a single chip malfunctions during the program detection process of the first program, resulting in an inability to know the program execution status, thus improving the program detection efficiency to a certain extent. Attached Figure Description

[0031] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0032] Figure 1 This application illustrates an exemplary embodiment of the execution architecture flowchart of a program detection system.

[0033] Figure 2 This application illustrates an exemplary embodiment of the interactive flow architecture of a feedback data frame.

[0034] Figure 3 This invention provides a flowchart illustrating the execution architecture of a program detection system as shown in another exemplary embodiment of the present application.

[0035] Figure 4 A schematic diagram of a first detection window provided in an exemplary embodiment of this application is shown;

[0036] Figure 5 This application illustrates an exemplary embodiment of the interactive flow architecture of a feedback data frame.

[0037] Figure 6A flowchart illustrating a program detection method according to an exemplary embodiment of this application is shown.

[0038] Figure 7 A flowchart illustrating a program detection method according to another exemplary embodiment of this application is shown;

[0039] Figure 8 This illustration shows a schematic diagram of the connection between an MCU and a TLE8888 chip provided in an exemplary embodiment of this application;

[0040] Figure 9 This application illustrates a schematic diagram of the process corresponding to the dog feeding service of a window watchdog, as shown in an exemplary embodiment.

[0041] Figure 10 This application illustrates a flowchart of a watchdog feeding service, as shown in an exemplary embodiment.

[0042] Figure 11 This invention provides a structural block diagram of a program detection apparatus according to an exemplary embodiment of the present application.

[0043] Figure 12 A structural block diagram of a program detection apparatus provided in another exemplary embodiment of this application is shown;

[0044] Figure 13 A structural block diagram of a computer device provided in an exemplary embodiment of this application is shown. Detailed Implementation

[0045] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0046] In this application, the terms "first" and "second" are used to distinguish between identical or similar items that have essentially the same function. It should be understood that there is no logical or temporal dependency between "first" and "second", nor is there any limitation on the quantity or execution order.

[0047] Please refer to Figure 1 This document illustrates an execution architecture flowchart of a program detection system according to an exemplary embodiment of this application. The architecture flowchart includes a first chip 100 and a second chip 110.

[0048] In this embodiment, the first chip 100 and the second chip 110 are chips integrated in the vehicle terminal, and the two chips perform different functions.

[0049] The first chip 100 is implemented as a microcontroller chip in the vehicle terminal.

[0050] The second chip 110 is used to detect the running status of the first program running within the first chip 100. This running status is used to indicate whether the first program is running normally, including normal running status and abnormal running status.

[0051] In this embodiment, the second chip 110 is implemented as a TLE8888 chip.

[0052] A communication connection is established between the first chip 100 and the second chip 110, so that the first chip 100 is responsible for the strategy calculation of vehicle commands, and the remaining functions are delivered to the second chip 110.

[0053] Indicatively, the second chip 110 supports control of multiple outputs within the vehicle terminal and fault diagnosis of the output drive ports, thereby determining faults in the output drive, such as short grounding, power failure, open circuit, etc. It then obtains the fault status through the module interface service and feeds it back to the first chip 100 for appropriate fault handling. In other words, the second chip 110 detects whether the first program has a fault, and if a fault occurs, the first chip 100 takes corresponding action based on that fault.

[0054] Optionally, the first chip 100 and the second chip 110 communicate and exchange information via a serial bus protocol.

[0055] To illustrate, the first chip 100 and the second chip 110 communicate with each other via a synchronous, full-duplex, master-slave serial bus protocol (Serial Peripheral Interface, or SPI for short).

[0056] The following describes the process of the executable program detection method based on the first chip 100 and the second chip 110.

[0057] The first chip 100 is configured to run a first program (step 120). The first program refers to the application software program installed in the vehicle terminal. The first program provides first program functions, that is, different first programs are used to implement different program functions.

[0058] To illustrate, the first program is the in-vehicle entertainment program, which provides functions such as playing music and videos. The second program is the sensor data acquisition program, which provides functions such as acquiring data collected by different sensors within the in-vehicle terminal.

[0059] The first chip 100 periodically sends detection data frames to the second chip 110 (step 130). The detection data frames are used to instruct the first chip 100 to feed back the program running information of the first program to the second chip 110. The program running information includes at least one of the following: program version number of the first program, running start time, running duration, signature information, calibration data version, etc.

[0060] Among them, the program version number is used to uniquely identify the first program, and the program version number is implemented as a readable string or numeric code; the running start time refers to the moment when the first chip 100 runs the first program; the running duration time refers to the moment when the first chip 100 continuously runs the first program; the signature information and calibration data version are two independent identity tags for the first program. The signature information refers to the hash signature value calculated by the asymmetric encryption algorithm, including but not limited to the signature algorithm identifier, the signer certificate chain, the hash algorithm required for signing, timestamp information, and version serial number, etc. The signature information is used to determine the firmware source and version of the first program in the event of a failure; the calibration data version is a preset readable string or a preset number of bits counter, used to uniquely identify the calibration parameter set corresponding to the vehicle components in the vehicle terminal. The vehicle components include but are not limited to the engine, motor, and chassis, etc.

[0061] In some embodiments, the first chip 100 generates a detection data frame from the program running information according to the data frame format specified by the serial bus protocol.

[0062] Indicatively, the first chip 100 generates a detection data frame by processing the program execution information in accordance with the data frame format indicated by the SPI protocol.

[0063] In another optional embodiment, the first chip 100 acquires its own register information, writes the register information and program execution information into the initial data frame of the serial bus protocol calibration (indication), and obtains the detection data frame.

[0064] The second chip 110 is configured to generate a feedback data frame (step 140) in response to receiving a detection data frame sent by the first chip 100. The feedback data frame is used to instruct the second chip to provide feedback on the program running status of the first program. The program running status refers to the running condition of the first program, which includes normal running status and abnormal running status.

[0065] In some embodiments, the second chip 110 receives a detection data frame, performs a program detection process on the first program, and generates a feedback data frame based on the program detection result. The data frame format of the feedback data frame conforms to the data frame format indicated by the serial bus protocol.

[0066] The feedback data frame includes program running status and fault-related information. The program running status includes normal running status and abnormal running status. The fault-related information refers to the fault cause that leads to the abnormal operation of the first program, such as short grounding.

[0067] For details on the generation process of the feedback data frame, please refer to the following embodiments, which will not be described in detail here.

[0068] The second chip 110 sends a feedback data frame to the first chip 100 (step 150), wherein the feedback data frame is transmitted via a serial bus protocol.

[0069] The first chip 100 receives the feedback data frame (step 160).

[0070] The first chip 100 obtains the program running status of the first program based on the feedback data frame (step 170). Optionally, the first chip 100 parses the feedback data frame to obtain the program running status.

[0071] In an optional embodiment, the first chip 100 parses the feedback data frame to obtain the program running status and fault-related information of the first program.

[0072] In another optional embodiment, after the first chip 100 parses the feedback data frame and determines that the program running state of the first program is an abnormal running state, it obtains fault-related information from the feedback data frame.

[0073] In this embodiment of the application, the first chip 100 determines the operation adjustment strategy of the first program based on fault-related information. The operation adjustment strategy refers to the strategy for adjusting the operation state of the first program.

[0074] The operation adjustment strategies include restarting the first program, closing the first program, continuing to run the first program, and running the first program for a specified time period and then closing the first program.

[0075] The first chip 100 adjusts the running status of the first program according to the operation adjustment strategy. This can be illustrated as, for example, closing or restarting the first program.

[0076] In this embodiment, a new chip (second chip) is introduced into the vehicle terminal to independently detect the program running status of the first program executed by the first chip. This second chip works in conjunction with the first chip to complete the detection of the program running status of the first program. This avoids situations where a single chip malfunctions during the program detection process of the first program, making it impossible to know the program running status, thus improving the program detection efficiency to a certain extent.

[0077] Please refer to Figure 2This illustration shows an interactive flow architecture block diagram of a feedback data frame, as illustrated in an exemplary embodiment of this application. The architecture block diagram includes a first chip 200 and a second chip 210.

[0078] In this application embodiment, the relevant content of the first chip 200 and the second chip 210 can be found in the above embodiments, and will not be repeated here.

[0079] The following describes the triggering conditions for the first chip 200 to send detection data frames to the second chip 210.

[0080] The first chip 200 sends an enable data frame to the second chip (step 220).

[0081] The first chip 200 and the second chip 210 communicate with each other via a serial bus protocol. That is, the first chip 200 transmits an enable data frame to the second chip 210 via the serial bus protocol.

[0082] The enable data frame is used to instruct the second chip 210 to execute the program detection process, which refers to the process by which the second chip 210 detects the program running status of the first program.

[0083] The enable data frame carries an enable command that instructs the second chip 210 to start the program detection process.

[0084] The second chip 210 receives the enable data frame sent by the first chip (step 230).

[0085] The second chip 210 runs a detection program (step 240) based on the received enable data frame. Details of the detection program can be found above. Figure 9 as well as Figure 10 The content shown.

[0086] Optionally, the second chip 210 includes a security protection state and a program detection state. In the security protection state, even if the first chip 200 sends a detection data frame to the second chip 210, it cannot drive the second chip 210 to execute the program detection process. In the program detection state, the first chip 200 sends an enable data frame and a detection data frame to drive the second chip 210 to execute the program detection process. That is, the enable data frame is used to instruct the second chip to switch to the program detection state, and provides feedback on the detection data frame after receiving it.

[0087] In this embodiment, the second chip 210 sends an enable feedback data frame to the first chip 200 based on the detection program (step 250).

[0088] The first chip 200 receives an enable feedback data frame (step 260) and obtains from the enable feedback data frame that the second chip 210 has switched to the program detection state and can execute the program detection process. That is, the first chip 200 periodically sends detection data frames to the second chip based on the enable feedback data frame.

[0089] The subsequent interaction between the first chip 200 and the second chip 210 can be found in the above embodiments, and will not be repeated here.

[0090] In this embodiment, a new chip (second chip) is introduced into the vehicle terminal to independently detect the program running status of the first program executed by the first chip. This second chip works in conjunction with the first chip to complete the detection of the program running status of the first program. This avoids situations where a single chip malfunctions during the program detection process of the first program, making it impossible to know the program running status, thus improving the program detection efficiency to a certain extent.

[0091] Based on the above embodiments, the process of generating feedback data frames is described below. Please refer to... Figure 3 This illustration shows a flowchart of the execution architecture of a program detection system according to another exemplary embodiment of this application. The flowchart includes a first chip 300 and a second chip 310.

[0092] The first chip 300 is configured to run a first program (step 320). The first program refers to the application software program installed in the vehicle terminal. The first program provides first program functions, that is, different first programs are used to implement different program functions.

[0093] To illustrate, the first program is the in-vehicle entertainment program, which provides functions such as playing music and videos. The second program is the sensor data acquisition program, which provides functions such as acquiring data collected by different sensors within the in-vehicle terminal.

[0094] The first chip 300 periodically sends detection data frames to the second chip 310 (step 330). The detection data frames are used to instruct the first chip 300 to feed back the program running information of the first program to the second chip 310. The program running information includes at least one of the following: program version number of the first program, running start time, running duration, signature information, calibration data version, etc. For relevant content, please refer to the above embodiments, which will not be repeated here.

[0095] In this embodiment, the detection data frame carries a first detection window, which indicates the first start time and the first stop time of the program detection process. Optionally, the first detection window refers to the second chip detecting the program running status of the first program within the first detection window.

[0096] In some embodiments, the first chip 300 generates a detection data frame from the program running information according to the data frame format specified by the serial bus protocol.

[0097] As an illustration, the first chip 300 generates a detection data frame by processing the program running information in accordance with the data frame format indicated by the SPI protocol.

[0098] In another optional embodiment, the first chip 300 acquires its own register information, writes the register information and program execution information into the initial data frame of the serial bus protocol calibration (indication), and obtains the detection data frame.

[0099] The second chip 310 receives and parses the detection data frame to determine the first detection window (step 340).

[0100] When the second chip 310 executes the program detection process for the first program, it receives and parses the detection data frame and determines the first detection window (step 350).

[0101] The writing result includes "written" and "not written". "Written" means that the second chip 310 writes the preset key value into its own register during the duration of the first detection window. "Not written" means that the second chip 310 does not write the preset key value into its own register during the duration of the first detection window. The preset key value is set in advance by relevant personnel, or the preset key value is randomly generated by the first chip 300 and carried in the detection data frame, or the preset key value is randomly generated by the second chip 310. This application does not limit the specifics of these possibilities.

[0102] In this embodiment, after the second chip 310 determines the first detection window, it loads the first detection window according to its own timing system. That is, the time when the detection data frame is received is determined as the first opening time of the first detection window, the total duration of the first detection window is loaded based on the first opening time, and the time after loading is determined as the first closing time.

[0103] In some embodiments, the first detection window is divided into a first time window and a second time window, the first time window is determined to be the closed write window, and the second time window is determined to be the open write window.

[0104] In some embodiments, the total duration of the sum of the first time window and the second time window is consistent with the total duration of the first detection window.

[0105] In some embodiments, the total duration of the sum of the first time window and the second time window is greater than the total duration of the first detection window.

[0106] In some embodiments, the total duration of the sum of the first time window and the second time window is less than the total duration of the first detection window, and this application does not limit this.

[0107] In the first time window, the second chip 310 cannot write the preset key value into its own register, while in the second time window, the second chip 310 is allowed to write the preset key value into its own register.

[0108] Indicative, such as Figure 4 As shown, Figure 4 This illustration shows a schematic diagram of a first detection window provided in an exemplary embodiment of this application. During the periodic transmission and reception of detection data frames, the first chip and the second chip have multiple first detection windows (…). Figure 4 Only the first detection window 40 is shown in the diagram. Taking the first detection window 40 as an example, the duration of the first detection window 40 is set to 100ms. The first detection window includes window a and window b. Window a is implemented as a closed write window and is set to 99.2ms. Window b is implemented as an open write window and is set to 3.2ms. The second chip receives the detection data frame at 1ms. The second chip cannot write the preset key value to its own register between 1ms and 99.2ms. After 99.2ms and before 100ms, the preset key value is allowed to be written to its own register.

[0109] In this embodiment, a new chip (second chip) is introduced into the vehicle terminal to independently detect the program running status of the first program executed by the first chip. This second chip works in conjunction with the first chip to complete the detection of the program running status of the first program. This avoids situations where a single chip malfunctions during the program detection process of the first program, making it impossible to know the program running status, thus improving the program detection efficiency to a certain extent.

[0110] Based on the above embodiments, the process of generating feedback data frames is described below. Please refer to... Figure 5 This illustration shows an interactive flow architecture block diagram of a feedback data frame, as illustrated in an exemplary embodiment of this application. The architecture block diagram includes a first chip 500 and a second chip 510.

[0111] The first chip 500 is configured to run a first program (step 520). The first program refers to the application software program installed in the vehicle terminal. The first program provides first program functions, that is, different first programs are used to implement different program functions.

[0112] To illustrate, the first program is the in-vehicle entertainment program, which provides functions such as playing music and videos. The second program is the sensor data acquisition program, which provides functions such as acquiring data collected by different sensors within the in-vehicle terminal.

[0113] The first chip 500 periodically sends detection data frames to the second chip 510 (step 530). The detection data frames are used to instruct the first chip 500 to feed back the program running information of the first program to the second chip 510. The program running information includes at least one of the following: program version number of the first program, running start time, running duration, signature information, calibration data version, etc. For relevant content, please refer to the above embodiments, which will not be repeated here.

[0114] In this embodiment, the detection data frame carries a second detection window and sequence information. The second detection window is used to indicate the second start time and the second stop time of the program detection process. The sequence information includes first sequence information and second sequence information. The first sequence information is generated by the first chip 500 to query the second chip 510. The second chip 510 generates third sequence information based on the first sequence information as a response to the first sequence information. The second sequence information matches the first sequence information and is used to verify whether the third sequence information fed back by the second chip 510 based on the first sequence information is correct.

[0115] Optionally, the first detection window refers to the second chip detecting the program running status of the first program within the first detection window.

[0116] In some embodiments, the first chip 500 generates a detection data frame from the program running information according to the data frame format specified by the serial bus protocol.

[0117] As an illustration, the first chip 500 generates a detection data frame by processing the program running information in accordance with the data frame format indicated by the SPI protocol.

[0118] In another alternative embodiment, the first chip 500 acquires its own register information, writes the register information and program execution information into the initial data frame of the serial bus protocol calibration (indication), and obtains the detection data frame.

[0119] In some embodiments, the second chip 510 determines the second detection window, the first sequence information, and the second sequence information from the detection data frame (step 540).

[0120] The second chip 510 feeds back the first sequence information in the second detection window to obtain the third sequence information (step 550), wherein the third sequence information can be regarded as the second chip 510's response to the first sequence information.

[0121] In this embodiment, after the second chip 510 determines the second detection window, it loads the second detection window according to its own timing system. That is, the time when the detection data frame is received is determined as the second opening time of the second detection window, the total duration of the second detection window is loaded based on the second opening time, and the time after loading is determined as the second closing time.

[0122] In some embodiments, the second detection window is divided into a third time window and a fourth time window, with the third time window designated as the response window and the fourth time window designated as the write window. In the response window, the second chip 510 feeds back the first sequence information to obtain the third sequence information; and matches it with the second sequence information to obtain a matching result; in the write window, the second chip 510 writes the matching result into its own register.

[0123] Optionally, the second chip 510 generates a feedback data frame based on its own register information. After the first chip 500 subsequently receives the feedback data frame, it can directly parse the feedback data frame to obtain the sequence information matching status, thereby determining the program running status of the first program.

[0124] In some embodiments, the total duration of the sum of the third and fourth time-phase windows is consistent with the total duration of the first detection window.

[0125] In some embodiments, the total duration of the sum of the third and fourth time-step windows is greater than the total duration of the first detection window.

[0126] In some embodiments, the total duration of the sum of the third time window and the fourth time window is less than the total duration of the first detection window, and this application does not limit this.

[0127] In another optional implementation, the second chip 510 responds to the first sequence information sent by the first chip 500 within a third time window to obtain the second sequence information; the second chip 510 writes the second sequence information into its own register within a fourth time window.

[0128] Optionally, the second chip 510 generates a feedback data frame based on its own register information. After the first chip 500 subsequently receives the feedback data frame, it determines the third sequence information from the feedback data frame. The first chip 500 then matches the second and third sequence information to obtain the matching result, thereby determining the program running state of the first program.

[0129] Indicatively, the first sequence information can be regarded as a "question" set by the first chip 500, and the second sequence information can be regarded as the "standard answer" to the "question". The first chip 500 sends the "question" to the second chip 510, and the second chip 510 answers the received "question" to obtain the "answer".

[0130] The second chip 510 matches the second sequence information and the third sequence information, and generates a matching result based on the matching results (step 560). The matching result includes matched and unmatched. A matched result means that the second sequence information and the third sequence information are consistent, and an unmatched result means that the second sequence information and the third sequence information are inconsistent.

[0131] Indicatively, the second chip 510 matches the "answer" and the "standard answer" to determine if they match. If they match, the matching result is determined to be a match; if they do not match, the matching result is determined to be a mismatch.

[0132] The second chip 510 generates a feedback data frame based on the matching result (step 570). That is, the matching result is written into the initial data frame to generate the feedback data frame.

[0133] In this embodiment, a new chip (second chip) is introduced into the vehicle terminal to independently detect the program running status of the first program executed by the first chip. This second chip works in conjunction with the first chip to complete the detection of the program running status of the first program. This avoids situations where a single chip malfunctions during the program detection process of the first program, making it impossible to know the program running status, thus improving the program detection efficiency to a certain extent.

[0134] Please refer to Figure 6 This illustrates a flowchart of a program detection method according to an exemplary embodiment of this application. The method is... Figure 1 The first chip shown is executing.

[0135] Step 600: Run the first program.

[0136] Optionally, the first chip starts and runs the first program, which refers to the application software program installed in the vehicle terminal. The first program provides the first program function, that is, different first programs are used to implement different program functions.

[0137] To illustrate, the first program is the in-vehicle entertainment program, which provides functions such as playing music and videos. The second program is the sensor data acquisition program, which provides functions such as acquiring data collected by different sensors within the in-vehicle terminal.

[0138] Step 610: Periodically send detection data frames to the second chip.

[0139] Optionally, the detection data frame includes program running information of the first program, which includes at least one of the following: program version number, running start time, running duration, signature information, calibration data version, etc.

[0140] Among them, the program version number is used to uniquely identify the first program, and the program version number is implemented as a readable string or numeric code; the running start time refers to the time when the first program is running; the running duration time refers to the time when the first program is running continuously; the signature information and calibration data version are two independent identity tags for the first program. The signature information refers to the hash signature value calculated by the asymmetric encryption algorithm, including but not limited to the signature algorithm identifier, the signer certificate chain, the hash algorithm required for signing, timestamp information, and version serial number, etc. The signature information is used to determine the firmware source and version of the first program in the event of a failure; the calibration data version is a preset readable string or a preset number of bits counter, used to uniquely identify the calibration parameter set corresponding to the vehicle components in the vehicle terminal, including but not limited to the engine, motor, and chassis, etc.

[0141] In some embodiments, the program running information is used to generate a detection data frame according to the data frame format specified by the serial bus protocol.

[0142] As an example, the program execution information is used to generate a detection data frame according to the data frame format indicated by the SPI protocol.

[0143] In another optional embodiment, the system obtains its own register information, writes the register information and program execution information into the initial data frame of the serial bus protocol calibration (indication), and obtains the detection data frame.

[0144] Step 620: Receive the feedback data frame generated by the second chip based on the detection data frame, and obtain the running status of the first program.

[0145] The feedback data frame includes the program running status of the first program, which refers to the running status of the first program, including normal running status and abnormal running status.

[0146] The feedback data frame includes program running status and fault-related information. The program running status includes normal running status and abnormal running status. The fault-related information refers to the fault cause that leads to the abnormal operation of the first program, such as short grounding.

[0147] That is, the second chip receives the detection data frame, performs the program detection process of the first program, and generates a feedback data frame based on the program detection result. The data frame format of the feedback data frame conforms to the data frame format indicated by the serial bus protocol.

[0148] In an optional embodiment, the feedback data frame is parsed to obtain the program running status and fault-related information of the first program.

[0149] In another optional embodiment, after parsing the feedback data frame to determine that the program running state of the first program is an abnormal running state, fault-related information is obtained from the feedback data frame.

[0150] In this embodiment of the application, an operation adjustment strategy for the first program is determined based on fault-related information. The operation adjustment strategy refers to the strategy for adjusting the operation state of the first program.

[0151] The operation adjustment strategies include restarting the first program, closing the first program, continuing to run the first program, and running the first program for a specified time period and then closing the first program.

[0152] Adjust the running status of the first program according to the operation adjustment strategy. This can be illustrated as, for example, closing or restarting the first program.

[0153] In this embodiment, a new chip (second chip) is introduced into the vehicle terminal to independently detect the program running status of the first program executed by the first chip. This second chip works in conjunction with the first chip to complete the detection of the program running status of the first program. This avoids situations where a single chip malfunctions during the program detection process of the first program, making it impossible to know the program running status, thus improving the program detection efficiency to a certain extent.

[0154] Please refer to Figure 7 This illustrates a flowchart of a program detection method according to another exemplary embodiment of this application. The method is... Figure 1 The second chip shown performs the operation.

[0155] Step 700: Receive detection data frames periodically sent by the first chip.

[0156] Optionally, the detection data frame includes program execution information of the first program, which runs on the first chip and is used to provide the functions of the first program.

[0157] Step 710: Generate a feedback data frame based on the detection data frame.

[0158] Optionally, the detection data frame is parsed to determine the first detection window, which is used to indicate the first start time and the first stop time of the program detection process.

[0159] Determine whether the preset key value is written into the register of the second chip within the first detection window, and obtain the writing result; determine the register information of the register based on the writing result; and generate a feedback data frame based on the register information.

[0160] The writing result includes "written" and "not written". "Written" means that the preset key value is written into its own register during the duration of the first detection window. "Not written" means that the preset key value is not written into its own register during the duration of the first detection window. The preset key value is set in advance by relevant personnel, or the preset key value is randomly generated and carried in the detection data frame, or the preset key value is randomly generated. This application does not limit the specifics of these possibilities.

[0161] Optionally, after determining the first detection window, the first detection window is loaded according to its own time system. That is, the time when the detection data frame is received is determined as the first opening time of the first detection window, the total duration of the first detection window is loaded based on the first opening time, and the time after loading is determined as the first closing time.

[0162] In some embodiments, the first detection window is divided into a first time window and a second time window, the first time window is determined to be the closed write window, and the second time window is determined to be the open write window.

[0163] Optionally, the total duration of the sum of the first time window and the second time window is the same as the total duration of the first detection window, or the total duration of the sum of the first time window and the second time window is greater than the total duration of the first detection window, or the total duration of the sum of the first time window and the second time window is less than the total duration of the first detection window. This application does not limit this.

[0164] In the first time window, it is not possible to write the preset key value to its own register, while in the second time window, it is allowed to write the preset key value to its own register.

[0165] In another optional embodiment, the detection data frame carries a second detection window and sequence information. The second detection window is used to indicate the second start time and the second stop time of the program detection process. The sequence information includes first sequence information and second sequence information. The first sequence information is generated by the first chip to query the second chip. A third sequence information is generated based on the first sequence information as a response to the first sequence information. The second sequence information matches the first sequence information and is used to verify whether the third sequence information fed back based on the first sequence information is correct.

[0166] Indicatively, a second detection window, first sequence information, and second sequence information are defined in the frame. The second detection window is used to indicate the second start time and the second stop time of the program detection process. The second sequence information matches the first sequence information.

[0167] The first sequence information is fed back in the second detection window to obtain the third sequence information; a matching result is generated based on the matching of the second and third sequence information; and a feedback data frame is generated based on the matching result.

[0168] Optionally, after determining the second detection window, the second detection window is loaded according to its own time system. That is, the time when the detection data frame is received is determined as the second opening time of the second detection window, the total duration of the second detection window is loaded based on the second opening time, and the time after loading is determined as the second closing time.

[0169] In some embodiments, the second detection window is divided into a third time window and a fourth time window, with the third time window designated as the response window and the fourth time window designated as the write window. In the response window, the first sequence information is fed back to obtain the third sequence information; and it is matched with the second sequence information to obtain the matching result; in the write window, the matching result is written into its own register.

[0170] Optionally, a feedback data frame can be generated based on its own register information. After the first chip subsequently receives the feedback data frame, it can directly parse the feedback data frame to obtain the sequence information matching status, thereby determining the program running status of the first program.

[0171] In some embodiments, the total duration of the sum of the third time window and the fourth time window is consistent with the total duration of the first detection window, or the total duration of the sum of the third time window and the fourth time window is greater than the total duration of the first detection window, or the total duration of the sum of the third time window and the fourth time window is less than the total duration of the first detection window. This application does not limit this.

[0172] In another optional implementation, the first sequence information sent by the first chip is fed back within the third time window to obtain the second sequence information; and the second sequence information is written into its own register within the fourth time window.

[0173] Optionally, a feedback data frame is generated based on its own register information. After the first chip subsequently receives the feedback data frame, it determines the third sequence information from the feedback data frame, and then matches the second and third sequence information to obtain the matching result, thereby determining the program running state of the first program.

[0174] In a schematic way, the first sequence information can be regarded as the "question" set by the first chip, and the second sequence information can be regarded as the "standard answer" to the "question". The first chip sends the "question" to the second chip, which answers the received "question" and obtains the "answer".

[0175] The second sequence information and the third sequence information are matched, and a matching result is generated based on the matching results of the second sequence information and the third sequence information.

[0176] The matching results include "matched" and "unmatched". "Matched" means that the second sequence information and the third sequence information are consistent, while "unmatched" means that the second sequence information and the third sequence information are inconsistent.

[0177] This is an illustrative example of matching the "answer" and the "standard answer" to determine if they match. If they match, the result is considered a match; otherwise, it is considered a mismatch.

[0178] A feedback data frame is generated based on the matching results. That is, the matching results are written into the initial data frame to generate the feedback data frame.

[0179] In another optional embodiment, the first sequence information and the second sequence information are generated by the second chip itself, and the first sequence information is fed back within the second detection window to obtain the third sequence information.

[0180] Step 720: Send a feedback data frame to the first chip.

[0181] Optionally, a feedback data frame is generated using the data frame format indicated by the serial bus protocol and sent to the first chip.

[0182] In this embodiment, a new chip (second chip) is introduced into the vehicle terminal to independently detect the program running status of the first program executed by the first chip. This second chip works in conjunction with the first chip to complete the detection of the program running status of the first program. This avoids situations where a single chip malfunctions during the program detection process of the first program, making it impossible to know the program running status, thus improving the program detection efficiency to a certain extent.

[0183] In conjunction with the above embodiments, the following examples illustrate the implementation of the first chip as a microcontroller unit (MCU) for an in-vehicle terminal and the second chip as a TLE8888 chip.

[0184] Optionally, the MCU can be designed to connect to the TLE8888 in a hardware configuration. The TLE8888 module can manage the power consumption of the vehicle control system, including the power-on / off control of the main relay, V5V power supply, and 5V1 and 5V2 power supply for sensors. Figure 8 As shown, it illustrates the MCU ( Figure 8 The marking 800 in the middle) and the TLE8888 chip ( Figure 8The diagram shows the connection between the MCU (800) and TLE8888 (810) via a basic circuit. The TLE8888 chip (810) serves as the power management access for the vehicle system, providing power supply and wake-up functions, and outputting 5V power to the MCU (800). The connection is made via SPI communication. The MCU (800) is configured with communication parameters that are supported by the TLE8888 chip (810) for instruction exchange and communication.

[0185] The TLE8888 chip supports multi-output control and fault diagnosis of output driver ports. It can identify faults in the output driver, such as short ground, short power supply, and open circuit. It obtains the fault status through the module interface service and feeds it back to the system for corresponding fault handling.

[0186] The TLE8888 chip and the MCU communicate via SPI. Table 1 illustrates the format of the data frames used in the SPI communication between the TLE8888 chip and the MCU.

[0187] Table 1

[0188]

[0189] Optionally, the TLE8888 chip supports a maximum SPI communication rate of 5MHz, and in this embodiment, it is configured to have a communication rate of 4MHz.

[0190] The TLE8888 chip's SPI communication message frame has a one-frame delay in response, so the design requires transmitting two instructions to obtain the register value.

[0191] The TLE8888 chip primarily provides an initialization and configuration interface based on hardware unit design, including configuration management, diagnostic configuration, and status management configuration for the output driver. It uses SPI commands to control the TLE8888 chip's driver ports, providing an output control interface for input / output (In / Out) level signals and Pulse Width Modulation (PWM) signals, as well as fault diagnosis functions for the output driver and the acquisition of ignition signals and relay signal status.

[0192] In a schematic representation, the diagnostic management is implemented as follows: The output driver of the TLE8888 chip is diagnosed and protected. When a short power supply occurs in the low-side driver or a short ground occurs in the high-side driver, an automatic shutdown is triggered to protect the circuit. Within a defined time period, the driver is re-enabled, and a second diagnosis is performed. If the fault is cleared, output enable is restored; otherwise, the driver enters diagnostic protection mode. The fault flag is held set during short-circuit fault conditions. The fault flag is only cleared when it is completely confirmed that there is no fault. After initialization, the application provides preset monitoring targets to the vehicle system to check if the application's runtime sequence is normal. If the application malfunctions or becomes uncontrollable, the detection chip (MCU / TLE8888 chip) will trigger a REST (reset) transition signal upon receiving an erroneous instruction, causing a hard reset of the application running on the MCU, restoring it to its previous state.

[0193] Because the TLE8888 chip has a built-in watchdog detection, it is in a safety protection mode and cannot output drive when the watchdog is not working properly. Therefore, the TLE8888 chip needs to be put into program detection state before implementing watchdog detection.

[0194] As an illustration, the TLE8888 chip includes the TLE8888-1QK module. The TLE8888-1QK module is used to implement the watchdog timer feeding service for the window and / or the functional watchdog timer, ensuring the normal operation of the application running on the MCU.

[0195] The window watchdog timer is configured via SPI to specify the window closing and opening times, and then performs a "feed" operation during the window opening time. For illustration, if the watchdog timer is successfully fed, the window watchdog error counter WWDEC (WindowWatchdog Error Count) decrements by 8 and increments by 8.

[0196] The function watchdog mechanism refers to monitoring and communicating with the MCU via a question-and-answer dialogue. It uses a pre-defined question and answer mechanism on the TLE8888 chip to periodically retrieve the current question from the TLE8888 chip's registers. For example, in a 100ms task, the function watchdog module's fast asynchronous response register needs to transmit four corresponding answer messages for the current question. This reduces the time the function watchdog needs to pass through the counter FWDPC (Function Watchdog Pass Counter), which decrements by 16 and increments by 8.

[0197] Optionally, for controlling the overall error counter of the TLE8888 chip, only the synchronous acknowledge register of the watchdog function can reduce the overall error counter, with a decrement value of 8 and an increment value of 8. When using synchronous acknowledge, the decrement value of FWDPC is the difference between the original decrement value and the increment value.

[0198] The synchronization command cycle timer corresponding to the watchdog feeding service mentioned above maintains a default value of 113.6ms during the application implementation. In order to reduce the number of times FWDPC is added during the functional watchdog implementation, its timing is not changed.

[0199] In this embodiment, the initial default values ​​of the three counters—WWDEC, FWDPC, and the overall error counter—are 48. Only when the values ​​of all three counters are less than 32 can the TLE8888 chip be in program detection state and activate the enable flag of the output driver. For specific channel usage configurations in the application, please refer to Table 2 below.

[0200] Table 2

[0201]

[0202]

[0203] The following is a detailed introduction to the watchdog's feeding service and functions.

[0204] Please refer to Figure 9 This illustration shows a flowchart of a window watchdog feeding service, as shown in an exemplary embodiment of this application. The method is... Figure 1 The second chip shown performs the operation.

[0205] Step 900: Initialize watchdog configuration.

[0206] Optionally, the parameters of the watchdog's feeding service can be initialized.

[0207] Indicatively, the timing clock of the window watchdog is activated, which powers on the watchdog module (second chip).

[0208] Optionally, the initial value of the watchdog counter and the first detection window can be set to inform the watchdog module (second chip) how long it takes for the watchdog to time out and at what time the watchdog can be fed.

[0209] Step 910: Activate the watchdog timer.

[0210] Optionally, the watchdog timer can be enabled to activate the watchdog module (second chip). That is, by setting the start bit of the watchdog module, the counter decrements from the preset value.

[0211] Step 920: Periodically call the dog-feeding command.

[0212] Optionally, when the first chip periodically sends detection data frames to the second chip, multiple first detection windows are formed. Within each first detection window, the second chip writes a preset key value into the register of the watchdog module (second chip).

[0213] Step 930: Determine if the first feeding procedure for the dog has exceeded the time limit.

[0214] Optionally, determine whether the second chip has written the preset key value into the register of the second chip within the first detection window. If yes, proceed to step 940; otherwise, proceed to step 950.

[0215] Step 940: The error count increases cumulatively.

[0216] Optionally, when the second chip writes the preset key value into the register of the second chip within the first detection window, the sum of the initial value of the counter and the first preset value is determined as the new value of the counter.

[0217] Step 950, error count decreases.

[0218] Optionally, if the second chip does not write the preset key value into the register of the second chip within the first detection window, the difference between the initial value of the counter and the second preset value is determined as the new value of the counter.

[0219] The first and second preset values ​​are set by the relevant personnel themselves, and this application does not limit them.

[0220] Step 960, wait for the next detection window to feed the dog.

[0221] Optionally, after receiving the next detection data frame sent by the first chip, the second chip executes the process of steps 900 to 950 described above.

[0222] In this embodiment, a new chip (second chip) is introduced into the vehicle terminal to independently detect the program running status of the first program executed by the first chip. This second chip works in conjunction with the first chip to complete the detection of the program running status of the first program. This avoids situations where a single chip malfunctions during the program detection process of the first program, making it impossible to know the program running status, thus improving the program detection efficiency to a certain extent.

[0223] Please refer to Figure 10 This illustration shows a flowchart of a watchdog feeding service, illustrating an exemplary embodiment of this application. The method is... Figure 1 The second chip shown performs the operation.

[0224] Step 1000: Initialize the first program.

[0225] Optionally, the first chip starts and runs the first program, and the first chip initializes the running state of the first program.

[0226] Step 1001: Initialize the gate configuration.

[0227] Optionally, the parameters of the watchdog's feeding service can be initialized.

[0228] Indicatively, the start-up watchdog timer activates, powering on the watchdog module (second chip).

[0229] Optionally, the watchdog timer can be configured with an initial counter value, a second detection window, first sequence information (with the same meaning as the question below), and second sequence information, to inform the watchdog module (second chip) how long it takes for the watchdog timer to expire and at what time the watchdog can be fed.

[0230] Step 1002: Activate the watchdog timer.

[0231] Optionally, the timer of the functional watchdog can be enabled to activate the watchdog module (second chip). That is, setting the start bit of the watchdog module causes the counter to decrement from a preset value.

[0232] Step 1003: Request a local response to the question.

[0233] Optionally, the first sequence information included in the detection data frame can be used as the feedback issue required when the second chip executes the detection process.

[0234] Step 1004: Determine if the first feeding procedure for the dog has exceeded the time limit.

[0235] Optionally, the second chip provides feedback on the first sequence information within the second detection window and determines whether the first program feeding the dog has timed out based on the feedback result.

[0236] That is, if the second chip does not provide feedback on the first sequence information within the second detection window, it determines that the first program feeding the dog has timed out and executes the following step 1005.

[0237] The second chip provides feedback on the first sequence information within the second detection window. If it determines that the first program feeding the dog has not timed out, then the following step 1006 is executed.

[0238] Step 1005: The error count increases cumulatively.

[0239] Optionally, if the second chip does not provide feedback on the first sequence information within the second detection window, the sum of the initial value of the counter and the third preset value is determined as the new value of the counter.

[0240] Step 1006: Determine if the MCU response is correct.

[0241] Optionally, when the second chip provides feedback on the first sequence information within the second detection window and obtains the third sequence information, it determines whether the third sequence information matches the second sequence information. If they match (corresponding to "yes" in the attached figure), then step 1007 is executed; if they do not match (corresponding to "no" in the attached figure), then step 1008 is executed.

[0242] Step 1007: Decrease the error count.

[0243] Optionally, when the third sequence information matches the second column information, the difference between the initial value of the counter and the fourth preset value is determined as the new value of the counter.

[0244] Step 1008: The error count has increased cumulatively.

[0245] Optionally, if the third sequence information does not match the second column information, the sum of the initial value of the counter and the fifth preset value is determined as the new value of the counter.

[0246] The third, fourth, and fifth preset values ​​can be the same or different, and can be set by the relevant personnel themselves. This application does not impose any restrictions on this.

[0247] Step 1009: Determine if all error counters have reached their maximum values.

[0248] Optionally, determine whether the counter has reached the preset maximum value. If it has reached the maximum value, perform a reset operation and shut down the drive circuit, and execute the above step 1000; if it has not reached the maximum value, execute the following step 1010.

[0249] Step 1010: Wait for the next detection window to feed the dog.

[0250] Optionally, after receiving the next detection data frame sent by the first chip, the second chip executes the process of steps 1000 to 1009 described above.

[0251] In this embodiment, a new chip (second chip) is introduced into the vehicle terminal to independently detect the program running status of the first program executed by the first chip. This second chip works in conjunction with the first chip to complete the detection of the program running status of the first program. This avoids situations where a single chip malfunctions during the program detection process of the first program, making it impossible to know the program running status, thus improving the program detection efficiency to a certain extent.

[0252] Please see Figure 11The diagram illustrates a structural block diagram of a program detection device provided in an exemplary embodiment of this application. The device is integrated into a first chip and includes the following components.

[0253] The running module 1100 is used to run the first program, which provides the functions of the first program.

[0254] The first sending module 1101 is used to periodically send detection data frames to the second chip, the detection data frames including program running information of the first program;

[0255] The first receiving module 1102 is used to receive the feedback data frame generated by the second chip based on the detection data frame, and to obtain the program running status of the first program.

[0256] In this embodiment, a new chip (second chip) is introduced into the vehicle terminal to independently detect the program running status of the first program executed by the first chip. This second chip works in conjunction with the first chip to complete the detection of the program running status of the first program. This avoids situations where a single chip malfunctions during the program detection process of the first program, making it impossible to know the program running status, thus improving the program detection efficiency to a certain extent.

[0257] Please see Figure 12 The diagram illustrates a structural block diagram of a program detection device provided in another exemplary embodiment of this application, which is integrated into a second chip and includes the following components.

[0258] The second receiving module 1200 is used to receive detection data frames periodically sent by the first chip. The detection data frames include program running information of the first program, which runs on the first chip and is used to provide the functions of the first program.

[0259] The generation module 1201 is used to generate a feedback data frame based on the detection data frame, wherein the feedback data frame includes the program running status of the first program;

[0260] The second sending module 1202 is used to send the feedback data frame to the first chip.

[0261] In this embodiment, a new chip (second chip) is introduced into the vehicle terminal to independently detect the program running status of the first program executed by the first chip. This second chip works in conjunction with the first chip to complete the detection of the program running status of the first program. This avoids situations where a single chip malfunctions during the program detection process of the first program, making it impossible to know the program running status, thus improving the program detection efficiency to a certain extent.

[0262] Figure 13A structural block diagram of a computer device 1300 provided in an exemplary embodiment of this application is shown. The computer device 1300 may be a portable mobile terminal, such as a smartphone, tablet computer, MP3 player (Moving Picture Experts Group Audio Layer III), MP4 player (Moving Picture Experts Group Audio Layer IV), laptop computer, or desktop computer. The computer device 1300 may also be referred to as a user device, portable terminal, laptop terminal, desktop terminal, or other names. Optionally, the computer device 1300 may also be implemented as a mobile device, such as a vehicle-mounted terminal or other portable smart terminal.

[0263] Typically, computer device 1300 includes a processor 1301 and a memory 1302.

[0264] Processor 1301 may include one or more processing cores, such as a quad-core processor, an octa-core processor, etc. Processor 1301 may be implemented using at least one hardware form selected from DSP (Digital Signal Processing), FPGA (Field-Programmable Gate Array), and PLA (Programmable Logic Array). Processor 1301 may also include a main processor and a coprocessor. The main processor, also known as a CPU (Central Processing Unit), is used to process data in the wake-up state; the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, processor 1301 may integrate a GPU (Graphics Processing Unit), which is responsible for rendering and drawing the content required to be displayed on the screen. In some embodiments, processor 1301 may also include an AI (Artificial Intelligence) processor, which is used to handle computational operations related to machine learning.

[0265] The memory 1302 may include one or more computer-readable storage media, which may be non-transitory. The memory 1302 may also include high-speed random access memory and non-volatile memory, such as one or more disk storage devices or flash memory devices. In some embodiments, the non-transitory computer-readable storage media in the memory 1302 are used to store at least one instruction, which is executed by the processor 1301 to implement the model training method or behavior encoding method provided in the method embodiments of this application.

[0266] This application also provides a computer-readable storage medium storing at least one instruction, at least one program, a code set, or an instruction set, wherein the at least one instruction, the at least one program, the code set, or the instruction set is loaded and executed by a processor to implement the program detection system provided in the above method embodiments.

[0267] This application provides a computer program product or computer program that includes computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computer device to perform the program detection system provided in the above-described method embodiments.

[0268] Those skilled in the art will understand that all or part of the steps of the above embodiments can be implemented by hardware, or by a program instructing related hardware. The program can be stored in a computer-readable storage medium, such as a read-only memory, a disk, or an optical disk. The above descriptions are merely optional embodiments of this application and are not intended to limit the application. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A program detection system, characterized in that, The system includes a first chip and a second chip; The first chip is configured to run a first program, which provides first program functions; The first chip is configured to periodically send detection data frames to the second chip, the detection data frames including program execution information of the first program; The second chip is also configured to generate a feedback data frame in response to receiving the detection data frame, the feedback data frame including the program running state of the first program; Send the feedback data frame to the first chip; The first chip is also configured to receive the feedback data frame and obtain the program running status of the first program based on the feedback data frame.

2. The system according to claim 1, characterized in that, The first chip is also configured to send an enable data frame to the second chip, the enable data frame being used to instruct the second chip to perform a program detection process, the program detection process being the process by which the second chip detects the program running status of the first program; The second chip is also configured to run a program detection program based on the received enable data frame; and to send an enable feedback data frame to the first chip based on the detection program. The first chip is also configured to receive the enable feedback data frame and periodically send the detection data frame to the second chip based on the enable feedback data frame.

3. The system according to claim 2, characterized in that, The second chip is also configured to parse the detection data frame and determine a first detection window, the first detection window being used to indicate the first start time and the first stop time of the program detection process; The second chip is also configured to determine whether a preset key value is written into the register of the second chip within the first detection window, and to obtain the writing result; The second chip determines the register information of the register based on the write result; and generates the feedback data frame based on the register information.

4. The system according to claim 2, characterized in that, The second chip is further configured to determine a second detection window, first sequence information, and second sequence information from the detection data frame, wherein the second detection window is used to indicate a second start time and a second stop time of the program detection process, and the second sequence information matches the first sequence information; The second chip is further configured to feed back the first sequence information in the second detection window to obtain third sequence information; and to generate a matching result based on the matching of the second sequence information and the third sequence information. The second chip is also configured to generate the feedback data frame based on the matching result.

5. A program detection method, characterized in that, Performed by a first chip, the method includes: Run the first program, which provides the functions of the first program. The detection data frame, which includes program running information, is periodically sent to the second chip. The program receives a feedback data frame generated by the second chip based on the detection data frame and obtains the program running status of the first program.

6. A method for program detection, characterized in that, Performed by a second chip, the method includes: The system receives detection data frames periodically sent by the first chip. The detection data frames include program execution information of the first program, which runs on the first chip and is used to provide the functions of the first program. Based on the detection data frame, a feedback data frame is generated, which is used to obtain the program running status of the first program; The feedback data frame is sent to the first chip.

7. A program detection device, characterized in that, Executed by a first chip, the device includes: The execution module is used to run the first program, which provides the functions of the first program. The first sending module is used to periodically send detection data frames to the second chip, the detection data frames including program running information; The first receiving module is used to receive the feedback data frame generated by the second chip based on the detection data frame, and to obtain the program running status of the first program.

8. A program detection device, characterized in that, Executed by a second chip, the device includes: The second receiving module is used to receive detection data frames periodically sent by the first chip. The detection data frames include program running information of the first program, which runs on the first chip and is used to provide the functions of the first program. A generation module is used to generate a feedback data frame based on the detection data frame, wherein the feedback data frame is used to obtain the program running status of the first program; The second sending module is used to send the feedback data frame to the first chip.

9. A computer device, characterized in that, The computer device includes a processor and a memory, the memory storing at least one program, which is loaded and executed by the processor to implement the program detection method as described in claim 5 or 6.

10. A computer-readable storage medium, characterized in that, The storage medium stores at least one program segment, which is loaded and executed by a processor to implement the program detection method as described in claim 5 or 6.

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