Design method capable of reducing debugging period of anti-interference antenna array
By designing pre-debugging fixtures at the antenna unit stage and using a metal mounting plate with a side length of half the working wavelength, the problems of long debugging cycle and high cost of anti-interference antenna arrays were solved, and a fast and low-cost standardized design was achieved.
Patent Information
- Application Number
- CN202511003163.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-21
- Publication Date
- 2025-11-14
AI Technical Summary
In the existing anti-interference antenna array design process, the debugging cycle is long and the cost is high. Different types of arrays need to be debugged separately, which leads to complex processing and increased material costs.
In the antenna unit stage, pre-tuning fixtures are designed. The antenna units, which are simulated and tunable, are directly assembled into an array. A pre-tuning fixture with a metal mounting plate side length of about half the working wavelength is used to ensure that the units have consistent performance in the array.
It shortens the debugging cycle, reduces material costs, and achieves a standardized design suitable for different types of arrays.
Smart Images
Figure CN120951537A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of microwave array antenna technology, and a design method that can reduce the debugging cycle of anti-interference antenna arrays. Background Technology
[0002] To achieve functions such as beam scanning and interference suppression, individual antenna elements are typically arranged into an array according to a specific pattern. In the field of millimeter-wave array antennas, the high operating frequency, large number of elements, and small size make debugging difficult. Therefore, to avoid debugging, the operating bandwidth of the antenna is usually designed to be wide, and re-processing is used to address the performance degradation of the antenna array. In the field of lower-frequency microwave array antennas, in order to arrange a sufficient number of elements in a small aperture, high dielectric constant and high-profile dielectric substrates are usually used for miniaturization. This results in a narrow antenna bandwidth. Moreover, due to the large dielectric constant and dimensional errors in the processing of high dielectric constant and high-profile dielectric substrates, the frequency band of the antenna will shift after processing and assembly. It is necessary to cut the length of the copper foil branches on the dielectric substrate for adjustment to make the processed antenna operate in the required frequency band.
[0003] Anti-jamming antenna arrays are an important application in the field of microwave array antennas. In current engineering applications, the design flow of a typical anti-jamming antenna array is shown in Figure 1. First, the antenna elements are optimized, and then these optimized elements are assembled into an array. Due to the influence of the array's ground plane, the antenna elements in the array will experience frequency shifts. Therefore, after assembly, it is necessary to continue optimizing the performance of the antenna elements within the array to ensure the overall performance of the array. After optimization, production processing is carried out using a "assemble first, then debug" process. That is, multiple antenna elements are first assembled into an antenna array, then the entire array is jointly debugged, and finally, the array elements are repeatedly adjusted based on the debugging results until the performance meets the requirements.
[0004] The above design process has certain shortcomings: First, due to material and processing reasons, frequency offsets may occur in the elements of the antenna array. These offsets are caused by actual processing rather than by the influence between array elements. If the elements are directly debugged in the array, the operating frequency of the elements cannot be properly adjusted. Second, electromagnetic coupling effects between elements can lead to deterioration of electrical performance indicators such as axial ratio and radiation pattern, increasing the difficulty and workload of debugging. In addition, if an element is damaged during processing or debugging, the entire array needs to be reworked, affecting the debugging progress. Furthermore, different types of arrays require separate debugging, resulting in a longer overall cycle. In contrast, debugging at the antenna element stage is relatively easier and has a shorter cycle. Finally, different types of arrays may use antenna elements with different parameters, leading to higher material processing costs. Summary of the Invention
[0005] To address the problems existing in the prior art, a design method that can reduce the debugging cycle of anti-interference antenna arrays is provided. This method performs debugging at the antenna element stage, and the antenna elements after debugging can be directly assembled into different forms of anti-interference antenna arrays, realizing the standardized design of antenna elements.
[0006] This invention proposes a design method for reducing the debugging cycle of anti-interference antenna arrays, including: Antenna element optimization and debugging stage: Design a pre-debugging fixture for the antenna element, install the antenna element into the pre-debugging fixture, and complete simulation and debugging; the installation form of the antenna element in the pre-debugging fixture is consistent with the installation form in the array; Array assembly stage: Install the simulated and debugged antenna elements onto the array mounting plate to complete the antenna array design.
[0007] As a preferred option, the design of the pre-adjustment fixture is completed by selecting the side length of the metal mounting plate of the required pre-adjustment fixture.
[0008] As a preferred embodiment, the pre-debugging process of the designed antenna element includes: The metal ground plane of the antenna unit is simulated as the metal mounting plate of the pre-debugging fixture; Antenna elements with different metal ground plane side lengths were optimized for performance, and then they were assembled into the same antenna array for simulation. The side length of the metal ground plane of the antenna element with the best electrical performance after being placed in the antenna array was confirmed to be the side length of the metal mounting plate of the required pre-debugging fixture.
[0009] As a preferred option, it also includes verifying whether the side length of the metal mounting plate of the pre-commissioning fixture required for the test array meets the requirements by replacing it with another array configuration.
[0010] As a preferred embodiment, the verification of whether the side length of the metal mounting plate of the pre-commissioning fixture required for replacing other array types meets the requirements specifically includes: Other array configurations are formed using antenna elements corresponding to the required pre-tuning fixture's metal mounting plate side length. Simulations are then performed to determine whether the electrical performance of each antenna element does not require optimization. If so, the current pre-tuning fixture's metal mounting plate side length is the final required pre-tuning fixture's metal mounting plate side length. If not, the pre-tuning fixture's metal mounting plate side length needs to be re-determined.
[0011] As a preferred embodiment, the metal mounting plate of the final pre-testing fixture has a side length of approximately half the operating wavelength.
[0012] Compared with existing technologies, the beneficial effects of adopting the above technical solution are as follows: 1. Short debugging cycle. This invention adopts the method of pre-debugging antenna elements. During the antenna element design stage, a special pre-debugging tool is used to complete the debugging work. Then, the antenna elements are directly assembled into an antenna array without further debugging. This can avoid the increased debugging workload caused by the electromagnetic coupling between various elements during the antenna array stage, effectively shortening the design cycle.
[0013] 2. Low cost and standardized design. With the rapid development of anti-interference antenna systems, the demand for anti-interference antennas is gradually increasing, and different projects may have different array shape requirements. If each antenna element is optimized in the early design stage, the parameters of each element will differ, resulting in higher material costs. This invention completes the design and debugging work at the antenna element level, allowing it to be assembled into arrays of any form, achieving standardized antenna element design, reducing costs and improving production efficiency. Attached Figure Description
[0014] Figure 1 This is a typical flowchart for anti-interference antenna design.
[0015] Figure 2 This is a flowchart of the anti-interference antenna design after adopting the new method.
[0016] Figure 3 This is a three-dimensional structural diagram of the antenna unit according to an embodiment of the present invention.
[0017] Figure 4 This is a standing wave curve diagram of the antenna element in an embodiment of the present invention.
[0018] Figure 5 This is the main polarization pattern of the antenna element in an embodiment of the present invention.
[0019] Figure 6 This is a diagram showing the normal axis ratio of the antenna element in an embodiment of the present invention.
[0020] Figure 7 This is a three-dimensional structural diagram of the first antenna array according to an embodiment of the present invention.
[0021] Figure 8 This is a standing wave curve diagram of the first antenna array according to an embodiment of the present invention.
[0022] Figure 9 This is the main polarization pattern of the first antenna array according to an embodiment of the present invention.
[0023] Figure 10 This is the normal axis ratio diagram of the first antenna array according to an embodiment of the present invention.
[0024] Figure 11 This is a three-dimensional structural diagram of the second type of antenna array according to an embodiment of the present invention.
[0025] Figure 12 This is a standing wave curve diagram of the second type of antenna array in this embodiment of the invention.
[0026] Figure 13 This is the main polarization pattern of the second type of antenna array in this embodiment of the invention.
[0027] Figure 14 This is the normal axis ratio diagram of the second type of antenna array in this embodiment of the invention. Detailed Implementation
[0028] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application. Unless otherwise specified, the embodiments and features in the embodiments of this application can be arbitrarily combined with each other. Furthermore, although a logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than that shown here.
[0029] The terms "first" and "second" in the specification, claims, and drawings of this application are used to distinguish different objects, not to describe a specific order. Furthermore, the term "comprising" and any variations thereof are intended to cover non-exclusive protection. For example, a process, method, system, product, or apparatus that comprises a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to such processes, methods, products, or apparatus.
[0030] To address the shortcomings of existing anti-interference antenna array design processes, this application proposes a design method that can reduce the debugging cycle of anti-interference antenna arrays. The method considers the impact of array assembly during the unit design phase. After completing the simulation optimization of the antenna units, there is no need for separate array optimization; instead, it can be directly put into production. Debugging is then completed at the antenna unit stage, and finally, the array is assembled to meet performance requirements.
[0031] This design method, which can reduce the debugging cycle of anti-interference antenna arrays, mainly includes two stages: antenna element optimization and debugging stage and array assembly stage.
[0032] Specifically, the antenna element optimization and debugging stage mainly includes: designing a pre-debugging fixture for the antenna element, installing the antenna element into the pre-debugging fixture and completing simulation and debugging; the installation form of the antenna element in the pre-debugging fixture is consistent with the installation form in the array.
[0033] Array assembly stage: Install the simulated and debugged antenna elements on the array surface to complete the antenna array design.
[0034] By considering the impact of array formation during the antenna element optimization and debugging phase, performance requirements can be met without debugging during array formation.
[0035] The design method proposed in this invention focuses on the antenna element optimization and debugging stage. This stage requires specific design to ensure that the performance of each element does not deteriorate after the antenna elements are assembled into the array; otherwise, secondary debugging is necessary, negating the advantages of the proposed method. To address this, this invention designs a pre-debugging fixture during the antenna element simulation and debugging stage, ensuring that the antenna elements' installation in the pre-debugging fixture matches their installation configuration in the array. The pre-debugging fixture essentially simulates the metal ground plane of the antenna element; therefore, the dimensions of the metal mounting plate of the pre-debugging fixture are a key factor affecting the electrical performance of the antenna element. Since the thickness of the metal mounting plate has a negligible impact on antenna performance, this embodiment focuses on the side length of the metal mounting plate of the pre-debugging fixture.
[0036] When designing antenna elements, antenna elements with different metal ground plane side lengths are individually optimized for performance. These elements are then assembled into the same antenna array for simulation to determine the metal ground plane side length of the antenna element with the best electrical performance after being placed in the array. This metal ground plane side length is the required side length of the metal mounting plate for the pre-tuning fixture. In one embodiment, simulation results show that antenna elements with a metal ground plane side length approximately half the operating wavelength exhibit the best electrical performance after being placed in the array, requiring no further optimization. Therefore, when designing a dedicated pre-tuning fixture, a metal mounting plate with a side length approximately half the operating wavelength is the most suitable choice.
[0037] To ensure that the designed antenna elements are applicable to other types of antenna arrays, other array configurations can be used to verify whether the side length of the metal mounting plate of the pre-tuning fixture meets the requirements. Specifically, antenna elements corresponding to the side length of the metal mounting plate of the required pre-tuning fixture are used to form other array configurations, and simulations are performed to determine whether the electrical performance of each antenna element does not require optimization. If so, the side length of the metal mounting plate of the current pre-tuning fixture is the final required side length; otherwise, the side length of the metal mounting plate of the pre-tuning fixture needs to be re-determined. In one embodiment, an antenna array is formed using antenna elements with a metal ground plane side length approximately half the operating wavelength after optimization. Simulation results show that the electrical performance of each array element also does not require further optimization, indicating that the antenna elements tunable with the dedicated pre-tuning fixture are applicable to other types of antenna arrays.
[0038] From an overall process perspective, the design method proposed in this invention follows the flow shown in Figure 2. The impact of array formation is considered during the unit design phase. After simulation optimization of the antenna units, there is no need for separate array optimization; instead, production and manufacturing can proceed directly. Debugging is then completed at the antenna unit stage, and finally, the array is assembled to meet performance requirements. It can be seen that compared to the typical design flow shown in Figure 1, the new method reduces design steps and debugging workload, shortening the design cycle.
[0039] Specifically, the design method for reducing the debugging cycle of anti-interference antenna arrays proposed in this invention has the following two characteristics: 1. Short debugging cycle. This invention adopts the method of pre-debugging antenna elements. During the antenna element design stage, a special pre-debugging tool is used to complete the debugging work. Then, the antenna elements are directly assembled into an antenna array without further debugging. This can avoid the increased debugging workload caused by the electromagnetic coupling between various elements during the antenna array stage, effectively shortening the design cycle.
[0040] 2. Low cost and standardized design. With the rapid development of anti-interference antenna systems, the demand for anti-interference antennas is gradually increasing, and different projects may have different array shape requirements. If each antenna element is optimized in the early design stage, the parameters of each element will differ, resulting in higher material costs. This invention completes the design and debugging work at the antenna element level, allowing it to be assembled into arrays of any form, achieving standardized antenna element design, reducing costs and improving production efficiency.
[0041] To further verify the feasibility of the design method proposed in this invention that can reduce the debugging cycle of anti-interference antenna arrays, the following was selected: Figure 3 The antenna element structure shown is used to design an anti-interference antenna array. The antenna element operates in the BDS B1 band commonly used in the BeiDou-3 satellite navigation system and adopts a typical microstrip antenna form.
[0042] First, the antenna elements were optimized for different metal ground plane side lengths (including 55mm, 70mm, 85mm, 100mm, 115mm, 130mm, and 145mm). Figures 4-6 The figures shown are the optimized standing wave curve, main polarization pattern, and normal axis ratio. Figures 4-6 It can be seen that the VSWR and axial ratio performance of each antenna element are good after optimization; however, the antenna gain performance varies significantly due to the different sizes of the metal ground plane.
[0043] To investigate the conditions under which the side length of the metal mounting plate determines the antenna elements, once optimized, can be combined into an antenna array without further adjustments, simulations were performed using antenna elements with different optimized parameters. For example... Figure 7 The diagram shows the first type of antenna array structure selected for the anti-interference antenna array designed in this invention. The antenna array includes 6 antenna elements and 1 array mounting plate.
[0044] like Figure 8 The figure shows the simulated standing wave curves. Since the optimized parameters are the same for antenna element metal ground plane side lengths of 115mm, 130mm, and 145mm, the simulation results are identical; only one set of data needs to be used. Figure 8 It can be seen that when the side length of the metal ground plane is 100mm, the VSWR performance of each element in the antenna array is good. However, the elements under other size conditions still need further optimization. For example... Figures 9-10 The figures show the main polarization pattern and normal axial ratio of each array element when the side length of the metal ground plane is 100mm. It can be seen that the gain and axial ratio performance of each element are good under these conditions. These results indicate that, except for the 100mm side length of the metal ground plane, antenna elements with other side lengths will experience frequency shift when assembled into an antenna array, requiring further optimization. Calculations show that 100mm is approximately half the wavelength of the BDS B1 frequency. Therefore, when designing a pre-tuning fixture for antenna element debugging, the side length of its metal mounting plate should ideally be approximately half the wavelength of the operating frequency.
[0045] To verify that the optimized antenna elements can be applied to other types of anti-interference antenna arrays, it is necessary to assemble another antenna array using antenna elements with optimized metal ground planes and side lengths of 100mm for simulation. For example... Figure 11 The diagram shows the second type of antenna array structure used in the anti-interference antenna array design of this invention. The antenna array includes four antenna elements and one array mounting plate, and the installation method of the antenna elements is the same as that of the first type of antenna array.
[0046] like Figures 12-14 The figures shown are the simulated standing wave curve, main polarization pattern, and normal axis ratio. Figures 12-14 It can be seen that the electrical performance of each element in the second type of antenna array is good and does not require further optimization. This indicates that after debugging and optimization, the same antenna element can be applied to other types of antenna arrays, which means that a standardized design can be achieved.
[0047] As can be seen from the above, the new method for reducing the debugging cycle of anti-interference antenna arrays provided by the present invention has the characteristics of short debugging cycle, low cost and standardization, and is suitable for use in the design and application of anti-interference antenna systems in the microwave band.
[0048] In the foregoing descriptions of the embodiments, the terms "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.
[0049] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.
[0050] For those skilled in the art, the specific meanings of the above terms in this invention can be understood according to the specific circumstances; the accompanying drawings in the embodiments are used to clearly and completely describe the technical solutions in the embodiments of this invention. Obviously, the described embodiments are some embodiments of this invention, but not all embodiments. Generally, the components of the embodiments of this invention described and shown in the accompanying drawings can be arranged and designed in various different configurations.
[0051] Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of this application.
Claims
1. A design method for reducing the debugging cycle of anti-interference antenna arrays, characterized in that, include: Antenna unit optimization and debugging stage: Design the pre-debugging fixture for the antenna unit, install the antenna unit into the pre-debugging fixture and complete the simulation and debugging; The installation method of the antenna element in the pre-debugging fixture is consistent with the installation method in the array; Array assembly stage: Install the simulated and debugged antenna elements on the array surface to complete the antenna array design.
2. The design method for reducing the debugging cycle of anti-interference antenna arrays according to claim 1, characterized in that, The pre-adjustment fixture design is completed by selecting the side length of the metal mounting plate of the required pre-adjustment fixture.
3. The design method for reducing the debugging cycle of anti-interference antenna arrays according to claim 1 or 2, characterized in that, The specific process of pre-debugging the design antenna element includes: The metal ground plane of the antenna unit is simulated as the metal mounting plate of the pre-debugging fixture; Antenna elements with different metal ground plane side lengths were optimized for performance, and then they were assembled into the same antenna array for simulation. The side length of the metal ground plane of the antenna element with the best electrical performance after being placed in the antenna array was confirmed to be the side length of the metal mounting plate of the required pre-debugging fixture.
4. The design method for reducing the debugging cycle of anti-interference antenna arrays according to claim 3, characterized in that, This also includes verifying whether the side length of the metal mounting plate of the pre-computation fixture required for other array configurations meets the requirements.
5. The design method for reducing the debugging cycle of anti-interference antenna arrays according to claim 4, characterized in that, The verification of whether the side length of the metal mounting plate of the pre-computation fixture required for changing to other array types meets the requirements specifically includes: Other array configurations are formed using antenna elements corresponding to the required pre-tuning fixture's metal mounting plate side length. Simulations are then performed to determine whether the electrical performance of each antenna element does not require optimization. If so, the current pre-tuning fixture's metal mounting plate side length is the final required pre-tuning fixture's metal mounting plate side length. If not, the pre-tuning fixture's metal mounting plate side length needs to be re-determined.
6. The design method for reducing the debugging cycle of anti-interference antenna arrays according to claim 2, characterized in that, The metal mounting plate of the final pre-testing fixture has a side length of approximately half the operating wavelength.