Method, device and equipment for evaluating anti-single event effect of space chip

Abstract

This invention relates to a method, apparatus, and equipment for evaluating the single-event immunity of aerospace chips. By dividing the evaluation process into three stages—preliminary design evaluation, preliminary assessment, and chip compliance evaluation—the single-event immunity capability of aerospace chips is quantitatively measured. Simultaneously, the early evaluation in the preliminary design stage, the secondary verification in the preliminary assessment stage, and the comprehensive comparison in the chip compliance evaluation stage clearly and in a closed-loop manner assess whether the chip's single-event immunity performance meets the orbital insertion standards, greatly enhancing the risk control of aerospace chips. This evaluation technology is characterized by high universality and strong operability, improving the reliability of aerospace chips while avoiding design risks, and can be widely applied in the aerospace field.

Description

Technical Field

[0001] This invention belongs to the field of chip reliability assessment technology, and relates to an assessment method, apparatus and equipment for assessing the resistance of aerospace chips to single-event effects. Background Technology

[0002] The space radiation environment is mainly composed of galactic cosmic rays, solar cosmic rays, and Earth's radiation belts, all of which contain different types of charged particles. Specifically, galactic cosmic rays originate from high-energy particles outside the solar system but within the Milky Way, and are mainly composed of 98% protons and heavy ions, and 2% electrons and positrons. Solar cosmic rays are high-energy charged particles produced during solar flares, and are mainly composed of 90% protons, a small amount of alpha particles, and heavy ions. Earth's radiation belts are radiation belts formed around Earth due to the capture of charged particles in space by the Earth's magnetic field; they are also known as the Van Allen radiation belts. These belts stretch from low Earth orbit to geosynchronous orbit and contain a large number of protons and electrons.

[0003] The electronic systems and equipment of spacecraft are highly vulnerable to bombardment by the aforementioned charged particles during operation in orbit, potentially causing irreparable damage. For example, galactic cosmic rays, regardless of whether solar activity is at its peak or minimum, always contain different types of high-energy heavy ions. These heavy particles can cause instantaneous single-event effects (SEE), severely threatening the reliability of spacecraft, reducing their lifespan, and even damaging them. Specifically, SEE can trigger sudden disasters, such as system crashes caused by single-event functional interruptions (SEFI) and mistransmissions of satellite commands due to single-event upsets (SEU). Therefore, conducting a comprehensive assessment of the single-event resistance of aerospace chips during the early design phase to clarify or predefine design specifications and avoid directional errors, and simultaneously conducting a baseline evaluation of radiation-hardened aerospace chips to understand their reliability in the space environment, is of significant engineering value in preventing unnecessary catastrophic accidents. Summary of the Invention

[0004] To address the problems existing in the aforementioned traditional technologies, this invention proposes an evaluation method for the single-event effect resistance of aerospace chips, an evaluation device for the single-event effect resistance of aerospace chips, and a computer device. These methods enable a comprehensive evaluation of the single-event resistance performance of aerospace chips in the early design stage, avoiding directional errors. At the same time, they provide a preliminary evaluation of aerospace chips after radiation hardening design to understand their reliability in the space environment and avoid unnecessary catastrophic accidents.

[0005] To achieve the above objectives, the embodiments of the present invention adopt the following technical solutions:

[0006] On the one hand, a method for evaluating the resistance of aerospace chips to single-event effects is provided, including the following steps:

[0007] The distribution of satellite orbits to which the aerospace chip will be applied and the orbital parameters of each orbit are obtained; the orbital parameters include orbital altitude, orbital inclination, right ascension of the ascending node, argument of perigee, eccentricity, and true anomaly.

[0008] After calculating the LET integral flux spectrum of different orbits based on the distribution of satellite orbits and the parameters of each orbit, the upper and lower threshold limits of the single-event effect resistance of the aerospace chip in the early design and evaluation stage are determined based on the LET integral flux spectrum of different orbits.

[0009] After setting the design life of the orbital satellite based on the distribution of satellite orbits and the parameters of each orbit, the design life of the orbital satellite is set as the duration of no single-event events in orbit, and the soft error rate of single-event effects of aerospace chips in the satellite orbit during the early design evaluation stage is determined.

[0010] At least four single-event sensitive sections were obtained after conducting single-event irradiation experiments on aerospace chips with at least four different LET values. Based on each single-event sensitive section, the single-event effect threshold and the soft error rate of single-event effect of aerospace chips in the later stage of preliminary evaluation were determined.

[0011] In the chip compliance evaluation stage, the single-event immunity threshold of aerospace chips in the later stage of preliminary investigation is compared with that in the early stage of design evaluation. In addition, the soft error rate of single-event immunity of aerospace chips in the later stage of preliminary investigation is compared with that of aerospace chips in satellite orbit in the early stage of design evaluation. The evaluation results of whether the aerospace chip design is qualified are obtained.

[0012] On the other hand, an evaluation device for the resistance of aerospace chips to single-event effects is also provided, comprising:

[0013] The parameter acquisition module is used to acquire the distribution of satellite orbits to which the aerospace chip will be applied and the orbital parameters, including orbital altitude, orbital inclination, right ascension of the ascending node, argument of perigee, eccentricity, and true anomaly.

[0014] The preliminary evaluation module is used to calculate the LET integral flux spectrum of different orbits based on the distribution of satellite orbits and the parameters of each orbit, and then determine the upper and lower threshold limits of the single-event effect resistance of the aerospace chip in the preliminary design evaluation stage based on the LET integral flux spectrum of different orbits.

[0015] The early error rate module is used to set the design life of the satellite in orbit after setting the design life of the satellite based on the distribution of the satellite orbit and the parameters of each orbit, and to set the duration of the satellite in orbit without single-event events as the design life of the satellite and to determine the soft error rate of single-event effects of the aerospace chip in the satellite orbit during the early design evaluation stage.

[0016] The post-experimentation module is used to obtain at least four single-event sensitive sections obtained after conducting single-event irradiation experiments on the aerospace chip with at least four different LET values. Based on each single-event sensitive section, the single-event effect threshold and the soft error rate of the aerospace chip in the post-experimentation stage are determined.

[0017] The compliance assessment module is used to comprehensively compare the single-event immunity threshold of aerospace chips in the later stage of preliminary investigation with that in the early stage of design assessment, as well as the soft error rate of single-event immunity of aerospace chips in the later stage of preliminary investigation with that of aerospace chips in satellite orbit in the early stage of design assessment, to obtain the assessment result of whether the aerospace chip design is qualified.

[0018] In another aspect, a computer device is also provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the above-described evaluation method for the single-event resistance of aerospace chips.

[0019] One of the above technical solutions has the following advantages and beneficial effects:

[0020] The aforementioned evaluation method, apparatus, and equipment for single-event immunity of aerospace chips quantitatively measure the single-event immunity capability of aerospace chips by dividing the evaluation process into three stages: preliminary design evaluation, preliminary assessment, and chip compliance evaluation. Simultaneously, the early evaluation in the preliminary design evaluation stage, the secondary verification in the preliminary assessment stage, and the comprehensive comparison in the chip compliance evaluation stage clearly and in a closed-loop manner evaluate whether the chip's single-event immunity performance meets the orbital insertion standards, greatly enhancing the risk control of aerospace chips. This evaluation technology is characterized by high universality and strong operability, improving the reliability of aerospace chips while avoiding design risks, and can be widely applied in the aerospace field. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the embodiments of the present invention or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0022] Figure 1This is a flowchart illustrating a method for evaluating the resistance of aerospace chips to single-event effects in one embodiment;

[0023] Figure 2 This is a schematic diagram of the evaluation process in the early design evaluation stage of one embodiment;

[0024] Figure 3 This is an example of the integrated flux spectrum at different inclination angles at an orbital altitude of 1145km.

[0025] Figure 4 In one embodiment, the distribution of the number of particles per square centimeter per year experienced by the chip at an orbital altitude of 1145km is shown.

[0026] Figure 5 This is a schematic diagram of the assessment process in the later stage of preliminary assessment in one embodiment;

[0027] Figure 6 This is a step function fitting curve for a chip using a 55 nm process in one embodiment;

[0028] Figure 7 This is a schematic diagram of the evaluation process for the chip compliance evaluation stage in one embodiment;

[0029] Figure 8 This is a block diagram of a device for evaluating the resistance of aerospace chips to single-event effects in one embodiment. Detailed Implementation

[0030] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention.

[0031] It should be noted that, in this document, the reference to "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of the invention. The presentation of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will understand that the embodiments described herein can be combined with other embodiments. The term "and / or" as used herein refers to any combination of one or more of the associated listed items, and all possible combinations, including such combinations.

[0032] The embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0033] In one embodiment, such as Figure 1 As shown, a method for evaluating the resistance of aerospace chips to single-event effects is provided, which may include the following steps S12 to S20:

[0034] S12, obtain the distribution of satellite orbits to which the aerospace chip will be applied and the orbital parameters of each orbit; the orbital parameters include orbital altitude, orbital inclination, right ascension of the ascending node, argument of perigee, eccentricity and true anomaly;

[0035] S14. After calculating the LET integral flux spectrum of different orbits based on the distribution of satellite orbits and the parameters of each orbit, the upper and lower threshold limits of the resistance to single-event effects of the aerospace chip in the early design and evaluation stage are determined based on the LET integral flux spectrum of different orbits.

[0036] S16. After setting the design life of the orbital satellite based on the distribution of the satellite orbit and the parameters of each orbit, the design life of the orbital satellite is set as the duration of no single-event events in orbit, and the soft error rate of single-event effects of the aerospace chip in the satellite orbit is determined in the early design evaluation stage.

[0037] S18, obtain at least four single-event sensitive sections obtained after conducting single-event irradiation experiments on the aerospace chip with at least four different LET values, and determine the single-event effect threshold and the soft error rate of the aerospace chip in the later stage of preliminary investigation based on each single-event sensitive section.

[0038] S20, in the chip compliance evaluation stage, comprehensively compares the single-event effect threshold of the aerospace chip in the later stage of preliminary investigation with the single-event effect threshold in the early stage of design evaluation, as well as the soft error rate of the single-event effect of the aerospace chip in the later stage of preliminary investigation with the soft error rate of the aerospace chip in satellite orbit in the early stage of design evaluation, to obtain the evaluation result of whether the aerospace chip design is qualified.

[0039] It is understandable that, during the early design evaluation phase, based on the satellite's orbital parameters (such as orbital altitude, orbital inclination, right ascension of the ascending node, argument of perigee, eccentricity, and true anomaly), and the differences in the magnitude of LET (Linear Energy Transfer) flux distribution among orbits under the space radiation environment, a predefined upper limit for resisting single-event effects is established during the early design phase. SEE up Lower threshold for resistance to single-event effects SEE down And the soft error rate of single-event effects. SER critThis is to proactively avoid design risks and unnecessary losses of manpower and resources. In the later preliminary assessment phase, the accelerator irradiation facility can be used to determine the single-event resistance threshold based on actual irradiation experimental cross-section data and different computational models. SEE th And the soft error rate of single-event effects SER th During the chip compliance assessment phase, the indicators from the first two phases are compared to determine the final design's suitability for aerospace chips. This combination of the preliminary design assessment phase, the later preliminary assessment phase, and the chip compliance assessment phase creates an effective closed-loop evaluation.

[0040] The method in this embodiment is divided into three stages: preliminary design evaluation, post-construction assessment (specifically referring to the aerospace chip after tape-out in this specification), and chip compliance evaluation. Both the preliminary design evaluation and post-construction assessment stages quantitatively evaluate the single-event effect (SEE) resistance of the aerospace chip, ultimately providing corresponding SEE indicators. The chip compliance evaluation stage compares these indicators from the first two stages to determine whether the final chip design meets the standards. Only when the radiation resistance performance of the aerospace chip reaches the required radiation resistance indicators can its high reliability during on-orbit operation be guaranteed. The method in this embodiment can provide effective data reference for formulating SEE resistance indicators during the preliminary design of aerospace chips, avoiding design risks. It can also provide a reference for assessing the radiation resistance of chips after tape-out, greatly enhancing risk control before the aerospace chip enters orbit while avoiding unnecessary losses of manpower and resources.

[0041] The aforementioned evaluation method for single-event immunity of aerospace chips quantitatively measures the chip's ability to withstand single-event effects by dividing the evaluation process into three stages: preliminary design evaluation, preliminary assessment, and chip compliance evaluation. Simultaneously, the early evaluation in the preliminary design stage, the secondary verification in the preliminary assessment stage, and the comprehensive comparison in the chip compliance evaluation stage clearly and in a closed-loop manner assess whether the chip's single-event immunity performance meets the orbital insertion standards, greatly enhancing risk control for aerospace chips. This evaluation technology is highly universal and easy to operate, improving the reliability of aerospace chips while avoiding design risks, and can be widely applied in the aerospace field.

[0042] In one embodiment, step S14 described above may further include the following processing steps:

[0043] Based on the distribution of satellite orbits and the parameters of each orbit, the radiation resistance index of aerospace chips is pre-evaluated using a selected single-particle space radiation environment model.

[0044] After selecting the shielding method for the space radiation environment, the LET integral flux spectrum of different orbits is calculated based on the radiation resistance index of the aerospace chip.

[0045] Based on the LET integral flux spectrum of different orbits, the number of particles per square centimeter of the aerospace chip in the previous year at each critical point was extracted, and the upper and lower threshold limits of the aerospace chip's resistance to single-event effects were determined in the early design and evaluation stage.

[0046] This is understandable, in the early design evaluation stage: such as Figure 2 As shown, submodule 1 determines the upper limit of the single-event immunity threshold for aerospace chips. SEE up and threshold lower limit SEE down .

[0047] Specifically, the distribution and parameters of the satellite orbits to which the aerospace chip will be applied need to be determined. These orbital parameters refer specifically to the six orbital elements, including orbital altitude, inclination, right ascension of the ascending node, argument of perigee, eccentricity, and true anomaly. An existing single-particle space radiation environment model (such as CRÈME86, i.e., the Cosmic Ray Effects on Micro-Electronics 1986 model) can be selected. Based on the satellite orbit distribution and parameters, the radiation resistance of the aerospace chip can be pre-evaluated. The specific pre-evaluation process can be understood by referring to the evaluation process of the selected model; it will not be detailed further in this manual.

[0048] Next, after selecting the shielding method for the space radiation environment (e.g., 3mm aluminum shielding), the LET integral flux spectrum for different orbits is calculated based on the radiation resistance specifications of the aerospace chip. The calculation tool can be any existing semiconductor radiation effect calculation software. Figure 3 Flux represents the integral flux spectrum at different inclinations at an orbital altitude of 1145 km, considering only the orbital altitude and inclination.

[0049] Based on the LET integral flux spectra of the different orbits, the upper limit of the threshold for resisting single-event effects of the aerospace chip is determined. SEE up and threshold lower limit SEE down Due to the presence of galactic cosmic rays in the space radiation environment at LET=15 MeV•cm 2 / mg, 26 MeV•cm 2 / mg, 37 MeV•cm 2 / mg, 75 MeV•cm 2 The LET integrated flux decreased significantly at / mg. Therefore, based on the LET integrated flux spectra of different orbitals given above, LET > 15 MeV•cm was extracted. 2 / mg, LET>26 MeV•cm 2 / mg, LET>37 MeV•cm2 / mg and LET>75 MeV•cm 2 The key critical points are the number of particles per square centimeter per year that the aerospace chip experiences, and thus determine the upper limit of the threshold for resistance to single-event effects. SEE up and threshold lower limit SEE down There should be at least an order of magnitude difference between the upper and lower limits of the threshold.

[0050] like Figure 4 This study describes the annual particle number distribution per square centimeter of a chip at different inclination angles on a 1145 km orbit. The chip experiences the highest particle number at an inclination of 90°, thus establishing the upper and lower limits of the threshold for this condition. Considering that the area of ​​aerospace chips is typically on the mm² scale, at the maximum inclination angle of 90°, the chip experiences LET > 15 MeV•cm² per year. 2 The number of particles per mg is approximately 0.34, while the annual incidence of LET > 26 MeV•cm 2 The number of particles per mg is only 0.0364; therefore, the lower limit of the threshold can be set at 15 MeV•cm. 2 / mg, with an upper threshold of 26 MeV•cm 2 / mg.

[0051] Early Design Evaluation Phase: Submodule 2 determines the soft error rate of single-event effects for aerospace chips. SER crit .

[0052] First, the distribution of satellite orbits to which the aerospace chip will be applied and the information on each orbital parameter are retrieved. The six orbital parameters specifically refer to parameters such as orbital altitude, orbital inclination, right ascension of the ascending node, argument of perigee, eccentricity, and true anomaly. Then, the design life of the satellite orbit is defined. Optionally, the design lifespans for geostationary orbit (GEO), medium Earth orbit (MEO), and low Earth orbit (LEO) satellites are 15 years, 12 years, and 7 years, respectively.

[0053] Next, the duration of the satellite's single-event-free period in orbit is set to the satellite's design life, and then the soft error rate of single-event effects occurring in the spacecraft's chips in orbit is determined. SER crit Taking an in-orbit event-free period of M years and N spacecraft chip resources as an example, the soft error rate... SER crit It can be determined as err / device / day is the number of errors per device per day.

[0054] In some implementations, regarding step S16 above, if the number of resources for the aerospace chip cannot be specified, the number of resources for the aerospace chip is set to 1, and the soft error rate of the aerospace chip experiencing single-event effects in satellite orbit during the early design evaluation phase is... M represents the duration of no single-event events in orbit, and err / device / day represents the number of errors per device per day.

[0055] It should be noted that if the number of resources for the aerospace chip cannot be specified, then the resource number N for the aforementioned aerospace chip is taken as 1, and the soft error rate is... SER crit Only determined at the device level, i.e. .

[0056] Later preliminary assessment stage: such as Figure 5 As shown, the single-event immunity threshold of the aerospace chip was determined in the later stages of preliminary research. SEE th And the soft error rate of single-event effects SER th RPP is a rectangular parallel pipe model.

[0057] Specifically, the first step is to conduct research on aerospace chips. i ( i ≥4) single-particle irradiation experiments with different LET values ​​were conducted, and the corresponding results were obtained. i Single-event sensitive cross section s i The accelerator source for the single-particle irradiation experiment can be any of a tandem accelerator, a cyclotron accelerator, or a heavy ion research facility. Generally, i Different LET values ​​can include at least a LET value greater than or equal to 75 MeV•cm 2 / mg, LET value is close to 37 MeV•cm 2 / mg, LET value is close to 26 MeV•cm 2 / mg and LET value are close to 15 MeV•cm 2 / mg these four specific points.

[0058] Specifically, the LET value is greater than or equal to 75 MeV•cm 2 The ions at / mg are generally generated by Ta and Bi ions, with a LET value close to 37 MeV•cm. 2 The ions at / mg are generally generated by Kr ions, with an LET value close to 26 MeV•cm. 2 The ions in / mg are generally produced by Fe ions and Ti ions, with a LET value close to 15 MeV•cm. 2 The ions in / mg are generally produced by Ca ions and Cl ions.

[0059] Then, to i Single-event sensitive cross section s i Perform judgment and analysis to determine the threshold for resistance to single-event effects. SEE th .

[0060] In one embodiment, regarding step S18 above, the process of determining the single-event effect threshold of the aerospace chip in the later stage of preliminary investigation based on each single-event sensitive section may specifically include the following processing:

[0061] If there are more than 3 single-event sensitive sections that are not equal to 0 and there is a single-event sensitive section that is equal to 0, then the maximum LET value corresponding to the single-event sensitive section being equal to 0 is taken as the threshold for resisting single-event effects in the later stage of preliminary investigation.

[0062] Specifically, (1) if there are more than 3 single-particle sensitive sections s i ≠0 coexistence s i =0, then take s i The maximum LET value corresponding to =0 is the threshold for resistance to single-event effects. SEE th .like Figure 6 The interpolated tables show the measured cross-sectional data under different LET conditions. At this point, the single-event resistance threshold is 15.5 MeV•cm. 2 / mg.

[0063] In one embodiment, regarding step S18 above, the process of determining the single-event effect threshold of the aerospace chip in the later stage of preliminary investigation based on each single-event sensitive section may specifically include the following processing:

[0064] If there are more than 3 single-event sensitive sections that are not equal to 0 and there is no single-event sensitive section that is equal to 0, then the threshold for resisting single-event effects in the later stage of the preliminary investigation is determined by performing Weibull fitting on the single-event sensitive sections.

[0065] Specifically, (2) if there are more than 3 single-particle sensitive sections s i ≠0 and does not exist at the same time s i If the value is 0, then Weibull fitting is performed on the single-event sensitive section to determine the threshold against single-event effects. SEE th The specific form of the Weibull function is: ,in, W and S These are the shape factors, ssat For saturated cross section, SEE th The Weibull function will provide the values ​​of these four parameter factors after fitting the data to determine the threshold for resisting single-event effects in the later stage of preliminary investigation.

[0066] In one embodiment, regarding step S18 above, the process of determining the single-event effect threshold of the aerospace chip in the later stage of preliminary investigation based on each single-event sensitive section may specifically include the following processing:

[0067] If there are no more than three single-event sensitive sections that are not equal to 0, then the maximum LET value corresponding to the single-event sensitive section being equal to 0 is taken as the threshold for resisting single-event effects in the later stage of preliminary investigation.

[0068] Specifically, (3) if there are no more than 3 single-particle sensitive sections s i If ≠0, then it is consistent with (1), and we still take the value. s i The maximum LET value corresponding to =0 is the threshold for resistance to single-event effects. SEE th .

[0069] Next, the soft error rate of single-event effects in the later preliminary stage was determined. SER th .

[0070] Specifically, if the conditions in (1) and (2) above are met, then the integral rectangular parallel pipe (IRPP) model is selected, and the sensitive volume is set. The sensitive volume is 1µm for small-sized devices (generally below 180nm) and 2µm for large-sized process devices (generally above 180nm), thereby determining the soft error rate of single-event effect. SER th .

[0071] If condition (3) is met, the cross-sectional data is taken as a step function. Specifically, the single-event sensitive cross-section corresponding to the maximum LET value is taken as the saturation cross-section. Below the threshold, there is no single-event effect; all single-event sensitive cross-sections are 0; above the threshold, all single-event effect cross-sections are saturation cross-sections. For example... Figure 6 This is the step function fitting curve for a chip manufactured using a 55 nm process. The step function fitting curve is selected with LET = 84.61 MeV•cm. 2 The single-particle sensitive cross section corresponding to / mg is the saturation cross section, LET = 22 MeV•cm. 2 Single-particle sensitive cross sections above / mg are considered saturated cross sections, while those below are all 0.

[0072] Subsequently, a rectangular parallel pipe model was selected, and a sensitive volume was set. The sensitive volume was 1µm for small-sized devices (generally below 180nm) and 2µm for large-sized process devices (generally above 180nm), thereby determining the soft error rate of single-event effects. SER th . Figure 6 The corresponding soft error rate is 1.95e-4 err / device / day (1145km, 90° tilt).

[0073] Chip compliance assessment phase: such as Figure 7 As shown, by combining the radiation resistance indicators given above and through a comprehensive comparison of the indicators in the first two stages, the final evaluation result of whether the aerospace chip meets the standards is given.

[0074] In one embodiment, the process of obtaining the evaluation result of whether the aerospace chip design is qualified in step S20 above may specifically include the following processing:

[0075] If the single-event immunity threshold in the later preliminary evaluation stage is greater than the upper limit of the single-event immunity threshold in the earlier design evaluation stage, then the aerospace chip design is deemed qualified.

[0076] Specifically, if the threshold for resistance to single-event effects is determined during the later preliminary assessment phase... SEE th Greater than the upper limit of the single-event resistance threshold in the early design evaluation stage. SEE up If this is the case, then it can be determined that the aerospace chip is immune to single-event effects, and it can be directly determined that the aerospace chip design is qualified and meets the orbital entry standards.

[0077] In one embodiment, the process of obtaining the evaluation result of whether the aerospace chip design is qualified in step S20 above may specifically include the following processing:

[0078] If the threshold for resisting single-event effects in the later stage of preliminary assessment is not greater than the upper limit of the threshold for resisting single-event effects in the earlier stage of design assessment, then it is determined whether the threshold for resisting single-event effects in the later stage of preliminary assessment is greater than the lower limit of the threshold for resisting single-event effects in the earlier stage of design assessment, and the soft error rate of single-event effects in the later stage of preliminary assessment is less than the soft error rate of single-event effects in the earlier stage of design assessment.

[0079] If the conditions are met, the aerospace chip design is deemed qualified; otherwise, the aerospace chip design is deemed unqualified.

[0080] Specifically, if the threshold for resistance to single-event effects is determined during the later preliminary assessment phase... SEE th Not greater than the upper limit of the single-event resistance threshold during the early design evaluation stage. SEE up Then, it is further determined whether the threshold for resistance to single-event effects is met in the later preliminary assessment stage. SEE th Greater than the lower threshold for resistance to single-event effects in the early design evaluation phase. SEE down Furthermore, the soft error rate of single-event effects in the later preliminary assessment phase. SER th Less than the soft error rate of single-event effects in the early design evaluation stage. SER crit If the conditions are met, then the aerospace chip design is deemed qualified and also meets the orbital insertion criteria. Taking a LEO (Low Earth Orbit) satellite with an orbital altitude of 1145km as an example, the soft error rate due to single-event effects during its early design evaluation phase... SER crit Upper threshold for resistance to single-event effects SEE up and threshold lower limit SEE down The respective err / device / day and 15 MeV•cm are 3.91e-4. 2 / mg and 26 MeV•cm 2 / mg; Figure 6 The corresponding threshold for resistance to single-event effects in the later stages of preliminary assessment. SEE th And the soft error rate of single-event effects SER th 22 MeV•cm 2 / mg and 1.95e-4 err / device / day (1145km, 90° inclination), which meet the design requirements.

[0081] If neither of the aforementioned criteria is met, then the aerospace chip design is deemed unqualified and does not meet orbital standards; it should be discarded or the design reinforced.

[0082] The aforementioned method, in the early design and evaluation phase, identifies predefined thresholds for single-event immunity and soft error rates based on the differences in LET flux caused by orbital parameters and the space radiation environment of each orbit. In the later preliminary evaluation phase, cross-sectional data obtained from irradiation experiments, combined with different computational models, are used to determine the actual single-event immunity thresholds and soft error rates for the aerospace chip. In the chip compliance evaluation phase, by comprehensively comparing the indicators from the first two phases, a final evaluation result is given regarding whether the aerospace chip meets the compliance requirements. This system's performance evaluation method, when applied to the radiation resistance evaluation of aerospace chips, is highly universal and easy to operate, significantly improving risk control before aerospace chips enter orbit.

[0083] It should be understood that, although the above process Figure 1 The steps in the diagram are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order in which these steps are executed; they can be performed in other orders. Furthermore, the above process... Figure 1 At least some of the steps may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least some of the sub-steps or stages of other steps.

[0084] In one embodiment, such as Figure 8 As shown, a single-event effect (SEE) evaluation device 100 for aerospace chips is also provided, including a parameter acquisition module 11, a preliminary evaluation module 13, a preliminary error rate module 15, a post-design assessment module 17, and a compliance evaluation module 19. The parameter acquisition module 11 acquires the distribution of satellite orbits to which the aerospace chip will be applied and the parameters of each orbit; the orbital parameters include orbital altitude, orbital inclination, right ascension of the ascending node, argument of perigee, eccentricity, and true anomaly. The preliminary evaluation module 13 calculates the LET integral flux spectrum of different orbits based on the satellite orbit distribution and parameters, and then determines the upper and lower threshold limits for the aerospace chip's SEE resistance during the preliminary design evaluation stage based on the LET integral flux spectrum of different orbits. The preliminary error rate module 15 sets the design life of the orbital satellite based on the satellite orbit distribution and parameters, sets the duration of no SEE events in orbit as the design life of the orbital satellite, and determines the soft error rate of the aerospace chip experiencing SEE in the satellite orbit during the preliminary design evaluation stage. The post-design assessment module 17 is used to obtain at least four single-event sensitive cross sections obtained after conducting single-event irradiation experiments on the aerospace chip with at least four different LET values. Based on each single-event sensitive cross section, the single-event immunity threshold and the soft error rate of the aerospace chip in the post-design assessment stage are determined. The compliance assessment module 19 is used to comprehensively compare the single-event immunity threshold of the aerospace chip in the post-design assessment stage with the single-event immunity threshold in the early design assessment stage, as well as the soft error rate of the aerospace chip in the post-design assessment stage with the soft error rate of the aerospace chip in satellite orbit in the early design assessment stage, to obtain the assessment result of whether the aerospace chip design is qualified.

[0085] The aforementioned single-event effect (SEE) evaluation device 100 for aerospace chips quantitatively measures the SEE resistance capability of aerospace chips by dividing the evaluation process into three stages: preliminary design evaluation, preliminary assessment, and chip compliance evaluation. Simultaneously, the early evaluation in the preliminary design stage, the secondary verification in the preliminary assessment stage, and the comprehensive comparison in the chip compliance evaluation stage clearly and in a closed-loop manner assess whether the chip's SEE resistance performance meets the orbital insertion standards, greatly enhancing the risk control of aerospace chips. This evaluation technology is characterized by high universality and strong operability, improving the reliability of aerospace chips while avoiding design risks, and can be widely applied in the aerospace field.

[0086] It is understood that the explanations of the features in the aforementioned single-event effect evaluation device 100 for aerospace chips can be understood by referring to the corresponding explanations in the various embodiments of the aforementioned single-event effect evaluation method for aerospace chips. Each module in the aforementioned single-event effect evaluation device 100 for aerospace chips can be implemented entirely or partially through software, hardware, or a combination thereof. The aforementioned components can be embedded in hardware or independently of a device with data processing capabilities, or stored in software in the memory of the aforementioned device, so that the processor can call and execute the operations corresponding to each module. The aforementioned device can be, but is not limited to, various types of computers already existing in the art.

[0087] In one embodiment, a computer device is also provided, including a memory and a processor. The memory stores a computer program, and the processor executes the computer program to perform the following processing steps: acquiring the distribution of satellite orbits to which the aerospace chip will be applied and the orbital parameters; the orbital parameters include orbital altitude, orbital inclination, right ascension of the ascending node, argument of perigee, eccentricity, and true anomaly; calculating the LET integral flux spectrum of different orbits based on the distribution of satellite orbits and the orbital parameters, and determining the upper and lower threshold limits of the aerospace chip's resistance to single-event effects in the early design evaluation stage based on the LET integral flux spectrum of different orbits; setting the design life of the orbital satellite based on the distribution of satellite orbits and the orbital parameters, and setting the duration of the satellite's single-event-free period in orbit as the orbital satellite's... The design life is determined, and the soft error rate of single-event effects (SEE) of the aerospace chip in satellite orbit during the early design evaluation stage is determined. At least four single-event sensitive sections are obtained after conducting single-event irradiation experiments on the aerospace chip with at least four different LET values. Based on each SEE sensitive section, the SEE resistance threshold and the soft error rate of SEE of the aerospace chip in the later preliminary evaluation stage are determined. During the chip compliance evaluation stage, the SEE resistance threshold of the aerospace chip in the later preliminary evaluation stage is comprehensively compared with the SEE resistance threshold in the early design evaluation stage, as well as the soft error rate of SEE of the aerospace chip in the later preliminary evaluation stage and the soft error rate of SEE of the aerospace chip in satellite orbit during the early design evaluation stage, to obtain the evaluation result of whether the aerospace chip design is qualified.

[0088] In one embodiment, when the processor executes the computer program, it can also implement the steps or sub-steps added to the various embodiments of the above-described evaluation method for the single-event effect resistance of aerospace chips.

[0089] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided by this invention can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), memory bus DRAM (RDRAM), and interface DRAM (DRDRAM), etc.

[0090] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0091] The above embodiments merely illustrate several implementation methods of the present invention, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of protection of the invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and all such modifications and improvements fall within the scope of protection of the present invention.

Claims

1. A method for evaluating the resistance of a space chip to single event effects, characterized in that, The method comprises the steps of: obtaining the distribution of satellite orbits to which the spaceflight chip will be applied and the parameters of the orbits; the parameters of the orbits include the orbital height, the orbital inclination, the longitude of the ascending node, the argument of perigee, the eccentricity and the true anomaly; calculating the LET integral flux spectrum of different orbits according to the distribution of the satellite orbits and the parameters of the orbits, and determining the upper threshold and the lower threshold of the anti-single event effect of the spaceflight chip in the preliminary design evaluation stage according to the LET integral flux spectrum of different orbits; setting the design life of the orbit satellite according to the distribution of the satellite orbits and the parameters of the orbits, setting the satellite in-orbit single event time as the design life of the orbit satellite, and determining the soft error rate of the spaceflight chip on the satellite orbit in the preliminary design evaluation stage; obtaining at least four single event sensitive cross sections corresponding to at least four different LET values of the single particle irradiation experiment on the spaceflight chip, and determining the anti-single event effect threshold and the soft error rate of the single event effect of the spaceflight chip in the later stage of the bottom-up stage according to the single event sensitive cross sections; comprehensively comparing the anti-single event effect threshold of the spaceflight chip in the later stage of the bottom-up stage with the anti-single event effect threshold in the preliminary design evaluation stage, and the soft error rate of the single event effect of the spaceflight chip in the later stage of the bottom-up stage with the soft error rate of the single event effect of the spaceflight chip on the satellite orbit in the preliminary design evaluation stage in the chip qualification evaluation stage, to obtain the evaluation result of whether the design of the spaceflight chip is qualified.

2. The method of claim 1, wherein the method further comprises: The step of calculating the LET integral flux spectrum of different orbits according to the distribution of the satellite orbits and the parameters of the orbits, and determining the upper threshold and the lower threshold of the anti-single event effect of the spaceflight chip in the preliminary design evaluation stage according to the LET integral flux spectrum of different orbits, comprises the steps of: pre-evaluating the anti-radiation index of the spaceflight chip by selecting a single particle space radiation environment model according to the distribution of the satellite orbits and the parameters of the orbits; calculating the LET integral flux spectrum of different orbits according to the anti-radiation index of the spaceflight chip after selecting the shielding mode of the space radiation environment; extracting the number of particles per square centimeter of the spaceflight chip per year at each key critical point according to the LET integral flux spectrum of different orbits, and determining the upper threshold and the lower threshold of the anti-single event effect of the spaceflight chip in the preliminary design evaluation stage.

3. The method of claim 2, wherein the method further comprises: According to the distribution of the satellite orbits and the orbit parameters, the design life of the orbit satellite is set, and the length of time without single event of the satellite in orbit is set as the design life of the orbit satellite, and the soft error rate of the space chip on the orbit of the satellite in the early design evaluation stage is determined. ; M is the length of time without single event in orbit, and err / device / day is the error number of each device per day.

4. The method of claim 1 to 3, wherein the method is used for evaluating the space chip against single event effects, characterized in that, The process of determining the anti-single event effect threshold of the spaceflight chip in the later stage of the bottom-up stage according to the single event sensitive cross sections, comprises the steps of: if there are more than three single event sensitive cross sections not equal to 0 and there is a single event sensitive cross section equal to 0, then the maximum LET value corresponding to the single event sensitive cross section equal to 0 is taken as the anti-single event effect threshold in the later stage of the bottom-up stage.

5. The method of claim 4, wherein the method further comprises: The process of determining the anti-single event effect threshold of the spaceflight chip in the later stage of the bottom-up stage according to the single event sensitive cross sections, further comprises the steps of: if there are more than three single event sensitive cross sections not equal to 0 and there is no single event sensitive cross section equal to 0, then the anti-single event effect threshold in the later stage of the bottom-up stage is determined after Weibull fitting of the single event sensitive cross sections.

6. The method of claim 4, wherein the method further comprises: The process of determining the anti-single event effect threshold of the spaceflight chip in the later stage of the bottom-up stage according to the single event sensitive cross sections, further comprises the steps of: If there are not more than three single-particle sensitive cross sections not equal to 0, the maximum LET value corresponding to the single-particle sensitive cross section equal to 0 is taken as the anti-single-particle effect threshold value in the later stage of the bottom-up evaluation.

7. The method of claim 1, wherein the method further comprises: The process of obtaining the evaluation result of whether the spaceflight chip design is qualified includes: If the anti-single-particle effect threshold value in the later stage of the bottom-up evaluation is greater than the upper limit of the anti-single-particle effect threshold value in the earlier stage of the design evaluation, it is determined that the spaceflight chip design is qualified.

8. The method of claim 7, wherein the method further comprises: The process of obtaining the evaluation result of whether the spaceflight chip design is qualified also includes: If the anti-single-particle effect threshold value in the later stage of the bottom-up evaluation is not greater than the upper limit of the anti-single-particle effect threshold value in the earlier stage of the design evaluation, it is determined whether the anti-single-particle effect threshold value in the later stage of the bottom-up evaluation is greater than the lower limit of the anti-single-particle effect threshold value in the earlier stage of the design evaluation, and the soft error rate of the single-particle effect in the later stage of the bottom-up evaluation is less than the soft error rate of the single-particle effect in the earlier stage of the design evaluation; If yes, it is determined that the spaceflight chip design is qualified; otherwise, it is determined that the spaceflight chip design is unqualified.

9. An evaluation device for the resistance of aerospace chips to single-event effects, characterized in that, It includes: The parameter acquisition module is used to acquire the distribution of satellite orbits and orbit parameters to which the spaceflight chip will be applied; the orbit parameters include orbit height, orbit inclination, ascending node right ascension, perigee amplitude, eccentricity and true anomaly; The earlier evaluation module is used to calculate the LET integral flux spectrum of different orbits according to the distribution of satellite orbits and orbit parameters, and then determine the upper limit and lower limit of the anti-single-particle effect threshold value of the spaceflight chip in the earlier stage of the design evaluation according to the LET integral flux spectrum of different orbits; The earlier error rate module is used to set the design life of the orbit satellite according to the distribution of satellite orbits and orbit parameters, set the satellite on-orbit single-particle event duration as the design life of the orbit satellite, and determine the soft error rate of the single-particle effect of the spaceflight chip on the satellite orbit in the earlier stage of the design evaluation; The later bottom-up module is used to obtain at least four single-particle sensitive cross sections corresponding to at least four single-particle irradiation experiments on the spaceflight chip, and determine the anti-single-particle effect threshold value and the soft error rate of the single-particle effect of the spaceflight chip in the later stage of the bottom-up evaluation according to the single-particle sensitive cross sections; The qualification evaluation module is used to comprehensively compare the anti-single-particle effect threshold value of the spaceflight chip in the later stage of the bottom-up evaluation and the anti-single-particle effect threshold value in the earlier stage of the design evaluation, and the soft error rate of the single-particle effect of the spaceflight chip in the later stage of the bottom-up evaluation and the soft error rate of the single-particle effect of the spaceflight chip on the satellite orbit in the earlier stage of the design evaluation in the chip qualification evaluation stage, and obtain the evaluation result of whether the spaceflight chip design is qualified.

10. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, The processor executes the computer program to realize the steps of the spaceflight chip anti-single-particle effect evaluation method in any one of claims 1 to 8.

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