Composite substrate and manufacturing method thereof
By growing a group III nitride layer on a support substrate and forming hexagonal nanopores on the side away from the target substrate, the problem of obtaining large-area, high-quality group III nitride substrates is solved, stress is reduced, and the quality and reliability of the device are improved.
Patent Information
- Application Number
- CN202410578417.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-05-10
- Publication Date
- 2025-11-14
AI Technical Summary
It is difficult to obtain large-area, high-quality group III nitride substrates, and existing technologies cannot solve the stress problems caused by lattice mismatch and thermal mismatch in group III nitride materials.
A group III nitride layer is grown on a support substrate and bonded to a target substrate with a dielectric layer on its surface. The support substrate is then removed, and multiple spaced hexagonal nanopores are formed on the side of the group III nitride layer away from the target substrate. Stress is reduced and the quality of the group III nitride layer is improved by inverted bonding and peeling off the support substrate.
This reduces lattice mismatch and thermal mismatch stress between the group III nitride layer and the substrate, improves the quality of the group III nitride layer, and alleviates the stress of the epitaxial layer through hexagonal nanopores, thereby enhancing the reliability and quality of the device.
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Figure CN120955032A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of semiconductor technology, and specifically to a composite substrate and its manufacturing method. Background Technology
[0002] Group III nitride wide bandgap materials are particularly suitable for high-frequency and high-power applications due to their excellent properties. Especially in the field of semiconductor devices, significant achievements and substantial progress have been made in the research of optoelectronic devices such as light-emitting diodes (LEDs) and laser diodes (LDs), as well as microelectronic devices such as high-electron-mobility transistors (HEMTs).
[0003] The substrate material used for epitaxial growth of group III nitride devices should ideally be the same material to minimize lattice mismatch and reduce the coefficient of thermal expansion between the device and the substrate. However, due to the extremely high melting point and very high nitrogen saturated vapor pressure of group III nitride materials, it is difficult to obtain large-area, high-quality homogeneous substrates. Summary of the Invention
[0004] In view of this, embodiments of the present disclosure provide a composite substrate and a method for manufacturing the same, in order to solve the problem of difficulty in obtaining large-area, high-quality group III nitride substrates.
[0005] According to one aspect of this disclosure, an embodiment of this disclosure provides a method for manufacturing a composite substrate, characterized by comprising the following steps:
[0006] S1. Provide a supporting substrate;
[0007] S2. A group III nitride layer is grown on the supporting substrate;
[0008] S3. Bond the group III nitride layer to a target substrate having a dielectric layer on its surface;
[0009] S4. Remove the supporting substrate;
[0010] S5. A plurality of spaced hexagonal nanopores are formed on the side of the group III nitride layer away from the target substrate.
[0011] As an optional embodiment, the side of the group III nitride layer away from the target substrate is the N-side.
[0012] As an optional embodiment, the projection shape of the hexagonal nanopore on the plane of the target substrate is an equilateral and equiangular hexagon, an equilateral but not equiangular hexagon, or an equiangular but not equilateral hexagon.
[0013] As an optional embodiment, the diameter of the hexagonal nanopores ranges from 100nm to 300nm.
[0014] As an optional embodiment, the thickness of the group III nitride layer ranges from 0.5 times the diameter of the hexagonal nanopores to 2 times the diameter of the hexagonal nanopores.
[0015] As an optional embodiment, step S5 includes:
[0016] S51. Deposit a mask layer on the side of the group III nitride layer away from the target substrate;
[0017] S52. Photolithography is performed on the mask layer to form multiple spaced through holes;
[0018] S53. Wet treatment is performed on the surface of the group III nitride layer exposed by the through-hole to form a plurality of spaced hexagonal nanopores on the side of the group III nitride layer away from the target substrate.
[0019] As an optional embodiment, step S53 further includes: performing a secondary etching on the hexagonal nanopore, wherein the etching method is in-situ etching.
[0020] As an optional embodiment, step S53 further includes: performing secondary epitaxy in the hexagonal nanopore to reduce the pore size of the hexagonal nanopore.
[0021] As an optional embodiment, the pore size of the hexagonal nanopores is reduced to less than 100 nm.
[0022] As an optional embodiment, after secondary epitaxy in the hexagonal nanopore, a modification layer can be formed on the sidewall of the hexagonal nanopore.
[0023] According to another aspect of this disclosure, one embodiment of this disclosure provides a composite substrate, characterized in that...
[0024] The composite substrate prepared by the manufacturing method of any of the above-mentioned composite substrates includes a target substrate, a dielectric layer and a group III nitride layer stacked sequentially, wherein the side of the group III nitride layer away from the target substrate includes a plurality of spaced hexagonal nanopores.
[0025] As an optional embodiment, the side of the group III nitride layer away from the target substrate is the N-side.
[0026] As an optional embodiment, the projection shape of the hexagonal nanopore on the plane of the target substrate is an equilateral and equiangular hexagon, an equilateral but not equiangular hexagon, or an equiangular but not equilateral hexagon.
[0027] As an optional embodiment, the crystal planes on the side of the hexagonal nanopore include (1101) crystal planes.
[0028] As an optional embodiment, the bottom surface of the hexagonal nanopore is located in the group III nitride layer, at the interface between the group III nitride layer and the dielectric layer, or in the dielectric layer.
[0029] This disclosure provides a composite substrate and its manufacturing method. The method involves growing a group III nitride layer on a supporting substrate; bonding the group III nitride layer to a target substrate having a dielectric layer on its surface; removing the supporting substrate; and forming a plurality of spaced hexagonal nanopores on the side of the group III nitride layer away from the target substrate. This method, by inverting the bonding and peeling off of the supporting substrate, reduces the stress caused by lattice mismatch and thermal mismatch between the group III nitride layer and the substrate, improving the quality of the group III nitride layer. Simultaneously, it yields a group III nitride layer on an insulator, reducing the parasitic capacitance between the group III nitride layer and the substrate. The epitaxial growth surface of the composite substrate prepared in this disclosure is a group III nitride layer. When group III nitride devices are epitaxially grown on this composite substrate, it is a homogeneous epitaxy. Therefore, the composite substrate prepared in this disclosure is equivalent to a homogeneous substrate for group III nitride devices, which can be used to prepare group III nitride devices with fewer defects and higher quality. At the same time, the hexagonal nanopores provided in this disclosure on the easily etchable N-plane of the group III nitride layer can alleviate the stress caused by lattice mismatch and thermal mismatch in the epitaxial layers above the composite substrate. On the other hand, the epitaxial layers above the composite substrate can heal defects through lateral epitaxial growth. Therefore, the quality of group III nitride devices prepared on the composite substrate can be further improved. Attached Figure Description
[0030] Figure 1 The diagram shows a flowchart of a method for manufacturing a composite substrate according to an embodiment of this disclosure.
[0031] Figures 2 to 6 As shown Figure 1 The diagram shows the intermediate structure corresponding to the process shown.
[0032] Figures 7a to 7c The image shown is a top view of a composite substrate provided in some embodiments of this disclosure.
[0033] Figures 8a to 8c The diagram shown is a structural schematic of a composite substrate provided in some embodiments of this disclosure.
[0034] Figure 9 The diagram shows a flowchart of a method for forming hexagonal nanopores in a composite substrate according to an embodiment of this disclosure.
[0035] Figures 10 to 12 As shown Figure 9 The diagram shows the intermediate structure corresponding to the process shown.
[0036] Figure 13 The diagram shown is a structural schematic of a composite substrate provided in an embodiment of this disclosure. Detailed Implementation
[0037] The technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.
[0038] To address the challenge of obtaining large-area, high-quality group III nitride substrates, this disclosure provides a composite substrate and its fabrication method. The method involves growing a group III nitride layer on a supporting substrate; bonding the group III nitride layer to a target substrate with a dielectric layer on its surface; removing the supporting substrate; and forming multiple spaced hexagonal nanopores on the side of the group III nitride layer away from the target substrate. This method, using an inverted bonding and substrate removal technique, reduces stress caused by lattice and thermal mismatch between the group III nitride layer and the substrate, improving the quality of the group III nitride layer. Simultaneously, it yields a group III nitride layer on an insulator, reducing the parasitic capacitance between the group III nitride layer and the substrate. The epitaxial growth surface of the composite substrate prepared in this disclosure is a group III nitride layer. When group III nitride devices are epitaxially grown on this composite substrate, it is a homogeneous epitaxy. Therefore, the composite substrate prepared in this disclosure is equivalent to a homogeneous substrate for group III nitride devices, and group III nitride GaN-based devices with fewer defects and higher quality can be prepared. At the same time, the hexagonal nanopores provided in the group III nitride layer on the easily etchable N-plane can alleviate the stress caused by lattice mismatch and thermal mismatch in the epitaxial layers above the composite substrate. On the other hand, the epitaxial layers above the composite substrate can heal defects through lateral epitaxial growth. Therefore, the quality of GaN-based devices with lateral epitaxial growth above group III nitride prepared on the composite substrate can be further improved.
[0039] The following is combined with Figures 1 to 13 A further example illustrates a composite substrate and its manufacturing method mentioned in this disclosure.
[0040] Figure 1 The diagram shown is a flowchart of a method for manufacturing a composite substrate according to an embodiment of this disclosure; Figures 2 to 6 As shown Figure 1 The diagram shows the intermediate structure corresponding to the process flow. (See attached diagram.) Figure 1 As shown, a method for manufacturing a composite substrate according to an embodiment of this disclosure includes the following steps:
[0041] Step S1: Provide a support substrate.
[0042] Specifically, such as Figure 2 As shown, a support substrate 10 is provided, and the material of the support substrate 10 includes silicon.
[0043] Step S2: Grow a group III nitride layer on the support substrate.
[0044] Specifically, such as Figure 3 As shown, a group III nitride layer 20 is grown on a support substrate 10, and the material of the group III nitride layer 20 includes at least one of GaN or AlN.
[0045] Step S3: Bond the group III nitride layer to the target substrate with a dielectric layer on its surface.
[0046] Specifically, such as Figure 4 As shown, a group III nitride layer 20 is bonded to a target substrate 40 having a dielectric layer 30 on its surface. The target substrate 40 is made of silicon, and the dielectric layer 30 is made of at least one of silicon oxide, silicon nitride, silicon oxynitride, and aluminum nitride.
[0047] Step S4: Remove the support substrate.
[0048] Specifically, the support substrate 10 is removed to form a structure as shown in the figure. Figure 5 The composite substrate shown. The method of inverted bonding and peeling off the support substrate 10 can reduce the stress caused by lattice mismatch and thermal mismatch between the group III nitride material and the substrate material, improve the quality of the group III nitride layer 20, and at the same time obtain the group III nitride layer 20 on the insulator, and reduce the parasitic capacitance between the group III nitride layer 20 and the target substrate 40.
[0049] Step S5: Form multiple spaced hexagonal nanopores on the side of the group III nitride layer away from the target substrate.
[0050] Specifically, multiple spaced hexagonal nanopores 21 are formed on the side of the group III nitride layer 20 away from the target substrate 40, forming a structure like... Figure 6 The composite substrate is shown. After flip-chip bonding the group III nitride layer 20 to the dielectric layer 30 and peeling off the support substrate 10, the side of the group III nitride layer 20 away from the target substrate 40 is the N-side. The N-side of the group III nitride material is easier to etch, which can reduce the etching difficulty.
[0051] In this embodiment, the crystal planes on the side surfaces of the hexagonal nanopore 21 include (1101) crystal planes. The diameter of the hexagonal nanopore 21 ranges from 100 nm to 300 nm. The thickness of the group III nitride layer 20 is comparable to the diameter of the hexagonal nanopore 21, and the thickness of the group III nitride layer 20 ranges from 0.5 times the diameter of the hexagonal nanopore 21 to 2 times the diameter of the hexagonal nanopore 21.
[0052] In one embodiment, Figures 7a to 7c The image shown is a top view of a composite substrate provided in some embodiments of this disclosure. The projection shape of the hexagonal nanopore 21 onto the plane of the target substrate 40 is an equilateral and equiangular hexagon (e.g., ...). Figure 7a As shown), equilateral but not equal-angled hexagons (such as...) Figure 7b (as shown) or a hexagon with equal angles but not equal sides (such as) Figure 7c (As shown). Optionally, the hexagonal nanopores 21 can be uniformly distributed, i.e., the spacing between adjacent hexagonal nanopores remains constant, or they can be non-uniformly distributed, with the spacing between adjacent hexagonal nanopores varying, such as periodic changes, uniformly increasing from the center to the periphery, or uniformly decreasing from the center to the periphery. By changing the shape and distribution of the hexagonal nanopores 21, the overall stress distribution of the device subsequently fabricated on the composite substrate can be adjusted, thereby improving the device reliability.
[0053] In one embodiment, Figures 8a to 8c The diagram shown is a schematic representation of the composite substrate provided in some embodiments of this disclosure. The bottom surface of the hexagonal nanopore 21 is located within the group III nitride layer 20 (e.g., Figure 8a As shown), the interface between the group III nitride layer 20 and the dielectric layer 30 (as shown) Figure 8b (as shown) or in the dielectric layer 30 (such as Figure 8c (As shown). The material of the dielectric layer 30 is different from that of the easily etchable group III nitride layer 20, and has an etching selectivity. Therefore, it can be used as an etching stop layer when etching the hexagonal nanopores 21 in the group III nitride layer 20, and control the etching depth of the hexagonal nanopores 21.
[0054] In one embodiment, Figure 9 The diagram shown is a flowchart of a method for forming hexagonal nanopores in a composite substrate according to an embodiment of this disclosure; Figures 10 to 12 As shown Figure 9 The diagram shows the intermediate structure corresponding to the process flow. (See attached diagram.) Figure 9 As shown, a method for forming hexagonal nanopores in a composite substrate according to an embodiment of this disclosure includes the following steps in step S5:
[0055] Step S51: Deposit a mask layer on the side of the group III nitride layer away from the target substrate.
[0056] Step S52: Photolithography is used to process the mask layer to form multiple spaced through holes.
[0057] Step S53: Wet process the surface of the group III nitride layer with exposed vias to form a plurality of spaced hexagonal nanopores on the side of the group III nitride layer away from the target substrate.
[0058] Specifically, such as Figure 10As shown, a mask layer 50 is deposited on the side of the group III nitride layer 20 away from the target substrate 40, as follows: Figure 11 As shown, a photolithography process is performed on the mask layer 50 to form multiple spaced-apart vias 51. Then, a wet processing method is used to process the surface of the group III nitride layer 20 exposed by the vias 51, forming multiple spaced-apart hexagonal nanopores 21 on the side of the group III nitride layer 20 away from the target substrate 40, creating a structure as shown in the image. Figure 6 The composite substrate is shown. Optionally, after forming multiple spaced hexagonal nanopores 21 on the side of the group III nitride layer away from the target substrate, a second etching is performed on the hexagonal nanopores 21. The etching method is in-situ etching, which can further modify the hexagonal nanopores 21 and improve the crystal quality of the sidewalls and bottom surface of the hexagonal nanopores 21. Optionally, a second epitaxy is performed in the hexagonal nanopores 21 to reduce the pore size of the hexagonal nanopores 21 to less than 100 nm, such as... Figure 12 As shown, after secondary epitaxy in the hexagonal nanopore 21, a modification layer 201 can be formed on the sidewall of the hexagonal nanopore 21. Similarly, the hexagonal nanopore 21 can be further modified to improve the crystal quality of the sidewall and bottom surface of the hexagonal nanopore 21.
[0059] According to another aspect of this disclosure, a composite substrate is provided, wherein the composite substrate prepared by the above-described method of manufacturing the composite substrate, such as... Figure 6 As shown, the substrate includes a target substrate 40, a dielectric layer 30, and a group III nitride layer 20 stacked sequentially. The group III nitride layer 20 has a plurality of spaced hexagonal nanopores 21 on the side away from the target substrate 40. In this embodiment, the target substrate 40 is made of silicon, the dielectric layer 30 is made of at least one of silicon oxide, silicon nitride, silicon oxynitride, and aluminum nitride, the group III nitride layer 20 is made of at least one of GaN or AlN, the side of the group III nitride layer 20 away from the target substrate 40 is an N-plane, the crystal planes of the hexagonal nanopores 21 include (1101) crystal planes, and the thickness of the group III nitride layer 20 ranges from 0.5 times the diameter of the hexagonal nanopores 21 to 2 times the diameter of the hexagonal nanopores 21.
[0060] In one embodiment, the projection shape of the hexagonal nanopore 21 onto the plane of the target substrate 40 is an equilateral and equiangular hexagon (e.g., ...). Figure 7a As shown), equilateral but not equal-angled hexagons (such as...) Figure 7b (as shown) or a hexagon with equal angles but not equal sides (such as) Figure 7c (As shown). By changing the shape of the hexagonal nanopore 21, the overall stress distribution of the device subsequently fabricated on the composite substrate can be adjusted, thereby improving the device reliability.
[0061] In one embodiment, the bottom surface of the hexagonal nanopore 21 is located within the group III nitride layer 20 (e.g., Figure 8aAs shown), the interface between the group III nitride layer 20 and the dielectric layer 30 (as shown) Figure 8b (as shown) or in the dielectric layer 30 (such as Figure 8c (As shown). The dielectric layer 30 can serve as an etching stop layer to control the etching depth of the hexagonal nanopores 21.
[0062] In one embodiment, Figure 13 The diagram shown is a structural schematic of a composite substrate provided in an embodiment of this disclosure. Figure 13 As shown, a device layer 60 is further included above the group III nitride layer 20. The material of the device layer 60 includes group III nitride material. The device layer 60 is grown on the group III nitride layer 20 by lateral epitaxial growth, which can heal defects. Moreover, the mismatch between the device layer 60 and the group III nitride layer 20 is small. Therefore, a device layer 60 with good crystal quality can be grown on the group III nitride layer 20.
[0063] This disclosure provides a composite substrate and its manufacturing method. The method involves growing a group III nitride layer on a supporting substrate; bonding the group III nitride layer to a target substrate having a dielectric layer on its surface; removing the supporting substrate; and forming a plurality of spaced hexagonal nanopores on the side of the group III nitride layer away from the target substrate. This method, by inverting the bonding and peeling off of the supporting substrate, reduces the stress caused by lattice mismatch and thermal mismatch between the group III nitride layer and the substrate, improving the quality of the group III nitride layer. Simultaneously, it yields a group III nitride layer on an insulator, reducing the parasitic capacitance between the group III nitride layer and the substrate. The epitaxial growth surface of the composite substrate prepared in this disclosure is a group III nitride layer. When group III nitride devices are epitaxially grown on this composite substrate, it is a homogeneous epitaxy. Therefore, the composite substrate prepared in this disclosure is equivalent to a homogeneous substrate for group III nitride devices, which can be used to prepare group III nitride devices with fewer defects and higher quality. At the same time, the hexagonal nanopores provided in this disclosure on the easily etchable N-plane of the group III nitride layer can alleviate the stress caused by lattice mismatch and thermal mismatch in the epitaxial layers above the composite substrate. On the other hand, the epitaxial layers above the composite substrate can heal defects through lateral epitaxial growth. Therefore, the quality of group III nitride devices prepared on the composite substrate can be further improved.
[0064] It should be understood that the term "comprising" and its variations as used in this disclosure are open-ended, meaning "including but not limited to". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment". In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Furthermore, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.
[0065] The above description is merely a preferred embodiment of this disclosure and is not intended to limit this disclosure. Any modifications or equivalent substitutions made within the spirit and principles of this disclosure should be included within the scope of protection of this disclosure.
Claims
1. A method for manufacturing a composite substrate, characterized in that, Includes the following steps: S1. Provide a support substrate (10); S2. A group III nitride layer (20) is grown on the support substrate (10); S3. Bond the group III nitride layer (20) to a target substrate (40) having a dielectric layer (30) on its surface; S4. Remove the supporting substrate (10); S5. A plurality of spaced hexagonal nanopores (21) are formed on the side of the group III nitride layer (20) away from the target substrate (40).
2. The method for manufacturing the composite substrate according to claim 1, characterized in that, The side of the group III nitride layer (20) away from the target substrate (40) is the N-side.
3. The method for manufacturing the composite substrate according to claim 1, characterized in that, The hexagonal nanopore (21) is projected onto the plane of the target substrate (40) in the shape of an equilateral and equiangular hexagon, an equilateral but unequal-angle hexagon, or an equiangular but unequal-sided hexagon.
4. The method for manufacturing the composite substrate according to claim 1, characterized in that, The diameter of the hexagonal nanopore (21) ranges from 100 nm to 300 nm.
5. The method for manufacturing the composite substrate according to claim 1, characterized in that, The thickness of the group III nitride layer (20) ranges from 0.5 times the diameter of the hexagonal nanopore (21) to 2 times the diameter of the hexagonal nanopore (21).
6. The method for manufacturing the composite substrate according to claim 1, characterized in that, Step S5 includes: S51. Deposit a mask layer (50) on the side of the group III nitride layer (20) away from the target substrate (40); S52. Photolithography is performed on the mask layer (50) to form a plurality of spaced through holes (51); S53. Wet treatment is performed on the surface of the group III nitride layer (20) exposed by the through hole (51) to form a plurality of spaced hexagonal nanopores (21) on the side of the group III nitride layer (20) away from the target substrate (40).
7. The method for manufacturing the composite substrate according to claim 6, characterized in that, Step S53 further includes: performing a second etching on the hexagonal nanopore (21), wherein the etching method is in-situ etching.
8. The method for manufacturing the composite substrate according to claim 6, characterized in that, Step S53 further includes: performing secondary epitaxy in the hexagonal nanopore (21) to reduce the pore size of the hexagonal nanopore (21).
9. The method for manufacturing the composite substrate according to claim 8, characterized in that, The pore size of the hexagonal nanopore (21) is reduced to less than 100 nm.
10. The method for manufacturing the composite substrate according to claim 8, characterized in that, After secondary epitaxy in the hexagonal nanopore (21), a modification layer (201) can be formed on the sidewall of the hexagonal nanopore (21).
11. A composite substrate, characterized in that, The composite substrate prepared by the manufacturing method of any one of claims 1-10 includes a target substrate (40), a dielectric layer (30) and a group III nitride layer (20) stacked sequentially, wherein the group III nitride layer (20) includes a plurality of spaced hexagonal nanopores (21) on the side away from the target substrate (40).
12. The composite substrate according to claim 11, characterized in that, The side of the group III nitride layer (20) away from the target substrate (40) is the N-side.
13. The composite substrate according to claim 11, characterized in that, The hexagonal nanopore (21) is projected onto the plane of the target substrate (40) in the shape of an equilateral and equiangular hexagon, an equilateral but unequal-angle hexagon, or an equiangular but unequal-sided hexagon.
14. The composite substrate according to claim 11, characterized in that, The crystal planes on the side of the hexagonal nanopore (21) include the (1101) crystal plane.
15. The composite substrate according to claim 11, characterized in that, The bottom surface of the hexagonal nanopore (21) is located in the group III nitride layer (20), at the interface between the group III nitride layer (20) and the dielectric layer (30), or in the dielectric layer (30).