Low ripple control method and bidirectional BUCK converter series circuit

Abstract

The invention discloses a low-ripple control method and a bidirectional BUCK converter series circuit, belongs to the technical field of power electronic control, and solves the problem that the total output voltage ripple of the bidirectional BUCK converter series circuit in the low-voltage and high-voltage range is large. During high-voltage output, upper tubes of N-1 paths of bidirectional BUCK converters are normally open, lower tubes of the N-1 paths of bidirectional BUCK converters are normally closed, and the total output voltage ripple of the N-1 paths of bidirectional BUCK converters is large. The rest two-way BUCK converter carries out PWM chopping control; during low-voltage output, the upper tubes of the (N-1) paths of bidirectional BUCK converters are normally closed, the lower tubes of the (N-1) paths of bidirectional BUCK converters are normally opened, and the rest path of bidirectional BUCK converter is subjected to PWM chopping control; according to the invention, output voltage ripples in low-voltage and high-voltage ranges are significantly reduced; the input bus voltage requirement is reduced, and the device model selection cost is reduced; the switching loss is reduced and the system efficiency is improved by reducing the action times of a switching tube; and the stability and controllability of the output voltage are enhanced.

Description

Technical Field

[0001] This invention belongs to the field of power electronic control technology, specifically relating to a low ripple control method and a bidirectional BUCK converter series circuit. Background Technology

[0002] The bidirectional BUCK converter topology is as follows: Figure 1 As shown, this circuit is based on a BUCK converter, with either a MOSFET connected in anti-parallel to a diode or a diode connected in anti-parallel to a MOSFET. This circuit structure is simple and uses fewer components. However, the voltage conversion range of a single bidirectional BUCK converter is relatively small, so it is often necessary to connect them in series to extend the converter's voltage conversion range. Connecting bidirectional BUCK converters in series involves connecting the DC power supply of each bidirectional BUCK converter end-to-end through the energy storage inductor and the upper transistor of adjacent bidirectional BUCK converters, thereby extending the voltage conversion range. However, existing series circuits of bidirectional BUCK converters often have large output voltage ripple, and low-ripple control of the output voltage has always been a technical challenge. Especially when the output voltage is close to the input voltage (duty cycle approaches 1) or close to zero (duty cycle approaches 0), the output voltage ripple increases significantly due to dead time limitations and PWM modulation failure, reducing circuit efficiency. Summary of the Invention

[0003] The technical solution of this invention is used to solve the problem of large total output voltage ripple in the series circuit of bidirectional BUCK converter in both low and high voltage ranges.

[0004] The present invention solves the above-mentioned technical problems through the following technical solutions: This invention provides a low-ripple control method. During high-voltage output, the upper transistor of N-1 bidirectional BUCK converters in the N-channel bidirectional BUCK converter series circuit is normally open and the lower transistor is normally off, while the remaining bidirectional BUCK converter is subjected to PWM chopping control. During low-voltage output, the upper transistor of N-1 bidirectional BUCK converters in the N-channel bidirectional BUCK converter series circuit is normally off and the lower transistor is normally open, while the remaining bidirectional BUCK converter is subjected to PWM chopping control. Where N is a positive integer greater than or equal to 2.

[0005] Previously, to achieve a higher total output voltage, the simultaneous existence of three dead times meant that control would fail when the duty cycle approached 1, requiring a higher input bus voltage. This invention directly reduces the impact of dead time on modulation, lowers the voltage requirement of the input bus, reduces the stringency of PFC bus component selection (allowing the use of components with slightly lower withstand voltage), and lowers costs. Simultaneously, it keeps the N-1 group of BUCK switches in a normally on / normally off state, reducing switching losses, improving efficiency, reducing output voltage ripple, and increasing output voltage stability. At low voltage, the impact of the original N dead times on modulation is reduced to only one dead time, lowering the proportion of dead time in the switching cycle, removing the limitation of dead time on modulation, and reducing output voltage ripple. Simultaneously, keeping the N-1 group of BUCK switches in a normally on / normally off state reduces switching losses.

[0006] Furthermore, the total output voltage during high-voltage output is: ;in, The input DC power supply voltage of the nth bidirectional BUCK converter is: The total output voltage at low voltage output is: Among them, the first to N-1 bidirectional BUCK converters are bidirectional BUCK converters without PWM chopping control, and the Nth bidirectional BUCK converter is a bidirectional BUCK converter with PWM chopping control. The output voltage of the Nth bidirectional BUCK converter is used for PWM chopping control. The bidirectional BUCK converter can be any one of the N bidirectional BUCK converters.

[0007] Furthermore, the total output voltage of the bidirectional BUCK converter series circuit is , At that time, the Nth bidirectional BUCK converter is a bidirectional BUCK converter that performs PWM chopping control. The upper transistor of the (K+1)th to (N-1)th bidirectional BUCK converters is normally off and the lower transistor is normally on. The upper transistor of the remaining bidirectional BUCK converters is normally on and the lower transistor is normally off. Among them, the bidirectional BUCK converter that performs PWM chopping control can be any one of the N bidirectional BUCK converters. The K bidirectional BUCK converters with normally on upper transistors and normally off lower transistors can be any K bidirectional BUCK converters other than the bidirectional BUCK converter that performs PWM chopping control.

[0008] The present invention also provides a bidirectional BUCK converter series circuit, which uses the above-mentioned low ripple control method for PWM chopping control.

[0009] The present invention also provides an electronic device, including a memory and a processor, wherein the memory is used to store a program that supports the processor in executing the low ripple control method described above, and the processor is configured to execute the program stored in the memory.

[0010] The present invention also provides a storage medium storing a computer program, wherein the computer program is executed by a processor to perform the steps of the low ripple control method described above.

[0011] The beneficial effects of this invention are as follows: The technical solution of this invention significantly reduces output voltage ripple in both low and high voltage ranges; reduces input bus voltage requirements and lowers component selection costs; reduces switching losses and improves system efficiency by reducing the number of switching transistor operations; and enhances the stability and controllability of the output voltage. Attached Figure Description

[0012] Figure 1 This is a topology diagram of a bidirectional BUCK converter; Figure 2 This is a series circuit diagram of a three-way bidirectional BUCK converter according to an embodiment of the present invention; Figure 3 This is a schematic diagram illustrating the duration of the dead time as a part of the switching cycle in an embodiment of the present invention; Figure 4 This is a current flow diagram of the series circuit of the three-way bidirectional BUCK converter during high-voltage output according to an embodiment of the present invention; Figure 5 This is a current flow diagram of the series circuit of the three-way bidirectional BUCK converter during low-voltage output according to an embodiment of the present invention; Figure 6 This is the voltage ripple diagram when the total output voltage is 2250V using the conventional PWM chopper control method during high voltage output. Figure 7 This is a voltage ripple diagram when the total output voltage is 2250V using the method of this invention during high-voltage output. Figure 8 This is the voltage ripple diagram when the total output voltage is 50V using a conventional PWM chopper control method at low voltage output. Figure 9 This is a voltage ripple diagram when the total output voltage is 50V using the method of this invention. Detailed Implementation

[0013] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0014] The technical solution of the present invention will be further described below with reference to the accompanying drawings and specific embodiments: Example 1 like Figure 2 As shown, this embodiment uses a three-way bidirectional BUCK converter series circuit as an example to describe the low ripple control method of the present invention in detail.

[0015] The existing control method for the series circuit of the bidirectional BUCK converter is prone to large ripple in the total output voltage at both low and high voltage. At the same time, due to the existence of dead time and the minimum pulse width limitation of the DSP's PWM module, the input bus voltage must be raised, which reduces the efficiency of the circuit.

[0016] 1. An excessively high duty cycle and dead time limitation cause PWM modulation to fail, resulting in a significant increase in output voltage ripple. The input bus voltage must be raised, reducing efficiency.

[0017] When the high voltage is output, the duty cycle D is very large and close to 1. At this time, the upper transistor in the bidirectional BUCK converter is almost always on and the lower transistor is always off. The bidirectional BUCK converter loses its switching regulation capability, the PWM modulation fails, and the output voltage cannot be smoothly controlled by adjusting the duty cycle. The output voltage is out of control and the output voltage ripple increases significantly.

[0018] like Figure 3 As shown, for example, the switching frequency of a bidirectional BUCK converter is 75KHz and the dead time is 0.26µs. The calculated switching period is 1 / 75000 = 0.000013s = 13.3µs. Then, the dead time accounts for 0.26 / 13.3 = 0.01954≈2% of the entire switching period. If the duty cycle D is 2%, the output voltage of the bidirectional BUCK converter cannot be established, and the PWM modulation fails.

[0019] When the output voltage is low, the duty cycle is very small and close to 0. Due to the existence of dead time, although the dead time is very small, the duty cycle is also very small, resulting in a large proportion of dead time to duty cycle. This will also cause PWM modulation to fail, making it impossible to smoothly control the output voltage by adjusting the duty cycle. As a result, the output voltage becomes uncontrolled and the output voltage ripple increases significantly.

[0020] For example, if the dead time accounts for 0.26 / 13.3=0.01954≈2% of the entire switching cycle, and the duty cycle D≈2%, then the output voltage cannot be established.

[0021] 2. Due to the existence of dead time, the input bus voltage must be increased, which reduces efficiency.

[0022] Since all the multiple bidirectional BUCK converters are modulated, their dead times exist simultaneously, which means that the input bus voltages of the bidirectional BUCK converters must be raised at the same time, reducing efficiency and increasing switching losses.

[0023] Assuming the input bus voltage of each bidirectional BUCK converter is 750V, under high-voltage output, if the dead time accounts for 2% of the entire switching cycle, theoretically, the maximum output voltage of each bidirectional BUCK converter can only reach 750 × (1-2%) = 735V, and the maximum total output voltage of the three converters in series can only reach 735 × 3 = 2205V. To achieve an output voltage of 2250V, the input bus voltage of each converter must be increased to 2250 / 3 / 98% = 765V. Under low-voltage output, if a total output voltage of 67.5V is required, the output voltage of a single bidirectional BUCK converter is 22.5V. The theoretical duty cycle D = 22.5 / 750 = 3%, and the dead time accounts for 2% / 3% = 66.7% of the upper transistor's conduction time. The actual effective duty cycle becomes 3% - 2% = 1%, and the actual output voltage is only 750V × 1% = 7.5V, which cannot reach the required voltage.

[0024] 3. The minimum pulse width limitation of the DSP's PWM module necessitates raising the input bus voltage.

[0025] In a bidirectional BUCK converter series circuit, PWM (Pulse-Width Modulation) controls the duty cycle of the signal by adjusting the pulse width, thereby controlling the output voltage or current. DSP PWM modules typically have a minimum pulse width limit to prevent system instability or damage caused by excessively narrow pulse widths. When the duty cycle approaches 100%, the actual duty cycle is clamped below a maximum value, usually around 99%, a limitation determined by the hardware design.

[0026] For example, if the input bus voltage is 1000V, the actual duty cycle will be clamped to 99% because the PWM module usually has a minimum pulse width limit. At this time, the output voltage is 990V. To achieve an output of 1000V, the input bus voltage must be increased to 1000V ÷ 0.99 = 1010.1V.

[0027] To overcome the shortcomings of existing control methods for bidirectional BUCK converter series circuits, the low-ripple control method in this embodiment is as follows: When the output voltage is in both high and low voltage states, the logic of the three bidirectional BUCK converter series circuit simultaneously performs chopping control. When the output voltage is high, the upper transistor of two bidirectional BUCK converters in the three bidirectional BUCK converter series circuit is normally open and the lower transistor is normally off, and the remaining bidirectional BUCK converter is subjected to PWM chopping control. When the output voltage is low, the upper transistor of two bidirectional BUCK converters in the three bidirectional BUCK converter series circuit is normally off and the lower transistor is normally open, and the remaining bidirectional BUCK converter is subjected to PWM chopping control.

[0028] The specific explanation is as follows: When high voltage is output, such as Figure 4 As shown, the upper transistor of BUCK1 and BUCK3 is normally open, and the lower transistor is normally off. This means that BUCK1 and BUCK3 contribute the bus voltage Vbus to the total output voltage. BUCK2 controls the output voltage using the existing PWM chopper, and the total output voltage is: V out =V BUCK1 +V BUCK2 +V BUCK3 =2×V bus +V BUCK2 During charging, the current flows in the following direction: Figure 4 The red and black arrows in the diagram; during discharge, the current flows in the direction shown. Figure 4 The blue and black arrows in the image.

[0029] When outputting at low voltage, such as Figure 5 As shown, the upper transistor of BUCK1 and BUCK3 is normally off, and the lower transistor is normally on. This means that BUCK1 and BUCK3 contribute 0V to the total output voltage. BUCK2 controls the output voltage using the existing PWM chopper, and the total output voltage is: V out =V BUCK1 +V BUCK2 +V BUCK3 =0+0+V BUCK2 =V BUCK2 During charging, the current flows in the following direction: Figure 5 The red and black arrows in the diagram; during discharge, the current flows in the direction shown. Figure 5 The blue and black arrows in the image.

[0030] Experimental verification When high voltage is output, Figure 6 This refers to the voltage ripple when the total output voltage is 2250V using a conventional PWM chopper control method. Figure 7The voltage ripple when the total output voltage is 2250V using the method of the present invention is shown in the figure. It can be clearly seen from the figure that the problem of large voltage ripple is significantly improved.

[0031] At low voltage output, Figure 8 This refers to the voltage ripple when the total output voltage is 50V using a conventional PWM chopper control method. Figure 9 The voltage ripple when the total output voltage is 50V using the method of the present invention is shown in the figure. It can be clearly seen from the figure that the problem of large voltage ripple is significantly improved.

[0032] Example 2 like Figure 2 As shown, this embodiment of the invention provides a three-way bidirectional BUCK converter series circuit. The negative terminal of the DC power supply of BUCK1 is connected to one end of the energy storage inductor L2 of BUCK2, the negative terminal of the DC power supply of BUCK2 is connected to one end of the energy storage inductor L3 of BUCK3, and the negative terminal of the DC power supply of BUCK3 is connected to one end of the energy storage inductor L1 of BUCK1 through a load R, forming a closed loop. This three-way bidirectional BUCK converter series circuit, used in conjunction with the low-ripple control method in Embodiment 1, eliminates the influence of dead time, significantly reduces ripple, and improves the utilization rate of the bus voltage.

[0033] Example 3 An electronic device includes a memory and a processor, the memory being used to store a program that supports the processor in executing the low ripple control method of Embodiment 1, the processor being configured to execute the program stored in the memory.

[0034] Example 4 A storage medium storing a computer program, which, when executed by a processor, performs the steps of the low ripple control method in Embodiment 1.

[0035] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A low-ripple control method, characterized in that, When outputting high voltage, the upper transistor of N-1 bidirectional BUCK converters in the N-channel bidirectional BUCK converter series circuit is normally open and the lower transistor is normally closed, while the remaining bidirectional BUCK converter is controlled by PWM chopping. When outputting low voltage, the upper transistor of N-1 bidirectional BUCK converters in the N-channel bidirectional BUCK converter series circuit is normally closed and the lower transistor is normally open, while the remaining bidirectional BUCK converter is controlled by PWM chopping. N is a positive integer greater than or equal to 2.

2. The low ripple control method according to claim 1, characterized in that, The total output voltage during high-voltage output is: ;in, This represents the input DC power supply voltage of the nth bidirectional BUCK converter. The first to (N-1)th bidirectional BUCK converters are non-PWM chopping control bidirectional BUCK converters, while the Nth bidirectional BUCK converter is a PWM chopping control bidirectional BUCK converter. The output voltage of the Nth bidirectional BUCK converter is denoted as ; the bidirectional BUCK converter used for PWM chopping control is any one of the N bidirectional BUCK converters.

3. The low ripple control method according to claim 1, characterized in that, The total output voltage at low voltage output is: Among them, the first to N-1 bidirectional BUCK converters are bidirectional BUCK converters without PWM chopping control, and the Nth bidirectional BUCK converter is a bidirectional BUCK converter with PWM chopping control. The output voltage of the Nth bidirectional BUCK converter is denoted as ; the bidirectional BUCK converter used for PWM chopping control is any one of the N bidirectional BUCK converters.

4. The low ripple control method according to claim 1, characterized in that, The total output voltage of the bidirectional BUCK converter series circuit is , At that time, the Nth bidirectional BUCK converter is a bidirectional BUCK converter that performs PWM chopping control. The upper transistor of the (K+1)th to (N-1)th bidirectional BUCK converters is normally off and the lower transistor is normally on. The upper transistor of the remaining bidirectional BUCK converters is normally on and the lower transistor is normally off. Among them, the bidirectional BUCK converter that performs PWM chopping control is any one of the N bidirectional BUCK converters. The K bidirectional BUCK converters with normally on upper transistors and normally off lower transistors are any K bidirectional BUCK converters other than the bidirectional BUCK converter that performs PWM chopping control.

5. A bidirectional BUCK converter series circuit, characterized in that, PWM chopper control is performed using the low ripple control method described in any one of claims 1 to 4.

6. An electronic device, characterized in that, The device includes a memory and a processor, the memory being used to store a program that supports the processor in executing the low ripple control method according to any one of claims 1 to 4, and the processor being configured to execute the program stored in the memory.

7. A storage medium, characterized in that, The storage medium stores a computer program, which, when executed by a processor, performs the steps of the low ripple control method according to any one of claims 1 to 4.

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