Substrate device, electronic device, electronic device, method for manufacturing electronic device, and method for manufacturing electronic device

Abstract

Provided is a substrate device having a wiring layer for electrically connecting a plurality of dies, with which it is possible to improve productivity while suppressing deterioration in electrical characteristics. A substrate device according to the present technology is provided with a wiring substrate and a wiring layer that is provided to protrude from a surface of the wiring substrate and electrically connects a plurality of dies. According to the substrate device of the present technology, it is possible to provide a substrate device having a wiring layer for electrically connecting a plurality of dies, and it is possible to improve productivity and suppress deterioration of electrical characteristics by means of the substrate device.

Description

Technical Field

[0001] The technology disclosed herein (hereinafter also referred to as "the technology") relates to board devices, electronic devices, electronic devices, methods for manufacturing electronic devices, and methods for manufacturing electronic devices. Background Technology

[0002] Previously, it was known that board devices electrically connected multiple bare dies via bridge structures (wiring layers) disposed in the holes of the wiring board (see, for example, Patent Documents 1 and 2).

[0003] In traditional board-mount devices, the bridging structure is a separate component (separate part) from the wiring board and multiple bare dies.

[0004] Reference List

[0005] Patent documents

[0006] Patent Document 1: Japanese Patent Application Publication No. 2021-153172

[0007] Patent Document 2: Japanese Patent Application Publication No. 2018-129528 Summary of the Invention

[0008] The problem to be solved by the present invention

[0009] Therefore, there is room for improvement in existing plate devices in terms of both suppressing electrical characteristic degradation and increasing productivity.

[0010] Therefore, the main objective of this technology is to provide a board device including a wiring layer that electrically connects multiple dies to each other, which can improve productivity while suppressing the degradation of electrical characteristics.

[0011] Solution to the problem

[0012] This technology provides a plate device, including:

[0013] patch panels; and

[0014] The wiring layer protrudes from one surface of the wiring board and electrically connects multiple bare dies to each other.

[0015] This surface can be a flat surface.

[0016] The wiring board and each of the plurality of bare dies can be connected to each other via a first connector, and the wiring layer and each of the plurality of bare dies can be connected to each other via a second connector.

[0017] The second connector can be smaller than the first connector.

[0018] Each of the first and second connectors can be a protrusion.

[0019] The first and second connectors can be metal connectors.

[0020] The ratio of the pitch of the first joint to the pitch of the second joint can be greater than 2.0 and less than 5.0.

[0021] The wiring layer can have a planar shape corresponding to the planar arrangement of at least two bare dies.

[0022] The shape of the plan view can be a quadrilateral, L-shaped, T-shaped, cross-shaped, U-shaped, curved, or a combination of at least two of these shapes.

[0023] The board assembly may include multiple wiring layers.

[0024] The wiring layer may include an insulating film and wiring disposed inside the insulating film, and the insulating film may include a dielectric material.

[0025] The wiring board may include a substrate and wiring disposed inside the substrate, and the substrate may be any one of organic substrate, FOWLP, FOPLP, ceramic substrate and glass substrate.

[0026] The board assembly may also include a heat sink disposed across the surface of the plurality of bare platters on a side opposite to the wiring board side.

[0027] Underfill material can be injected around the first joint between the patch panel and the plurality of bare dies, and around the second joint between the wiring layer and the plurality of bare dies. A plurality of bare dies and a board assembly may be included, the board assembly comprising a patch panel and a wiring layer protruding from the surface of the patch panel and electrically connecting at least two of the plurality of bare dies to each other.

[0028] This technology also provides an electronic device, including:

[0029] Electronic devices, including:

[0030] Multiple nude films; and

[0031] Board assembly, comprising a wiring board and a wiring layer projecting from one surface of the wiring board and electrically connecting at least two of a plurality of dies to each other; and

[0032] Circuit board; electronic devices are mounted on circuit boards.

[0033] This technology also provides a method for manufacturing an electronic device, the method comprising the following steps:

[0034] The wiring layer is formed in a convex shape on the wiring board; and

[0035] Each of the plurality of bare dies is connected to the wiring board via a first connector, and each of the plurality of bare dies is connected to the wiring layer via a second connector.

[0036] The forming step may include the following sub-steps: forming a layer on a wiring board in which wiring is formed in a portion of the photosensitive dielectric film in the in-plane direction; and removing another portion of the photosensitive dielectric film in the in-plane direction from the layer by etching.

[0037] The forming step may be repeated multiple times in a cycle including the following sub-steps: stacking a dielectric film on the wiring board; etching the dielectric film to form a trench; forming a metal film on the dielectric film with the trench; and grinding the metal film to form a wiring.

[0038] This technology also provides a method for manufacturing an electronic device, the method comprising the following steps:

[0039] The wiring layer is formed in a convex shape on the wiring board;

[0040] Each of the plurality of bare dies is connected to the wiring board via a first connector, and each of the plurality of bare dies is connected to the wiring layer via a second connector to form an electronic device; and

[0041] The electronic device is mounted on a circuit board. Attached Figure Description

[0042] Figure 1 This is a schematic diagram showing the cross-sectional configuration of an electronic device according to an embodiment of the present technology.

[0043] Figure 2 This is a detailed view showing a cross-sectional configuration of a portion of an electronic device according to an embodiment of the present technology.

[0044] Figure 3 This is a schematic diagram illustrating the planar configuration of an electronic device according to an embodiment of the present technology.

[0045] Figure 4 This is a detailed planar configuration of electronic devices near a convex wiring layer according to an embodiment of the present technology.

[0046] Figure 5 This is a diagram (I) illustrating a method for forming protrusions of different sizes using a ball mounting method.

[0047] Figure 6 Figure (II) illustrates a method for forming protrusions of different sizes using a ball mounting method.

[0048] Figure 7 This diagram illustrates a method for forming protrusions of different sizes using paste printing.

[0049] Figure 8This diagram illustrates a method for forming bumps of different sizes using electroplating.

[0050] Figure 9 A is a schematic diagram illustrating the planar configuration of an electronic device according to Embodiment 1 of the present technology. Figure 9 B is a schematic diagram illustrating the planar configuration of an electronic device according to Embodiment 2 of the present technology.

[0051] Figure 10 A is a schematic diagram illustrating the planar configuration of an electronic device according to Embodiment 3 of the present technology. Figure 10 B is a schematic diagram illustrating the planar configuration of an electronic device according to Embodiment 4 of the present technology.

[0052] Figure 11 A is a schematic diagram illustrating the planar configuration of an electronic device according to Embodiment 5 of the present technology. Figure 11 B is a schematic diagram illustrating the planar configuration of an electronic device according to Embodiment 6 of the present technology.

[0053] Figure 12 It is used to explain the manufacturing process. Figure 1 A flowchart of an embodiment of a method using an electronic device.

[0054] Figure 13 A and Figure 13 B is used for manufacturing Figure 1 A cross-sectional view of each step of the method for using electronic devices.

[0055] Figure 14 A and Figure 14 B is used for manufacturing Figure 1 Cross-sectional views of each step of the method for using electronic devices in the process.

[0056] Figure 15 A and Figure 15 B is used for manufacturing Figure 1 Cross-sectional views of each step of the method for using electronic devices in the process.

[0057] Figure 16 A and Figure 16 B is used for manufacturing Figure 1 A cross-sectional view of each step of the method for using electronic devices.

[0058] Figure 17 A and Figure 17 B is used for manufacturing Figure 1 Cross-sectional views of each step of the method for using electronic devices in the process.

[0059] Figure 18 It is used for manufacturing Figure 1 Cross-sectional views of each step of the method for using electronic devices in the process.

[0060] Figure 19 This is a schematic diagram showing a cross-sectional configuration of an electronic device including an electronic device according to an embodiment of the present technology.

[0061] Figure 20 It is used for explanation Figure 19 A flowchart illustrating an example of a method for manufacturing an electronic device.

[0062] Figure 21 A and Figure 21 B is used for manufacturing Figure 19 A cross-sectional view of each step of the method for using electronic devices.

[0063] Figure 22 This is a detailed diagram showing a cross-sectional configuration of a portion of an electronic device according to Embodiment 7 of the present technology.

[0064] Figure 23 This is a detailed diagram showing a cross-sectional configuration of a portion of an electronic device according to Embodiment 8 of the present technology.

[0065] Figure 24 This is a detailed diagram showing a cross-sectional configuration of a portion of an electronic device according to Embodiment 9 of the present technology.

[0066] Figure 25 This is a detailed diagram showing a cross-sectional configuration of a portion of an electronic device according to Embodiment 10 of the present technology.

[0067] Figure 26 This is a detailed diagram showing a cross-sectional configuration of a portion of an electronic device according to Embodiment 11 of the present technology.

[0068] Figure 27 This is a detailed diagram showing a cross-sectional configuration of a portion of an electronic device according to Embodiment 12 of the present technology.

[0069] Figure 28 This is a block diagram illustrating the function of HPC, which is an embodiment of an electronic device including electronic devices according to embodiments of the present technology.

[0070] Figure 29 It is shown Figure 28 A diagram illustrating an example of the configuration of a node (computing server) in the system.

[0071] Figure 30 This is a diagram showing a movable body equipped with an electronic device including an electronic device according to an embodiment of the present technology.

[0072] Figure 31 This is a schematic diagram illustrating a cross-sectional configuration of a board assembly included in an electronic device according to an embodiment of the present technology.

[0073] Figure 32 A and Figure 32 B represents the cross-sectional and planar views of each step in the inlay process.

[0074] Figure 33 A and Figure 33 B represents the cross-sectional and planar views of each step in the inlay process.

[0075] Figure 34 A and Figure 34 B represents the cross-sectional and planar views of each step in the inlay process.

[0076] Figure 35 A and Figure 35 B represents the cross-sectional and planar views of each step in the inlay process.

[0077] Figure 36 A and Figure 36 B represents the cross-sectional and planar views of each step in the inlay process.

[0078] Figure 37 This is a diagram illustrating an example of the use of an electronic device applying this technology.

[0079] Figure 38 This is a functional block diagram of an embodiment of an electronic device that includes an electronic device that applies the present technology.

[0080] Figure 39 This is a block diagram illustrating an embodiment of a general structure of a vehicle control system.

[0081] Figure 40 This is an explanatory diagram showing an embodiment of the installation positions of the vehicle exterior information detection unit and the imaging unit. Detailed Implementation

[0082] Preferred embodiments of the present technology will now be described in detail with reference to the accompanying drawings. Note that in this specification and the drawings, components having substantially the same functional configuration are indicated by the same reference numerals, and redundant descriptions are omitted. The embodiments described below illustrate representative embodiments of the present technology, and the scope of the present technology should not be narrowly interpreted through these embodiments. In this specification, even where it is described that the board device, electronic device, electronic device, method for manufacturing an electronic device, and method for manufacturing an electronic device according to the present technology exhibit multiple effects, the board device, electronic device, electronic device, method for manufacturing an electronic device, and method for manufacturing an electronic device according to the present technology may also exhibit at least one effect. The effects described in this specification are merely examples and are not limiting; other effects may also occur.

[0083] Furthermore, it will be described in the following order.

[0084] 0. Introduction

[0085] 1. Electronic devices and electronic devices including electronic devices according to embodiments of the present technology.

[0086] <0. Introduction>

[0087] Previously, board devices known (for example, see Patent Documents 1 and 2) electrically connect multiple freely arranged bare dies to each other through a bridge structure provided in the cavity of the wiring board, thereby achieving wide bandwidth, increased freedom of wiring design and improved power efficiency.

[0088] However, conventional board devices have the following drawbacks: the bridging structure needs to be installed as a separate component in the wiring board cavity, and the connection bumps between the bridging structure and the wiring board are required, which increases parasitic capacitance and resistance, leading to deterioration of electrical characteristics.

[0089] Therefore, as a result of in-depth research, the inventors successfully eliminated the aforementioned drawbacks by integrally forming a raised wiring layer on the wiring board in the board device (i.e., by providing a wiring layer that protrudes from one surface of the wiring board). Furthermore, the inventors have developed electronic devices that include board devices and electronic devices that include electronic devices other than board devices incorporating this new knowledge.

[0090] The following will describe in detail, with reference to the accompanying drawings, an electronic device according to the present technology and an electronic device including the same, an embodiment of the present technology. In the following description, for convenience, ... Figure 1 The upper part of the cross-sectional view is described as the upper side, and... Figure 1 The lower part of the cross-sectional view of the figure is described as the lower side.

[0091] <1. Electronic device and electronic device including electronic device according to embodiments of the present technology>

[0092] <<Configuration of Electronic Devices>>

[0093] (Overall structure)

[0094] Figure 1 This is a schematic diagram showing the cross-sectional configuration of an electronic device 10 according to an embodiment of the present technology. Figure 2 This is a detailed diagram showing a cross-sectional configuration of a portion of an electronic device 10 according to an embodiment of the present technology. Figure 2 yes Figure 1 Detailed diagram of the area enclosed by the dashed line. Figure 3 This is a schematic diagram showing the planar configuration of an electronic device 10 according to an embodiment of the present technology. Figure 4 This is a detailed planar configuration of an electronic device 10 near a convex wiring layer according to an embodiment of the present technology. Figure 4 It is surrounded by dashed lines. Figure 3 Detailed diagram of the cross-section (horizontal section) of the part.

[0095] like Figure 1 As shown in the embodiment, the electronic device 10-1 includes a board device 50 (see Figure 31 ) and multiple nude films 200.

[0096] Each die 200 is, for example, an IC chip (a semiconductor chip on which an integrated circuit is formed), such as an imaging chip, logic chip, memory chip, CPU chip, AI chip, or interface chip.

[0097] As an example, the board device 50 includes a wiring board 100 and a wiring layer 300 that protrudes from one surface (upper surface) of the wiring board 100 and electrically connects a plurality of bare dies 200 to each other. The wiring layer 300 is integrally and protrudingly formed on one surface (upper surface) of the wiring board 100. Therefore, in this specification, the wiring layer 300 will also be referred to as a "protruding wiring layer".

[0098] One surface (upper surface) of the patch panel 100 is a flat surface. That is, no conventional cavity with bridging structure is formed in the patch panel 100, and the convex wiring layer protrudes upward from the flat surface.

[0099] Here, as an example, five bare dies 200 are arranged as follows Figure 3 Arranged as shown in the diagram. That is, as... Figure 3 As shown, of the five dies 200, one large die 200 and each of the four smaller dies 200 arranged around the large die 200 are electrically connected to each other via a wiring layer 300. That is, as an example, the board assembly 50 has a plurality of (e.g., four) convex wiring layers.

[0100] return Figure 1 The patch panel 100 and each of the plurality of bare dies 200 are connected to each other via a first connector J1, and each of the wiring layers 300 and each of the plurality of bare dies 200 are connected to each other via a second connector J2. As an embodiment, a plurality of (a large number of) first and second connectors J1 and J2 are provided.

[0101] For example, each of the first connector J1 and the second connector J2 is a bump. A bump is, for example, a solder ball. The bump of the second connector J2 is smaller than the bump of the first connector J1. This allows for denser wiring of the connecting die 200 and reduces wiring length.

[0102] The wiring board 100 includes a substrate 100a and internal wiring 100b disposed within the substrate 100a. For example, the substrate 100a is an insulating film in which a fiber cloth is impregnated with a resin-impregnated prepreg, Ajinomoto constructed film (ABF, registered trademark), ceramic, glass, or a dielectric material including materials such as polyimide (PI), polybenzoxazole (PBO), SiO2, SiN, or SiON. The wiring 100b includes metals such as Al, Cu, or W. Figure 2 As shown, the internal wiring 100b includes lateral wiring 100b1 and vias 100b2. For example, the wiring board 100 has a multilayer structure in which interlayer insulating films, which are part of the thickness direction of the substrate 100a, and lateral wiring 100b1 are alternately stacked. Vertically adjacent lateral wirings 100b1 are connected to each other vias 100b2.

[0103] The wiring layer 300 includes an insulating film 300a and internal wiring 300b disposed inside the insulating film 300a. The insulating film 300a is an insulating film comprising a dielectric material such as polyimide (PI), polybenzoxazole (PBO), SiO2, SiN, or SiON. The internal wiring 300b comprises a metal such as Al, Cu, or W. The internal wiring 300b includes lateral wiring 300b1 and vias 300b2. As an example, the wiring layer 300 has a multilayer structure in which interlayer insulating films and lateral wiring 300b1 are alternately stacked as part of the thickness direction of the insulating film 300a. Vertically adjacent lateral wirings 300b2 are connected to each other vias 300b2.

[0104] A die-side connection terminal T21, located on the lower surface of the die 200 opposite to the wiring board 100, and a board-side connection terminal T12, located on the upper surface of the wiring board 100 corresponding to the die-side connection terminal T21, are interconnected via a first connector J1. The die-side connection terminal T21 is connected to the circuitry of the die 200. The board-side connection terminal T12 is connected to the internal wiring 100b of the wiring board 100.

[0105] The die-side connection terminals T23, located on the lower surface of each die 200 opposite to each wiring layer 300, and the wiring layer-side connection terminals T32, located on the upper surface of each wiring layer 300 corresponding to each die-side connection terminal T23, are interconnected via a second connector J2. The die-side connection terminals T23 are connected to the circuitry of the die 200. The wiring layer-side connection terminals T32 are connected to the internal wiring 300b of the wiring layer 300.

[0106] A board-side connection terminal T13 is disposed on the upper surface of the substrate 100a in the region forming the wiring layer 300. The board-side connection terminal T13 is connected to the internal wiring 100b of the wiring board 100 and the internal wiring 300b of the wiring layer 300.

[0107] On the lower surface of substrate 100a, there is a component that is connected to circuit substrate 800 (see...). Figure 19 The board-side connection terminal T10 is connected to the internal wiring 100b. Solder resist 500 is applied to the lower surface of the substrate 100a in such a way that the board-side connection terminal T10 is exposed.

[0108] like Figure 4 As shown, as an example, in a planar view, the convex wiring layer has a rectangular shape of approximately 2mm × 6mm (X = 2mm, Y = 6mm). The height of the convex wiring layer is, for example, 60μm to 70μm.

[0109] For example, the pitch (bump pitch) of the second connector J2 is 20 μm or more and 50 μm or less (e.g., 40 μm), and the pitch (bump pitch) of the first connector J1 is 100 μm or more. Note that the size of the convex wiring layer and the spacing between each bump can be smaller or larger. In any case, the ratio of the pitch of the first connector J1 to the pitch of the second connector J2 is preferably 2.0 or more and 5.0 or less.

[0110] Here, the bumps of the convex wiring layer are arranged in an interleaved manner, which makes it easy to perform wiring using surface layer wiring; alternatively, they can be arranged, for example, in a grid pattern. Furthermore, because the convex wiring layer has a multi-layer structure, the die 200 can use, for example, a second and third layer in addition to the surface layer to connect to each other.

[0111] Underfill 400 is injected around the first connector J1 between the wiring board 100 and the plurality of bare dies 200, and around the second connector J2 between the wiring layer 300 and the plurality of bare dies 200. As a result, the reliability of the bump connection can be improved against the temperature stresses accompanying the movement and cessation of each die 200. The underfill 400 may contain a filler primarily using epoxy resin as the main agent, such as silica with a small coefficient of linear expansion. Note that underfill 400 is not required in the electronic device 10.

[0112] (Methods for forming the first and second joints)

[0113] The formation methods of the first and second connectors J1 and J2 can be roughly divided into three types: ball mounting method, paste printing method, and plating method, that is, protrusions of different sizes.

[0114] Figure 5 This is Figure (I) illustrating a method for forming protrusions of different sizes using a ball mounting method. In Figure 5 In the ball mounting method shown, a brush B is used to insert solder balls SB, which have a size corresponding to the size of the opening of a metal mask MM arranged on a substrate S, into openings of various types (e.g., two types) with different sizes, thereby forming solder bumps of different sizes on the substrate S.

[0115] Figure 6 This is diagram (Part Two) illustrating a method for forming protrusions of different sizes using a ball mounting technique. Figure 6 In the ball mounting method shown, solder balls SB, whose size corresponds to the size of the opening of the metal mask MM, are discharged from the solder ball mounting head of the solder ball mounter provided on the substrate to the metal mask MM. The openings have various types with different sizes (e.g., two types), so that solder bumps of different sizes are formed on the substrate.

[0116] Figure 7 This diagram illustrates a method for forming protrusions of different sizes using a paste printing technique. Figure 7 In the solder paste printing method shown, solder paste SP is printed onto substrate S using a squeegee SQ with a metal mask MM having openings of different sizes of various types (e.g., two types) as a mask, and then reflowed to form solder bumps of different sizes on substrate S.

[0117] Figure 8 This diagram illustrates a method for forming bumps of different sizes using electroplating. Figure 8In the plating method shown, solder paste SP is grown on substrate S by using an electrolytic plating method or a chemical plating method with multiple types (e.g., two types) of photoresist PR with different sizes as a mask, and then reflowed to form solder bumps with different sizes on substrate S.

[0118] (Deformation of the planar shape of the wiring layer)

[0119] Each wiring layer 300 preferably has a planar view shape corresponding to a planar arrangement of at least two dies 200 corresponding to the wiring layer 300, for example, as in Examples 1 to 6 below. Embodiments of the planar view shape include quadrilaterals, L-shapes, T-shapes, cross-shapes, U-shapes, curved shapes, and combinations of at least two of these shapes.

[0120] (Example 1)

[0121] Figure 9 Figure A is a schematic diagram illustrating the planar configuration of an electronic device 10-1 according to Embodiment 1 of the present technology. In the electronic device 10-1, each of the large die 200 and the two smaller dies 200 arranged on either side thereof is connected to each other via a wiring layer 300 having a quadrilateral shape (planar view shape) in the plan view. Here, a total of four wiring layers 300 are provided.

[0122] (Example 2)

[0123] Figure 9 Figure B is a schematic diagram illustrating the planar configuration of an electronic device 10-2 according to Embodiment 2 of the present technology. In the electronic device 10-2, a plurality (e.g., three) of dies 200 arranged in an L-shape and having a rectangular shape in the planar view are connected to each other via a wiring layer 300 having an L-shape in the planar view.

[0124] (Example 3)

[0125] Figure 10 A is a schematic diagram illustrating the planar configuration of an electronic device 10-3 according to Embodiment 3 of the present technology. In the electronic device 10-3, a plurality of (e.g., three) dies 200 are connected to each other via a wiring layer 300 having a T-shape in the planar view. These dies have a rectangular shape in the planar view and are arranged in a manner that forms a T-shaped gap in the planar view.

[0126] (Example 4)

[0127] Figure 10Figure B is a schematic diagram illustrating the planar configuration of an electronic device 10-4 according to Embodiment 4 of the present technology. In the electronic device 10-4, a plurality of (e.g., four) dies 200 are connected to each other via a wiring layer 300 having a U-shape in the planar view, the plurality of dies having a rectangular shape in the planar view and being arranged in a T-shape in the planar view (arranged in such a way that they form a gap with a U-shape in the planar view).

[0128] (Example 5)

[0129] Figure 11 A is a schematic diagram illustrating the planar configuration of an electronic device 10-5 according to Embodiment 5 of the present technology. In the electronic device 10-5, a plurality (e.g., four) of bare dies 200 arranged in a planar view with cross-shaped gaps (arranged in a square grid shape in the planar view) and having a square shape in the planar view are connected to each other via a wiring layer 300 having a cross shape in the planar view.

[0130] (Example 6)

[0131] Figure 11 Figure B is a schematic diagram illustrating the planar configuration of an electronic device 10-6 according to Embodiment 6 of the present technology. In the electronic device 10-6, a plurality (e.g., four) bare dies 200 having a square shape in the planar view (arranged in a square grid shape in the planar view) arranged in such a way that they form a cross-shaped gap in the planar view are connected to each other via a wiring layer 300 having a petal shape that protrudes in four directions in the planar view.

[0132] <<Effects of Board Devices and Electronic Devices>>

[0133] The board device 50 included in the electronic device 10 (including electronic devices 10-1 to 10-6 according to examples 1 to 6) according to embodiments of the present technology includes a wiring board 100 and a wiring layer 300 protruding from one surface of the wiring board 100 and electrically connecting a plurality of bare dies 200 to each other.

[0134] In this case, the step of installing the wiring layer 300 on the wiring board 100 is unnecessary, and the connection protrusion between the wiring layer 300 and the wiring board 100 is unnecessary, which suppresses the increase of parasitic capacitance and resistance.

[0135] As a result, board device 50 can provide a board device with a wiring layer that electrically connects multiple bare dies to each other, which can improve productivity while suppressing the degradation of electrical characteristics.

[0136] The electronic device 10 according to an embodiment of the present technology includes a plurality of dies 200 and a board assembly 50. Therefore, an electronic device capable of improving productivity while suppressing electrical characteristic degradation can be provided.

[0137] <<Methods for Manufacturing Electronic Devices>>

[0138] The following will refer to Figure 12 The flowcharts and other descriptions illustrate the manufacturing method of the electronic device 10 (including electronic devices 10-1 to 10-6 in Examples 1 to 6) according to embodiments of the present technology.

[0139] In the first step S1, the wiring board 100 is bonded to the support substrate 700 (see...). Figure 13 (A) Specifically, the wiring board 100 is bonded to the support substrate 700 using a peelable adhesive 600. The adhesive 600 can be any adhesive, as long as it is used for a peeling method that can release the bond between the wiring board 100 and the support substrate 700, such as laser peeling, mechanical peeling, and thermal peeling.

[0140] In the next step S2, a raised wiring layer is formed on the wiring board 100. Specifically, firstly, a photosensitive dielectric material 300am is coated onto the entire surface of the wiring board 100, and through-holes in the raised wiring layer are formed by exposure and development (see...). Figure 13 (B). Next, a seed layer 150 is formed by seed sputtering (see B). Figure 14 (A). The material of the seed layer 150 is, for example, a titanium-copper alloy (Ti / Cu). Next, the vias 300b2 and lateral wirings 300b1 of the first layer of the convex wiring layer are formed by a redistribution layer (RDL) electroplating step. Thereafter, unnecessary portions of the seed layer 150 are removed by etching (see A). Figure 14 (B). Then, the steps of forming the photosensitive dielectric material 300am, the through-hole 300b2, and the lateral wiring 300b1 are repeated to form a wiring layer with a multilayer structure (see B). Figure 15 Next, resist R is applied to the entire surface of the photosensitive dielectric material 300 nm, and the resist R is removed except for the area covering the region to be exposed and developed to form the convex wiring layer (see A). Figure 15 Next, using resist R as a mask, the photosensitive dielectric material 300am outside the convex wiring layer is removed by etching (see B). Figure 16 Next, remove the resist R on the convex wiring layer (see A). Figure 16 (B).

[0141] In the next step S3, multiple bare dies 200 are installed (see...). Figure 17(A). Specifically, for example, each die 200 and the wiring board 100 are joined to each other via a first connector J1, and each die 200 and the wiring layer 300 are joined to each other via a second connector J2 by ​​mass reflow or thermoforming (TCB).

[0142] In the next step S4, inject 400 units of bottom filler (see...). Figure 17 (B). Specifically, bottom filler 400 is injected around the first connector J1 between the wiring board 100 and the plurality of bare dies 200 and around the second connector J2 between the wiring layer 300 and the plurality of bare dies 200.

[0143] In the final step S5, the support substrate 700 is removed (see...). Figure 18 Specifically, the support substrate 700 is peeled off from the wiring board 100.

[0144] Alternatively, a non-photosensitive dielectric material can be used instead of a photosensitive dielectric material for the insulating film 300a of the convex wiring layer. In this case, the internal wiring 300b of the convex wiring layer can be formed by an inlay process, but compared with the electroplating method, finer wiring (line to space (L / S) = 1 / 1 μm or smaller) can be formed. Alternatively, a glass material can be used as the insulating film 300a of the convex wiring layer. In this case, the mismatch of the coefficient of linear expansion between the convex wiring layer and the bare die 200 is reduced, and the reliability of the bump connection is improved. The method of manufacturing the electronic device 10 using a photosensitive dielectric material will be referred to as "manufacturing method 1" below, and the method of manufacturing the electronic device 10 using a non-photosensitive dielectric material will be referred to as "manufacturing method 2".

[0145] <<Effects of Methods Used in Manufacturing Electronic Devices>>

[0146] The method for manufacturing the above-described electronic device 10 (including electronic devices 10-1 to 10-6 in embodiments 1 to 6) includes the following steps: forming a wiring layer 300 in a convex shape on a wiring board 100, connecting each of a plurality of bare dies 200 to the wiring board 100 via a first connector J1, and connecting each of the plurality of bare dies 200 to the wiring layer 300 via a second connector J2.

[0147] By using the method for manufacturing electronic device 10, productivity can be improved because it is not necessary to mount the wiring layer 300 on the wiring board 100.

[0148] In the manufacturing method 1 of the electronic device 10, the step of forming a wiring layer 300 in a convex shape on the wiring board 100 includes: a sub-step of forming an internal wiring 300b on the wiring board 100 in a portion of the photosensitive dielectric film (photosensitive dielectric material 300am) in the in-plane direction; and a sub-step of removing other portions of the photosensitive dielectric film (photosensitive dielectric material 300am) in the in-plane direction from the layer by etching.

[0149] In the manufacturing method 2 of the electronic device 10, the step of forming a wiring layer 300 in a convex shape on the wiring board 100 is repeated multiple times in a cycle (damascene process), including the sub-step of stacking a dielectric film DF (non-photosensitive dielectric material) on the wiring substrate WB (see Figure 32 The cross-sectional view of A and Figure 32 (Planar view of B), the sub-step of etching the dielectric film DF to form the trench T (see planar view of B). Figure 33 The cross-sectional view of A and Figure 33 (Planar view of B), the sub-step of forming a metal film MF on a dielectric film DF in which grooves T are formed (see planar view of B). Figure 34 The cross-sectional view of A and Figure 34 A planar view of B), and a polished metal film MF (see Figure 35 The cross-sectional view of A and Figure 35 (Planar diagram of B) to form metal wiring (MW) (see Figure 36 The cross-sectional view of A and Figure 36 The sub-step of the plan view of B).

[0150] <<Configuration of Electronic Devices>>

[0151] Figure 19 This is a schematic diagram showing a cross-sectional configuration of an electronic device 1 including an electronic device 10 according to an embodiment of the present technology.

[0152] like Figure 19 As shown, the electronic device 1 includes an electronic device 10 and a circuit board 800 on which the electronic device 10 is mounted.

[0153] Electronic device 10 and circuit board 800 are electrically connected to each other via a third connector J3. The third connector J3 is, for example, a solder bump. Note that the third connector J3 may or may not be a component of electronic device 10.

[0154] <<Methods for Manufacturing Electronic Devices>>

[0155] The following uses Figure 20 The manufacturing method of electronic device 1 is explained using flowcharts and other methods.

[0156] Figure 20 Steps S11 to S15 are similar to Figure 12 Steps S1 to S5 in the process.

[0157] In the final step S16, the electronic device 10 is mounted on the circuit board 800. Specifically, firstly, the solder ball, which serves as the third connector J3, is mounted on the board-side connection terminal T10 of the electronic device 10 (see...). Figure 21 (A). Next, the electronic device 10 and the circuit board 800 are electrically connected to each other via the third connector J3 by, for example, mass return or thermocompression bonding (TCB) (see A). Figure 21 (B).

[0158] <<Effects of Electronic Devices and Methods for Manufacturing Electronic Devices>>

[0159] The electronic device 1, including the electronic device 10 according to the embodiments of the present technology described above, includes the electronic device 10 and a circuit board 800 on which the electronic device 10 is mounted. Therefore, an electronic device that can improve productivity while suppressing the degradation of electrical characteristics can be provided.

[0160] The method for manufacturing an electronic device 1 according to the present technology includes the steps of: forming a wiring layer 300 in a convex shape on a wiring board 100; connecting each of a plurality of bare dies 200 to the wiring board 100 via a first connector J1, and connecting each of the plurality of bare dies 200 to the wiring layer 300 via a second connector J2 to produce an electronic device 10; and mounting the electronic device 10 on a circuit board 800.

[0161] By using the manufacturing method of this electronic device 1, since it is not necessary to install the wiring layer 300 on the wiring board 100, productivity can be improved.

[0162] (Example 7)

[0163] Figure 22 This is a detailed cross-sectional view showing a portion of the electronic device 10-7 according to Embodiment 7 of the present invention. Figure 22 In the electronic device 10-7 shown, the substrate 100a of the wiring board 100 includes an organic substrate. Because the substrate 100a of the electronic device 10-7 includes an organic substrate, cost reduction can be achieved.

[0164] (Example 8)

[0165] Figure 23 This is a detailed cross-sectional view showing a portion of the electronic device 10-8 according to Embodiment 8 of the present technology. Figure 23In the illustrated electronic device 10-8, the substrate 100a of the wiring board 100 includes a fan-out wafer-level package (FOWLP) or a fan-out panel-level package (FOPLP). In the manufacturing method of the electronic device 10-8, the manufacturing steps following the step of forming the raised wiring layer on the wiring board 100 are... Figure 12 The manufacturing steps of the manufacturing method shown are similar.

[0166] In addition to the bare dies 200 disposed on the wiring board 100 and wiring layer 300, the electronic device 10-8 also includes bare dies 200 disposed inside the wiring board 100 (also referred to as "internal dies"). The internal dies are connected to the internal wiring 100b. Using the electronic device 10-8, because the bare dies 200 can be included in the wiring board 100, the wiring length between the bare dies 200 can be reduced to improve electrical characteristics, and miniaturization can be achieved.

[0167] (Example 9)

[0168] Figure 24 This is a detailed cross-sectional view showing a portion of the electronic device 10-9 according to Embodiment 9 of the present technology. Figure 24 In the illustrated electronic device 10-9, the substrate 100a of the wiring board 100 includes a ceramic substrate. In the manufacturing method of the electronic device 10-9, the manufacturing steps following the step of forming the raised wiring layer on the wiring board 100 are similar to... Figure 12 The manufacturing method shown. In the electronic device 10-9, since the substrate 100a includes a ceramic substrate, it has excellent high thermal conductivity, low coefficient of thermal expansion, low dielectric constant, and chemical resistance.

[0169] (Example 10)

[0170] Figure 25 This is a detailed cross-sectional view showing a portion of the electronic device 10-10 according to Embodiment 10 of the present technology. Figure 25 In the illustrated electronic device 10-10, the substrate 100a of the wiring board 100 includes a glass substrate (e.g., borosilicate glass). In the manufacturing method of the electronic device 10-10, the manufacturing steps following the step of forming the raised wiring layer on the wiring board 100 are similar to... Figure 12 The manufacturing method is shown. For electronic device 10-10, since the substrate 100a of wiring board 100 includes a glass substrate (e.g., borosilicate glass), its heat resistance and impact resistance are excellent. Furthermore, using electronic device 10-10, since the glass substrate (e.g., borosilicate glass) included in substrate 100a has a coefficient of thermal expansion close to that of silicon (silicon: 2.4 ppm / K, borosilicate glass: 3.2 to 3.8 ppm / K), the connection reliability between the first connector J1 and the third joint J3 is improved.

[0171] (Example 11)

[0172] Figure 26 This is a detailed cross-sectional view showing a portion of the electronic device 10-11 according to Embodiment 11 of the present technology. Figure 26 In the electronic devices 10-11 shown, each of the first and second connectors is a metal connector. In the electronic devices 10-11, each of the first and second connectors is, for example, a Cu-Cu connector.

[0173] The method for Cu-Cu hybrid bonding is described below. First, a SiO2 film 450 is formed on the surface (lower surface) of the Cu-containing wafer-side connection terminals T21 and T23 by plasma CVD, and then planarized by CMP (chemical mechanical polishing). In the board assembly 50 on which a raised wiring layer is provided on the wiring board 100, a thermosetting resin 460 is coated to eliminate surface (upper surface) unevenness, and the board assembly 50 is planarized by CMP in stage B (semi-cured state). Then, annealing (200°C to 300°C) is performed to metal-bond (solid-phase diffusion) the die-side connection terminal T21 and the board-side connection terminal T12, and to metal-bond (solid-phase diffusion) the die-side connection terminal T23 and the wiring layer-side connection terminal T32. Through this annealing, the thermosetting resin 460 formed on the board assembly 50 and bonded to the SiO2 film 450 formed in the die 200 reaches stage C (fully cured state). As described above, since the die 200 and the board assembly 50 are joined to each other by a metal connection, there is no need for connection bumps, and wiring inductance and wiring resistance are reduced, which results in improved electrical characteristics.

[0174] Note that the thermosetting resin 460 formed on the plate assembly 50 may be C-graded before being bonded to the bare die 200. Furthermore, the resin material on the surface of the plate assembly 50 bonded to the bare die 200 is not limited to thermosetting resins, but may be, for example, any of thermoplastic resins, photosensitive dielectric materials, and non-photosensitive dielectric materials.

[0175] (Example 12)

[0176] Figure 27 This is a detailed cross-sectional view showing a portion of the electronic device 10-12 of Embodiment 12 according to the present technology.

[0177] Electronic devices 10-12 also include a heat sink 1100 disposed across the surfaces of the plurality of bare dies 200 on a side opposite to the wiring board 100. This enables effective heat dissipation from each bare die 200.

[0178] By sandwiching a thermal interface material 1400 (TIM) between the die 200 and the heat sink 1100, the contact thermal resistance of the interface can be reduced. Examples of TIMs include aluminum oxide (Al2O3), aluminum nitride (AlN), and liquid metals (gallium or gallium alloys).

[0179] The heat sink 1100 is supported on the wiring board 100 via the support member 1200. The lower end of the support member 1200 is fixed to the wiring board 100 by adhesive 1300.

[0180] Without causing contradictions, portions of the electronic device 10 according to the above embodiments and the configurations of electronic devices 10-1 to 10-12 according to Examples 1 to 12 can be combined. Furthermore, the shape, size, number, etc., of each die 200 and convex wiring layer in the electronic device 10 can be appropriately changed. For example, the number of dies 200 in the electronic device 10 can be two or more, and the number of convex wiring layers can be one or more.

[0181] (HPC)

[0182] Figure 28 This is a block diagram illustrating the functionality of high-performance computing (HPC), which is an example of an electronic device including electronic device 10 according to an embodiment (e.g., electronic devices 10-1 to 10-12 according to Examples 1 to 12). Figure 29 It is shown Figure 28 A diagram illustrating an example of the configuration of a node (computing server).

[0183] Electronic devices 10 for HPC constitute hardware such as a central processing unit (CPU), a graphics processing unit (GPU), and a field-programmable gate array (FPGA).

[0184] HPC's functions are broadly divided into computing servers (see...) Figure 29 Electronic device 10 can be used to implement at least one of a computing server, a network, or a data storage system.

[0185] To build an HPC architecture, such as Figure 28 As shown, multiple (e.g., several to thousands) compute servers that make up a cluster are networked. Multiple clusters exist. Each compute server in a cluster is called a node. Because each node in a cluster operates in parallel with other nodes, processing speed is increased, and HPC can be implemented. Software programs and algorithms execute simultaneously on the servers in the cluster. The cluster is networked to data storage and obtains output. These components operate seamlessly and perform different tasks.

[0186] For HPC to operate at full performance, each component needs to maintain the same speed as the others. For example, once processing begins, the data storage needs to be able to feed data to and retrieve data from the compute server. Similarly, the network needs to be able to support high-speed data transfer between the compute server and the data storage. These performance characteristics can be achieved by using electronic devices 10 (including electronic devices 10-1 to 10-12 in embodiments 1 to 12) for HPC components.

[0187] <Example Applied to Moving Bodies>

[0188] The technology disclosed herein (the Technology) can be applied to a variety of products. For example, the Technology of the Technology disclosed can be implemented in the form of a device mounted on any kind of mobile object, such as a car, electric vehicle, hybrid electric vehicle, motorcycle, bicycle, personal mobility device, airplane, drone, ship, or robot.

[0189] Figure 30 This diagram illustrates a car as an example of a moving vehicle, on which electronic devices including electronic devices 10 (including electronic devices 10-1 to 10-12 in embodiments 1 to 12) according to embodiments of the present technology are installed. Electronic device 10 serves as a component of, for example, a sensing unit in a car. This sensing unit is used, for example, for autonomous driving control.

[0190] (Example of electronic device use)

[0191] Figure 37 This diagram illustrates an embodiment in which a board device, electronic device, or electronic device constitutes at least a part of a solid-state imaging device (image sensor) according to the present technology. The case where at least a part of an image sensor constitutes a solid-state imaging device is, for example, a plurality of dies 200 including an imaging chip, logic chip, memory chip, AI chip, interface chip, etc., on which the solid-state imaging device is mounted.

[0192] For example, in various cases of sensing light such as visible light, infrared light, ultraviolet light, and X-rays, electronic devices 10 according to embodiments of the present technology (e.g., electronic devices 1 to 12 according to examples 1 to 12), board devices 50 included in electronic devices 10, and electronic devices including electronic devices 10 can be used. That is, for example, such as Figure 37 As shown, the present invention can be used in devices for capturing images provided for appreciation, transportation, home appliances, medical and health care, security, beauty, sports, agriculture, and other fields.

[0193] Specifically, in the field of appreciation, for example, any board device, electronic device, and electronic device according to the present technology can be used to capture images for appreciation, such as digital cameras, smartphones, or mobile phones with camera functions.

[0194] In the field of transportation, for example, for safe driving (such as automatic stopping, driver status recognition, etc.), any board device, electronic device, and electronic device that can be used in transportation according to this technology, such as on-board sensors for capturing images of the front, rear, surroundings, interior, etc. of a car, surveillance cameras for monitoring driving vehicles and roads, or distance measuring sensors for measuring the distance between vehicles, etc.

[0195] In the field of home appliances, for example, in order to capture images of a user's gestures and perform device operations based on the gestures, any of the board devices, electronic devices, and electronic devices according to the present technology can be used in devices provided for home appliances (such as television receivers, refrigerators, and air conditioners).

[0196] For example, in the medical and healthcare fields, any of the plate devices, electronic devices, and electronic devices according to this technology can be used to provide devices for medical and healthcare purposes, such as endoscopes and devices for performing angiography by receiving infrared light.

[0197] In the field of security, for example, any of the board device, electronic device and electronic device according to the present technology can be used to provide a security device, such as a surveillance camera for crime prevention or a camera for personal authentication.

[0198] For example, in the field of beauty, any of the plate devices, electronic devices, and electronic devices according to this technology can be used to provide devices for beauty purposes, such as skin measuring instruments for photographing skin or microscopes for photographing scalp.

[0199] In the field of sports, for example, any of the plate device, electronic device and electronic device according to the present technology can be used in devices that provide for sports, such as action cameras or wearable cameras for sports.

[0200] For example, in the agricultural field, any of the plate devices, electronic devices, and electronic devices according to this technology can be used in agriculture, such as cameras for monitoring the condition of fields and crops.

[0201] Next, specific examples of the use of the board device, electronic device, and electronic device according to the present technology will be described. For example, as at least part of the solid-state imaging device 501, the board device, electronic device, and electronic device according to the present technology can be used in any type of electronic device with imaging capabilities, such as a camera system represented by a digital still camera or video camera, or a mobile phone with imaging capabilities. Figure 38 A schematic configuration of an electronic device 510 (camera) as an embodiment is shown. For example, the electronic device 510 is a camera capable of capturing still or moving images, and includes a solid-state imaging device 501, an optical system (optical lens) 502, a shutter device 503, a drive unit 504 for driving the solid-state imaging device 501 and the shutter device 503, and a signal processing unit 505.

[0202] Optical system 502 guides image light (incident light) from the object to the pixel area of ​​solid-state imaging device 501. Optical system 502 may include multiple optical lenses. Shutter device 503 controls the illumination period and shading period of solid-state imaging device 501. Drive unit 504 controls the transmission operation of solid-state imaging device 501 and the shutter operation of shutter device 503. Signal processing unit 505 performs various types of signal processing on the signal output from solid-state imaging device 501. The processed video signal Dout is stored in a storage medium such as a memory or output to a monitor.

[0203] (Other examples of board devices, electronic devices, and the use of electronic devices that apply this technology)

[0204] For example, the board device, electronic device, and electronic device according to the present technology can also be used as at least a portion of another electronic device (such as a time-of-flight (TOF) sensor) for detecting light. For example, in the case of applying a light detection device to a TOF sensor, the light detection device can be applied to a distance image sensor by a direct TOF measurement method or by an indirect TOF measurement method. In a distance image sensor using a direct TOF measurement method, the arrival time of photons is directly obtained in the time domain of each pixel. Therefore, light pulses with short pulse widths are transmitted, and electrical pulses are generated by a receiver with a high-speed response. The present disclosure can then be applied to the receiver. Furthermore, by the indirect TOF method, the time of flight of light is measured using a semiconductor element structure in which the detection and accumulation of charge carriers generated by light change according to the arrival timing of the light.

[0205] Figure 39 This is a block diagram illustrating an embodiment of a vehicle control system configuration that is an example of a mobile body control system to which the technology according to this disclosure can be applied.

[0206] The vehicle control system 12000 includes multiple electronic control units connected via a communication network 12001. Figure 39 In the example shown, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an integrated control unit 12050. Furthermore, as examples of the functional structure of the integrated control unit 12050, a microcomputer 12051, an audio / image output unit 12052, and an in-vehicle network interface (I / F) 12053 are shown.

[0207] The drive system control unit 12010 controls the operation of devices related to the vehicle's drive system according to various programs. For example, the drive system control unit 12010 is used as a control device for drive force generating devices (such as internal combustion engines or drive motors) that generate drive force for the vehicle, drive force transmission mechanisms that transmit drive force to the wheels, steering mechanisms that adjust the vehicle's steering angle, and braking devices that generate braking force for the vehicle.

[0208] The body system control unit 12020 controls the operation of various devices installed on the vehicle body according to various programs. For example, the body system control unit 12020 is used as a control device for keyless entry systems, smart key systems, power windows, or various lights such as headlights, taillights, brake lights, turn signals, or fog lights. In this case, radio waves or signals from various switches transmitted from a portable device that serves as a substitute key can be input to the body system control unit 12020. The body system control unit 12020 receives these radio wave or signal inputs and controls the vehicle's door locking devices, power windows, lights, etc.

[0209] The exterior information detection unit 12030 detects information about the exterior of the vehicle on which the vehicle control system 12000 is installed. For example, an imaging unit 12031 is connected to the exterior information detection unit 12030. The exterior information detection unit 12030 causes the imaging unit 12031 to capture images of the exterior of the vehicle and receives these captured images. In addition, the exterior information detection unit 12030 can also perform processing based on the received images, such as detecting people, vehicles, obstacles, signs, text on the road surface, etc., or detecting their distance.

[0210] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output an electrical signal as an image, or it can output an electrical signal as information about the measured distance. Furthermore, the light received by the imaging unit 12031 can be visible light, or it can be invisible light such as infrared light.

[0211] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 for detecting the driver's state is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that images the driver, and the in-vehicle information detection unit 12040 can calculate the driver's fatigue level or concentration level based on the detection information input from the driver state detection unit 12041, or determine whether the driver is dozing off.

[0212] The microcomputer 12051 can calculate control target values ​​for the drive force generating device, steering mechanism, or braking device based on in-vehicle and out-of-vehicle information acquired by the external information detection unit 12030 or the internal information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control to realize the functions of an advanced driver assistance system (ADAS), including collision avoidance or shock absorption, following distance based on vehicle distance, speed maintenance, vehicle collision warning, and lane departure warning.

[0213] In addition, the microcomputer 12051 controls the driving force generating device, steering mechanism, braking device, etc. based on the information about the vehicle's surroundings obtained by the external information detection unit 12030 or the internal information detection unit 12040, thereby performing coordinated control of autonomous driving and other functions that do not depend on the driver's operation.

[0214] Additionally, the microcomputer 12051 can output control commands to the body system control unit 12020 based on information about the outside of the vehicle obtained by the external information detection unit 12030. For example, the microcomputer 12051 can perform cooperative control for glare prevention, such as switching from high beam to low beam, by controlling the headlights according to the position of the vehicle in front or oncoming vehicle detected by the external information detection unit 12030.

[0215] The sound / image output unit 12052 transmits an output signal of at least one of sound or image to an output device capable of visually or audibly notifying passengers of the vehicle or the outside of the vehicle of information. Figure 39 In the embodiments, the audio speaker 12061, the display unit 12062, and the instrument panel 12063 are shown as output devices. For example, the display unit 12062 may include at least one of an on-board display or a head-up display.

[0216] Figure 40 This is a diagram showing an embodiment of the mounting position of the imaging unit 12031.

[0217] exist Figure 40In the vehicle 12100, imaging units 12101, 12102, 12103, 12104 and 12105 are imaging units 12031.

[0218] Imaging units 12101, 12102, 12103, 12104, and 12105 are installed, for example, inside the vehicle 12100 at locations such as the front nose, side mirrors, rear bumper, rear door, and the upper part of the windshield. Imaging unit 12101 installed at the front nose and imaging unit 12105 installed at the upper part of the windshield primarily acquire images of the front of the vehicle 12100. Imaging units 12102 and 12103 installed at the side mirrors primarily acquire images of the sides of the vehicle 12100. Imaging unit 12104 installed at the rear bumper or rear door primarily acquires images of the rear of the vehicle 12100. The front images acquired by imaging units 12101 and 12105 are mainly used to detect vehicles, pedestrians, obstacles, traffic signals, traffic signs, lanes, etc.

[0219] It should be noted that Figure 40 An embodiment of the imaging range of imaging units 12101 to 12104 is shown. Imaging range 12111 represents the imaging range of imaging unit 12101 installed on the front nose. Imaging ranges 12112 and 12113 represent the imaging ranges of imaging units 12102 and 12103 installed on the side mirrors, respectively. Imaging range 12114 represents the imaging range of imaging unit 12104 installed on the rear bumper or rear door. For example, a bird's-eye view of the vehicle 12100 viewed from above is obtained by superimposing image data captured by imaging units 12101 to 12104.

[0220] At least one of the imaging units 12101 to 12104 may have the function of obtaining distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera composed of multiple imaging elements, or may be an imaging element having pixels for phase difference detection.

[0221] For example, the microcomputer 12051 can determine the distance to each three-dimensional object within the imaging range 12111 to 12114 and the time change of that distance (relative speed relative to the vehicle 12100) based on the distance information obtained from the imaging units 12101 to 12104. This allows it to extract objects existing on the vehicle 12100's travel path, traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., equal to or greater than 0 km / h). Furthermore, the microcomputer 12051 can pre-set a following distance to stay ahead of the preceding vehicle and execute automatic braking control (including follow-stop control), automatic acceleration control (including follow-start control), etc. As described above, coordinated control is possible for autonomous driving systems, such as those that allow the vehicle to drive itself without relying on driver operation.

[0222] For example, the microcomputer 12051 can classify three-dimensional object data related to three-dimensional objects into three-dimensional object data such as two-wheeled vehicles, standard vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from imaging units 12101 to 12104, extract the classified three-dimensional object data, and use the extracted three-dimensional object data for automatic obstacle avoidance. For example, the microcomputer 12051 identifies obstacles around vehicle 12100 as obstacles that the driver of vehicle 12100 can visually recognize and obstacles that the driver of vehicle 12100 cannot visually recognize. Then, the microcomputer 12051 determines the collision risk, which represents the risk of collision with each obstacle, and when the collision risk is above a set value and there is a possibility of collision, the microcomputer can perform driving assistance for collision avoidance by outputting an alarm to the driver via audio speaker 12061 or display unit 12062 or by performing forced deceleration or evasive steering via drive system control unit 12010.

[0223] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared light. The microcomputer 12051 can identify a pedestrian, for example, by determining whether a pedestrian exists in the images captured by the imaging units 12101 to 12104. This pedestrian identification is performed, for example, by extracting feature points from the images captured by the imaging units 12101 to 12104, which are infrared cameras, and by performing pattern matching processing on a series of feature points representing the outline of an object to determine whether it is a pedestrian. When the microcomputer 12051 determines that a pedestrian exists in the images captured by the imaging units 12101 to 12104 and thus identifies the pedestrian, the sound / image output unit 12052 controls the display unit 12062 such that a square outline for emphasis is displayed superimposed on the identified pedestrian. The sound / image output unit 12052 can also control the display unit 12062 such that an icon representing the pedestrian is displayed at a desired location.

[0224] Embodiments of a vehicle control system to which the technology according to this disclosure (the technology) can be applied have been described above. For example, in addition to the above configuration, the technology according to this disclosure can be applied to the imaging unit 12031, etc. Specifically, for example, the solid-state imaging device 111 of this disclosure can be applied to the imaging unit 12031. By applying the technology according to this disclosure to the imaging unit 12031, production volume can be increased and manufacturing-related costs can be reduced.

[0225] In addition, this technology may also have the following configurations.

[0226] (1) A plate device, comprising:

[0227] patch panels; and

[0228] The wiring layer protrudes from one surface of the wiring board and electrically connects multiple bare chips to each other.

[0229] (2) According to the plate assembly of (1), one surface is a flat surface.

[0230] (3) The plate assembly according to (1) or (2), wherein,

[0231] The patch panel is connected to each of the multiple bare dies via a first connector, and

[0232] The wiring layer and each of the multiple bare dies are connected to each other via a second connector.

[0233] (4) According to the plate assembly of (3), the second joint is smaller than the first joint.

[0234] (5) The plate assembly according to (3) or (4), wherein each of the first joint and the second joint is a protrusion.

[0235] (6) A plate assembly according to any one of (3) to (5), wherein,

[0236] The first and second connectors are metal connectors.

[0237] (7) The plate assembly according to any one of (3) to (6), wherein the ratio of the pitch of the first joint to the pitch of the second joint is more than 2.0 and less than 5.0.

[0238] (8) A board assembly according to any one of (1) to (7), wherein the wiring layer has a planar shape corresponding to the planar arrangement of at least two of the dies.

[0239] (9) The plate arrangement according to (8), wherein the planar shape is a quadrilateral, an L-shaped, a T-shaped, a cross-shaped, a U-shaped, a curved shape or a combination of at least two of these shapes.

[0240] (10) The board assembly according to any one of (1) to (9) further includes: a plurality of wiring layers.

[0241] (11) A plate assembly according to any one of (1) to (10), wherein,

[0242] Wiring layers include:

[0243] Insulating film; and

[0244] Wiring, installed inside the insulating film, and

[0245] Insulating films include dielectric materials.

[0246] (12) A plate assembly according to any one of (1) to (11), wherein

[0247] The patch panel includes:

[0248] Substrate; and

[0249] Wiring, located inside the substrate, and

[0250] The substrate includes any one of organic substrates, FOWLP, FOPLP, ceramic substrates, and glass substrates.

[0251] (13) The board assembly according to (1) further includes: a heat sink disposed on the surface of a plurality of bare plates on a side opposite to the wiring board side.

[0252] (14) The board assembly according to any one of (3) to (13), wherein the bottom filler is injected around the first joint between the wiring board and the plurality of bare dies and the second joint between the wiring layer and the plurality of bare dies.

[0253] (15) An electronic device comprising:

[0254] Multiple nude films; and

[0255] A board assembly includes a wiring board and a wiring layer that protrudes from one surface of the wiring board and electrically connects at least two of a plurality of dies to each other.

[0256] (16) An electronic device comprising:

[0257] Electronic devices, including:

[0258] Multiple nude films; and

[0259] Board assembly, comprising a wiring board and a wiring layer projecting from one surface of the wiring board and electrically connecting at least two of a plurality of dies to each other; and

[0260] Circuit board; electronic devices are mounted on circuit boards.

[0261] (17) A method for manufacturing an electronic device, the method comprising the following steps:

[0262] The wiring layer is formed in a convex shape on the wiring board; and

[0263] Each of the multiple bare chips is connected to the patch panel via a first connector, and each of the multiple bare chips is connected to the wiring layer via a second connector.

[0264] (18) The method for manufacturing an electronic device according to (17), wherein

[0265] The formation process includes sub-steps:

[0266] A layer is formed on the wiring board, in which wiring is formed in a portion of the photosensitive dielectric film in the in-plane direction; and

[0267] Another portion of the photosensitive dielectric film in the in-plane direction is removed from the layer by etching.

[0268] (19) The method for manufacturing an electronic device according to (17), wherein

[0269] The process is repeated multiple times in a loop, which includes the following sub-steps:

[0270] Dielectric films are stacked on the wiring board;

[0271] Etch the dielectric film to form trenches;

[0272] The process of forming a metal film on a grooved dielectric film; and

[0273] Grind the metal film to form wiring.

[0274] (20) A method for manufacturing an electronic device, the method comprising the following steps:

[0275] The wiring layer is formed in a convex shape on the wiring board;

[0276] Each of the plurality of bare dies is connected to the wiring board via a first connector, and each of the plurality of bare dies is connected to the wiring layer via a second connector to form an electronic device; and

[0277] Electronic devices are mounted on circuit boards.

[0278] Reference Symbol List

[0279] 1 electronic device

[0280] 10, 10-1, 10-2, 10-3, 10-4, 10-5, 10-6, 10-7, 10-8, 10-9, 10-10, 10-11, 10-12 Electronic devices

[0281] 50-plate device

[0282] 100 patch panel

[0283] 100a base plate

[0284] 100B internal wiring (wiring)

[0285] 200 nude films

[0286] 300 wiring layers

[0287] 300a insulating film

[0288] 300b Internal Wiring (Wiring)

[0289] 400 Bottom Filler

[0290] J1 First Connector

[0291] J2 Second Connector

Claims

1. A plate device, comprising: Patch panel; as well as The wiring layer protrudes from one surface of the wiring board and electrically connects multiple bare dies to each other.

2. The plate device according to claim 1, wherein, The surface in question is a flat surface.

3. The plate device according to claim 1, wherein, The patch panel is connected to each of the plurality of bare dies via a first connector, and The wiring layer and each of the plurality of bare dies are connected to each other via a second connector.

4. The plate device according to claim 3, wherein, The second connector is smaller than the first connector.

5. The plate device according to claim 3, wherein, Each of the first connector and the second connector is a protrusion.

6. The plate device according to claim 3, wherein, The first connector and the second connector are metal connectors.

7. The plate device according to claim 3, wherein, The ratio of the pitch of the first connector to the pitch of the second connector is greater than 2.0 and less than 5.

0.

8. The plate device according to claim 1, wherein, The wiring layer has a planar shape corresponding to the planar arrangement of at least two of the bare dies.

9. The plate device according to claim 8, wherein, The plan view shape is a quadrilateral, L-shaped, T-shaped, cross-shaped, U-shaped, curved, or a combination of at least two of these shapes.

10. The plate device according to claim 1, further comprising: Multiple wiring layers.

11. The plate device according to claim 1, wherein, The wiring layer includes: Insulating film; and Wiring, disposed inside the insulating film, and The insulating film includes a dielectric material.

12. The plate device according to claim 1, wherein, The wiring board includes: Substrate; and Wiring, disposed inside the substrate, and The substrate includes any one of organic substrate, FOWLP, FOPLP, ceramic substrate and glass substrate.

13. The plate device according to claim 1, further comprising: The heat sink is disposed on the side opposite to the wiring board side, with the surface of the plurality of bare platters disposed across the surface of the plurality of bare platters.

14. The plate device according to claim 3, wherein, An underfill is injected around the first connector between the wiring board and the plurality of bare dies and the second connector between the wiring layer and the plurality of bare dies.

15. An electronic device comprising: Multiple nude films; as well as A board assembly includes a wiring board and wiring layers that protrude from one surface of the wiring board and electrically connect at least two of the plurality of bare dies to each other.

16. An electronic device comprising: Electronic devices, including: Multiple nude films; and A board assembly includes a wiring board and a wiring layer projecting from one surface of the wiring board and electrically connecting at least two of the plurality of bare dies to each other; and A circuit board on which the electronic device is mounted.

17. A method for manufacturing an electronic device, the method comprising the following steps: The wiring layer is formed in a convex shape on the wiring board; as well as Each of the plurality of bare dies is connected to the wiring board via a first connector, and each of the plurality of bare dies is connected to the wiring layer via a second connector.

18. The method for manufacturing an electronic device according to claim 17, wherein, The formation process includes the following sub-steps: A layer is formed on the wiring board, wherein wiring is formed in a portion of the photosensitive dielectric film in the in-plane direction; and Another portion of the photosensitive dielectric film in the in-plane direction is removed from the layer by etching.

19. The method for manufacturing an electronic device according to claim 17, wherein, The formation step is repeated in a loop multiple times, and the loop includes the following sub-steps: A dielectric film is stacked on the wiring board; Etch the dielectric film to form a trench; A metal film is formed on the dielectric film in which the grooves are formed; as well as The metal film is ground to form wiring.

20. A method for manufacturing an electronic device, the method comprising the following steps: The wiring layer is formed in a convex shape on the wiring board; Each of a plurality of bare dies is connected to the wiring board via a first connector, and each of the plurality of bare dies is connected to the wiring layer via a second connector to form an electronic device; as well as The electronic device is mounted on a circuit board.

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