Water turbine set broadband residual voltage signal automatic gain adjustment detection circuit

Abstract

The invention provides a hydraulic turbine set broadband residual voltage signal automatic gain adjustment detection circuit which comprises a PT voltage acquisition circuit, a signal amplification circuit and a zero crossing point detection circuit which are electrically connected in sequence, and the circuits cooperate to process and detect PT residual voltage signals. The signal amplification circuit comprises a signal first-stage amplification circuit and a signal multi-stage amplification circuit which are connected in sequence, and inter-stage feedback is achieved between the signal first-stage amplification circuit and the signal multi-stage amplification circuit through a negative feedback adjusting circuit. An automatic gain adjustment detection circuit is integrated in a frequency measurement module, so that a PT signal can be directly accessed to the frequency measurement module, and a special shaping circuit board is not needed to pre-process the signal; the circuit has the functions of residual voltage signal isolation, amplification, filtering, automatic gain adjustment, zero crossing point detection and the like. The problems that an existing shaping plate cannot adapt to rapid signal change and cannot detect a signal zero crossing point are solved.

Description

Technical Field

[0001] This invention relates to the field of water turbine control technology, specifically to an automatic gain adjustment and detection circuit for broadband residual voltage signals of water turbine units. Background Technology

[0002] In hydro-generator units, the speed control system typically employs PT residual voltage frequency measurement and gear disc frequency measurement. Gear disc frequency measurement generally serves as the primary frequency signal during startup, while PT residual voltage frequency measurement is selected for speed and power control once the unit enters no-load mode. Therefore, the accuracy of residual voltage frequency measurement is particularly important for the safe and stable operation of hydro-generator units.

[0003] The residual voltage signal of the PT is a sinusoidal signal with an amplitude range of 0.5V to 150V. Current technology involves first stepping down the residual voltage signal through a transformer, then rectifying it using a half-wave rectifier circuit, and finally outputting a square wave signal via a comparator for frequency measurement by the frequency measurement module.

[0004] Existing technologies mostly employ fixed-gain amplifier circuits. However, the rotational speed of a hydroelectric turbine varies greatly (from creeping speed to runaway speed), resulting in significant differences in the amplitude of the original signal generated by the sensor at different speeds (potentially tens or even hundreds of times). Fixed-gain amplifiers cannot automatically adapt to such variations. For example, Chinese patent document CN119804977A describes a method for implementing a residual voltage frequency measurement module for a hydroelectric power station unit. This method uses fixed-gain signal amplification and acquisition, controlling the gain ratio of the input and sampled signals by manually adjusting the current-limiting resistor R62. This patent focuses on signal isolation and filtering, making it suitable for applications with high harmonicity but constant voltage output signals.

[0005] When a circuit malfunctions, the current increases dramatically, potentially exceeding the rated current of the components. This increases the probability of system failure, reduces signal processing capabilities, and raises equipment maintenance costs. Furthermore, the inability to accurately capture the zero-crossing point of the signal leads to deviations in the calculation of the signal period. For frequency measurement, since frequency is the reciprocal of the period, inaccurate period measurement directly reduces frequency measurement accuracy, causing incorrect adjustments to system control parameters and leading the system into an unstable state. Summary of the Invention

[0006] The technical problem to be solved by the present invention is to provide an automatic gain adjustment and detection circuit for wideband residual voltage signal of a hydro turbine unit, which solves the problem that the existing fixed gain circuit of the shaping plate cannot adapt to rapid signal changes, and at the same time solves the problem that the existing shaping plate cannot accurately capture the zero crossing point of the signal, resulting in deviation in the calculation of the signal period.

[0007] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is as follows: An automatic gain adjustment and detection circuit for broadband residual voltage signal of a hydro turbine unit includes a PT voltage acquisition circuit, a signal amplification circuit, and a zero-crossing detection circuit connected in sequence. The circuits work together to process and detect the PT residual voltage signal. The signal amplification circuit includes a primary signal amplification circuit and a multi-stage signal amplification circuit connected in sequence. The primary signal amplification circuit and the multi-stage signal amplification circuit achieve inter-stage feedback through a negative feedback adjustment circuit.

[0008] The output signal of the aforementioned PT voltage acquisition circuit is preprocessed and then sent to the signal amplification circuit.

[0009] The aforementioned PT voltage acquisition circuit includes a voltage transformer U1. A current-limiting resistor R1 is connected in series on the primary side of the voltage transformer U1, and a sampling resistor R3 is connected in series on the secondary side of the voltage transformer U1. An RC filter circuit consisting of a resistor R2 and a capacitor C1 is also connected in parallel on the secondary side. The sampling signal UAS is drawn out from between the resistor R2 and the capacitor C1. The primary side of voltage transformer U1 receives the residual voltage signal from the PT, and the secondary side outputs a pre-processed low-voltage signal to the signal amplification circuit to achieve high-voltage isolation, signal step-down, and filtering.

[0010] The structure of the first-stage amplifier circuit in the above signal amplifier circuit is as follows: The first-stage amplifier circuit includes a common-emitter amplifier circuit composed of transistor Q4; the base of transistor Q4 is connected to the power supply circuit through bias resistor R14, and simultaneously receives the signal output from the PT voltage acquisition circuit through coupling capacitor C8; the collector of transistor Q4 is connected in series with load resistor R10 and then through resistor R6 to the collector of transistor Q1 in the multi-stage amplifier circuit; the emitter of transistor Q4 is grounded through resistor R18; resistor R11 provides DC bias to the base of transistor Q4 to set the quiescent operating point of the transistor.

[0011] The multi-stage amplifier circuit structure in the above signal amplifier circuit is as follows: The multi-stage amplifier circuit includes transistors Q1, Q2, and Q3, forming a cascaded structure of "common collector - common emitter - common emitter", namely the CE-CC-CE cascaded architecture. Transistors Q2 and Q3 are two common-emitter amplifiers that amplify the signal voltage, while transistor Q1 is a common-collector emitter amplifier that amplifies the signal current, forming a three-stage amplifier circuit.

[0012] The common-emitter circuit of transistor Q2 described above is as follows: Resistors R7 and R12 are connected in series to form a voltage divider, with their ends connected to the positive terminal of the power supply and ground, respectively. The voltage divider provides a bias voltage to transistor Q2 and turns it on. The base of transistor Q2 is connected to the midpoint of resistors R7 and R12. The emitter of transistor Q2 is connected in series with resistor R15 and then grounded through capacitor C9. The collector of transistor Q2 is connected in series with DC bias resistor R8 and then connected to the positive terminal of the power supply. The collector of transistor Q2 is coupled to the base of transistor Q1.

[0013] The common collector circuit of transistor Q1 described above is as follows: The base of transistor Q1 is coupled to the collector of transistor Q2, the emitter is grounded through resistor R13, and the collector is connected to the positive terminal of the power supply. The common emitter circuit for transistor Q3 is as follows: The base of transistor Q3 is connected to the output signal of transistor Q1. The emitter is grounded through resistors R16 and R19. The two ends of resistor R17 are connected to the grounded ends of resistors R15 and R16 respectively. The collector is connected to the positive terminal of the power supply. The collector of transistor Q3 outputs the ADC signal to the zero-crossing detection circuit through resistor R9 and capacitor C5. Capacitors C6 and C7 are located between the collector of transistor Q4 and the base of transistor Q2. Capacitor C7 is an input coupling capacitor used to couple the AC signal output from the previous stage to the subsequent amplifier circuit after negative feedback adjustment.

[0014] The above-mentioned negative feedback regulation circuit structure is as follows: This includes the AC feedback input signal ADJ_IN taken from the collector of transistor Q3. The feedback input signal ADJ_IN is coupled into the feedback circuit through one end of capacitor C10. The other end of capacitor C10 is connected in series with resistor R21 and then split into two paths. One path is connected to the anode of diode D1 and then connected to the base of transistor Q5. The other path is grounded through resistor R22. A diode D2 is connected in parallel across resistor R22, with the cathode of diode D2 connected to the anode of diode D1. The collector of transistor Q5 is connected to the positive terminal of the power supply through resistor R20, and the emitter of transistor Q5 is connected to the collector of transistor Q6. A capacitor C11 is directly connected between the base of transistor Q5 and the emitter of transistor Q6. A resistor R23 is connected in parallel across the two ends of the capacitor C11. One end of the resistor R23 is connected to the cathode of diode D1, and the other end is connected to the anode of diode D2. The base and collector of transistor Q6 are shorted to output the feedback signal ADJ_OUT to the front end of capacitor C7.

[0015] The zero-crossing detection circuit structure described above is as follows: The system includes comparator U2, whose non-inverting input is connected to the output signal ADC, whose inverting input is connected to the reference ground, and whose output signal ADC_IN is connected to a programmable logic device (CPLD) for rising edge acquisition.

[0016] The collector of transistor Q1 is grounded through decoupling capacitor C2, and the collector of transistor Q4 is grounded after being connected to decoupling capacitor C3 through resistor R10. Decoupling capacitors C2 and C3 are used to remove stray signal noise.

[0017] The first-stage amplifier circuit mentioned in this invention includes a common-emitter amplifier circuit composed of transistor Q4. By integrating an automatic gain adjustment detection circuit into the frequency measurement module, the PT signal can be directly connected to the frequency measurement module without the need for a dedicated shaping circuit board for signal preprocessing. This circuit has functions such as isolation, amplification, filtering, automatic gain adjustment, and zero-crossing detection of residual voltage signals. It solves the problems of existing shaping boards being unable to adapt to rapid signal changes and unable to detect signal zero crossings. Attached Figure Description

[0018] The present invention will be further described below with reference to the accompanying drawings and embodiments: Figure 1 This is a structural diagram of the automatic gain adjustment detection circuit of the present invention; Figure 2 This is a circuit diagram of the PT voltage acquisition circuit of the present invention; Figure 3 This is a schematic diagram of the signal amplification circuit structure of the present invention; Figure 4 This is a schematic diagram of the negative feedback circuit adjustment circuit of the present invention; Figure 5 This is the zero-crossing detection circuit of the present invention. Detailed Implementation

[0019] The technical solution of the present invention will be described in detail below with reference to the accompanying drawings and embodiments.

[0020] An automatic gain adjustment and detection circuit for broadband residual voltage signal of a hydro turbine unit includes a PT voltage acquisition circuit, a signal amplification circuit, and a zero-crossing detection circuit connected in sequence. The circuits work together to process and detect the PT residual voltage signal. The signal amplification circuit includes a primary signal amplification circuit and a multi-stage signal amplification circuit connected in sequence. The primary signal amplification circuit and the multi-stage signal amplification circuit achieve inter-stage feedback through a negative feedback adjustment circuit.

[0021] The output signal of the aforementioned PT voltage acquisition circuit is preprocessed and then sent to the signal amplification circuit.

[0022] The aforementioned PT voltage acquisition circuit includes a voltage transformer U1. A current-limiting resistor R1 is connected in series on the primary side of the voltage transformer U1, and a sampling resistor R3 is connected in series on the secondary side of the voltage transformer U1. An RC filter circuit consisting of a resistor R2 and a capacitor C1 is also connected in parallel on the secondary side. The sampling signal UAS is drawn out from between the resistor R2 and the capacitor C1. The primary side of voltage transformer U1 receives the residual voltage signal from the PT, and the secondary side outputs a pre-processed low-voltage signal to the signal amplification circuit to achieve high-voltage isolation, signal step-down, and filtering.

[0023] The structure of the first-stage amplifier circuit in the above signal amplifier circuit is as follows: The first-stage amplifier circuit includes a common-emitter amplifier circuit composed of transistor Q4; the base of transistor Q4 is connected to the power supply circuit through bias resistor R14, and simultaneously receives the signal output from the PT voltage acquisition circuit through coupling capacitor C8; the collector of transistor Q4 is connected in series with load resistor R10 and then through resistor R6 to the collector of transistor Q1 in the multi-stage amplifier circuit; the emitter of transistor Q4 is grounded through resistor R18; resistor R11 provides DC bias to the base of transistor Q4 to set the quiescent operating point of the transistor.

[0024] The multi-stage amplifier circuit structure in the above signal amplifier circuit is as follows: The multi-stage amplifier circuit includes transistors Q1, Q2, and Q3, forming a cascaded structure of "common collector - common emitter - common emitter", namely the CE-CC-CE cascaded architecture. Transistors Q2 and Q3 are two common-emitter amplifiers that amplify the signal voltage, while transistor Q1 is a common-collector emitter amplifier that amplifies the signal current, forming a three-stage amplifier circuit.

[0025] The common-emitter circuit of transistor Q2 described above is as follows: Resistors R7 and R12 are connected in series to form a voltage divider, with their ends connected to the positive terminal of the power supply and ground, respectively. The voltage divider provides a bias voltage to transistor Q2 and turns it on. The base of transistor Q2 is connected to the midpoint of resistors R7 and R12. The emitter of transistor Q2 is connected in series with resistor R15 and then grounded through capacitor C9. The collector of transistor Q2 is connected in series with DC bias resistor R8 and then connected to the positive terminal of the power supply. The collector of transistor Q2 is coupled to the base of transistor Q1.

[0026] The common collector circuit of transistor Q1 described above is as follows: The base of transistor Q1 is coupled to the collector of transistor Q2, the emitter is grounded through resistor R13, and the collector is connected to the positive terminal of the power supply. The common emitter circuit for transistor Q3 is as follows: The base of transistor Q3 is connected to the output signal of transistor Q1. The emitter is grounded through resistors R16 and R19. The two ends of resistor R17 are connected to the grounded ends of resistors R15 and R16 respectively. The collector is connected to the positive terminal of the power supply. The collector of transistor Q3 outputs the ADC signal to the zero-crossing detection circuit through resistor R9 and capacitor C5. Capacitors C6 and C7 are located between the collector of transistor Q4 and the base of transistor Q2. Capacitor C7 is an input coupling capacitor used to couple the AC signal output from the previous stage to the subsequent amplifier circuit after negative feedback adjustment.

[0027] The above-mentioned negative feedback regulation circuit structure is as follows: This includes the AC feedback input signal ADJ_IN taken from the collector of transistor Q3. The feedback input signal ADJ_IN is coupled into the feedback circuit through one end of capacitor C10. The other end of capacitor C10 is connected in series with resistor R21 and then split into two paths. One path is connected to the anode of diode D1 and then connected to the base of transistor Q5. The other path is grounded through resistor R22. A diode D2 is connected in parallel across resistor R22, with the cathode of diode D2 connected to the anode of diode D1. The collector of transistor Q5 is connected to the positive terminal of the power supply through resistor R20, and the emitter of transistor Q5 is connected to the collector of transistor Q6. A capacitor C11 is directly connected between the base of transistor Q5 and the emitter of transistor Q6. A resistor R23 is connected in parallel across the two ends of the capacitor C11. One end of the resistor R23 is connected to the cathode of diode D1, and the other end is connected to the anode of diode D2. The base and collector of transistor Q6 are shorted to output the feedback signal ADJ_OUT to the front end of capacitor C7.

[0028] The zero-crossing detection circuit structure described above is as follows: The system includes comparator U2, whose non-inverting input is connected to the output signal ADC, whose inverting input is connected to the reference ground, and whose output signal ADC_IN is connected to a programmable logic device (CPLD) for rising edge acquisition.

[0029] The collector of transistor Q1 is grounded through decoupling capacitor C2, and the collector of transistor Q4 is grounded after being connected to decoupling capacitor C3 through resistor R10. Decoupling capacitors C2 and C3 are used to remove stray signal noise.

[0030] Compared to patent CN119804977A, this application focuses on the application environment of dynamic amplitude broadband signals. It uses negative feedback to adjust the control gain coefficient to monitor the dynamic parameters of residual pressure under different operating conditions of the turbine unit. At the same time, a multi-stage filtering circuit is added to the amplifier circuit to effectively suppress the harmonic and surge signals generated by the unit.

[0031] Example 1: This invention integrates an automatic gain adjustment detection circuit into the frequency measurement module, allowing the PT signal to be directly input to the module without requiring a dedicated shaping circuit board for signal preprocessing. The overall design of this circuit is as follows: Figure 1 As shown. PT isolation and signal preprocessing use a current-type voltage transformer to acquire the residual voltage signal, achieving high-voltage isolation and limiting the signal threshold voltage; RC filtering is used to improve the stability of the frequency signal and filter high-order harmonics and AC components; the signal amplification circuit adopts a cascaded architecture of "common emitter-common collector-common emitter", i.e., CE-CC-CE, forming a high-efficiency amplification chain with high gain, good matching, and wide frequency response through the complementary advantages of the three configuration circuits. The first-stage common emitter CE1 utilizes its voltage amplification characteristics to initially amplify the weak input signal, laying the foundation for the basic gain; the intermediate common collector CC acts as an emitter follower, although its voltage gain is close to 1, it has the current amplification capability IE=(1+β)IB, which can convert the voltage signal output from the previous stage into a low-internal-resistance current-driven signal, effectively solving the gain attenuation problem caused by poor matching between the high output resistance Ro1 of the previous stage and the low input resistance rbe2 of the subsequent stage when two stages of CE are directly cascaded. The third-stage common-emitter CE2, relying on the low-impedance drive provided by the previous stage, further leverages the voltage amplification advantage, making the total gain more than tens of times that of a single-stage CE.

[0032] This three-stage configuration of "voltage amplification - impedance transformation - secondary amplification" breaks through the performance boundaries of a single configuration. Through functional partitioning and the superposition of advantages, it achieves a systematic improvement in gain, matching, frequency response, and stability.

[0033] 1) PT voltage acquisition circuit The residual voltage signal is a wide voltage range of 0.5V to 150V, a sinusoidal signal with a large dynamic range of 0 to 10kHz. Therefore, the input signal needs to be preprocessed and voltage isolation protection implemented. According to the preset ratio of the current-limiting resistor R1 and the sampling resistor R3, the high voltage is converted into a low voltage signal suitable for subsequent circuit processing. The Hall effect is used to achieve electrical isolation between the primary and secondary windings, while a TVS on the primary side is added to prevent overvoltage caused by lightning strikes or grid fluctuations. The PT uses a current-type voltage transformer, which is small in size and has a distortion of <0.1% in a wide frequency band signal. R1 is a current-limiting resistor to ensure that the initial current of the transformer is ≤10mA. R3 is a sampling resistor; by controlling the R1 / R3 ratio, the output voltage range of the voltage transformer is controlled. The RC filter circuit composed of R2 and C1 is used to suppress LC oscillation interference caused by leakage inductance and distributed capacitance in the secondary winding of the transformer.

[0034] 2) Signal Amplification Circuit The residual voltage signal is adjusted to a small signal of 3mV~900mV through the pre-processing circuit of the preamplifier stage. The amplification circuit adopts a preamplifier circuit plus a multi-stage amplification circuit. The preamplifier stage uses a common emitter amplifier circuit composed of Q4, C8 is the input signal coupling capacitor, C6 is the output signal coupling capacitor, R11 is the DC bias resistor of the base of Q4, R10 is the load resistor of the collector, and R14 is the bias resistor of the base, which is used to set the static operating point (Q point) of the transistor. If R14 is too small, the transistor will be cut off; if it is too large, it will enter the saturation region, both of which will cause signal distortion.

[0035] The subsequent stage uses two common-emitter amplifiers, Q2 and Q3, to amplify the signal voltage, and a common-collector emitter amplifier, Q1, to amplify the signal current, forming a three-stage amplifier circuit. C7 is an input coupling capacitor, used to couple the AC signal output from the previous stage to the subsequent amplifier circuit after negative feedback adjustment; R7 and R12 form a voltage divider to provide the base bias voltage for Q2, enabling it to conduct; R8 and R4 are DC bias resistors, providing DC bias voltage for the transistor, while R8 can accelerate the discharge of parasitic capacitance between the base and collector, causing the transistor to quickly enter the cutoff state; R13 and R17 provide feedback for Q1 and Q2, used to stabilize the DC bias of the transistor; C2 and C3 decoupling capacitors are used to remove stray signal noise and prevent oscillations from affecting the circuit; the voltage divider circuit of R16 and R19 is used to provide feedback voltage for the first stage amplification, used to improve the gain stability of the amplification chain.

[0036] 3) Negative feedback circuit Because the open-loop gain of the amplifier circuit is unstable, it will cause nonlinear distortion. Therefore, negative feedback adjustment is required. (Refer to...) Figure 3 The negative feedback couples the AC component into the feedback circuit through C10, and adjusts the feedback voltage through R21 and R22; D2 and D1 form a half-wave rectifier circuit to convert the positive half-cycle of the AC signal into a positive DC signal; C11 is used to filter out the remaining AC component; R23 is a DC feedback resistor used to provide a DC return path; the input signal at the base of Q5 is a DC signal proportional to the effective value of the input signal. When this DC signal is greater than 1.4V = 0.7V + 0.7V (typical value of VBE conduction voltage), Q5 and Q6 conduct, the feedback loop enters the working state, and the signal flows from... Figure 2 The current flows out of capacitor C6 and back to ground through Q6. At this time, the emitter of Q6 outputs a DC signal, which is equivalent to an AC signal being disconnected.

[0037] 4) Automatic gain control principle Figure 2 , Figure 3The circuit forms an automatic gain amplifier for the signal. When the input voltage of the entire system is very small, the voltage at the base of Q5 is less than 1.4V, Q5 and Q6 are cut off, the current is very small, and the dynamic resistance of Q6 increases. At this time, the amplification factor of the entire system increases, and the output voltage increases. When the input voltage of the system is very large, the voltage at the base of Q5 is greater than 1.4V, but it still hovers around 1.4V. This is because as it increases, the DC current flowing through Q5 and Q6 will increase sharply, and the dynamic resistance of Q6 will decrease sharply. At this time, the amplification factor of the entire system decreases, and the output voltage also decreases. This achieves the purpose of automatic gain adjustment for dynamic signals and constant voltage output.

[0038] The gain coefficient formula for a common-emitter amplifier circuit and a feedback circuit is as follows: ; Ro is the input equivalent impedance of the multi-stage amplifier circuit, Rx is the variable resistance of Q6 (Q6's collector and base are self-short-circuited, and the base and transmitter are equivalent to a diode. A diode can be regarded as a variable resistor when a small AC signal passes through it), Rbe is the input impedance of the pre-amplifier. Through formula derivation, C is a constant value, R10 and Ro are fixed values, and the dynamic resistance of Q6 is Rx = 26mV / I. The current of Q6 will automatically adjust with the dynamic changes of the external voltage.

[0039] 5) Zero-crossing detection circuit The zero-crossing detection circuit built for the comparator converts the sine wave into a square wave signal with a duty cycle of 50% by comparing it with the reference ground at the zero-crossing point. The output signal is acquired by the rising edge of the CPLD and the frequency detection and counting functions are performed by the counter.

Claims

1. A broadband residual voltage signal automatic gain adjustment and detection circuit for a hydro turbine unit, characterized in that, It includes a PT voltage acquisition circuit, a signal amplification circuit, and a zero-crossing detection circuit connected in sequence. These circuits work together to process and detect the PT residual voltage signal. The signal amplification circuit includes a primary signal amplification circuit and a multi-stage signal amplification circuit connected in sequence. The primary signal amplification circuit and the multi-stage signal amplification circuit achieve inter-stage feedback through a negative feedback adjustment circuit.

2. The automatic gain adjustment and detection circuit for broadband residual voltage signal of a hydro-turbine unit according to claim 1, characterized in that, The output signal of the PT voltage acquisition circuit is preprocessed and then sent to the signal amplification circuit.

3. The automatic gain adjustment and detection circuit for broadband residual voltage signal of a hydro-turbine unit according to claim 1, characterized in that, The PT voltage acquisition circuit includes a voltage transformer U1, a current-limiting resistor R1 connected in series on the primary side of the voltage transformer U1, a sampling resistor R3 connected in series on the secondary side of the voltage transformer U1, and an RC filter circuit composed of a resistor R2 and a capacitor C1 connected in parallel on the secondary side. The sampling signal UAS is led out from between the resistor R2 and the capacitor C1. The primary side of voltage transformer U1 receives the residual voltage signal from the PT, and the secondary side outputs a pre-processed low-voltage signal to the signal amplification circuit to achieve high-voltage isolation, signal step-down, and filtering.

4. The automatic gain adjustment and detection circuit for wideband residual voltage signal of a hydro turbine unit according to claim 1, characterized in that, The structure of the first-stage amplifier circuit in the aforementioned signal amplification circuit is as follows: The first-stage amplifier circuit includes a common-emitter amplifier circuit composed of transistor Q4; the base of transistor Q4 is connected to the power supply circuit through bias resistor R14, and simultaneously receives the signal output from the PT voltage acquisition circuit through coupling capacitor C8; the collector of transistor Q4 is connected in series with load resistor R10 and then through resistor R6 to the collector of transistor Q1 in the multi-stage amplifier circuit; the emitter of transistor Q4 is grounded through resistor R18; resistor R11 provides DC bias to the base of transistor Q4 to set the quiescent operating point of the transistor.

5. The automatic gain adjustment and detection circuit for broadband residual voltage signal of a hydro-turbine unit according to claim 1, characterized in that, The multi-stage amplifier circuit structure in the aforementioned signal amplification circuit is as follows: The multi-stage amplifier circuit includes transistors Q1, Q2, and Q3, forming a cascaded structure of "common collector-common emitter-common emitter", namely the CE-CC-CE cascaded architecture. Transistors Q2 and Q3 are two common-emitter amplifiers that amplify the signal voltage, while transistor Q1 is a common-collector emitter amplifier that amplifies the signal current, forming a three-stage amplifier circuit.

6. The automatic gain adjustment and detection circuit for wideband residual voltage signal of a hydro turbine unit according to claim 5, characterized in that, The common-emitter circuit of transistor Q2 is as follows: Resistors R7 and R12 are connected in series to form a voltage divider, with their ends connected to the positive terminal of the power supply and ground, respectively. The voltage divider provides a bias voltage to transistor Q2 and turns it on. The base of transistor Q2 is connected to the midpoint of resistors R7 and R12. The emitter of transistor Q2 is connected in series with resistor R15 and then grounded through capacitor C9. The collector of transistor Q2 is connected in series with DC bias resistor R8 and then connected to the positive terminal of the power supply. The collector of transistor Q2 is coupled to the base of transistor Q1.

7. The automatic gain adjustment and detection circuit for wideband residual voltage signal of a hydro-turbine unit according to claim 6, characterized in that, The common collector circuit of transistor Q1 is as follows: The base of transistor Q1 is coupled to the collector of transistor Q2, the emitter is grounded through resistor R13, and the collector is connected to the positive terminal of the power supply. The common emitter circuit for transistor Q3 is as follows: The base of transistor Q3 is connected to the output signal of transistor Q1. The emitter is grounded through resistors R16 and R19. The two ends of resistor R17 are connected to the grounded ends of resistors R15 and R16 respectively. The collector is connected to the positive terminal of the power supply. The collector of transistor Q3 outputs the ADC signal to the zero-crossing detection circuit through resistor R9 and capacitor C5. Capacitors C6 and C7 are located between the collector of transistor Q4 and the base of transistor Q2. Capacitor C7 is an input coupling capacitor used to couple the AC signal output from the previous stage to the subsequent amplifier circuit after negative feedback adjustment.

8. The automatic gain adjustment and detection circuit for broadband residual voltage signal of a hydro-turbine unit according to claim 7, characterized in that, The negative feedback regulation circuit structure is as follows: This includes the AC feedback input signal ADJ_IN taken from the collector of transistor Q3. The feedback input signal ADJ_IN is coupled into the feedback circuit through one end of capacitor C10. The other end of capacitor C10 is connected in series with resistor R21 and then split into two paths. One path is connected to the anode of diode D1 and then connected to the base of transistor Q5. The other path is grounded through resistor R22. A diode D2 is connected in parallel across resistor R22, with the cathode of diode D2 connected to the anode of diode D1. The collector of transistor Q5 is connected to the positive terminal of the power supply through resistor R20, and the emitter of transistor Q5 is connected to the collector of transistor Q6. A capacitor C11 is directly connected between the base of transistor Q5 and the emitter of transistor Q6. A resistor R23 is connected in parallel across the two ends of the capacitor C11. One end of the resistor R23 is connected to the cathode of diode D1, and the other end is connected to the anode of diode D2. The base and collector of transistor Q6 are shorted to output the feedback signal ADJ_OUT to the front end of capacitor C7.

9. The automatic gain adjustment and detection circuit for broadband residual voltage signal of a hydro-turbine unit according to claim 7, characterized in that, The zero-crossing detection circuit structure is as follows: The system includes comparator U2, whose non-inverting input is connected to the output signal ADC, whose inverting input is connected to the reference ground, and whose output signal ADC_IN is connected to a programmable logic device (CPLD) for rising edge acquisition.

10. The automatic gain adjustment and detection circuit for broadband residual voltage signal of a hydro-turbine unit according to claim 7, characterized in that, The collector of transistor Q1 is grounded through decoupling capacitor C2, and the collector of transistor Q4 is grounded after being connected to decoupling capacitor C3 through resistor R10. Decoupling capacitors C2 and C3 are used to remove stray signal noise.

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