A server heat dissipation circuit and electronic equipment

Abstract

This application discloses a heat dissipation circuit and electronic device for a server, relating to the technical field of computer hardware. The heat dissipation circuit includes multiple nodes and a heat dissipation controller. The heat dissipation controller controls the signal selectors of the multiple nodes to connect the hardware manager of the target node with the temperature acquisition components in the multiple nodes through an enable signal, based on the status of the multiple nodes. This enables the hardware manager to generate a control signal based on the temperature information collected by the multiple temperature acquisition components. The control signal is used by the heat dissipation controller to adjust the fan components. The target node is a master node in a normal state or a backup node in a normal state when the master node is in an abnormal state. This achieves dual-node heat dissipation collaborative control and fault redundancy, ensuring the reliability of server heat dissipation and improving heat dissipation efficiency.

Description

Technical Field

[0001] This application relates to the technical field of computer hardware, and more particularly to a heat dissipation circuit and electronic device for a server. Background Technology

[0002] With the rapid development of artificial intelligence, cloud computing, and big data technologies, server architecture is evolving from traditional centralized single-node systems to distributed multi-node systems. High-performance computing scenarios place higher demands on the flexibility, scalability, and stability of servers. In multi-node systems, thermal management needs to consider the temperature information of multiple nodes simultaneously and perform unified control; the original single-node fan boards can no longer meet the needs of multi-node collaborative operation.

[0003] In a dual-node server architecture, heat dissipation coordination among multiple nodes cannot be achieved, resulting in low heat dissipation efficiency. Summary of the Invention

[0004] This application provides a heat dissipation circuit and electronic device for a server, in order to at least solve the problem of low heat dissipation efficiency in the related art.

[0005] This application provides a heat dissipation circuit for a server, including:

[0006] The heat dissipation circuit includes multiple nodes and heat dissipation components. The multiple nodes may include a master node and a backup node. The nodes include a hardware manager, a signal selector and a temperature acquisition component. The heat dissipation component includes a heat dissipation controller and a fan component.

[0007] The output of the signal selector is connected to the corresponding temperature acquisition component. The input of the signal selector in the node is connected to the corresponding hardware manager, connected to the hardware manager in another node through multiple connectors, and connected to the heat dissipation controller through multiple connectors. The heat dissipation controller is used to control the signal selectors of multiple nodes to connect the hardware manager of the target node to the temperature acquisition component in the multiple nodes through an enable signal, based on the status of multiple nodes. The target node is the master node in a normal state or a backup node in a normal state when the master node is in an abnormal state.

[0008] The hardware manager is used to generate control signals based on the temperature information corresponding to multiple temperature acquisition components, and send the control signals to the thermal controller.

[0009] The heat dissipation controller is also used to adjust the fan assembly according to control signals.

[0010] This application also provides an electronic device including the above-described heat dissipation circuit.

[0011] This application addresses the problem of insufficient heat dissipation coordination among multiple nodes in a dual-node server architecture. The heat dissipation circuit includes multiple nodes and a heat dissipation controller. Based on the status of the multiple nodes, the heat dissipation controller uses an enable signal to control the signal selector of the multiple nodes to connect the hardware manager of the target node with the temperature acquisition components in the multiple nodes. This enables the hardware manager to generate a control signal based on the temperature information collected by the multiple temperature acquisition components. This control signal is used by the heat dissipation controller to adjust the fan components. The target node is either the master node in a normal state or a backup node in a normal state when the master node is in an abnormal state. This achieves dual-node heat dissipation coordination and fault redundancy, ensuring the reliability of server heat dissipation and improving heat dissipation efficiency. Attached Figure Description

[0012] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0013] Figure 1 A schematic diagram of a heat dissipation circuit structure for a single-node system provided in an embodiment of this application;

[0014] Figure 2 A schematic diagram of a server heat dissipation circuit provided in an embodiment of this application;

[0015] Figure 3 A schematic diagram of the heat dissipation circuit of another server provided in an embodiment of this application;

[0016] Figure 4 A schematic diagram of the heat dissipation circuit of another server provided in an embodiment of this application;

[0017] Figure 5 This is a schematic diagram of a heat dissipation component provided in an embodiment of this application;

[0018] Figure 6 This is a schematic diagram of another heat dissipation component provided in an embodiment of this application;

[0019] Figure 7 A schematic diagram of the structure of the electronic device provided in this application. Detailed Implementation

[0020] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.

[0021] It should be noted that, in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0022] With the rapid development of artificial intelligence, cloud computing, and big data technologies, server architecture is evolving from traditional centralized single-node systems to distributed multi-node systems. High-performance computing scenarios place higher demands on the flexibility, scalability, and stability of servers. In multi-node systems, thermal management needs to consider the temperature information of multiple nodes simultaneously and perform unified control; the fan boards of single-node systems can no longer meet the needs of multi-node collaborative operation.

[0023] Below, in conjunction with Figure 1 An example is given to illustrate the heat dissipation circuit of a single-node system.

[0024] Figure 1 This is a schematic diagram of a heat dissipation circuit structure for a single-node system provided in an embodiment of this application. Please refer to... Figure 1 , Figure 1 It may include a heat dissipation circuit, which includes a motherboard and a fan assembly.

[0025] The motherboard may include a controller and multiple temperature sensors. The controller can read the readings from multiple temperature sensors within the system via a communication bus. Based on the sensor data, the controller can determine whether the temperature of each device is within the normal range, calculate the fan speed requirements of each device, generate adjustment signals, and send these signals to the fan assembly.

[0026] The fan assembly may include a controller and multiple fans. The controller can receive adjustment signals sent by the motherboard and control the speed of each fan according to the adjustment signals.

[0027] In a dual-node server architecture, heat dissipation coordination among multiple nodes cannot be achieved, resulting in low heat dissipation efficiency.

[0028] To address the aforementioned technical problems, this application provides a server heat dissipation circuit. The heat dissipation circuit includes multiple nodes and a heat dissipation controller. Based on the status of the multiple nodes, the heat dissipation controller controls the signal selectors of the multiple nodes to connect the hardware manager of the target node with the temperature acquisition components in the multiple nodes through an enable signal. This enables the hardware manager to generate a control signal based on the temperature information collected by the multiple temperature acquisition components. This control signal is used by the heat dissipation controller to adjust the fan components. The target node is either a master node in a normal state or a backup node in a normal state when the master node is in an abnormal state. This achieves dual-node heat dissipation collaborative control and fault redundancy, ensuring the reliability of server heat dissipation and improving heat dissipation efficiency.

[0029] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0030] Below, we will provide examples of specific application environment architectures or specific hardware architectures that the server's heat dissipation circuitry relies on.

[0031] Figure 2 This is a schematic diagram of a server heat dissipation circuit provided in an embodiment of this application. Please refer to... Figure 2 The heat dissipation circuit includes multiple nodes and heat dissipation components. The multiple nodes may include a master node and a backup node. The nodes include a hardware manager, a signal selector and a temperature acquisition component. The heat dissipation component includes a heat dissipation controller and a fan component.

[0032] The output of the signal selector is connected to the corresponding temperature acquisition component. The input of the signal selector in the node is connected to the corresponding hardware manager, connected to the hardware manager in another node through multiple connectors, and connected to the heat dissipation controller through multiple connectors. The heat dissipation controller is used to control the signal selectors of multiple nodes to connect the hardware manager of the target node to the temperature acquisition component in the multiple nodes through an enable signal, based on the status of multiple nodes. The target node is the master node in a normal state or a backup node in a normal state when the master node is in an abnormal state.

[0033] The hardware manager is used to generate control signals based on the temperature information corresponding to multiple temperature acquisition components, and send the control signals to the thermal controller.

[0034] The heat dissipation controller is also used to adjust the fan assembly according to control signals.

[0035] The master node can be the node that performs heat dissipation control by default in a two-node system.

[0036] A backup node is a node that takes over heat dissipation control when the primary node fails.

[0037] The master node and the backup node form a master-backup architecture to ensure the continuity of control.

[0038] The hardware manager can be a baseboard management controller.

[0039] A signal selector can be a multiplexer.

[0040] Multiplexers can be used to select one signal from multiple input signals and transmit it to the output.

[0041] The input terminals of the signal selector in the node include ports connected to the corresponding hardware manager, ports connected to the hardware manager in another node via multiple connectors, and ports connected to the thermal controller via multiple connectors.

[0042] The ports connected to the thermal controller via multiple connectors are used to input enable signals. These enable signals indicate whether the port is connected to the corresponding hardware manager or to the hardware manager in another node.

[0043] The heat dissipation controller determines the enable signals corresponding to each of the multiple nodes based on their states, and controls the signal selectors of the multiple nodes to connect the hardware manager of the target node with the temperature acquisition components in the multiple nodes based on the enable signals.

[0044] For example, assuming the target node is the master node in a normal state, the thermal controller controls the signal selectors of multiple nodes through an enable signal, so that the signal selector of the master node connects the hardware manager of the master node to the temperature acquisition component of the master node, and the signal selector of the backup node connects the hardware manager of the master node to the temperature acquisition component of the backup node.

[0045] For example, suppose the target node is a backup node that is in a normal state when the primary node is in an abnormal state. The thermal controller controls the signal selectors of multiple nodes through an enable signal, so that the signal selector of the primary node connects the hardware manager of the backup node to the temperature acquisition component of the primary node, and the signal selector of the backup node connects the hardware manager of the backup node to the temperature acquisition component of the backup node.

[0046] The temperature acquisition component can collect temperature information from the node it is located in. The hardware manager obtains temperature information from multiple nodes and generates control signals based on the temperature information from multiple nodes.

[0047] In this way, by forming primary and backup redundant control through signal interaction and heat dissipation execution of fan components, the reliability defects of single-node control are solved, ensuring efficient and continuous heat dissipation.

[0048] In one possible implementation, the master node includes a first hardware manager, a first signal selector, and a first temperature acquisition component, and the backup node includes a second hardware manager, a second signal selector, and a second temperature acquisition component. The output of the first signal selector is connected to the first temperature acquisition component, and the input of the first signal selector is connected to the first hardware manager, to the second hardware manager via multiple connectors, and to a thermal controller via multiple connectors. The output of the second signal selector is connected to the second temperature acquisition component, and the input of the second signal selector is connected to the second hardware manager, to the first hardware manager via multiple connectors, and to a thermal controller via multiple connectors.

[0049] The thermal controller is used to, when the master node is in a normal state, control a first signal selector to connect a first hardware manager and a first temperature acquisition component, and a second signal selector to connect a first hardware manager and a second temperature acquisition component, or, when the master node is in an abnormal state and the backup node is in a normal state, control a first signal selector to connect a second hardware manager and a first temperature acquisition component, and a second signal selector to connect a second hardware manager and a second temperature acquisition component, and a second signal selector to connect a second hardware manager and a second temperature acquisition component, through an enable signal.

[0050] The first hardware manager, the second hardware manager, and the heat dissipation controller are each connected to the first signal selector via independent signal lines.

[0051] The output of the first signal selector is connected to the first temperature acquisition component.

[0052] The first hardware manager, the second hardware manager, and the heat dissipation controller are each connected to the second signal selector via independent signal lines.

[0053] The output of the second signal selector is connected to the second temperature acquisition component.

[0054] The control signal may include a first control signal and a second control signal.

[0055] When the master node is in a normal state, the thermal controller can connect the first hardware manager and the first temperature acquisition component through the first signal selector, and connect the first hardware manager and the second temperature acquisition component through the second signal selector to acquire the temperature information of the first temperature acquisition component, and at the same time acquire the temperature information of the second temperature acquisition component on the backup node side across nodes.

[0056] The first hardware manager can generate the first control signal based on global temperature information.

[0057] The first temperature acquisition component can be distributed in the core heat-generating area corresponding to the master node to collect local temperature data in real time.

[0058] When the master node is normal, the second hardware manager is in standby mode. When the master node is abnormal, the heat dissipation controller can connect the second hardware manager and the first temperature acquisition component through the first signal selector, and connect the second hardware manager and the second temperature acquisition component through the second signal selector to acquire the temperature information of the second temperature acquisition component. At the same time, it can acquire the temperature information of the first temperature acquisition component on the master node side across nodes and generate a second control signal based on the global temperature information.

[0059] The first hardware manager is also used to monitor the master node and obtain the first monitoring result, which includes monitoring normal and monitoring abnormal.

[0060] The second hardware manager is used to monitor and process the backup node, and obtain a second monitoring result, which includes monitoring normal and monitoring abnormal.

[0061] The heat dissipation component can be the execution component corresponding to heat dissipation.

[0062] The thermal controller can be used to determine the status of the primary node and the backup node based on the first monitoring result and the second monitoring result.

[0063] The heat dissipation controller can also be used to adjust the operating parameters of the fan assembly based on a first control signal or a second control signal.

[0064] The fan assembly can be a heat dissipation actuator, adjusting its operating state according to the instructions of the heat dissipation controller to achieve equipment cooling.

[0065] In one possible implementation, the thermal controller is specifically configured to send an enable signal to a first signal selector when the master node is in a normal state, so that the first signal selector connects the first hardware manager and the first temperature acquisition component, and send an enable signal to a second signal selector, so that the second signal selector connects the first hardware manager and the second temperature acquisition component.

[0066] When the master node is in normal state, the heat dissipation controller can send an enable signal to the first signal selector and an enable signal to the second signal selector. The signal from the first temperature acquisition component is transmitted to the first hardware manager through the first signal selector, and the signal from the second temperature acquisition component is acquired by the first hardware manager through the cross-path of the first signal selector, so as to realize the unified acquisition of global temperature by the master node.

[0067] In one possible implementation, the heat dissipation controller is specifically configured to send an enable-disable signal to the first signal selector when the state of the master node is abnormal and the state of the backup node is normal, so that the first signal selector connects the second hardware manager and the first temperature acquisition component, and send an enable-on signal to the second signal selector so that the second signal selector connects the second hardware manager and the second temperature acquisition component.

[0068] When the master node is in an abnormal state, the heat dissipation controller can detect the abnormality of the master node, send an enable-off signal to the first signal selector, and send an enable-on signal to the second signal selector at the same time. The signal of the second temperature acquisition component is transmitted to the second hardware manager through the second signal selector, and the signal of the first temperature acquisition component is acquired by the second hardware manager through the cross-path of the second signal selector, so as to realize the standby node to take over the acquisition of global temperature.

[0069] The enable signal can be used to control the signal selector to open its first preset path and close its second preset path.

[0070] The enable / disable signal can be used to control the signal selector to turn on its internal second preset path and turn off the first preset path.

[0071] In this way, precise control of the temperature acquisition path is achieved through the signal selector, and the enable signal switching of the heat dissipation controller ensures reliable acquisition of temperature data from the primary and backup nodes and orderly switching of control authority.

[0072] In one possible implementation, the master node further includes a first logic controller, which is communicatively connected to a first hardware manager and a thermal controller; the backup node further includes a second logic controller, which is communicatively connected to a second hardware manager and a thermal controller.

[0073] The first logic controller is used to monitor and process the first hardware manager, obtain a first monitoring result, and send a first monitoring signal to the heat dissipation controller when the first monitoring result is a monitoring abnormality.

[0074] The second logic controller is used to monitor and process the second hardware manager, obtain the second monitoring result, and send the second monitoring signal to the heat dissipation controller when the second monitoring result is a monitoring abnormality.

[0075] The thermal controller is used to determine the status of the master node and the standby node based on the first monitoring signal or the second monitoring signal, and to determine the corresponding enable signals for the master node and the standby node based on the status of the master node and the standby node. The enable signals include enable on signal and enable off signal.

[0076] The heat dissipation controller is also used to generate a preset adjustment signal based on the first monitoring signal and the second monitoring signal, and to determine the preset adjustment signal as a control signal. The preset adjustment signal is used to adjust the fan assembly according to the first preset rule when both the master node and the standby node are in an abnormal state.

[0077] The preset adjustment signal can be a pre-set adjustment strategy for the fan assembly by the heat dissipation controller.

[0078] The first logic controller and the second logic controller can be complex programmable logic devices.

[0079] The first logic controller can monitor the running status of the first hardware manager in the master node in real time and transmit the working status signal of the first hardware manager to the heat dissipation controller, providing the heat dissipation controller with hardware monitoring basis.

[0080] The second logic controller can monitor the operating status of the second hardware manager in the backup node in real time and transmit the working status signal of the second hardware manager to the heat dissipation controller, providing the heat dissipation controller with hardware monitoring basis.

[0081] The first monitoring signal can be used to indicate that the first logic controller is in an abnormal state.

[0082] The second monitoring signal can be used to indicate that the second logic controller is in an abnormal state.

[0083] The heat dissipation controller can receive a first monitoring signal sent by a first logic controller, a second monitoring signal sent by a second logic controller, and also the first monitoring signal sent by the first logic controller and the second monitoring signal sent by the second logic controller.

[0084] When the heat dissipation controller only receives the first monitoring signal sent by the first logic controller, it can indicate that the master node is in an abnormal state and the backup node is in a normal state. The heat dissipation controller can send an enable-off signal to the master node and an enable-on signal to the backup node.

[0085] When the thermal controller only receives the second monitoring signal sent by the second logic controller, it can indicate that the backup node is in an abnormal state and the master node is in a normal state. The thermal controller can send an enable signal to the master node and an enable signal to the backup node.

[0086] When the first monitoring signal sent by the first logic controller and the second monitoring signal sent by the second logic controller are received, it can be indicated that both the master node and the backup node are in an abnormal state. Then, the heat dissipation controller can generate a preset adjustment signal according to the first preset rule to adjust the fan assembly.

[0087] The first preset rule can be either adjusting the fan speed to 80% of the maximum speed or adjusting the fan speed to the maximum speed; there is no limitation here.

[0088] In this way, by adding logic controllers to the primary and backup nodes, a two-layer fault detection mechanism is constructed, which enables the hardware manager to monitor autonomously and the thermal controller to make global decisions, thereby further improving the fault response speed and fault tolerance of the dual-node thermal system.

[0089] In one possible implementation, the master node further includes a first connector, the backup node further includes a second connector, and the thermal controller includes a third connector and a fourth connector.

[0090] The first logic controller, the first hardware manager, and the first signal selector are respectively connected to the first connector, the first connector is connected to the third connector, the third connector is connected to the fourth connector, and the second logic controller, the second hardware manager, and the second signal selector are respectively connected to the fourth connector.

[0091] The first connector can be located inside the master node, serving as the signal aggregation interface for the master node.

[0092] The input terminals of the first connector are connected to the first logic controller, the first hardware manager, and the first signal selector, respectively, and the output terminal of the first connector is connected to the input terminal of the third connector.

[0093] Signals within the master node can be transmitted to the heat dissipation components via the first and third connectors.

[0094] The second connector can be located within the backup node, serving as the signal aggregation interface for the backup node.

[0095] The input terminals of the second connector are connected to the second logic controller, the second hardware manager, and the second signal selector, respectively, and the output terminal of the second connector is connected to the input terminal of the fourth connector.

[0096] The third and fourth connectors can be located inside the thermal controller, serving as signal relay interfaces.

[0097] The input of the third connector can be connected to the first connector via a cable to receive the summary signal from the master node.

[0098] The fourth connector can be directly connected to the third connector via the internal wiring of the heat dissipation controller.

[0099] The input of the fourth connector can be connected to the second connector via a cable to receive the summary signal from the backup node.

[0100] In this way, by setting up a dedicated connector, the signal transmission between the master node, the backup node and the thermal controller is centralized, and a modular and highly reliable signal interaction path is built to ensure the stable transmission of control signals, monitoring signals and temperature data.

[0101] In one possible implementation, when the first signal selector receives an enable / disable signal from the thermal controller, the second hardware manager communicates with the first temperature acquisition component through the second connector, the fourth connector, the third connector, the first connector, and the first signal selector.

[0102] When the second signal selector receives an enable / disable signal from the thermal controller, the first hardware manager connects to the second temperature acquisition component via the first connector, the third connector, the fourth connector, the second connector, and the second signal selector.

[0103] Specifically, when the first signal selector receives an enable / disable signal from the heat dissipation controller, it cuts off the path connected to the first hardware manager and opens the path related to transmission with the second hardware manager.

[0104] In this way, when the master node malfunctions, the second hardware manager that takes over control can obtain the temperature information of the master node and generate a second control signal based on the global temperature data, ensuring the accuracy of the heat dissipation strategy.

[0105] When the second signal selector receives an enable / disable signal from the thermal controller, it disconnects the path connected to the second hardware manager and connects the path related to the transmission to the first hardware manager.

[0106] In this way, when the master node is working normally, the first hardware manager can obtain the temperature information of the backup node, generate the first control signal based on the global temperature data, and realize the collaborative heat dissipation regulation of the two nodes.

[0107] In one possible implementation, when the first monitoring result is a monitoring anomaly, the first logic controller sends a first monitoring signal to the thermal controller through the first connector and the third connector.

[0108] When the second monitoring result indicates an anomaly, the second logic controller sends a second monitoring signal to the thermal controller via the second connector and the fourth connector.

[0109] In one possible implementation, the thermal controller further includes a third logic controller, a first repeater, and a second repeater, wherein the first repeater is connected to a third connector and the third logic controller, respectively, and the second repeater is connected to a fourth connector and the third logic controller, respectively.

[0110] The first repeater can be used to enhance the driving capability of the link between the master node and the third logic controller.

[0111] The second repeater can be used to enhance the driving capability of the link between the backup node and the third logic controller.

[0112] In practical applications, since the master node and backup node are usually located on the front window of the chassis, and the heat dissipation components are usually located on the rear window of the chassis, a repeater is added in the middle of the link between the node and the heat dissipation components to improve the driving capability of the link and ensure signal quality.

[0113] In one possible implementation, the first hardware manager is specifically used to generate control signals based on the temperature information corresponding to the first temperature acquisition component and the second temperature acquisition component, and send the control signals to the third logic controller through the first connector, the third connector, and the first repeater.

[0114] The second hardware manager is specifically used to generate control signals based on the temperature information corresponding to the first temperature acquisition component and the second temperature acquisition component, and send the control signals to the third logic controller through the second connector, the fourth connector, and the second repeater.

[0115] In this way, the first hardware manager and the second hardware manager, as the core decision-making units of the dual nodes, generate control signals based on global temperature information and transmit them to the third logic controller through preset connectors and repeater paths, providing precise instructions for the fan adjustment of the heat dissipation components.

[0116] In one possible implementation, the heat dissipation controller further includes a first arbitration chip, a first memory, and a first temperature sensor. The input terminal of the first arbitration chip is connected to a first repeater and a second repeater, respectively. The output terminal of the first arbitration chip is connected to a third logic controller, the first memory, and the first temperature sensor, respectively. The first memory is used to store component information of the heat dissipation component, and the first temperature sensor is used to monitor the temperature of the heat dissipation component.

[0117] The first arbitration chip is used to arbitrate preset operations initiated by the first hardware manager and the second hardware manager. The preset operations include upgrading the third logic controller, accessing the first memory, and obtaining temperature information from the first temperature sensor. The arbitration process is used to allow the target hardware manager to execute the preset operation through a second preset rule when the first hardware manager and the second hardware manager initiate preset operations simultaneously. The target hardware manager is either the first hardware manager or the second hardware manager.

[0118] The first arbitration chip can be used to schedule resource access for the thermal controller.

[0119] The first memory can be a non-volatile memory cell. The first memory can be used to store inherent information of the heat dissipation component.

[0120] The first temperature sensor can be a temperature monitoring element of the heat dissipation assembly. It can be used to acquire real-time temperature data from the heat dissipation controller and fan assembly within the heat dissipation assembly.

[0121] Preset operations may include upgrading the third logic controller, accessing the first memory, and obtaining temperature data of the heat dissipation components, etc.

[0122] Arbitration processing allows the first arbitration chip to determine priority based on the second preset rule when the first hardware manager and the second hardware manager simultaneously initiate any of the aforementioned preset operations, allowing only the target hardware manager to execute the operation, thus avoiding resource conflicts caused by concurrent access from two nodes.

[0123] For example, the second preset rule can be configured to prioritize the primary node when it is functioning normally, and prioritize the backup node when the primary node is abnormal.

[0124] In this way, by adding a first arbitration chip, a first memory and a first temperature sensor to the heat dissipation controller, the access conflict between the two nodes to the core resources of the heat dissipation component can be resolved through the arbitration mechanism, while the monitoring and management of the heat dissipation component's own status can be realized.

[0125] Below, in conjunction with Figure 3 The following example illustrates the heat dissipation circuitry of a server.

[0126] Figure 3 This is a schematic diagram of another server heat dissipation circuit provided in an embodiment of this application. Please refer to... Figure 3 The heat dissipation circuit includes a main node, a backup node, and heat dissipation components.

[0127] The master node may include a first logic controller 301 ( Figure 3 (represented by CPLD301), First Hardware Manager 302 ( Figure 3 (represented by BMC302), first signal selector 303 ( Figure 3 (represented by MUX303), first temperature acquisition component 304 and first connector 305.

[0128] The backup node may include a second logic controller 306 ( Figure 3 (represented by CPLD306 in Chinese), Second Hardware Manager 307 ( Figure 3 (represented by BMC307), second signal selector 308 ( Figure 3 (represented by MUX308), second temperature acquisition component 309, and second connector 310.

[0129] The heat dissipation assembly may include a third connector 311, a fourth connector 312, a first repeater 313, a first arbitration chip 314, a second repeater 315, and a third logic controller 316. Figure 3 (represented by CPLD316), first memory 317 ( Figure 3 (represented by FRU317), first temperature sensor 318 ( Figure 3 (referred to as SENSOR318) and fan assembly 319.

[0130] The first logic controller can send a first monitoring signal to the third logic controller 316 through the first connector 305 and the third connector 311. Figure 3 (represented by BMC_Node0 in Chinese).

[0131] The second logic controller can send a second monitoring signal to the third logic controller 316 via the second connector 310 and the fourth connector 312. Figure 3 (represented by BMC_Node1 in Chinese).

[0132] The first hardware manager 302 can send a first control signal to the third logic controller 316 through the first connector 305, the third connector 311, and the first repeater 313. Figure 3 (represented as I2C10 in Chinese).

[0133] The second hardware manager 307 can send a second control signal to the third logic controller 316 via the second connector 310, the fourth connector 312, and the second repeater 315. Figure 3 (represented as I2C11 in Chinese).

[0134] The third logic controller 316 can send an enable signal to the first signal selector 303 through the third connector 311 and the first connector 305. Figure 3 (represented by EN_Node0 in Chinese).

[0135] The third logic controller 316 can send an enable signal to the second signal selector 308 through the fourth connector 312 and the second connector 310. Figure 3 (represented by EN_Node1 in Chinese).

[0136] Specifically, when the master node is in a normal state, the enable signal sent to the first signal selector 303 is an enable-on signal, and the enable signal sent to the second signal selector 308 is an enable-disable signal. When the master node is in an abnormal state and the backup node is in a normal state, the enable signal sent to the first signal selector 303 is an enable-disable signal, and the enable signal sent to the second signal selector 308 is an enable-on signal.

[0137] When the master node is in normal condition, the first hardware manager 302 can acquire the second temperature information of the second temperature acquisition component 309 through the first connector 305, the third connector 311, the fourth connector 312, the second connector 310, and the second signal selector 308. Figure 3 (represented by I2C_Node0), and simultaneously the first temperature information of the first temperature acquisition component 304 can be acquired through the first signal selector 303. Figure 3 (represented as I2C30 in Chinese).

[0138] Among them, the first signal selector 303 can selectively turn on the I2C 30 link corresponding to the first hardware manager 302 and the first signal selector 303, and turn off the link corresponding to the second hardware manager 307 and the first signal selector 303. Figure 3 (Represented as I2C_Node1 in the text); the second signal selector 308 can choose to turn on the link I2C_Node0 corresponding to the first hardware manager 302 and the second signal selector 308, and turn off the link corresponding to the second hardware manager 307 and the second signal selector 308. Figure 3 (represented as I2C31 in Chinese).

[0139] When the master node is in an abnormal state and the backup node is in a normal state, the second hardware manager 307 can acquire the first temperature information of the first temperature acquisition component 304 through the second connector 310, the fourth connector 312, the third connector 311, the first connector 305, and the first signal selector 303. Figure 3 (represented by I2C_Node1), and simultaneously, the second temperature information of the second temperature acquisition component 309 is acquired through the second signal selector 308. Figure 3 (represented as I2C31 in Chinese).

[0140] Specifically, the first signal selector 303 can choose to turn on the link I2C_Node1 corresponding to the second hardware manager 307 and turn off the link I2C30 corresponding to the first hardware manager 302 and the first signal selector 303; the second signal selector 308 can choose to turn on the link I2C31 corresponding to the second hardware manager 307 and the second signal selector 308 and turn off the link I2C_Node0 corresponding to the first hardware manager 302 and the second signal selector 308.

[0141] The first hardware manager 302 can send a preset signal corresponding to a preset operation to the first arbitration chip 314 through the first connector 305, the third connector 311, and the first repeater 313. If the first arbitration chip 314 is in an idle state, it can connect the link between the first hardware manager 302 and the third logic controller 316, close the link between the second hardware manager 307 and the third logic controller 316, and switch the first arbitration chip 314 from an idle state to an operating state according to the preset signal. If the first arbitration chip 314 is in an operating state, it will not receive the preset signal because the link between the first hardware manager 302 and the third logic controller 316 is closed.

[0142] The second hardware manager 307 can send a preset signal corresponding to a preset operation to the first arbitration chip 314 through the second connector 310, the fourth connector 312, and the second repeater 315. If the first arbitration chip 314 is in an idle state, it can close the link between the first hardware manager 302 and the third logic controller 316 according to the preset signal, connect the link between the second hardware manager 307 and the third logic controller 316, and switch the first arbitration chip 314 from an idle state to an operating state. If the first arbitration chip 314 is in an operating state, it will not receive the preset signal because the link between the second hardware manager 307 and the third logic controller 316 is closed.

[0143] If the first hardware manager 302 and the second hardware manager 307 simultaneously send a preset signal corresponding to the preset operation to the first arbitration chip 314, the first arbitration chip 314 can allow the target hardware manager to perform the preset operation through the second preset rule. The target hardware manager is either the first hardware manager or the second hardware manager.

[0144] Figure 4 This is a schematic diagram of the heat dissipation circuit of another server provided in an embodiment of this application. Figure 2 Based on this, the heat dissipation controller includes a first repeater, a second repeater, a third signal selector, a fourth signal selector, a fourth logic controller, and a fifth logic controller.

[0145] The first repeater is connected to the third connector and the third signal selector respectively, and the second repeater is connected to the fourth connector and the fourth signal selector respectively;

[0146] The third signal selector is connected to the fourth logic controller and the fifth logic controller respectively; the fourth signal selector is connected to the fourth logic controller and the fifth logic controller respectively.

[0147] The fourth and fifth logic controllers can be complex programmable logic devices.

[0148] The fourth and fifth logic controllers are similar to the third logic controller, and will not be described in detail here.

[0149] The fourth and fifth logic controllers can independently control their respective fan assemblies.

[0150] The input of the third signal selector can be connected to the first repeater, and the output of the third signal selector can be connected to the fourth logic controller and the fifth logic controller respectively, and send signals to the fourth logic controller and the fifth logic controller respectively.

[0151] The input of the fourth signal selector can be connected to the second repeater, and the output of the fourth signal selector can be connected to the fourth logic controller and the fifth logic controller respectively, and send signals to the fourth logic controller and the fifth logic controller respectively.

[0152] In one possible implementation, the first hardware manager is specifically used to generate control signals based on the temperature information corresponding to the first temperature acquisition component and the second temperature acquisition component, and send the control signals to the fourth logic controller and the fifth logic controller through the first connector, the third connector, the first repeater, and the third signal selector, respectively.

[0153] The second hardware manager is specifically used to generate control signals based on the temperature information corresponding to the first temperature acquisition component and the second temperature acquisition component, and send the control signals to the fourth logic controller and the fifth logic controller through the second connector, the fourth connector, the second repeater, and the fourth signal selector, respectively.

[0154] In this way, the first hardware manager and the second hardware manager, as the core control unit of the dual nodes, generate control signals based on global temperature information and transmit them to the execution unit of the heat dissipation controller through multi-level signal paths to ensure the accurate delivery of fan component adjustment commands.

[0155] In one possible implementation, the heat dissipation controller further includes a second arbitration chip, a fifth signal selector, a second memory, a second temperature sensor, a third memory, and a third temperature sensor. The input terminals of the second arbitration chip are respectively connected to the first repeater and the second repeater, and the output terminals of the second arbitration chip are respectively connected to the fifth signal selector. The fifth signal selector is respectively connected to the fourth logic controller and the fifth logic controller, respectively connected to the second memory and the third memory, and respectively connected to the second temperature sensor and the third temperature sensor. The second memory is used to store heat dissipation component information corresponding to the fourth logic controller and the fifth logic controller. The second temperature sensor is used to monitor the temperature of the heat dissipation component corresponding to the fourth logic controller, and the third temperature sensor is used to monitor the temperature of the heat dissipation component corresponding to the fifth logic controller.

[0156] The input of the fifth signal selector can be connected to the second arbitration chip, and the output of the fifth signal selector can be connected to the fourth logic controller and the fifth logic controller respectively, so that the signal of the second terminal chip can be sent to the fourth logic controller and the fifth logic controller simultaneously through the fifth signal selector.

[0157] In one possible implementation, the second arbitration chip is used to arbitrate preset operations initiated by the first hardware manager and the second hardware manager. The preset operations include upgrading the fourth logic controller and the fifth logic controller, accessing the second memory and the third memory, and obtaining temperature information corresponding to the second temperature sensor and the third temperature sensor, respectively. The arbitration process is used to allow the target hardware manager to execute the preset operation through a second preset rule when the first hardware manager and the second hardware manager initiate the preset operation at the same time. The target hardware manager is either the first hardware manager or the second hardware manager.

[0158] The second arbitration chip is similar to the first arbitration chip, so it will not be described in detail here.

[0159] In one possible implementation, the first logic controller is specifically used to send a first monitoring signal to the fourth logic controller and the fifth logic controller respectively when the first monitoring result is a monitoring anomaly.

[0160] The second logic controller is specifically used to send a second monitoring signal to the fourth logic controller and the fifth logic controller respectively when the second monitoring result is a monitoring anomaly.

[0161] The process of sending the first monitoring signal or the second monitoring signal to the fourth logic controller and the fifth logic controller is similar to the process of sending the first monitoring signal or the second monitoring signal to the third logic controller, and is not limited here.

[0162] In one possible implementation, the thermal controller is specifically configured to send an adjustment signal to the fan assembly according to a first control signal or a second control signal;

[0163] The thermal controller is also used to receive response signals corresponding to adjustment signals, including the current speed information of the fan assembly.

[0164] The thermal controller is also used to send response signals back to the hardware manager corresponding to the control signals.

[0165] Below, in conjunction with Figure 5 An example of a heat dissipation component will be given.

[0166] Figure 5 This is a schematic diagram of a heat dissipation component provided in an embodiment of this application. Please refer to [link / reference]. Figure 5The heat dissipation assembly may include a third connector 501, a fourth connector 502, a first repeater 503, a second repeater 504, a third signal selector 505, a fourth signal selector 506, a fourth logic controller 507, a fifth logic controller 508, a fifth connector 509, a sixth connector 510, a seventh connector 511, an eighth connector 512, a first fan assembly 513, a second fan assembly 514, a second arbitration chip 515, and a fifth signal selector 516.

[0167] The first repeater 503 is connected to the third connector 501 and the third signal selector 505 respectively, and the second repeater 504 is connected to the fourth connector 502 and the fourth signal selector 506 respectively.

[0168] The third signal selector 505 can be connected to the fourth logic controller 507 via the fifth connector 509 and the seventh connector 511.

[0169] The third signal selector 505 can also be connected to the fifth logic controller 508 via the sixth connector 510 and the eighth connector 512.

[0170] The fourth signal selector 506 can be connected to the fourth logic controller 507 via the fifth connector 509 and the seventh connector 511.

[0171] The fourth signal selector 506 can also be connected to the fifth logic controller 508 via the sixth connector 510 and the eighth connector 512.

[0172] The fourth logic controller 507 can be connected to the first fan assembly 513, and the fifth logic controller 508 can be connected to the second fan assembly 514.

[0173] The first repeater 503 can also be connected to the second arbitration chip 515, and the second repeater 504 can also be connected to the second arbitration chip 515.

[0174] The second arbitration chip 515 can be connected to the fifth signal selector 516. The fifth signal selector 516 can be connected to the fourth logic controller 507 through the fifth connector 509 and the seventh connector 511, and can also be connected to the fifth logic controller 508 through the sixth connector 510 and the eighth connector 512.

[0175] The heat dissipation components also include a second memory 517 ( Figure 5 The second temperature sensor is designated as "FRU517" and the third temperature sensor is designated as "FRU518". Figure 5 (represented by "SENSOR518"), third memory 519 ( Figure 5 (represented as "FRU519") and the third temperature sensor 520 ( Figure 5(represented as "SENSOR520" in Chinese).

[0176] The fifth signal selector 516 can be connected to the second memory 517 via the fifth connector 509 and the seventh connector 511, and can also be connected to the second temperature sensor 518 via the fifth connector 509 and the seventh connector 511.

[0177] The fifth signal selector 516 can be connected to the third memory 519 via the sixth connector 510 and the eighth connector 512, and can also be connected to the third temperature sensor 520 via the sixth connector 510 and the eighth connector 512.

[0178] in, Figure 5 The various components mentioned above can be referred to for their descriptions, and are not limited here.

[0179] In one possible implementation, the thermal controller includes a first AND gate and a NOT gate.

[0180] Below, in conjunction with Figure 6 The first AND gate and NOT gate are explained.

[0181] Figure 6 This is a schematic diagram of another heat dissipation component provided in an embodiment of this application. Please refer to... Figure 6 , Figure 6 It includes the fourth and fifth logic controllers, AND gates, and NOT gates.

[0182] The inputs of the AND gate are connected to the fourth logic controller and the fifth logic controller, respectively. The output of the AND gate is connected to the input of the first signal selector and the NOT gate. The output of the NOT gate is connected to the second signal selector.

[0183] The fourth logic controller is used to generate a first enable signal based on the first monitoring signal or the second monitoring signal, and send the first enable signal to the input of the AND gate. The first enable signal is used to control the first signal selector.

[0184] The fifth logic controller is used to generate a second enable signal based on the first monitoring signal or the second monitoring signal, and send the second enable signal to the input of the AND gate. The second enable signal is used to instruct the first signal selector.

[0185] Specifically, if the master node is abnormal, the fourth or fifth logic controller can generate a first enable signal as an enable-disable signal based on the first monitoring signal; if the master node is normal and the backup node is abnormal, the fourth or fifth logic controller can generate a first enable signal as an enable-on signal based on the second monitoring signal.

[0186] When both the first enable signal and the second enable signal are enable signals, the output of the AND gate sends an enable signal to the first signal selector; otherwise, it sends an enable deactivation signal to the first signal selector.

[0187] The enable signal corresponding to the second signal selector is the opposite of the enable signal corresponding to the first signal selector.

[0188] If an enable-off signal is sent to the first signal selector, an enable-on signal is sent to the second signal selector; if an enable-on signal is sent to the first signal selector, an enable-off signal is sent to the second signal selector.

[0189] In one possible implementation, the heat dissipation controller includes a second AND gate and a third AND gate. The inputs of the second AND gate are respectively connected to a fourth logic controller and a fifth logic controller, and the output of the second AND gate is connected to a first signal selector. The inputs of the third AND gate are respectively connected to the fourth logic controller and the fifth logic controller, and the output of the third AND gate is connected to a second signal selector.

[0190] The fourth logic controller is used to generate a third enable signal and a fourth enable signal based on the first monitoring signal or the second monitoring signal, and send the third enable signal to the input of the second AND gate and the fourth enable signal to the input of the third AND gate. The third enable signal is used to control the first signal selector and the fourth enable signal is used to control the second signal selector.

[0191] The fifth logic controller is used to generate a fifth enable signal and a sixth enable signal based on the first monitoring signal or the second monitoring signal, and send the fifth enable signal to the input of the second AND gate and the sixth enable signal to the input of the third AND gate. The fifth enable signal is used to indicate the first signal selector and the sixth enable signal is used to indicate the second signal selector.

[0192] The second AND gate is used to determine the seventh enable signal based on the third enable signal and the fifth enable signal, and send the seventh enable signal to the first signal selector;

[0193] The third AND gate is used to determine the eighth enable signal based on the fourth enable signal and the sixth enable signal, and then send the eighth enable signal to the second signal selector.

[0194] For example, assuming the primary node is abnormal and the backup node is normal, the fourth logic controller generates a third enable signal as an enable-off signal and a fourth enable signal as an enable-on signal based on the first monitoring signal. The fifth logic controller generates a fifth enable signal as an enable-off signal and a sixth enable signal as an enable-on signal based on the first monitoring signal.

[0195] In this way, by adding a second AND gate and a third AND gate to the heat dissipation controller, and combining the enable signal generation functions of the fourth and fifth logic controllers, an enable signal control mechanism with dual logic verification and AND gate arbitration is constructed to ensure that the control commands for the first and second signal selectors have high reliability and fault tolerance.

[0196] Figure 7 A schematic diagram of the structure of the electronic device provided in this application. Figure 7 As shown, the electronic device 70 provided in this embodiment includes a server heat dissipation circuit.

[0197] In the above embodiments, it should be understood that the processor can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), etc. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the method disclosed in the application can be directly manifested as being executed by a hardware processor, or executed by a combination of hardware and software modules within the processor.

[0198] The memory may include random access memory (RAM) and may also include non-volatile memory (NVM), such as at least one disk storage device.

[0199] The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. Buses can be categorized as address buses, data buses, control buses, etc. For ease of illustration, the buses shown in the accompanying drawings are not limited to a single bus or a single type of bus.

[0200] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0201] The above provides a detailed description of a fault prediction method provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are merely for the purpose of helping to understand the method and its core ideas. It should be noted that those skilled in the art can make various improvements and modifications to this application without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of this application.

Claims

1. A heat dissipation circuit of a server, characterized by, The heat dissipation circuit comprises a plurality of nodes and a heat dissipation component, the plurality of nodes comprise a main node and a backup node, the nodes comprise a hardware manager, a signal selector and a temperature acquisition component, and the heat dissipation component comprises a heat dissipation controller and a fan component; The output end of the signal selector is connected with the corresponding temperature acquisition component, the input end of the signal selector in the node is respectively connected with the corresponding hardware manager, connected with the hardware manager in another node through a plurality of connectors, and connected with the heat dissipation controller through a plurality of connectors; the heat dissipation controller is configured to: According to the state of the main node and the backup node, an enable signal is generated and sent to the signal selector of the main node and the backup node; the enable signal is used to control the signal selector of the main node and the backup node, so that all the temperature acquisition components in the plurality of nodes are in communication with a target hardware manager, which is the hardware manager of the main node in a normal state, or the hardware manager of the backup node in a normal state when the main node is in an abnormal state; The hardware manager is configured to generate a control signal according to the temperature information corresponding to the plurality of temperature acquisition components respectively, and send the control signal to the heat dissipation controller; The heat dissipation controller is further configured to adjust the fan component according to the control signal.

2. The heat dissipation circuit according to claim 1, wherein The main node comprises a first hardware manager, a first signal selector and a first temperature acquisition component, the backup node comprises a second hardware manager, a second signal selector and a second temperature acquisition component, the output end of the first signal selector is connected with the first temperature acquisition component, the input end of the first signal selector is respectively connected with the first hardware manager, connected with the second hardware manager through the plurality of connectors, and connected with the heat dissipation controller through the plurality of connectors, the output end of the second signal selector is connected with the second temperature acquisition component, and the input end of the second signal selector is respectively connected with the second hardware manager, connected with the first hardware manager through the plurality of connectors, and connected with the heat dissipation controller through the plurality of connectors; The heat dissipation controller is configured to, when the state of the main node is in a normal state, control the first signal selector to communicate the first hardware manager and the first temperature acquisition component, and the second signal selector to communicate the first hardware manager and the second temperature acquisition component through an enable signal, or, when the state of the main node is in an abnormal state and the state of the backup node is in a normal state, control the first signal selector to communicate the second hardware manager and the first temperature acquisition component, and the second signal selector to communicate the second hardware manager and the second temperature acquisition component through an enable signal.

3. The heat dissipation circuit according to claim 2, wherein The heat dissipation controller is specifically configured to send an enable-on signal to the first signal selector to make the first signal selector connect the first hardware manager and the first temperature acquisition component, and send an enable-off signal to the second signal selector to make the second signal selector connect the first hardware manager and the second temperature acquisition component, when the state of the master node is a normal state. The heat dissipation controller is specifically configured to send an enable-off signal to the first signal selector to make the first signal selector connect the second hardware manager and the first temperature acquisition component, and send an enable-on signal to the second signal selector to make the second signal selector connect the second hardware manager and the second temperature acquisition component, when the state of the master node is an abnormal state and the state of the backup node is a normal state.

4. The heat dissipating circuit according to claim 2 or 3, characterized in that, The master node further comprises a first logic controller, which is in communication connection with the first hardware manager and the heat dissipation controller respectively; the backup node further comprises a second logic controller, which is in communication connection with the second hardware manager and the heat dissipation controller respectively; The first logic controller is configured to monitor the first hardware manager to obtain a first monitoring result, and send a first monitoring signal to the heat dissipation controller when the first monitoring result is abnormal. The second logic controller is configured to monitor the second hardware manager to obtain a second monitoring result, and send a second monitoring signal to the heat dissipation controller when the second monitoring result is abnormal. The heat dissipation controller is configured to determine the state of the master node and the state of the backup node according to the first monitoring signal or the second monitoring signal, and determine the enable signal corresponding to the master node and the backup node according to the state of the master node and the state of the backup node, wherein the enable signal comprises an enable-on signal and an enable-off signal. The heat dissipation controller is further configured to generate a preset adjustment signal according to the first monitoring signal and the second monitoring signal, determine the preset adjustment signal as the control signal, and adjust the fan component according to a first preset rule when the master node and the backup node are both in an abnormal state.

5. The heat dissipation circuit according to claim 4, wherein The master node further comprises a first connector, the backup node further comprises a second connector, and the heat dissipation controller comprises a third connector and a fourth connector; The first logic controller, the first hardware manager and the first signal selector are connected with the first connector respectively, the first connector is connected with the third connector, the third connector is connected with the fourth connector, and the second logic controller, the second hardware manager and the second signal selector are connected with the fourth connector respectively.

6. The heat dissipation circuit according to claim 5, wherein The heat dissipation controller further comprises a third logic controller, a first repeater and a second repeater, the first repeater is connected with the third connector and the third logic controller respectively, and the second repeater is connected with the fourth connector and the third logic controller respectively.

7. The heat dissipating circuit according to claim 6, wherein The first hardware manager is specifically configured to generate the control signal according to the temperature information corresponding to the first temperature acquisition component and the second temperature acquisition component respectively, and send the control signal to the third logic controller through the first connector, the third connector and the first repeater. The second hardware manager is specifically configured to generate the control signal according to the temperature information corresponding to the first temperature acquisition component and the second temperature acquisition component respectively, and send the control signal to the third logic controller through the second connector, the fourth connector and the second repeater.

8. The heat dissipation circuit according to claim 6, wherein The heat dissipation controller further comprises a first arbitration chip, a first memory and a first temperature sensor, the input end of the first arbitration chip is linked with the first repeater and the second repeater respectively, the output end of the first arbitration chip is connected with the third logic controller, the first memory and the first temperature sensor respectively, the first memory is used for storing component information of a heat dissipation component, and the first temperature sensor is used for monitoring the temperature of the heat dissipation component. The first arbitration chip is used for arbitrating preset operations initiated by the first hardware manager and the second hardware manager, the preset operations include upgrading the third logic controller, accessing the first memory and acquiring temperature information of the first temperature sensor, and the arbitration processing is used for allowing a target hardware manager to execute the preset operation through a second preset rule when the first hardware manager and the second hardware manager simultaneously initiate the preset operation, the target hardware manager being the first hardware manager or the second hardware manager.

9. The heat dissipation circuit according to claim 5, wherein The heat dissipation controller further comprises a first repeater, a second repeater, a third signal selector, a fourth signal selector, a fourth logic controller and a fifth logic controller, the first repeater is connected with the third connector and the third signal selector respectively, and the second repeater is connected with the fourth connector and the fourth signal selector respectively. The third signal selector is connected with the fourth logic controller and the fifth logic controller respectively, and the fourth signal selector is connected with the fourth logic controller and the fifth logic controller respectively.

10. The heat dissipation circuit according to claim 9, wherein The first hardware manager is specifically configured to generate the control signal according to the temperature information corresponding to the first temperature acquisition component and the second temperature acquisition component respectively, and send the control signal to the fourth logic controller and the fifth logic controller through the first connector, the third connector, the first repeater and the third signal selector respectively. The second hardware manager is specifically configured to generate the control signal according to the temperature information corresponding to the first temperature acquisition component and the second temperature acquisition component respectively, and send the control signal to the fourth logic controller and the fifth logic controller through the second connector, the fourth connector, the second repeater and the fourth signal selector respectively. The second hardware manager is specifically configured to generate the control signal according to temperature information corresponding to the first temperature acquisition component and the second temperature acquisition component respectively, and send the control signal to the fourth logic controller and the fifth logic controller respectively through the second connector, the fourth connector, the second repeater and the fourth signal selector.

11. The heat dissipation circuit according to claim 9, wherein The heat dissipation controller further comprises a second arbitration chip, a fifth signal selector, a second memory, a second temperature sensor, a third memory and a third temperature sensor, input ends of the second arbitration chip are linked with the first repeater and the second repeater respectively, output ends of the second arbitration chip are connected with the fifth signal selector respectively, the fifth signal selector is connected with the fourth logic controller and the fifth logic controller respectively, connected with the second memory and the third memory respectively, and connected with the second temperature sensor and the third temperature sensor respectively; the second memory is used for storing heat dissipation component information corresponding to the fourth logic controller, the second memory is used for storing heat dissipation component information corresponding to the fifth logic controller, the second temperature sensor is used for monitoring the temperature of the heat dissipation component corresponding to the fourth logic controller, and the third temperature sensor is used for monitoring the temperature of the heat dissipation component corresponding to the fifth logic controller.

12. The heat dissipating circuit according to claim 11, wherein The second arbitration chip is used for arbitrating preset operations initiated by the first hardware manager and the second hardware manager, the preset operations including upgrading the fourth logic controller and the fifth logic controller, accessing the second memory and the third memory, and obtaining temperature information corresponding to the second temperature sensor and the third temperature sensor respectively, and the arbitration processing is used for allowing a target hardware manager to execute the preset operation through a second preset rule when the first hardware manager and the second hardware manager simultaneously initiate the preset operation, the target hardware manager being the first hardware manager or the second hardware manager.

13. The heat dissipation circuit according to claim 9, wherein The first logic controller is specifically configured to send the first monitoring signal to the fourth logic controller and the fifth logic controller respectively when the first monitoring result is a monitoring exception; The second logic controller is specifically configured to send the second monitoring signal to the fourth logic controller and the fifth logic controller respectively when the second monitoring result is a monitoring exception.

14. The heat dissipating circuit according to claim 13, wherein The heat dissipation controller comprises a first AND gate and a NOT gate, input ends of the AND gate are connected with the fourth logic controller and the fifth logic controller respectively, an output end of the AND gate is connected with the first signal selector and an input end of the NOT gate, and an output end of the NOT gate is connected with the second signal selector; The fourth logic controller is used for generating a first enable signal according to the first monitoring signal or the second monitoring signal, and sending the first enable signal to the input end of the AND gate, the first enable signal being used for controlling the first signal selector; The fifth logic controller is configured to generate a second enable signal according to the first monitoring signal or the second monitoring signal, and send the second enable signal to an input end of the AND gate, where the second enable signal is configured to indicate the first signal selector.

15. An electronic device, comprising: The electronic device includes the heat dissipation circuit of the server as claimed in any one of claims 1-14.

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