Digital integrated circuit test teaching aid and test method

Abstract

The invention relates to the technical field of integrated circuit testing, and particularly discloses a digital integrated circuit testing teaching aid and a testing method.The digital integrated circuit testing teaching aid comprises an FPGA core module, an ADC / DAC circuit, a downloader circuit and a switch matrix, and the ADC / DAC circuit, the downloader circuit and the switch matrix are all connected with the FPGA core module; the downloader circuit is used for downloading a bit stream document after simulation verification to the FPGA core module, and the switch matrix is used for switching and connecting required test resources to corresponding pins of the FPGA core module. The FPGA core module is used for replacing digital chips of various types and functions, so that a user can learn more test schemes about a digital integrated circuit under the condition that hardware does not need to be replaced, the user can know logic, time sequence and the like of the functions of the digital chips through FPGA development software, and the test efficiency is improved. And the user can better understand the working principle and then carry out related test learning.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit testing technology, and in particular to a digital integrated circuit testing teaching aid and testing method. Background Technology

[0002] Against the backdrop of educational reform, practical teaching is receiving increasing attention. Automated testing equipment, as a crucial tool in practical teaching, plays a vital role in improving educational quality and cultivating innovative talent. Currently, students learning digital integrated circuit testing, whether through basic theoretical learning or experimental study, can develop spatial reasoning skills, establish intuitive analytical abilities, and uncover the fundamental laws and characteristics of digital integrated circuits. However, traditional teaching methods often rely heavily on theoretical explanations and simulation software, lacking practical experience and hindering students' in-depth understanding of the testing process and technical details of digital integrated circuits.

[0003] Currently, there are no teaching aids specifically designed for testing digital integrated circuits on the market. The most similar ones are those used for teaching analog circuits. These mostly consist of PCB boards with fixed typical integrated circuits and corresponding test circuits, along with instruments. In practice, the instruments need to be connected to the test circuit via probes, connecting wires, etc., and then the test conditions are given by operating the instruments to obtain the corresponding test results. This approach has the following drawbacks: 1. Lack of teaching aids for testing digital integrated circuits; 2. Adding teaching cases requires adding or replacing hardware or customizing teaching aids, making updates difficult; 3. The operation is complicated and involves many connecting wires, which makes the learning experience of digital circuit testing poor for beginners. Summary of the Invention

[0004] The technical problem to be solved by this invention is to provide a digital integrated circuit testing teaching tool and testing method that addresses the above-mentioned deficiencies of the prior art. It uses FPGA as the core module to replace various types and functions of digital chips, so that users can learn more about the testing schemes of digital integrated circuits without changing the hardware. Users can also learn about the logic and timing of the digital chip through the FPGA development software, which allows them to better understand its working principle and then conduct related testing and learning.

[0005] To solve the above-mentioned technical problems, the technical solution of the present invention is as follows: A digital integrated circuit testing teaching tool and testing method includes an FPGA core module, an ADC / DAC circuit, a downloader circuit, and a switch matrix. The ADC / DAC circuit, the downloader circuit, and the switch matrix are all connected to the FPGA core module. The downloader circuit is used to download the simulated and verified bitstream document to the FPGA core module. The switch matrix is ​​used to switch the required test resources to the corresponding pins of the FPGA core module.

[0006] Preferably, the FPGA core module is connected to a PC, and the PC monitors the internal working signals of the FPGA core module and outputs control signals to the switch matrix.

[0007] Preferably, the PC is connected to both the test machine and the downloader circuit, and the PC sends the function program to the downloader circuit and the test program to the test machine.

[0008] Preferably, the FPGA core module is connected to several digital resource interfaces, several power resource interfaces, several GPIO resource interfaces, several analog signal acquisition interfaces, and several analog signal output interfaces.

[0009] Preferably, the FPGA core module includes an FPGA resource debugging interface, an FPGA power supply circuit, a serial communication circuit, and several FPGA adapter interfaces; the downloader circuit includes a converter chip U38 and peripheral circuits connected to the converter chip U38.

[0010] To address the aforementioned technical problems, this invention also provides a testing method for digital integrated circuit testing teaching aids, characterized by comprising the following steps: Step 1: Use VIVADO software to design the functions of the digital integrated circuit, and generate a bitstream document after simulation verification; Step 2: Select the bitstream file after simulation verification and download it to the FPGA core module through the downloader circuit to enable it to perform digital integrated circuit functions; Step 3: Based on the FPGA functional implementation project, set up a switch matrix and switch the required test resources to the corresponding pins of the FPGA core module. Step 4: Write a test sequence according to the communication protocol corresponding to the circuit under test, provide the test excitation signal and measure the output voltage, and check the test data to verify whether the function is normal. Step 5: Open the monitoring tool in the FPGA development software.

[0011] Preferably, in step five, the monitoring tools include ChipScope and an online logic analyzer.

[0012] Preferably, when the test program is measuring, the monitoring tool displays the input and output of the test machine and the working status of the test target.

[0013] By adopting the above technical solution, the digital integrated circuit testing teaching aid and testing method provided by the present invention have the following beneficial effects: 1. It can cover the testing needs of most different functions of digital circuits, enabling students to systematically learn and master the testing principles and methods of digital circuits; 2. The test process can be intuitively displayed through the interface and interactive control buttons, thereby improving students' practical skills and learning interest; 3. The teaching aids adopt a software-based approach to allocate test resources, which makes it easy for students to select and combine them according to their learning needs. At the same time, the operation is simple and easy to learn. Attached Figure Description

[0014] Figure 1 This is a structural block diagram of the digital integrated circuit testing teaching tool of the present invention; Figure 2 This is a circuit schematic diagram of the digital resource interface, power resource interface, GPIO resource interface, analog signal acquisition interface, and analog signal output interface in this invention. Figure 3 This is a circuit schematic diagram of the FPGA resource debugging interface, FPGA power supply circuit, and serial communication circuit in this invention. Figure 4 This is the circuit schematic of the FPGA adapter in this invention; Figure 5 This is a circuit diagram of the downloader circuit in this invention; In the diagram, 1-FPGA core module, 2-ADC / DAC circuit, 3-programmer circuit, 4-switch matrix, 5-PC terminal, 6-test machine. Detailed Implementation

[0015] The specific embodiments of the present invention will be further described below with reference to the accompanying drawings. It should be noted that these descriptions are for the purpose of aiding understanding the present invention, but do not constitute a limitation thereof. Furthermore, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0016] like Figure 1-5As shown, the digital integrated circuit test teaching aid and test method includes an FPGA core module 1, an ADC / DAC circuit 2, a downloader circuit 3, and a switch matrix 4. The ADC / DAC circuit 2, downloader circuit 3, and switch matrix 4 are all connected to the FPGA core module 1. The downloader circuit 3 is used to download the simulated and verified bitstream file to the FPGA core module 1. The switch matrix 4 is used to switch the required test resources to the corresponding pins of the FPGA core module 1. It is understood that the FPGA core module 1 is connected to a PC 5, which monitors the internal working signals of the FPGA core module 1 and outputs control signals to the switch matrix 4. The PC 5 is also connected to a test machine 6 and the downloader circuit 3. The PC 5 sends functional programs to the downloader circuit 3 and test programs to the test machine 6.

[0017] Specifically, the FPGA core module 1 is connected to several digital resource interfaces, several power resource interfaces, several GPIO resource interfaces, several analog signal acquisition interfaces, and several analog signal output interfaces; the FPGA core module 1 includes an FPGA resource debugging interface, an FPGA power supply circuit, a serial communication circuit, and several FPGA adapter interfaces; the downloader circuit 3 includes a converter chip U38 and peripheral circuits connected to the converter chip U38. It can be understood that the digital resource interfaces include interfaces CON1, J1, J2, J3, J4, J28, 29, J34, J41, and J62; the power resource interfaces include interfaces P1, J54, and J63; the GPIO resource interfaces include interfaces P2 and J53; the several analog signal acquisition interfaces include interface J52; the analog signal output interfaces include interface J51; the FPGA resource debugging interface includes interface J19; the FPGA power supply circuit includes power management chip U3 and power management chip U26; the power management chip U3 and power management chip U26... All chips U26 use TPS54622RHLR chips; the serial communication circuit includes a serial port chip U4 and a USB interface U5 connected to the serial port chip U4, which uses a CP2102 chip; the FPGA adapter includes interface chips U1, U2, and J58, used to replace different FPGA models, and both interface chips U1 and U2 are AXK680337YG chips; the converter chip U38 uses an FT2232HL chip; only the main circuit components and their connections are listed above, and the remaining circuit components and their specific connections are shown in the accompanying drawings, which will not be described in detail here.

[0018] Specifically, the present invention also provides a testing method for a digital integrated circuit testing teaching tool. Taking the implementation of a log-to-analog converter circuit operation test as an example, this embodiment uses an XLINX FPGA core module, model XC7A100TFGG-484, which includes the following steps: Step 1: Use VIVADO software to design the functions of the digital integrated circuit, and generate a bitstream document after simulation verification; Step 2: Select the bitstream file after simulation verification and download it to the FPGA core module through the downloader circuit to enable it to perform digital integrated circuit functions; Step 3: Based on the FPGA functional implementation project, set up a switch matrix and switch the required test resources to the corresponding pins of the FPGA core module. Step 4: Write a test sequence according to the communication protocol corresponding to the circuit under test, provide the test excitation signal and measure the output voltage, and check the test data to verify whether the function is normal. Step 5: Open monitoring tools such as ChipScope or an online logic analyzer in the FPGA development software. When the test program is measuring, these monitoring tools allow users to more intuitively understand the input and output of the test machine and the working status of the test target.

[0019] Understandably, this invention utilizes an FPGA on a teaching aid to implement the functions of a digital integrated circuit, and then verifies these functions by connecting it to a testing machine. Its core principle is to use an FPGA core module to replace various types and functions of digital chips, allowing users to learn more about digital integrated circuit testing schemes without replacing hardware. Furthermore, because FPGAs simulate other digital chips by writing their corresponding hardware description languages, users can understand the logic and timing of these digital chips through the FPGA development software, enabling them to better understand their working principles and conduct related testing and learning.

[0020] It is understandable that this invention is rationally designed, uniquely constructed, and has the following advantages: 1. Compared with existing technologies, this application proposal can cover the testing needs of most different functions of digital circuits, enabling students to systematically learn and master the testing principles and methods of digital circuits. 2. The test process can be displayed intuitively through the display interface and interactive control buttons, thereby improving students' practical skills and learning interest; 3. The teaching aids adopt a software-based approach to allocate test resources, which makes it easy for students to select and combine them according to their learning needs. At the same time, the operation is simple and easy to learn.

[0021] The embodiments of the present invention have been described in detail above with reference to the accompanying drawings, but the present invention is not limited to the described embodiments. For those skilled in the art, various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and spirit of the present invention, and these variations still fall within the protection scope of the present invention.

Claims

1. A digital integrated circuit testing teaching aid, characterized in that: It includes an FPGA core module, an ADC / DAC circuit, a downloader circuit, and a switch matrix. The ADC / DAC circuit, the downloader circuit, and the switch matrix are all connected to the FPGA core module. The downloader circuit is used to download the simulated and verified bitstream document to the FPGA core module. The switch matrix is ​​used to switch the required test resources to the corresponding pins of the FPGA core module.

2. The digital integrated circuit testing teaching aid according to claim 1, characterized in that: The FPGA core module is connected to the PC, which monitors the internal working signals of the FPGA core module and outputs control signals to the switch matrix.

3. The digital integrated circuit testing teaching aid according to claim 2, characterized in that: The PC is connected to both the test machine and the downloader circuit. The PC sends function programs to the downloader circuit and test programs to the test machine.

4. The digital integrated circuit testing teaching aid according to claim 1, characterized in that: The FPGA core module is connected to several digital resource interfaces, several power resource interfaces, several GPIO resource interfaces, several analog signal acquisition interfaces, and several analog signal output interfaces.

5. The digital integrated circuit testing teaching aid according to claim 1, characterized in that: The FPGA core module includes an FPGA resource debugging interface, an FPGA power supply circuit, a serial communication circuit, and several FPGA adapter interfaces; the downloader circuit includes a converter chip U38 and peripheral circuits connected to the converter chip U38.

6. A testing method applied to the digital integrated circuit test teaching aid according to any one of claims 1-5, characterized in that: Includes the following steps: Step 1: Use VIVADO software to design the functions of the digital integrated circuit, and generate a bitstream document after simulation verification; Step 2: Select the bitstream file after simulation verification and download it to the FPGA core module through the downloader circuit to enable it to perform digital integrated circuit functions; Step 3: Based on the FPGA functional implementation project, set up a switch matrix and switch the required test resources to the corresponding pins of the FPGA core module. Step 4: Write a test sequence according to the communication protocol corresponding to the circuit under test, provide the test excitation signal and measure the output voltage, and check the test data to verify whether the function is normal. Step 5: Open the monitoring tool in the FPGA development software.

7. The test method according to claim 6, characterized in that: In step five, the monitoring tools include ChipScope and an online logic analyzer.

8. The test method according to claim 6, characterized in that: When the test program is measuring, the monitoring tool displays the input and output of the test machine and the working status of the test target.

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