Manufacturing method of semiconductor structure

Abstract

The invention discloses a manufacturing method of a semiconductor structure, and belongs to the technical field of semiconductors. The manufacturing method at least comprises the following steps: providing a substrate; forming a layer to be etched on the substrate; forming an amorphous carbon layer on the layer to be etched; the substrate deposited with the amorphous carbon layer is placed in a plasma chamber, hydrogen and argon are introduced for preset time at preset temperature and preset power, plasma treatment is conducted on the amorphous carbon layer, a hydrophobic layer is formed, and the hydrophobic layer comprises-CH3 groups; cleaning the hydrophobic layer; forming an anti-reflection layer on the hydrophobic layer; and forming a patterned photoresist layer on the anti-reflection layer, and etching the anti-reflection layer, the hydrophobic layer, the amorphous carbon layer and the to-be-etched layer by taking the patterned photoresist layer as a mask. According to the manufacturing method of the semiconductor structure provided by the invention, the hydrophobic layer can be formed on the amorphous carbon layer, water is prevented from remaining on the surface of the amorphous carbon layer in the cleaning process, and the performance and the yield of a chip are improved.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of semiconductor, and particularly relates to a manufacturing method of semiconductor structure. BACKGROUND

[0002] With the rapid development of semiconductor technology, the integration of chips is higher and higher, and the size of semiconductor devices is smaller and smaller. Semiconductor process is to form a large number of various types of semiconductor devices on the same silicon substrate by using photoresist, etching, implantation and deposition and a series of processes, and to connect them to each other to have complete electronic functions. Among them, etching is to remove the excess material to form the required microstructure. The precision of etching affects the size of semiconductor devices, and further affects the function and performance of semiconductor devices.

[0003] As the etching size is smaller and smaller, it is necessary to form a hard mask layer on the surface of the wafer to cooperate with the mask pattern formed by the photoresist. Amorphous carbon has a high etching selectivity compared to silicon oxide, silicon nitride and silicon in the etching process, so amorphous carbon is used as a hard mask layer together with an anti-reflective layer and widely used in chip manufacturing processes. However, after the deposition of amorphous carbon film, there are generally problems of poor compactness and easy water vapor absorption. After water washing by wet scrubber clean after deposition, central defects and other problems will occur. If water washing is not performed, surface particle residues and other problems will occur. Whether water washing is performed or not, it will affect the yield of chips. SUMMARY

[0004] The purpose of the present application is to provide a manufacturing method of semiconductor structure. Through the manufacturing method of semiconductor structure provided by the present application, by forming a hydrophobic layer on the amorphous carbon layer, the particles and other impurities remaining in the forming process of the amorphous carbon layer can be partially removed in the process of forming the hydrophobic layer. The remaining impurities are removed by cleaning. At the same time, due to the existence of the hydrophobic layer, water can be prevented from remaining in the amorphous carbon layer, thereby improving the performance and yield of chips.

[0005] To solve the above technical problems, the present application provides a manufacturing method of semiconductor structure, at least comprising the following steps: providing a substrate; forming a layer to be etched on the substrate; forming an amorphous carbon layer on the layer to be etched; putting the substrate after depositing the amorphous carbon layer into a plasma chamber, passing in hydrogen and argon at a preset temperature and a preset power for a preset time, and performing plasma treatment on the amorphous carbon layer to form a hydrophobic layer, the hydrophobic layer comprising-CH3 groups; cleaning the hydrophobic layer; forming an anti-reflective layer on the hydrophobic layer; and The anti-reflection layer is etched by taking the patterned photoresist layer as a mask.

[0006] In an embodiment of the present application, the flow rate of the hydrogen is 100-500 sccm, and the flow rate of the argon is 200-1000 sccm.

[0007] In an embodiment of the present application, the preset temperature is 350-430 °C.

[0008] In an embodiment of the present application, the preset power includes top power, side power and bias power, and each of the top power, the side power and the bias power is 1000-8000 W.

[0009] In an embodiment of the present application, the thickness of the hydrophobic layer is 20-40 Å.

[0010] In an embodiment of the present application, the manufacturing method further includes: after cleaning the hydrophobic layer, performing a drying treatment on the substrate in a stable gas atmosphere.

[0011] In an embodiment of the present application, the temperature of the drying treatment is 300-430 °C, and the time of the drying treatment is 2-6 min.

[0012] In an embodiment of the present application, the stable gas is nitrogen, helium or argon.

[0013] In an embodiment of the present application, the flow rate of the stable gas is 500-1500 sccm, and the cleaning liquid for cleaning the hydrophobic layer is distilled water, deionized water or high-purity water.

[0014] In an embodiment of the present application, the manufacturing method further includes: performing a first etching by taking the patterned photoresist layer as a mask to etch the hydrophobic layer, the anti-reflection layer and the amorphous carbon layer; and performing a second etching by taking the remaining patterned photoresist layer, the hydrophobic layer, the anti-reflection layer and the amorphous carbon layer as a mask layer, or taking the anti-reflection layer, the hydrophobic layer and the amorphous carbon layer as a mask layer to etch the layer to be etched, thereby forming a preset etching pattern.

[0015] In summary, the application provides a semiconductor structure manufacturing method, which has the unexpected technical effect of forming a hydrophobic layer on the amorphous carbon layer, removing the impurities such as particles remaining in the amorphous carbon layer during the formation process, and then performing cleaning and drying to remove the remaining impurities. In addition, the presence of the hydrophobic layer can densify the surface of the amorphous carbon layer, prevent the yield from being reduced due to the impurities such as particles, avoid the center defects caused by the water introduced during cleaning, improve the performance and yield of the chip, shorten the plasma processing time, improve the processing efficiency, improve the etching accuracy, obtain small-size semiconductor devices, improve the yield of the semiconductor devices, obtain a uniform amorphous carbon layer at a lower temperature, reduce the influence on the etching layer and substrate, reduce deformation, save energy consumption, and reduce production costs. The formation and processing method of the amorphous carbon layer can be applied to the links in the semiconductor process to improve the yield of each link in the semiconductor process.

[0016] Of course, implementing any product of the application does not necessarily require all the advantages described above to be achieved at the same time. BRIEF DESCRIPTION OF DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the application, the following will briefly introduce the drawings needed to be used in the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the application, and other drawings can also be obtained by those skilled in the art without creative labor.

[0018] Figure 1 Flow chart of the semiconductor structure manufacturing method of an embodiment of the application.

[0019] Figure 2 Schematic diagram of forming the etching layer and the amorphous carbon layer on the substrate in an embodiment of the application.

[0020] Figure 3 Schematic diagram of forming the hydrophobic layer on the amorphous carbon layer by plasma processing in an embodiment of the application.

[0021] Figure 4 Schematic diagram of forming the anti-reflection layer on the amorphous carbon layer in an embodiment of the application.

[0022] Figure 5 Schematic diagram of forming the patterned photoresist layer on the anti-reflection layer in an embodiment of the application.

[0023] Figure 6 Schematic diagram of etching the anti-reflection layer and the amorphous carbon layer in an embodiment of the application.

[0024] Figure 7This is a schematic diagram of the etching layer after etching in one embodiment of the present invention.

[0025] Figure 8 This is a schematic diagram of the amorphous carbon layer after removal in one embodiment of the present invention.

[0026] Label Explanation: 10. Substrate; 11. Layer to be etched; 12. Amorphous carbon layer; 121. Hydrophobic layer; 13. Anti-reflective layer; 14. Patterned photoresist layer; 141. First opening. Detailed Implementation

[0027] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0028] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0029] In this invention, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first" and "second" are used only for descriptive and distinguishing purposes and should not be construed as indicating or implying relative importance.

[0030] Please see Figure 1 As shown, the present invention provides a method for fabricating a semiconductor structure, the method comprising steps S11-S17.

[0031] Step S11: Provide a substrate.

[0032] Step S12: Form the layer to be etched on the substrate.

[0033] Step S13: Form an amorphous carbon layer on the layer to be etched.

[0034] Step S14: Place the substrate after depositing the amorphous carbon layer into the plasma chamber, and at a preset temperature and preset power, introduce hydrogen and argon gas for a preset time to perform plasma treatment on the amorphous carbon layer to form a hydrophobic layer, which includes -CH3 groups.

[0035] Step S15: Clean the hydrophobic layer.

[0036] Step S16: Form an anti-reflective layer on the hydrophobic layer.

[0037] Step S17: Form a patterned photoresist layer on the anti-reflection layer, and use the patterned photoresist layer as a mask to etch the anti-reflection layer, hydrophobic layer, amorphous carbon layer and the layer to be etched.

[0038] Please see Figures 1-2As shown, in one embodiment of the present invention, in step S11, a substrate 10 is provided. The substrate 10 can be any material suitable for forming a semiconductor device, and the substrate 10 is, for example, silicon carbide (SiC), indium phosphide (InP), gallium arsenide (GaAs), gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), silicon germanium (GeSi), sapphire, silicon wafers, or other semiconductor materials formed of III / V compounds, and also includes a stacked structure composed of these semiconductor materials, or silicon-on-insulator, silicon-on-insulator, silicon-germanide-on-insulator, and germanium-on-insulator, etc. The present invention does not limit the type of substrate 10, and it can be selected according to the manufacturing requirements of the semiconductor device. The substrate is used, for example, to form field-effect transistors (FETs), metal-oxide-semiconductor field-effect transistors (MOSFETs), complementary metal-oxide-semiconductor (CMOS) transistors, insulated-gate bipolar transistors (IGBTs), fast recovery diodes (FRDs), high-speed efficiency diodes (HEDs), constant voltage diodes, high-frequency diodes, light-emitting diodes (LEDs), gate turn-off thyristors (GTOs), light-triggered thyristors (LTTs), thyristors, charge-coupled devices (CCD image sensors), digital signal processors (DSPs), photorelays, or microprocessors. The substrate 10 can be selected from one or more semiconductor devices such as processors, depending on the type of semiconductor device.

[0039] Please see Figures 1-2As shown, in one embodiment of the present invention, in step S12, an etchable layer 11 is formed on the substrate 10. The etchable layer 11 is, for example, a dielectric layer, a semiconductor layer, or a metal layer. The dielectric layer is, for example, at least one of silicon oxide, silicon nitride, a high-dielectric-constant material, a low-dielectric-constant material, or silicon oxynitride. The semiconductor layer is, for example, at least one of single-crystal silicon, polycrystalline silicon, silicon germanium, or gallium arsenide. The metal layer is, for example, at least one of aluminum, tungsten, copper, titanium, indium nitride, or other metals and metal-containing materials. That is, in this application, the material of the etchable layer 11 is not specifically limited. Different deposition methods are selected to form the etchable layer 11 depending on the material of the etchable layer 11.

[0040] Please see Figures 1-2 As shown, in one embodiment of the present invention, the substrate 10 is, for example, a raw substrate, or it may have a structure formed such as a shallow trench isolation structure, a deep trench isolation structure, a well region, or a drift region. This application does not impose specific limitations; that is, this application does not limit the application of the amorphous carbon hard mask layer to any stage of the semiconductor manufacturing process. It can be applied to various stages of the semiconductor manufacturing process to improve the yield of each stage. The layer to be etched 11 is, for example, directly disposed on the substrate 10, or, for example, other structures are disposed between the layer to be etched 11 and the substrate 10, such as a gate dielectric layer, a gate structure, a grid structure, a filter structure, or a connection structure. In other words, in this application, the position of the layer to be etched 11 is not specifically limited. In one specific embodiment of the present invention, the layer to be etched 11 is, for example, a silicon nitride layer, and a silicon oxide layer is disposed on a substrate as a pad nitride layer for forming a shallow trench isolation structure. The silicon nitride layer is also disposed on the gate structure and the substrate to form the sidewall dielectric layer of the shallow trench isolation structure. Furthermore, the silicon nitride layer is disposed on the gate, sidewall structure, and substrate to form a contact hole etch stop layer. In this embodiment, the example of the layer to be etched 11 being disposed on a substrate 10 is described.

[0041] Please see Figures 1-2As shown, in one embodiment of the present invention, in step S13, an amorphous carbon layer 12 is formed on the layer 11 to be etched, serving as a hard mask layer for the layer 11 to be etched. The amorphous carbon layer 12 is formed, for example, by chemical vapor deposition (CVD), physical vapor deposition (PVD), or pyrolysis. In this embodiment, the amorphous carbon layer 12 is obtained, for example, by plasma-enhanced chemical vapor deposition (PECVD). Specifically, the substrate 10, on which the etched layer 11 is to be formed, is placed in a deposition chamber. The operating temperature of the deposition chamber is, for example, 300°C to 400°C. Hydrocarbon gases such as ethylene (C2H4) or propylene (C3H6) are introduced. Under plasma energy bombardment, the hydrocarbon gases undergo a decomposition reaction to produce byproducts such as carbon (C) and hydrogen (H2). Carbon is deposited on the surface of the etched layer 11 to form the amorphous carbon layer 12, while the byproducts such as hydrogen are removed. This application does not limit the thickness of the amorphous carbon layer 12; it is selected based on the material, thickness, and process of the etched layer 11. In a specific embodiment of the present invention, the thickness of the amorphous carbon layer 12 is, for example, 150 nm to 350 nm. When forming amorphous carbon layers using plasma-enhanced chemical vapor deposition, it is possible to form them at lower temperatures, obtain uniform amorphous carbon layers, reduce the impact on the etched layers and substrates, minimize deformation, save energy consumption, and reduce production costs.

[0042] Please see Figures 1-3As shown, in one embodiment of the present invention, in step S14, after forming the amorphous carbon layer 12, the amorphous carbon layer 12 is subjected to plasma treatment to form a hydrophobic layer 121. The plasma includes, for example, hydrogen plasma and inert plasma. In this embodiment, the substrate 10 is placed in a plasma chamber, the pressure of which is, for example, 6 torr to 10 torr. Hydrogen (H2) and argon are introduced for a preset time at a preset temperature and preset power. In this embodiment, the flow rate of hydrogen is, for example, 100 sccm to 500 sccm, the flow rate of argon is, for example, 200 sccm to 1000 sccm, the preset temperature is, for example, 350°C to 430°C, and the preset power includes top power, side power, and bias power, with each of the top power, side power, and bias power being, for example, 1000W to 8000W, to obtain high-density plasma, thereby shortening the processing time and improving processing efficiency. Hydrogen gas generates high-density hydrogen plasma within the plasma chamber. This hydrogen plasma reacts with the carbon on the surface of the amorphous carbon layer 12 to form -CH3 groups. These -CH3 groups are hydrophobic, reducing moisture adsorption on the surface of the amorphous carbon layer 12 during the cleaning process, thus reducing defects. Furthermore, the plasma treatment process also partially removes particles and other impurities remaining from the formation of the amorphous carbon layer 12. Simultaneously, introducing a gas with a molecular weight greater than hydrogen, such as argon, as a mixed gas solves the problem that low-molecular-weight hydrogen plasma can only bind to shallow areas of the amorphous carbon layer 12. This allows the hydrogen plasma to reach deeper into the amorphous carbon layer 12, forming more -CH3 hydrophobic groups, increasing the thickness of the hydrophobic layer 121, improving the hydrophobicity of the amorphous carbon layer 12, and increasing the surface density of the amorphous carbon layer 12, reducing water absorption due to poor density. In one embodiment of the invention, the thickness of the hydrophobic layer 121 is, for example, 20 Å to 40 Å.

[0043] Please see Figures 1-3As shown, in one embodiment of the present invention, in step S15, after the hydrophobic layer 121 is formed, the hydrophobic layer 121 is cleaned to remove remaining particulate impurities, thereby improving the interface performance between the subsequently formed antireflective layer and the hydrophobic layer 121. Specifically, for example, a substrate 10 with an amorphous carbon layer 12 and a hydrophobic layer 121 is placed in a wet scrubber cleaning machine. Cleaning fluid is sprayed from a nozzle above the substrate to remove particulate impurities from the substrate 10, while the substrate 10 rotates. After the cleaning fluid spraying stops, the substrate 10 continues to rotate, and a stable gas is introduced during and after the rotation to purge and dry it. The cleaning fluid is, for example, distilled water, deionized water, or high-purity water, and the stable gas is, for example, nitrogen or argon. Through cleaning, particulate impurities remaining during the formation of the amorphous carbon layer can be removed, and the surface of the hydrophobic layer 121 can be cleaned, preventing problems such as decreased manufacturing yield caused by particulate impurities. Meanwhile, since the surface of the amorphous carbon layer 12 has a dense and hydrophobic layer 121, water residue can be reduced during the cleaning process.

[0044] Please see Figures 1-3 As shown, in one embodiment of the present invention, after cleaning the hydrophobic layer 121, the substrate 10 is dried. The drying temperature is, for example, 300°C to 430°C, the drying time is, for example, 2 min to 6 min, and the drying process is carried out, for example, in a stable gas atmosphere, such as nitrogen, helium (He), or argon, with a flow rate of, for example, 500 sccm to 1500 sccm, to prevent oxidation of the amorphous carbon layer 12 during moisture removal. Due to the presence of the hydrophobic layer 121, the drying process removes moisture from its surface and prevents moisture from combining with the amorphous carbon layer 12. The drying temperature is controlled to avoid affecting the substrate 10, the layer to be etched 11, or the metal layer between the substrate 10 and the layer to be etched 11; therefore, the heat treatment temperature cannot exceed 430°C, and to achieve a better removal effect quickly, the drying temperature is not lower than 300°C to accelerate the process. High-density plasma treatment can form a hydrophobic layer 121 on the surface of the amorphous carbon layer 12, effectively solving the problem of defects caused by residual moisture after water washing, and improving chip performance and yield. In a specific embodiment of this application, the fabrication method provided in this application improves the semiconductor device fabrication yield by 1% to 3%.

[0045] Please see Figures 1-4As shown, in one embodiment of the present invention, in step S16, after cleaning and drying the hydrophobic layer 121, an anti-reflective layer 13 is formed on the hydrophobic layer 121. The anti-reflective layer 13 is, for example, silicon oxynitride (SiON) to improve the accuracy and efficiency of the photolithography process. The anti-reflective layer 13 is deposited, for example, by methods such as plasma-enhanced chemical vapor deposition, atomic layer deposition (ALD), or low-pressure chemical vapor deposition (LPCVD) to improve the deposition quality of the anti-reflective layer 13. In this embodiment, for example, it is formed by plasma-enhanced chemical vapor deposition. Specifically, process gases SiH4, N2O, and NH3 are introduced into the plasma chamber, and the deposition temperature is controlled at 330°C to 350°C. Gas molecules dissociate into plasma in a vacuum and radio frequency environment, diffuse to the surface of the hydrophobic layer 121, and react to deposit a SiON thin film. This application does not limit the thickness of the anti-reflective layer 13; it is selected according to the specific fabrication requirements. By adjusting the ratios of SiH4, N2O, and NH3, as well as the pressure and power of the deposition chamber, the refractive index of the anti-reflection layer 13 is adjusted to reduce reflection and standing wave issues, thereby improving etching accuracy. Simultaneously, the amorphous carbon layer 12 exhibits good light transmittance, facilitating layer alignment during photolithography. Furthermore, the amorphous carbon layer 12 has high hardness, resulting in a higher etching selectivity compared to other materials. In this embodiment, the combination of the amorphous carbon layer 12 and the anti-reflection layer 13 effectively reduces the dependence of etching on the thickness of the subsequent photoresist layer, allowing for thinner photoresist layers. This avoids photoresist pattern defects, such as photoresist collapse, improving etching accuracy, facilitating the acquisition of finer patterns, and promoting the miniaturization of semiconductor devices.

[0046] Please see Figure 1 , Figures 4-5 As shown, in one embodiment of the present invention, in step S17, after forming the anti-reflection layer 13, a patterned photoresist layer 14 is formed on the anti-reflection layer 13. Specifically, a photoresist layer is formed on the anti-reflection layer 13 by spin coating or spraying, and then a plurality of first openings 141 are formed on the photoresist layer by exposure and development processes. The first openings 141 are used to define the positions to be etched. In this application, the photoresist is, for example, a positive photoresist or a negative photoresist; this application does not impose specific limitations, and the exposure and development methods are determined according to the type of photoresist.

[0047] Please see Figures 5-6As shown, in one embodiment of the present invention, after the patterned photoresist layer 14 is formed, a first etching is performed using the patterned photoresist layer 14 as a mask. This etching is performed, for example, by dry etching, wet etching, or a combination of dry and wet etching, to etch the antireflective layer 13, hydrophobic layer 121, and amorphous carbon layer 12 exposed by the first opening 141. In this embodiment, for example, dry etching is used to etch the antireflective layer 13 and amorphous carbon layer 12, and the etching gas includes, for example, chlorine (Cl2), carbon tetrafluoride (CF4), trifluoromethane (CHF3), difluoromethane (CH2F2), and octafluoropropane (C8F4). 18 The photoresist layer 14 may be one or a mixture of nitrogen trifluoride (NF3) or sulfur hexafluoride (SF6), or a combination thereof with oxygen (O2). After the antireflective layer 13, hydrophobic layer 121 and amorphous carbon layer 12 exposed by the first opening 141 are completely etched, the patterned photoresist layer 14 of the antireflective layer 13 may be completely etched, or for example, the remaining portion may be etched, or for example, the antireflective layer 13 may be partially etched, that is, during the etching of the antireflective layer 13 and amorphous carbon layer 12, the patterned photoresist layer 14 may also be etched, and the patterned photoresist layer 14 may not be sufficient as an etch stop layer for etching the layer 11 to be etched.

[0048] Please see Figures 6-7 As shown, in one embodiment of the present invention, after etching the anti-reflective layer 13 and amorphous carbon layer 12 exposed by the first opening 141, a second etching is performed using the remaining patterned photoresist layer 14, hydrophobic layer 121, anti-reflective layer 13, and amorphous carbon layer 12 as a mask layer, or using the anti-reflective layer 13, hydrophobic layer 121, and amorphous carbon layer 12 as a mask layer, to etch the layer to be etched 11 and form a preset etching pattern. The layer to be etched 11 is etched, for example, by dry etching, wet etching, or a combination of dry and wet etching, depending on the material of the layer to be etched 11. In this embodiment, dry etching is employed, for example, and the etching gas includes one or more of the following: chlorine, bromine (Br2), hexafluoroethane (C2F6), carbon tetrafluoride, trifluoromethane, difluoromethane, octafluoropropane, nitrogen trifluoride, sulfur hexafluoride, or hydrogen bromide (HBr), or a combination thereof with oxygen. After the layer 11 to be etched, exposed by the first opening 141, is completely etched, the anti-reflective layer 13 is completely etched, leaving at least a portion of the amorphous carbon layer 12 on the layer 11 to be etched. Through step-by-step etching, the amorphous carbon layer 12 serves as an etching mask layer during the etching of the layer 11 to be etched, protecting the layer 11 covered by the amorphous carbon layer 12 and ensuring clear etching boundaries.

[0049] Please see Figures 7-8As shown, in one embodiment of the present invention, after etching the layer 11 to be etched, the amorphous carbon layer 12 on the layer 11 to be etched is removed. The amorphous carbon layer 12 is removed, for example, by oxygen plasma, ultraviolet treatment, or wet cleaning. In one embodiment of the present invention, argon and oxygen are used as cleaning gases to remove byproducts of the etching process and the amorphous carbon layer 12, wherein the flow ratio of Ar to O2 is, for example, 10:1 to 15:1, and the flow rate of the cleaning gas is, for example, 300 sccm to 400 sccm. In other embodiments of the present invention, other etching gases may be selected for etching based on the etching selectivity ratio of the layer 11 to the amorphous carbon layer 12, or a wet etching solution may be selected for removal; the present invention does not impose specific limitations.

[0050] In summary, this invention provides a method for fabricating a semiconductor structure. The unexpected technical effects of this application are: through plasma processing, a hydrophobic layer can be formed on an amorphous carbon layer. During the formation of the hydrophobic layer, residual particles and other impurities from the amorphous carbon layer can be partially removed. Further cleaning and drying remove remaining impurities. Simultaneously, the presence of the hydrophobic layer densifies the surface of the amorphous carbon layer, preventing problems such as decreased manufacturing yield due to particles and other impurities, while also avoiding center defects caused by moisture introduced during cleaning, thus improving chip performance and yield. It can shorten plasma processing time and improve processing efficiency. It can improve etching precision, obtain smaller-sized semiconductor devices, and improve the yield of semiconductor devices. It can obtain a uniform amorphous carbon layer at a lower temperature, while reducing the impact on the etched layer and substrate, reducing deformation, and saving energy consumption and reducing production costs. The method for forming and processing the amorphous carbon layer can be applied to various stages of semiconductor manufacturing processes to improve the yield of each stage.

[0051] The embodiments of the present invention disclosed above are merely illustrative of the invention. The embodiments do not exhaustively describe all details, nor do they limit the invention to the specific implementations described. Clearly, many modifications and variations can be made based on the content of this specification. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the invention, thereby enabling those skilled in the art to better understand and utilize the invention. The invention is limited only by the claims and their full scope and equivalents.

Claims

1. A method for fabricating a semiconductor structure, characterized in that, At least the following steps are included: Provide a substrate; A layer to be etched is formed on the substrate; An amorphous carbon layer is formed on the layer to be etched; The substrate after the amorphous carbon layer is deposited is placed in a plasma chamber, and hydrogen and argon are introduced at a preset temperature and preset power for a preset time to perform plasma treatment on the amorphous carbon layer to form a hydrophobic layer, wherein the hydrophobic layer includes -CH3 groups. The hydrophobic layer is cleaned; An anti-reflective layer is formed on the hydrophobic layer; as well as A patterned photoresist layer is formed on the anti-reflection layer, and the anti-reflection layer, the hydrophobic layer, the amorphous carbon layer, and the layer to be etched are etched using the patterned photoresist layer as a mask.

2. The method for fabricating a semiconductor structure according to claim 1, characterized in that, The flow rate of hydrogen is 100 sccm to 500 sccm, and the flow rate of argon is 200 sccm to 1000 sccm.

3. The method for fabricating a semiconductor structure according to claim 1, characterized in that, The preset temperature is 350℃~430℃.

4. The method for fabricating a semiconductor structure according to claim 1, characterized in that, The preset power includes top power, side power and bias power, and the top power, the side power and the bias power are each 1000W~8000W.

5. The method for fabricating a semiconductor structure according to claim 1, characterized in that, The thickness of the hydrophobic layer is 20 Å to 40 Å.

6. The method for fabricating a semiconductor structure according to claim 1, characterized in that, The fabrication method further includes: cleaning the hydrophobic layer and then drying the substrate in a stable gas atmosphere.

7. The method for fabricating a semiconductor structure according to claim 6, characterized in that, The drying temperature is 300℃~430℃, and the drying time is 2min~6min.

8. The method for fabricating a semiconductor structure according to claim 6, characterized in that, The stable gas is nitrogen, helium, or argon.

9. The method for fabricating a semiconductor structure according to claim 6, characterized in that, The flow rate of the stable gas is, for example, 500 sccm to 1500 sccm, and the cleaning solution used to clean the hydrophobic layer is distilled water, deionized water, or high-purity water.

10. The method for fabricating a semiconductor structure according to claim 1, characterized in that, The manufacturing method further includes: Using the patterned photoresist layer as a mask, a first etching is performed to etch the hydrophobic layer, the antireflective layer, and the amorphous carbon layer; and Using the remaining patterned photoresist layer, the hydrophobic layer, the antireflective layer, and the amorphous carbon layer as a mask layer, or using the antireflective layer, the hydrophobic layer, and the amorphous carbon layer as a mask layer, a second etching is performed to etch the layer to be etched, forming a preset etching pattern.

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