Power converter and control circuit and control method thereof

Abstract

The invention provides a power converter and a control circuit and method thereof, and the method comprises the steps: carrying out the modulation processing of the obtained switching frequency information and / or current reference information at a secondary side of the power converter, generating a reference pulse signal, and transmitting the pulse signal to a primary side through a digital isolator, therefore, a primary side control signal can be obtained after corresponding demodulation processing is carried out on the reference pulse signal on the primary side, and control over the on-off state of a primary side power tube is achieved. According to the scheme of the invention, through special modulation and demodulation setting, various kinds of information can be transmitted between the secondary side and the primary side only through a single channel, the use number of isolation devices between the primary side and the secondary side is reduced, the system structure is simplified, and the system cost is reduced.

Description

Technical Field

[0001] This application relates to the field of switching power supply technology, specifically to a power converter and its control circuit and control method. Background Technology

[0002] Switching power supplies are widely used in industrial fields due to their high efficiency and ability to step up or down. Switching power supplies need to detect output voltage or current information and feed it back to the control circuit to control the switching of power transistors, thus enabling energy transfer.

[0003] Feedback paths in switching power supplies are categorized into isolated and non-isolated types based on safety regulations. Isolated feedback uses isolation devices to disconnect the feedback path to meet safety requirements. Common isolation methods for isolated feedback include magnetic isolation, optocoupler isolation, and capacitive isolation. Among these, optocoupler isolation has relatively high power consumption, slow speed, short lifespan, and severe performance degradation at high temperatures and under high radiation. Magnetic or capacitive isolation utilizes transient magnetic or electric fields to discretely feed back output information to the control circuit, offering low power consumption, high speed, long lifespan, and suitability for extreme environments.

[0004] Isolated feedback control technology includes two types: primary-side feedback control and secondary-side feedback control. Primary-side feedback control involves the output signal being sampled and held by coupling it to the primary side (the winding side) during the transformer's flyback demagnetization phase. The feedback signal has a one-cycle delay, resulting in poor system dynamic response and an inability to dynamically adjust the output voltage. Secondary-side feedback control, on the other hand, obtains the feedback signal from the secondary side of the power converter and compares it with a reference signal to adjust the converter's operating state. Because secondary-side feedback control can provide real-time feedback of the output signal, it offers better system dynamic response and allows for dynamic adjustment of the output voltage.

[0005] In some situations, it is necessary to transfer multiple types of information from the secondary edge to the primary edge. Therefore, it is particularly important to achieve low-cost multi-information transfer from the secondary edge to the primary edge. Summary of the Invention

[0006] To address the aforementioned technical problems, this application provides a power converter and its control circuit and control method, aiming to achieve low-cost multi-information transmission from the secondary side to the primary side in the power converter.

[0007] According to a first aspect of this application, a control circuit for a power converter is provided. The power converter includes a cascaded power factor correction circuit and a power conversion unit. The power conversion unit includes a transformer, a power transistor coupled to the primary winding of the transformer, and a rectifier transistor coupled to the secondary winding of the transformer. The control circuit includes:

[0008] The secondary control circuit obtains switching frequency information and / or current reference information based on the error signal, modulates the obtained information to generate a reference pulse signal, and obtains the error signal by amplifying and compensating the output feedback voltage of the power converter and the preset reference voltage.

[0009] A digital isolator, coupled to the secondary control circuit, is used to transmit the reference pulse signal;

[0010] The primary-side control circuit, coupled to the digital isolator, is used to demodulate the reference pulse signal to obtain a primary-side control signal, which controls the switching state of the power transistor.

[0011] Optionally, the power converter further includes a power factor correction circuit cascaded with the power conversion unit;

[0012] The secondary-side control circuit is further configured to modulate the enable information of the power factor correction circuit into the reference pulse signal, wherein the enable information of the power factor correction circuit is obtained according to the output requirements of the power converter.

[0013] Optionally, the primary-side control circuit is further configured to:

[0014] The reference pulse signal is demodulated to obtain a first enable signal, which is used to control whether the power factor correction circuit is enabled or not.

[0015] Optionally, the secondary-side control circuit is configured as follows:

[0016] The pulse frequency of the reference pulse signal is set according to the switching frequency information to achieve modulation processing of the switching frequency information.

[0017] Optionally, the secondary-side control circuit is configured as follows:

[0018] The effective pulse width time of the reference pulse signal is set according to the current reference information to achieve modulation processing of the current reference information.

[0019] Optionally, the reference pulse signal has a minimum effective pulse width time;

[0020] The secondary-side control circuit is configured as follows:

[0021] Based on the enable information of the power factor correction circuit, it is determined whether to set an invalid pulse width with a first time length in the minimum effective pulse width time of the reference pulse signal, so as to modulate the enable information of the power factor correction circuit into the reference pulse signal.

[0022] Optionally, the primary-side control circuit includes:

[0023] The turn-on control unit generates the primary-side turn-on control signal when the trigger edge of the reference pulse signal is detected.

[0024] Optionally, the primary-side control circuit includes:

[0025] The shutdown control unit obtains a current reference signal based on the effective pulse width time of the reference pulse signal, and generates the primary-side shutdown control signal when the sampling signal characterizing the inductor current reaches the current reference signal.

[0026] Optionally, the primary-side control circuit includes:

[0027] The first enable control unit generates a valid first enable signal when an invalid pulse width of the first time length is detected within the minimum effective pulse width time of the reference pulse signal, and generates an invalid first enable signal when no invalid pulse width is detected within the effective pulse width time of the reference pulse signal.

[0028] A valid first enable signal is used to enable the power factor correction circuit, while an invalid first enable signal is used to disable the power factor correction circuit.

[0029] Optionally, the digital isolator includes a magnetic isolator or a capacitive isolator.

[0030] According to a second aspect of this application, a power converter is provided, comprising: a control circuit as described in any embodiment of this application.

[0031] According to a third aspect of this application, a control method for a power converter is provided. The power converter includes a cascaded power factor correction circuit and a power conversion unit. The power conversion unit includes a transformer, a power transistor coupled to the primary winding of the transformer, and a rectifier transistor coupled to the secondary winding of the transformer. The control method includes:

[0032] The error signal is obtained by amplifying and compensating the output feedback voltage of the power converter and the preset reference voltage. Switching frequency information and / or current reference information are obtained based on the error signal.

[0033] The obtained information is modulated to generate a reference pulse signal;

[0034] The reference pulse signal is transmitted from the secondary side to the primary side of the power converter using a digital isolator.

[0035] On the primary side of the power converter, the reference pulse signal is demodulated to obtain a primary side control signal, which controls the switching state of the power transistor.

[0036] Optionally, the power converter further includes a power factor correction circuit cascaded with the power conversion unit;

[0037] Before modulating the acquired information, the process also includes:

[0038] The enable information of the power factor correction circuit is obtained according to the output requirements of the power converter, so as to modulate the enable information of the power factor correction circuit into the reference pulse signal.

[0039] Optionally, the method further includes: demodulating the reference pulse signal to obtain a first enable signal, wherein the first enable signal is used to control whether the power factor correction circuit is enabled or not.

[0040] The beneficial effects of this application include at least the following:

[0041] This application provides a scheme for information transmission between the secondary and primary sides of a power converter. The scheme involves modulating the obtained switching frequency information and / or current reference information onto a reference pulse signal on the secondary side, and then using a digital isolator to transmit the reference pulse signal to the primary side. Compared to existing schemes, this application utilizes special modulation and demodulation settings, enabling the transmission of multiple types of information between the secondary and primary sides of the power converter through a single channel. This reduces the number of isolation devices used between the primary and secondary sides, simplifies the system structure, and lowers system costs.

[0042] In a further preferred embodiment, in addition to modulating the obtained switching frequency information and / or current reference information onto a reference pulse signal on the secondary side, the embodiment also includes modulating the obtained power factor correction circuit enable information onto the same reference pulse signal on the secondary side, thereby enabling more information to be transmitted using a single channel and making it more applicable.

[0043] It should be noted that the above general description and the following detailed description are merely exemplary and explanatory, and do not limit this application. Attached Figure Description

[0044] Figure 1 A schematic diagram of an implementation of a power converter is shown;

[0045] Figure 2 This diagram illustrates an embodiment of the power converter provided according to an embodiment of this application.

[0046] Figure 3 This illustration shows a schematic diagram of an embodiment of a control chip provided according to an embodiment of this application;

[0047] Figure 4 ShowFigure 3 A schematic diagram of the implementation of the central control circuit;

[0048] Figure 5 This diagram illustrates the principle of a power converter according to an embodiment of the present application when signal modulation is performed on the secondary side.

[0049] Figure 6 This diagram illustrates the principle of signal demodulation on the primary side of the power converter provided according to an embodiment of the present application.

[0050] Figure 7 This illustration shows an embodiment of a reference pulse signal transmitted from the secondary side to the primary side in a power converter according to an embodiment of this application;

[0051] Figure 8 This diagram illustrates another implementation of the reference pulse signal transmitted from the secondary side to the primary side in a power converter according to an embodiment of this application.

[0052] Figure 9 A flowchart illustrating a control method for a power converter according to an embodiment of this application is shown. Detailed Implementation

[0053] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings. Preferred embodiments of this application are shown in the drawings. However, this application may be implemented in various forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a thorough and complete understanding of the disclosure of this application.

[0054] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0055] In the description of this application, the words "exemplary" or "for example" are used to indicate that they are examples, illustrations, or descriptions. Any embodiment described as "exemplary" or "for example" in this application should not be construed as being more preferred or advantageous than other embodiments. "And / or" in this document describes a relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone. "Coupling" describes a connection relationship between related objects. For example, A and B are coupled, which can indicate a direct connection between A and B, or an indirect connection between A and B through other devices / units / modules. "Multiple" refers to two or more. Furthermore, to facilitate a clear description of the technical solutions of the embodiments of this application, the terms "first," "second," etc., are used to distinguish identical or similar items with substantially the same function and effect. Those skilled in the art will understand that the terms "first," "second," etc., do not limit the quantity or execution order, and that "first," "second," etc., do not necessarily imply differences.

[0056] In addition, the same reference numerals in the figures indicate the same or similar structures, so repeated descriptions of them will be omitted. That is, the various parts in this specification are described in a combination of parallel and progressive manner. Each part focuses on the differences from other parts, and the same or similar parts between the various parts can be referred to each other.

[0057] Figure 1 A schematic diagram of an implementation of a power converter is shown, such as... Figure 1 As shown, the power converter 10 includes a rectifier circuit 11, a power factor calibration circuit 12, a power conversion unit 13, a primary-side controller 14, a protocol chip 15, and a secondary-side controller 16. The power conversion unit 13 includes a transformer TR, a primary-side circuit coupled to the primary winding Np of the transformer TR (including a recyclable circuit composed of a resistor R1, a capacitor C2, and a diode D1), and a secondary-side circuit coupled to the secondary winding Ns of the transformer TR (including a rectifier diode Q2 and an output capacitor Co).

[0058] The secondary-side feedback control scheme of the power converter 10 includes using a protocol chip 15 on the secondary side to obtain an error signal COMP based on the output voltage Vo of the power converter 10, and transmitting the error signal COMP to the primary-side controller 14 on the primary side through the secondary-side controller 16 and the isolation device 17. The primary-side controller 14 then determines the corresponding current reference and frequency control curve by analyzing the received signal, and achieves power control through peak current control.

[0059] In PD (Power Delivery) fast charging applications, such as those above 75W, the power factor calibration circuit 12 and power conversion unit 13 in the power converter 10 form a cascaded architecture. At this time, the protocol chip 15 can also generate an enable control signal PFC for the power factor calibration circuit 12, and transmit it to the power factor calibration circuit 12 on the primary side through the corresponding optocoupler isolation device 18, so as to realize the enable control of the power factor calibration circuit 12 under different operating conditions.

[0060] Understandable. Figure 1 The secondary-side feedback (also known as secondary-side master control) scheme shown requires the use of multiple isolation devices to enable the transmission of various control information from the secondary side to the primary side. For example, the switching frequency information is only transmitted through the isolation device 17, while the current reference information needs to be obtained by the primary-side controller 14 through other conversions of the frequency information. This makes it impossible to decouple the switching frequency information and the current reference information separately, which is not limited to efficiency optimization under different power levels. For another example, in some application scenarios, in order to optimize the enable control of the power factor calibration circuit 12, additional optocoupler isolation devices are required to enable communication between the protocol chip 14 and the primary side, which increases the complexity of the system.

[0061] Figure 2 A schematic diagram of an embodiment of a power converter provided according to an embodiment of this application is shown. Figure 1 The problems existing in the power converter shown have been improved and optimized.

[0062] like Figure 2 As shown, in this embodiment, the power converter 20 includes a rectifier circuit 21, a power factor calibration circuit 22, a power conversion unit 23, and a control circuit. The rectifier circuit 21, the power factor calibration circuit 22, and the power conversion unit 23 are cascaded between the input and output terminals of the power converter 20. The control circuit is coupled to the power conversion unit 23 and controls the power conversion unit 23 to perform power conversion.

[0063] The rectifier circuit 21 is used to rectify the AC signal V received at the input terminal. AC Rectification is performed. When the input signal of the power converter 20 is a DC signal, the rectifier circuit 21 can be omitted. The specific structure of the rectifier circuit 21 can be understood by referring to existing technical solutions.

[0064] The power factor calibration circuit 22 is used to improve the power factor of the input signal. The specific structure of the power factor calibration circuit 22 can be understood by referring to existing technical solutions. In some embodiments, the power factor calibration circuit 22 may be omitted.

[0065] The power conversion unit 23 includes a transformer TR with a primary winding Np and a secondary winding Ns, a voltage input circuit and a power transistor Q1 coupled to the primary winding Np, and a voltage output circuit and a rectifier transistor Q2 coupled to the secondary winding Ns.

[0066] exist Figure 2 In the example shown, the voltage input circuitry includes an energy recovery circuit (e.g., a resistor R1, a capacitor C2, and a diode D1) coupled between the same-named and opposite-named terminals of the primary winding Np. The voltage output circuitry includes a capacitor Co coupled between the secondary winding Ns and the output terminal of the power converter 20. In some other examples, the electrical energy converted by the power converter 20 passes through a filter before reaching the load coupled to the output terminal.

[0067] Power transistor Q1 and sampling resistor Rcs are connected in series between the primary winding Np and reference ground, while rectifier transistor Q2 is connected between the secondary winding Ns and the voltage output circuit. Figure 2 In the example shown, power transistor Q1 is an NMOS field-effect transistor, and rectifier transistor Q2 is a diode. In some other embodiments, rectifier transistor Q2 may also be an NMOS field-effect transistor to achieve synchronous rectification. In some other examples, the sampling resistor Rcs may not be included in the power converter 20.

[0068] The control circuit includes a primary-side control circuit 24, a protocol chip 25, a secondary-side control circuit 26, and a digital isolator 27. The primary-side control circuit 24 is located on the primary side of the power converter 20, while the secondary-side control circuit 26 and the protocol chip 25 are located on the secondary side of the power converter 20. The protocol chip 25 is coupled to the output terminal of the power converter 20, and the secondary-side control circuit 26 is coupled to the output terminal of the protocol chip 25. The digital isolator 27 is coupled between the primary-side control circuit 24 and the secondary-side control circuit 26.

[0069] The protocol chip 25 is used to detect the output status of the power converter 20 (including the magnitude of the output signal and / or the load connection status, wherein the output signal includes the output voltage Vo, output current, output power, etc.), and outputs a corresponding indication signal based on the detection results.

[0070] In embodiments where a power factor calibration circuit 22 is provided in the power converter 20, the indication signal output by the protocol chip 25 includes, for example, an error signal COMP and a first enable indication signal PFC-S. In embodiments where a power factor calibration circuit 22 is not provided in the power converter 20, the indication signal output by the protocol chip 25 includes, for example, the error signal COMP. The error signal COMP indicates changes in the output voltage Vo and the load, while the first enable indication signal PFC-S indicates the enable information of the power factor correction circuit 22. The specific structure of the protocol chip 25 can be understood by referring to existing technical solutions.

[0071] It should be noted that, in Figure 2 In the example shown, the error signal COMP is generated by an error amplifier circuit integrated inside the protocol chip 25 and a compensation loop (not shown) located outside the protocol chip 25 and connected to the error signal output pin of the protocol chip 25. However, in some other embodiments, the error amplifier circuit may also be located outside the protocol chip 25. In this embodiment, the error amplifier circuit amplifies the output feedback voltage (characterizing the output voltage) and a preset reference voltage, and the compensation loop compensates for the output of the error amplifier circuit.

[0072] The first enable indication signal PFC-S is obtained, for example, by the protocol chip 25 according to the output requirements of the power converter set by the user.

[0073] The secondary-side control circuit 26 obtains switching frequency information and / or current reference information based on the error signal COMP, and modulates the obtained information to generate a reference pulse signal. In an embodiment where a power factor calibration circuit 22 is provided in the power converter 20, the secondary-side control circuit 26 also obtains the enable information of the power factor correction circuit based on the first enable indication signal PFC-S, and modulates the enable information of the power factor correction circuit into the reference pulse signal after modulating the switching frequency information and / or current reference information into the reference pulse signal, so as to use the same reference pulse signal to represent multiple types of information that need to be transmitted from the secondary side to the primary side.

[0074] Digital isolator 27 is used to achieve electrical isolation between the primary-side control circuit 24 and the secondary-side control circuit 26, while establishing a communication link between the two circuits to transmit reference pulse signals. Optionally, digital isolator 27 can be, for example, a magnetic isolator or a capacitive isolator, to avoid the problem of short service life.

[0075] The primary-side control circuit 24 is used to demodulate the reference pulse signal to obtain primary-side control information. The primary-side control signal controls the switching state of the power transistor Q1.

[0076] In embodiments where the power converter 20 does not include a power factor calibration circuit 22, the primary-side control circuit 24 obtains at least one of a primary-side turn-on control signal (denoted as Vgs1_on) and a primary-side turn-off control signal (denoted as Vgs1_off) after demodulating the reference pulse signal. In embodiments where the power converter 20 includes a power factor calibration circuit 22, the primary-side control circuit 24 obtains at least one of a primary-side turn-on control signal (denoted as Vgs1_on) and a primary-side turn-off control signal (denoted as Vgs1_off), as well as a first enable signal (denoted as PFC_EN), after demodulating the reference pulse signal. The first enable signal PFC_EN controls whether the power factor correction circuit 22 is enabled or not; the primary-side turn-on control signal Vgs1_on controls the turn-on of power transistor Q1; and the primary-side turn-off control signal Vgs1_off controls the turn-off of power transistor Q1. Figure 2 In the example shown, the primary-side control circuit 24 is also coupled to the control terminal of the power transistor Q1 and one end of the sampling resistor Rcs, respectively. It provides a drive signal Vgs1 to the control terminal of the power transistor Q1 according to the primary-side turn-on control signal Vgs1_on and the primary-side turn-off control signal Vgs1_off, thereby controlling the turn-on and turn-off of the power transistor Q1.

[0077] In some embodiments, such as Figure 3 As shown, the digital isolator 27 includes a transmitting circuit 31 and a receiving circuit 32, which are isolated from each other by an isolation wall 33. That is, the isolator 33 is used to isolate the circuit modules located on the primary side and the circuit modules located on the secondary side in the control circuit of the power converter 20. Figure 3 In the example shown, the power transistor Q1, the primary-side control circuit 24, and the receiving circuit 32 in the digital isolator 27 are located on one side of the isolation wall 33 (i.e., the primary side), while the secondary-side control circuit 26 and the transmitting circuit 31 in the digital isolator 27 are located on the other side of the isolation wall 33 (i.e., the secondary side). In some embodiments, the control circuit may also include a driving circuit 34 located on the primary side of the isolation wall 33, which is connected to the gate G and source S of the power transistor Q1 and the primary-side control circuit 24, respectively.

[0078] The working principle of this control circuit is explained step by step below:

[0079] 1. Information Modulation

[0080] 1.1 Modulation of switching frequency information

[0081] When it is necessary to modulate the switching frequency information, the secondary control circuit 26 is configured to set the pulse frequency of the reference pulse signal according to the switching frequency information, thereby realizing the modulation processing of the switching frequency information.

[0082] In specific implementation, the secondary control circuit 26, in response to the error signal COMP received from the error amplifier circuit or protocol chip 25, performs the following actions: Figure 5 The correspondence between the error signal COMP and the pulse frequency fs shown in the figure determines the pulse frequency value, thereby setting the pulse frequency fs of the reference pulse signal according to the determined switching frequency value.

[0083] In this way, the switching frequency information contained in the error signal COMP can be modulated into the reference pulse signal, thereby using the pulse frequency parameter of the reference pulse signal to reflect the switching frequency information and realizing the modulation processing of the switching frequency information.

[0084] 1.2 Modulation of current reference information

[0085] When it is necessary to modulate the current reference information, the secondary control circuit 26 is configured to set the effective pulse width time of the reference pulse signal according to the current reference information, thereby realizing the modulation processing of the current reference information.

[0086] In specific implementation, the secondary control circuit 26, in response to the error signal COMP received from the error amplifier circuit or protocol chip 25, performs the following actions: Figure 5 The correspondence between the error signal COMP and the effective pulse width time ton shown in the figure determines the effective pulse width time value characterizing the current reference information, and thus sets the effective pulse width time of the reference pulse signal according to the determined effective pulse width time value.

[0087] In this way, the current reference information contained in the error signal COMP can be modulated into the reference pulse signal, thereby using the effective pulse width and time parameters of the reference pulse signal to reflect the current reference information and realizing the modulation processing of the current reference information.

[0088] In this embodiment, the high-level pulse width of the reference pulse signal is defined as the effective pulse width of the reference pulse signal. Of course, in some other embodiments, the low-level pulse width of the reference pulse signal can also be defined as the effective pulse width of the reference pulse signal.

[0089] It should be noted that, since the switching frequency information and current reference information are reflected by different parameters of the reference pulse signal in the embodiments of this application, the decoupled design of frequency and current reference can be realized. That is, when the reference pulse signal is used to reflect the switching frequency and current reference, the values ​​of the two can be designed independently. Compared with the existing modulation method that uses the frequency parameter of the reference pulse signal to reflect the current reference information, the solution of the embodiments of this application can achieve efficiency optimization under different power levels.

[0090] 1.3 Modulation of enable information for power factor correction circuit

[0091] When the enable information of the power factor correction circuit needs to be modulated, the secondary control circuit 26 is configured to determine whether to set an invalid pulse width with a first time length in the minimum effective pulse width time of the reference pulse signal based on the enable information of the power factor correction circuit, so as to modulate the enable information of the power factor correction circuit into the reference pulse signal.

[0092] In specific implementation, the secondary control circuit 26, upon receiving the first enable indication signal PFC-S output by the protocol chip 25, determines the level state of the first enable indication signal PFC-S. Based on the level state of the first enable indication signal PFC-S, it determines whether to set an invalid pulse width with a first time length within the minimum effective pulse width time of the reference pulse signal. For example, when the level state of the first enable indication signal PFC-S is detected to be invalid (e.g., low level), it is determined that there is no need to set an invalid pulse width with a first time length within the minimum effective pulse width time of the reference pulse signal. The waveform of the reference pulse signal to be transmitted at this time is as follows: Figure 7 As shown; when the level of the first enable indicator signal PFC-S is detected to be valid (e.g., high level), it is determined that an invalid pulse width with a first time length needs to be set within the minimum effective pulse width time of the reference pulse signal. The waveform of the reference pulse signal to be transmitted at this time is as follows: Figure 8 As shown.

[0093] Through the above processing, the enable information of the power factor correction circuit contained in the first enable indication signal PFC-S can be modulated into the reference pulse signal. Thus, the presence or absence of invalid pulse widths in the minimum effective pulse width time of the reference pulse signal can be used to reflect the enable information of the power factor correction circuit, thereby realizing the modulation processing of the enable information of the power factor correction circuit.

[0094] It should be noted that the minimum effective pulse width time of the reference pulse signal (denoted as t) on_MIN ) refers to the preset reference pulse signal parameters, such as Figure 8 As shown, the minimum effective pulse width time t of the reference pulse signal on_MIN Specifically, t represents the time starting from the rising edge of the reference pulse signal. on_MIN During this period, the rising / falling edges of the reference pulse signal detected within the minimum effective pulse width are not included in the determination of the pulse frequency of the reference pulse signal. This ensures that when using the reference pulse signal to transmit multiple types of information, there will be no conflict in the transmission of current reference information and the enable information for the power factor correction circuit.

[0095] In some examples, such as Figure 6 As shown, the minimum effective pulse width time t of the reference pulse signal on_MINFor example, it can correspond to the minimum value of a pre-set current reference signal Vcs_ref (denoted as V). cs_ref_MIN Configure it.

[0096] It should be noted that, during the modulation and processing of the enable information for the power factor correction circuit, there is no specific limitation on the length of the first time.

[0097] 2. Signal transmission

[0098] In this embodiment, a digital isolator (such as a magnetic isolator or a capacitor isolator) 27 is used to transmit the reference pulse signal from the secondary side to the primary side of the power converter.

[0099] When feedback information needs to be transmitted from the secondary side to the primary side of the power converter, the secondary control circuit 26 sends a reference pulse signal carrying at least one of the following information: switching frequency information, current reference information, and enable information for the power factor correction circuit, to the transmitting circuit 31 located on the secondary side. Then, using non-optocoupler methods such as magnetic or capacitive coupling between the transmitting circuit 31 and the receiving circuit 32, the reference pulse signal is transmitted to the receiving circuit 32 located on the primary side, thus realizing the signal transmission from the secondary side to the primary side. In this process, since at least one type of information to be transmitted is adjusted into the same reference pulse signal, only a single channel needs to be provided by the digital isolator 27 to achieve signal transmission for multiple types of information, reducing the number of digital isolators 27 used, thereby reducing system cost and structural complexity.

[0100] Furthermore, compared to optocoupler isolation devices, this embodiment uses a digital isolator 27 to transmit signals between the primary and secondary sides, which results in a longer service life for the isolation device and effectively solves the problem of the service life of the isolation device.

[0101] 3. Information demodulation

[0102] 3.1 Demodulation of switching frequency information

[0103] In some embodiments, when demodulation processing of the switching frequency information is required, refer to Figure 4 The primary-side control circuit 24 includes a turn-on control unit 41. The input terminal of the turn-on control unit 41 is coupled to the output terminal of the receiving circuit 32. The receiving circuit 32 transmits the received reference pulse signal to the turn-on control unit 41. The turn-on control unit 41 responds to the received reference pulse signal, for example, according to... Figure 6 The correspondence between the pulse frequency fs and the switching frequency fsw shown in the figure determines the switching frequency fsw of the primary side control signal. Then, the primary side conduction control signal Vgs1_on is generated according to the determined switching frequency to realize the demodulation processing of the switching frequency information contained in the reference pulse signal.

[0104] For example, a reference pulse signal with the same frequency as the primary control signal can be directly generated on the secondary side, so that the primary control circuit 24 generates a primary conduction control signal Vgs1_on when it detects the trigger edge of the reference pulse signal. The primary conduction control signal Vgs1_on is used to control the conduction of the power transistor Q1.

[0105] It should be noted that the aforementioned trigger edge can be either the rising edge or the falling edge of the reference pulse signal, and the rising edge and falling edge detected within the minimum effective pulse width time of the reference pulse signal are not included in the calculation.

[0106] Of course, in some other embodiments, a fixed off-time control method can also be used on the primary side of the power converter. In these embodiments, the turn-on control unit 41 is configured, for example, to start timing at the off moment of the power transistor Q1 and control the power transistor Q1 to turn on after the timing reaches a preset time threshold. In this case, the switching frequency information may not be modulated on the secondary side of the power converter, and correspondingly, the switching frequency information may not be demodulated on the primary side of the power converter.

[0107] 3.2 Demodulation of current reference information

[0108] In some embodiments, when demodulation processing of current reference information is required, the reference... Figure 4 The primary-side control circuit 24 includes a shutdown control unit 42. The input terminal of the shutdown control unit 41 is coupled to the output terminal of the receiving circuit 32. The receiving circuit 32 transmits the received reference pulse signal to the shutdown control unit 42. Based on the received reference pulse signal, the shutdown control unit 42 obtains the current reference signal Vcs_ref (e.g., according to the effective pulse width time ton of the reference pulse signal) Figure 6 The correspondence between the pulse width time ton and the current reference signal Vcs_ref shown in the diagram generates the corresponding current reference signal Vcs_ref. When the sampled signal Vcs, representing the inductor current, reaches the current reference signal Vcs_ref, a primary-side turn-off control signal Vgs1_off is generated, thus demodulating the current reference information contained in the reference pulse signal. The primary-side turn-off control signal Vgs1_off is used to control the turn-off of the power transistor Q1, and the sampled signal Vcs, representing the inductor current, can be obtained on the primary side using the sampling resistor Rcs or other conventional methods.

[0109] It should be noted that in embodiments where a power factor correction circuit 22 is provided in the power converter 20, that is, when the reference pulse signal contains enable information for the power factor correction circuit, such as Figure 8As shown, the effective pulse width time ton of the reference pulse signal includes a first time length t PFC .

[0110] Of course, in some other embodiments, a fixed on-time control method can also be used on the primary side of the power converter. In these embodiments, the turn-off control unit 41 is configured, for example, to start timing at the turn-on moment of the power transistor Q1 and control the power transistor Q1 to turn off after timing reaches a preset time threshold. In this case, the current reference information may not be modulated on the secondary side of the power converter, and correspondingly, the current reference information may not be demodulated on the primary side of the power converter.

[0111] 3.3 Demodulation of enable information for power factor correction circuit

[0112] When demodulation processing of the enable information of the power factor correction circuit is required, refer to Figure 4 The primary-side control circuit 24 includes a first enable control unit 43, the input of which is coupled to the output of the receiving circuit 32. The receiving circuit 32 transmits the received reference pulse signal to the first enable control unit 43. For the received reference pulse signal, the first enable control unit 43 is configured to operate within the minimum effective pulse width time t of the reference pulse signal. on_MIN The detection of whether there exists a first time length t PFC The invalid pulse width occurs when the minimum effective pulse width time t of the reference pulse signal is within the range of the reference pulse signal. on_MIN The first time length t was detected in the middle. PFC When the pulse width is invalid, a valid first enable signal PFC_EN is output to the power factor correction circuit 22, controlling the power factor correction circuit 22 to be disabled, for example, controlling the power factor correction circuit 22 to not work or to work in a low-power mode; when the minimum effective pulse width t of the reference pulse signal is within the specified range... on_MIN When no invalid pulse width is detected, an invalid first enable signal PFC_EN is output to the power factor correction circuit 22 to enable the power factor correction circuit 22, for example, to control the power factor correction circuit 22 to work normally.

[0113] As can be seen from the above, the signal isolation transmission scheme between the primary and secondary sides disclosed in the various embodiments of this application can use a digital isolator to transmit multiple secondary side feedback information through a single channel, thereby simplifying the system and solving the lifespan problem when using an optocoupler isolator for signal transmission.

[0114] It should be noted that this application is attached with Figure 2 The example given is that the rectifier Q2 is a diode, but the solution in this application is also applicable when the rectifier Q2 is a synchronous rectifier, and the conduction and cutoff of the synchronous rectifier are controlled by the secondary control circuit 26.

[0115] Furthermore, this application only uses a conventional flyback converter as an example to illustrate the technical solution of this application. However, it should be understood that the technical solution disclosed in this application can also be applied to other types of isolated power converters, such as active clamp flyback converters.

[0116] Furthermore, embodiments of this application also provide a control method for a power converter. This control method can be applied, for example, to the power converter disclosed in any of the foregoing embodiments. In specific implementation, such as... Figure 9 As shown, the control method includes performing the following steps:

[0117] In step 910, switching frequency information and / or current reference information are obtained based on the error signal, which is used to indicate the change in the output voltage of the power converter.

[0118] In this step, an error amplifier circuit and a compensation loop can be used to obtain an error signal that reflects the load change, and then the switching frequency information and / or current reference information can be obtained based on the error signal.

[0119] In some embodiments, when the power converter further includes a power factor correction circuit cascaded with the power conversion unit, the method further includes: obtaining enable information for the power factor correction circuit based on the output demand of the power converter, so as to modulate the enable information of the power factor correction circuit into a reference pulse signal. For example, a protocol chip can be used to detect the output demand of the power converter and obtain the enable information of the power factor correction circuit based on the detection result.

[0120] In some embodiments, the error amplifier circuit can be directly integrated into the protocol chip, thereby directly obtaining at least two of the following information: switching frequency information, current reference information, and power factor correction circuit enable information, based on the output of the protocol chip.

[0121] In step 920, the obtained information is modulated to generate a reference pulse signal.

[0122] In step 930, a digital isolator is used to transmit the reference pulse signal from the secondary side to the primary side of the power converter.

[0123] In this step, the digital isolator includes, but is not limited to, a magnetic isolator or a capacitor isolator.

[0124] In step 940, the reference pulse signal is demodulated on the primary side of the power converter to obtain the primary side control signal, which controls the switching state of the power transistor.

[0125] Furthermore, when the power converter is also provided with a power factor correction circuit cascaded with the power conversion unit, step 940 further includes obtaining a first enable signal based on the demodulation processing of the reference pulse signal, the first enable signal being used to control whether the power factor correction circuit is enabled or not.

[0126] In practice, the specific implementation of each step in the control method of the power converter described above and the technical effects that can be achieved can be found in the aforementioned embodiments of the power converter, and will not be repeated here.

[0127] Finally, it should be noted that the above embodiments are merely examples for clearly illustrating this application and are not intended to limit the implementation. Those skilled in the art can make other variations or modifications based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this application.

Claims

1. A control circuit for a power converter, the power converter comprising a power conversion unit and a control circuit, the power conversion unit comprising a transformer, a power transistor coupled to the primary winding of the transformer, and a rectifier transistor coupled to the secondary winding of the transformer, the control circuit comprising: The secondary control circuit obtains switching frequency information and / or current reference information based on the error signal, modulates the obtained information to generate a reference pulse signal, and obtains the error signal by amplifying and compensating the output feedback voltage of the power converter and the preset reference voltage. A digital isolator, coupled to the secondary control circuit, is used to transmit the reference pulse signal; The primary-side control circuit, coupled to the digital isolator, is used to demodulate the reference pulse signal to obtain a primary-side control signal, which controls the switching state of the power transistor.

2. The control circuit according to claim 1, wherein, The power converter also includes a power factor correction circuit cascaded with the power conversion unit; The secondary-side control circuit is further configured to modulate the enable information of the power factor correction circuit into the reference pulse signal, wherein the enable information of the power factor correction circuit is obtained according to the output requirements of the power converter.

3. The control circuit according to claim 2, wherein, The primary-side control circuit is further configured to: The reference pulse signal is demodulated to obtain a first enable signal, which is used to control whether the power factor correction circuit is enabled or not.

4. The control circuit according to claim 1, wherein, The secondary-side control circuit is configured as follows: The pulse frequency of the reference pulse signal is set according to the switching frequency information to achieve modulation processing of the switching frequency information.

5. The control circuit according to claim 1, wherein, The secondary-side control circuit is configured as follows: The effective pulse width time of the reference pulse signal is set according to the current reference information to achieve modulation processing of the current reference information.

6. The control circuit according to claim 2, wherein, The reference pulse signal has a minimum effective pulse width time; The secondary-side control circuit is configured as follows: Based on the enable information of the power factor correction circuit, it is determined whether to set an invalid pulse width with a first time length in the minimum effective pulse width time of the reference pulse signal, so as to modulate the enable information of the power factor correction circuit into the reference pulse signal.

7. The control circuit according to claim 4, wherein, The primary-side control circuit includes: The turn-on control unit generates the primary-side turn-on control signal when the trigger edge of the reference pulse signal is detected.

8. The control circuit according to claim 5, wherein, The primary-side control circuit includes: The shutdown control unit obtains a current reference signal based on the effective pulse width time of the reference pulse signal, and generates the primary-side shutdown control signal when the sampling signal characterizing the inductor current reaches the current reference signal.

9. The control circuit according to claim 6, wherein, The primary-side control circuit includes: The first enable control unit generates a valid first enable signal when an invalid pulse width of the first time length is detected within the minimum effective pulse width time of the reference pulse signal, and generates an invalid first enable signal when no invalid pulse width is detected within the effective pulse width time of the reference pulse signal. A valid first enable signal is used to enable the power factor correction circuit, while an invalid first enable signal is used to disable the power factor correction circuit.

10. The control circuit according to claim 1, wherein, The digital isolator includes a magnetic isolator or a capacitive isolator.

11. A power converter, comprising: The control circuit as described in any one of claims 1-10.

12. A control method for a power converter, the power converter comprising a power conversion unit, the power conversion unit comprising a transformer, a power transistor coupled to the primary winding of the transformer, and a rectifier transistor coupled to the secondary winding of the transformer, the control method comprising: The error signal is obtained by amplifying and compensating the output feedback voltage of the power converter and the preset reference voltage. Switching frequency information and / or current reference information are obtained based on the error signal. The error signal is used to indicate the change of the output voltage of the power converter. The obtained information is modulated to generate a reference pulse signal; The reference pulse signal is transmitted from the secondary side to the primary side of the power converter using a digital isolator. On the primary side of the power converter, the reference pulse signal is demodulated to obtain a primary side control signal, which controls the switching state of the power transistor.

13. The control method according to claim 9, wherein, The power converter also includes a power factor correction circuit cascaded with the power conversion unit; Before modulating the acquired information, the process also includes: The enable information of the power factor correction circuit is obtained according to the output requirements of the power converter, so as to modulate the enable information of the power factor correction circuit into the reference pulse signal.

14. The control method according to claim 13, wherein, It also includes: demodulating the reference pulse signal to obtain a first enable signal, the first enable signal being used to control whether the power factor correction circuit is enabled or not.

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