Self-synchronizing common-mode current control method and system for power balance of energy storage type MMC (Modular Multilevel Converter)

Abstract

The invention discloses a self-synchronizing common-mode current control method and system for energy storage type MMC power balance, and belongs to the technical field of power electronic control. Comprising the following steps: acquiring and calculating capacitor voltages of upper and lower bridge arm sub-modules of each phase to obtain the sum and difference of the voltages of the upper and lower bridge arms, and filtering to extract direct current and fundamental frequency component steady-state values; controlling a common-mode voltage direct-current component small signal part, and superposing a direct-current component steady-state value through a discrete PI controller to generate a common-mode voltage direct-current component; controlling the small signal part of the phase angle of the common-mode voltage fundamental frequency component relative to the differential-mode voltage fundamental frequency component, superposing the phase angle of the steady-state value of the common-mode voltage fundamental frequency component through a discrete PI controller, generating the phase angle of the common-mode voltage fundamental frequency component relative to the differential-mode voltage fundamental frequency component, and obtaining the common-mode voltage fundamental frequency component; and superposing the differential-mode voltage with a differential-mode voltage fundamental component, and generating a sub-module driving signal through CPS-PWM (Pulse-Width Modulation). According to the invention, rapid self-balancing of phase-level and bridge-arm-level voltages can be realized under the condition of power imbalance.

Description

Technical Field

[0001] This invention belongs to the field of power electronic control technology, specifically relating to a self-synchronizing common-mode current control method and system for power balancing of energy storage type MMC. Background Technology

[0002] Modular multilevel converters (MMCs) offer superior scalability, modularity, and high-quality output waveforms, making them widely used in high-voltage direct current (HVDC) transmission, medium-voltage distribution networks, and flexible AC transmission systems (FACTS). Their inherent modular structure allows for the use of low-rated power devices, simplifying voltage equalization design and enhancing system reliability. In recent years, research integrating energy storage into MMCs has attracted increasing attention, leading to the concept of energy storage-based MMCs. Unlike traditional MMCs that rely solely on continuous power flow between AC and DC terminals, energy storage-based MMCs directly integrate energy storage units, such as batteries, supercapacitors, or hybrid energy storage devices, within submodules. This architecture allows each submodule to function not only as a power conversion stage but also as an independent energy storage unit, significantly enhancing system functionality and applicability. However, the presence of distributed energy storage units alters the internal power flow direction and power balance, leading to voltage imbalances between upper and lower arms and uneven energy utilization between phases. Traditional voltage equalization methods developed for non-energy storage-based MMCs often fail to meet the stringent power equalization requirements of energy storage-based MMCs, especially under highly dynamic power exchange conditions.

[0003] To address the voltage imbalance problem in carrier phase-shift pulse width modulation (CPS-PWM) energy storage MMCs, this invention proposes a self-synchronizing common-mode current control method for power balance in energy storage MMCs. Summary of the Invention

[0004] To address the shortcomings of existing technologies, the present invention aims to provide a self-synchronizing common-mode current control method and system for power balancing of energy storage MMCs, thereby solving the problems in the prior art.

[0005] The objective of this invention can be achieved through the following technical solutions: A self-synchronizing common-mode current control method for power balancing in energy storage MMCs includes the following steps: S1, real-time acquisition of capacitor voltage of each phase upper and lower bridge arm submodule; S2, calculate the collected upper and lower bridge arm submodule capacitor voltages, obtain the sum and difference of the upper and lower bridge arm voltages, filter them, and extract the steady-state value of the DC component of the common-mode voltage and the steady-state value of the fundamental frequency component of the common-mode voltage. S3 employs a dual closed-loop control system, including phase-level voltage control and bridge arm-level voltage control. In the phase-level voltage control, the small-signal portion of the common-mode voltage DC component is controlled and compared with the zero reference value under steady-state conditions. The steady-state value of the common-mode voltage DC component from S2 is then superimposed using a discrete PI controller to generate the common-mode voltage DC component. In bridge arm voltage control, the small-signal portion of the phase angle between the common-mode voltage fundamental frequency component and the differential-mode voltage fundamental frequency component is controlled and compared with the zero reference value under steady state. This is combined with the phase angle between the common-mode current fundamental frequency component and the differential-mode voltage fundamental frequency component. The phase angle of the common-mode voltage fundamental frequency component relative to the differential-mode voltage fundamental frequency component is generated by superimposing the steady-state value of the common-mode voltage fundamental frequency component in S2 using a discrete PI controller. ; S4, obtained using S3 Generate synchronously controllable common-mode voltage fundamental frequency component ; S5, the common-mode voltage DC component Common-mode voltage fundamental frequency component Differential mode voltage fundamental frequency component The signals are superimposed and used to generate submodule drive signals via CPS-PWM.

[0006] Furthermore, the calculation process for the voltages of the upper and lower bridge arms is as follows: in, This is the fundamental frequency component of the common-mode voltage. This represents the amplitude of the fundamental frequency component of the common-mode voltage. The common-mode voltage fundamental frequency component relative to the differential-mode voltage fundamental frequency component The phase angle; For the upper bridge arm voltage, This is the voltage of the lower bridge arm. This is the DC component of the common-mode voltage. For AC power grid frequency, This is the DC bus voltage.

[0007] Furthermore, in S2, the filtering process is as follows: The DC component of the output power within one fundamental cycle is extracted using a moving average filter (MAF), yielding the DC components of the instantaneous power of the upper and lower bridge arms as follows: Among them, symbols This indicates that the MAF step is applied to the variable. The MAF value represents the instantaneous common-mode power of the bridge arm. The MAF value represents the instantaneous power of the differential mode of the bridge arm; This represents the steady-state value of the DC component of the common-mode voltage. This represents the steady-state value of the DC component of the common-mode current. This represents the phase angle between the fundamental frequency component of the differential-mode current and the fundamental frequency component of the differential-mode voltage. This represents the phase angle between the fundamental frequency component of the common-mode current and the fundamental frequency component of the differential-mode voltage. This represents the phase angle between the common-mode voltage fundamental frequency component and the differential-mode voltage fundamental frequency component. This is the DC side current. This represents the amplitude of the fundamental frequency component of the common-mode voltage. Furthermore, the phase-level voltage control, through a discrete controller, maintains the DC component of the system common-mode current, thereby adjusting the average capacitor voltage of that phase; the bridge arm-level voltage control, through adjustment... To adjust Synchronization angle enables the redistribution of power between bridge arms and maintains the balance of capacitor voltage.

[0008] Furthermore, in S3, the control process for the small signal of the common-mode voltage DC component is as follows: In phase-level voltage control, the differential relationship between common-mode voltage and common-mode current, derived from the common-mode voltage small-signal model, is as follows: in, Ra For the bridge arm resistance, La For bridge arm inductance, For common-mode voltage small signal, For common-mode current small signal; The transfer function of the common-mode voltage small-signal model is: Discretize the transfer function using the zero-order preservation method, and use express ,use express The discrete transfer function is obtained as follows: The sampling period Ts is set to 2ms. The system is discretized using the zero-order hold discretization method. A discrete transfer function is established from the modulation voltage to the total capacitance voltage of the upper and lower bridge arms. The small signal transfer function is derived from the phase capacitor charging process. The discretized transfer function is: in, N The number of bridge arm sub-modules, Csm For submodule capacitors, Usm The rated voltage of the submodule. uc This refers to the capacitor voltage of the submodule. This refers to the small-signal portion of the DC component of the common-mode power of the bridge arm. And introduce a discrete controller Dp ( z and moving average filter H ( z This enables closed-loop control of phase-to-phase voltage.

[0009] Furthermore, The small signal control process is as follows: The small-signal equations for common-mode voltage and common-mode current are derived from the small-signal model: in, for The steady-state operating point, for The steady-state operating point; Its transfer function is: Take sampling period T s For a time interval of 2ms, the zero-order hold method is used for discretization to obtain the small signal. voltage difference between upper and lower bridge arms Discrete transfer function: in, This is the small DC component of the common-mode power of the bridge arm; Introducing a discrete PI controller D a ( z The MAF (Magnetic Filter) performs closed-loop control on the voltage of the lower bridge arm capacitor.

[0010] A self-synchronizing common-mode current control system for power balancing in energy storage-type MMCs includes: Signal acquisition module: Real-time acquisition of capacitor voltages of each phase's upper and lower bridge arm submodules; Signal filtering module: Calculates the collected capacitor voltages of the upper and lower bridge arm submodules to obtain the sum and difference of the voltages of the upper and lower bridge arms, and filters them to extract the steady-state values ​​of the DC component and the fundamental frequency component of the common-mode voltage. Dual closed-loop control module: Employs dual closed-loop control including phase-level voltage control and bridge arm-level voltage control; in phase-level voltage control, the small-signal portion of the common-mode voltage DC component is controlled and compared with the zero reference value under steady state. The steady-state value of the common-mode voltage DC component is superimposed by a discrete PI controller to generate the common-mode voltage DC component. In bridge arm voltage control, the small-signal portion of the phase angle between the common-mode voltage fundamental frequency component and the differential-mode voltage fundamental frequency component is controlled and compared with the zero reference value under steady state. This is combined with the phase angle between the common-mode current fundamental frequency component and the differential-mode voltage fundamental frequency component. The phase angle of the common-mode voltage fundamental frequency component relative to the differential-mode voltage fundamental frequency component is generated by superimposing the phase angle of the steady-state value of the common-mode voltage fundamental frequency component using a discrete PI controller. ; Synchronization Angle Injection Module: Utilizing the obtained Generate synchronously controllable common-mode voltage fundamental frequency component ; Signal synthesis module: converts the common-mode voltage DC component Common-mode voltage fundamental frequency component Differential mode voltage fundamental frequency component The signals are superimposed and used to generate submodule drive signals via CPS-PWM.

[0011] A computer storage medium storing a readable program that, when executed, instructs a computing device to perform the self-synchronizing common-mode current control method for power balancing of an energy storage MMC as described above.

[0012] An electronic device includes: a processor, a memory, a communication interface, and a communication bus, wherein the processor, the memory, and the communication interface communicate with each other through the communication bus; The memory is used to store at least one executable instruction that causes the processor to perform operations corresponding to the self-synchronizing common-mode current control method for power balancing of energy storage MMC as described above.

[0013] A computer program product includes computer instructions that instruct a computing device to perform operations corresponding to the self-synchronizing common-mode current control method for power balancing of energy storage MMCs described above.

[0014] The beneficial effects of this invention are: 1. This invention enables rapid self-balancing of phase-to-phase and bridge arm voltages in CPS-PWM controlled energy storage MMCs under power imbalance conditions. The common-mode voltage injection proposed in this invention effectively generates controllable fundamental frequency common-mode currents, which play a key role in compensating for power imbalances between in-phase bridge arms and maintaining capacitor voltage balance. Under rated operating conditions, the capacitor voltages of the upper and lower bridge arms remain well balanced, indicating that the proposed self-synchronizing common-mode current control strategy maintains steady-state performance. When unbalanced power is introduced between energy storage units, this method quickly adjusts transient voltage deviations, effectively restores system balance, and ensures system stability, demonstrating the robustness and effectiveness of this method under nominal and disturbed operating scenarios.

[0015] 2. The self-synchronizing common-mode current control method proposed in this invention introduces a common-mode voltage and uses a closed-loop controller to effectively generate a controllable common-mode current, thereby maintaining the stability of the phase voltage and the bridge arm voltage. 3. The moving average filter used in this invention effectively filters out high-frequency components, retaining only the DC component and AC fundamental frequency component required by the control system. 4. The dual closed-loop control proposed in this invention, consisting of phase-level voltage control and bridge arm-level voltage control, works together at both the phase-level and bridge arm-level levels to maintain steady-state performance. 5. The phase voltage control proposed in this invention addresses the DC component of the common-mode voltage. The small signal part is controlled, and the common-mode voltage DC component is generated by a discrete PI controller, thereby achieving the balance of phase-to-phase voltage.

[0016] 6. The bridge arm voltage control proposed in this invention controls the angle... The small-signal portion of the control is controlled, solving the nonlinear transfer function problem between the control angle and the synchronization angle. A common-mode voltage DC component is generated using a discrete PI controller, and the synchronization angle is calculated. This achieves voltage balance between bridge arms. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of the topology of an energy storage MMC; Figure 2 This is a schematic diagram of the modulation voltage and bridge arm current for a non-energy storage MMC. Figure 3 Small-signal circuit topology diagram for phase-level common-mode current of energy storage MMC; Figure 4 Small-signal equivalent circuit model diagram of phase-level common-mode current of energy storage type MMC; Figure 5 A schematic diagram of the frequency domain decomposition of the small-signal common-mode current of an energy storage MMC; Figure 6 A schematic diagram illustrating the operating principle of discretized common-mode current control; Figure 7 Phase diagram of the fundamental frequency common-mode current under synchronous angle phase control; Figure 8 This is a schematic diagram of the discrete transfer function from the modulation voltage to the bridge arm voltage. Figure 9 This is a schematic diagram of the discrete closed-loop control of the bridge arm voltages; Figure 10 This is a schematic diagram of the discrete transfer function from the synchronization angle to the differential mode arm voltage. Figure 11 This is a schematic diagram of discrete closed-loop control of the differential mode bridge arm voltage; Figure 12 This is a schematic diagram of the control system structure of the energy storage type MMC model of the present invention; Figure 13 Simulation waveforms for average voltage control of the upper and lower bridge arms; Figure 14 Simulated waveform of differential mode voltage between upper and lower bridge arms Figure 15 Simulated waveform of the synchronization angle change between phase a common-mode current and differential-mode voltage; Figure 16 This is the fundamental frequency common-mode current waveform in a three-phase system. Detailed Implementation

[0019] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0020] Example 1 Figure 1 For the topology of the energy storage modular multilevel converter, the common-mode and differential-mode decomposition of the upper and lower bridge arm currents and capacitor voltages can be performed, such as... Figure 2 As shown, the voltages of the upper and lower bridge arms are respectively: in, For the upper bridge arm voltage, This is the voltage of the lower bridge arm. U dc This is the DC bus voltage. for j The fundamental frequency component of the phase-modulated voltage. (Note: The original text contains some formatting errors and inconsistencies. for The amplitudes, and their relationship is as follows: Similarly, the currents of the upper and lower bridge arms can be determined as follows: in, For the upper bridge arm current, For the lower bridge arm current, Idc This represents the total current of the three-phase DC bus. for j The fundamental frequency component of the differential mode current between the upper and lower bridge arms. (Note: The original text contains some formatting errors and inconsistencies. A more accurate translation would require the full context.) The differential mode current amplitude is related as follows: like Figure 2 As shown, j The instantaneous power of the upper and lower bridge arms can be expressed as: in, This refers to the instantaneous power of the upper bridge arm. This represents the instantaneous power of the lower bridge arm. The power transmitted to the upper or lower bridge arm from the DC side. The power transferred to the AC side by the bridge arm capacitor. This represents the reactive power exchanged between the upper and lower bridge arms at the fundamental frequency. The expressions for each power term are as follows: Furthermore, the sum of the instantaneous power of the upper and lower bridge arms is: in, This represents the phase angle between the fundamental frequency component of the differential-mode current and the fundamental frequency component of the differential-mode voltage. This refers to the active power transmitted on the DC side. To transfer active power to the bridge arm capacitors. It represents the second harmonic oscillation component related to the voltage and current on the grid side.

[0021] In traditional modular multilevel converters, the power of the upper and lower bridge arms and the power delivered to the AC side are naturally balanced. However, with the integration of distributed energy storage, this inherent balance between the DC and AC power is disrupted. The output power of the distributed energy storage units changes the energy flow on the DC side, and the power asymmetry between the various energy storage units further exacerbates the voltage imbalance within, between, and between phases of the bridge arms.

[0022] To improve the stability of capacitor voltage regulation under continuous power imbalance conditions, this invention introduces a common-mode voltage in the upper and lower bridge arms. This establishes a power transmission channel between the upper and lower bridge arms within each phase, enabling a self-synchronizing common-mode current control method for power balance in energy storage MMCs. The method includes the following steps: S1, real-time acquisition of capacitor voltage of each phase upper and lower bridge arm submodule; S2, calculate the collected upper and lower bridge arm submodule capacitor voltages, obtain the sum and difference of the upper and lower bridge arm voltages, filter them, and extract the steady-state value of the DC component of the common-mode voltage and the steady-state value of the fundamental frequency component of the common-mode voltage. In S2, the voltage calculation method for the upper and lower bridge arms is as follows: j The fundamental frequency component of the phase common-mode voltage is: in, This represents the amplitude of the fundamental frequency component of the common-mode voltage. The common-mode voltage fundamental frequency component is relative to the differential-mode voltage fundamental frequency component. The phase angle.

[0023] In S2, the filtering process is as follows: By using a moving average filter (MAF) to extract the DC component of the output power within one fundamental cycle, the DC components of the instantaneous power of the upper and lower bridge arms can be obtained as follows: Among them, symbols This indicates that the MAF step is applied to the variable. The MAF value represents the instantaneous common-mode power of the bridge arm. This represents the MAF value of the differential mode instantaneous power of the bridge arm. ...... The instantaneous common-mode power of the upper and lower bridge arms can be expressed as: in, This represents the steady-state value of the DC component of the common-mode voltage. This represents the steady-state value of the DC component of the common-mode current. The synchronization angle is the phase angle between the fundamental frequency component of the common-mode current and the fundamental frequency component of the differential-mode voltage. The control angle is the phase angle of the common-mode voltage fundamental frequency component relative to the differential-mode voltage fundamental frequency component.

[0024] From this formula, it can be seen that adjustment... This can be used to adjust the average voltage of the phase capacitor. Similarly, it can be done by controlling... By adjusting the differential mode power of the upper and lower bridge arms, the voltage difference between the upper and lower bridge arms can be adjusted, thereby achieving voltage balance of the capacitors in the upper and lower bridge arms. Therefore, this invention proposes to adjust the synchronization angle... This is to achieve voltage balance between the bridge arms.

[0025] like Figure 3The diagram shows a single-phase topology of an energy storage modular multilevel converter, consisting of an upper bridge arm submodule, a lower bridge arm submodule, and bridge arm inductors. Each bridge arm submodule typically comprises a half-bridge or full-bridge submodule connected in parallel with an energy storage unit, forming an energy storage module capable of independent charging and discharging. Based on this topology, the equivalent circuit model for this phase is further obtained, as shown below. Figure 4 As shown.

[0026] The DC component of the common-mode voltage and the fundamental frequency component are simultaneously superimposed on the modulation signals of the upper and lower bridge arms, thereby generating a corresponding small-signal common-mode current in the bridge arms. Figure 5 This is a small-signal circuit model derived from the steady-state operating point of a single-phase bridge arm. The amplitudes of the DC and fundamental frequency components of the common-mode current can be controlled by adjusting the amplitudes of the DC and fundamental frequency components of the common-mode voltage, and the synchronization angle of the common-mode current can be controlled by controlling the phase angle of the fundamental frequency component of the common-mode voltage.

[0027] Figure 6 The fundamental common-mode current is a periodic discrete control waveform. To ensure the integrity of the synchronization angle control process, the control angle within the common-mode voltage is updated once at the end of each fundamental cycle. Therefore, the synchronization angle control strategy proposed in this invention adopts a discrete control scheme with a period of 2ms. (Control angle) Synchronization Angle Differential mode voltage fundamental frequency component Interphase relationship as follows Figure 7 As shown, control angle Centered on the d-axis, with an adjustment range of [−0.5π, 0.5π], this interval is divided into six regions: I–VI. Ideal operating range (III, IV): This is the ideal operating range, within which the arm power difference remains consistently below [value missing]. This ensures that the common-mode current can fully achieve power balance between the upper and lower bridge arms.

[0028] Nonlinear compensation region (II, V): This region is the nonlinear compensation region. Within this working region, if the unbalanced power is within the controllable circular boundary, it can still be compensated by modulating the control angle. However, when the unbalanced power exceeds this boundary, the phase angle control fails, causing the control angle to be clamped at −0.5π or 0.5π.

[0029] Undercompensated region (I, VI): This region is the undercompensated region. In this region, even if the control angle reaches the limit, the power balance of the upper and lower bridge arm capacitors cannot be achieved. Therefore, the system should be avoided from operating in this region during the circuit parameter design and the selection of the amplitude of the common-mode current fundamental frequency component.

[0030] S3 employs a dual closed-loop control system, including phase-level voltage control and bridge arm-level voltage control. In the phase-level voltage control, the small-signal portion of the common-mode voltage DC component is controlled and compared with the zero reference value under steady-state conditions. The steady-state value of the common-mode voltage DC component from S2 is then superimposed using a discrete PI controller to generate the common-mode voltage DC component. In bridge arm voltage control, the small-signal portion of the phase angle between the common-mode voltage fundamental frequency component and the differential-mode voltage fundamental frequency component is controlled and compared with the zero reference value under steady state. This is combined with the phase angle between the common-mode current fundamental frequency component and the differential-mode voltage fundamental frequency component. The phase angle of the common-mode voltage fundamental frequency component relative to the differential-mode voltage fundamental frequency component is generated by superimposing the steady-state value of the common-mode voltage fundamental frequency component in S2 using a discrete PI controller. ; In S3, the phase-level voltage control, through a discrete controller, maintains the DC component of the system's common-mode current, thereby adjusting the average capacitor voltage of that phase to ensure stable upper and lower arm capacitor voltages under various operating conditions. The arm-level voltage control adjusts... To adjust Synchronization angle, thereby enabling the redistribution of power between bridge arms and maintaining capacitor voltage balance.

[0031] In S3, the small-signal control process for the common-mode voltage DC component is as follows: In the design of phase capacitor voltage control, the differential relationship between common-mode voltage and common-mode current can be obtained from the common-mode voltage small-signal model as follows: in, R a For the bridge arm resistance, L a For bridge arm inductance, For common-mode voltage small signal, This is a small-signal common-mode current.

[0032] Furthermore, its transfer function can be obtained as follows: Discretizing the transfer function using the zero-order preservation method (ZOH) allows us to use... express ,use express The discrete transfer function of the system in the z-domain is obtained as follows: Take sampling period T sWith a time interval of 2ms, the system is discretized using the zero-order hold discretization method. This allows us to establish a discrete transfer function from the modulation voltage to the total capacitance voltage of the upper and lower bridge arms. From this, the small-signal transfer function can be derived from the phase capacitor charging process, such as... Figure 8 As shown.

[0033] The discretized transfer function is: in, C sm For submodule capacitors, U sm The rated voltage of the submodule. This is the small DC component of the common-mode power of the bridge arm.

[0034] Furthermore, a discrete controller is introduced. D p ( z and moving average filter H ( z This enables closed-loop control of phase-to-phase voltage, such as... Figure 9 As shown.

[0035] Among them, discrete controller D p ( z The controller is a PI controller, discretized using the Tustin method. D p ( z The system can maintain the DC component of the common-mode current, thereby regulating the interphase capacitor voltage, combined with the moving average filter circuit. H ( z Extract the DC component of the bridge arm capacitor power to provide feedback for closed-loop regulation, ensuring the voltage of the upper and lower bridge arm capacitors under different operating conditions. Stablize.

[0036] In S3 The small signal control process is as follows: The core of bridge arm capacitor voltage balance control lies in adjusting the control angle. This achieves the synchronization angle of the fundamental frequency component of the common-mode current. Control. From the small-signal model, the small-signal equations for common-mode voltage and common-mode current can be obtained: in, for The steady-state operating point, for The steady-state operating point.

[0037] Depend on arrive The differential equation contains nonlinear terms and cannot be linearized by separating the steady-state operating point. Therefore, the dynamic process can be simplified to an inductive inertial element with unity static gain, whose transfer function is: Furthermore, the sampling period is taken. T s The discretization process for this system using ZOH, with a time limit of 2ms, is as follows: Figure 10 As shown, the final result is obtained from the small signal. voltage difference between upper and lower bridge arms Discrete transfer function: in, This is the small DC component of the common-mode power of the bridge arm.

[0038] Furthermore, a discrete PI controller is introduced. D a ( z The closed-loop control block diagram for balancing the upper and lower bridge arm capacitor voltages is obtained by combining MAF, as shown below. Figure 11 As shown. Among them, D a ( z To achieve voltage balance between bridge arms, the PI controller aims to adjust the control angle between the fundamental frequency component of the common-mode voltage and the differential-mode voltage. To adjust the synchronization angle of the common-mode current This suppresses voltage imbalance, redistributes energy between the upper and lower bridge arms, and maintains capacitor voltage balance.

[0039] S4, obtained using S3 Generate synchronously controllable common-mode voltage fundamental frequency component ; S5, the common-mode voltage DC component Common-mode voltage fundamental frequency component Differential mode voltage fundamental frequency component The signals are superimposed and used to generate submodule drive signals via CPS-PWM.

[0040] Based on a similar inventive concept, embodiments of the present invention also provide a computer storage medium storing a readable program that, when run by a processor, can execute the above-described self-synchronizing common-mode current control method for power balancing of energy storage type MMCs.

[0041] Based on a similar inventive concept, this invention provides an electronic device, including: a processor, a memory, a communication interface, and a communication bus, wherein the processor, the memory, and the communication interface communicate with each other through the communication bus; The memory is used to store at least one executable instruction that causes the processor to perform the operation corresponding to the above-described self-synchronizing common-mode current control method for power balancing of energy storage MMC.

[0042] Based on a similar inventive concept, embodiments of the present invention also provide a computer program product, including computer instructions, which instruct a computing device to perform the operations corresponding to the above-described self-synchronizing common-mode current control method for power balancing of energy storage type MMC.

[0043] Example 2 To verify the effectiveness of the proposed capacitor voltage balance control method based on self-synchronous common-mode current, a detailed simulation study was conducted on a software platform in this embodiment.

[0044] The simulation model is based on a 10 kV distribution network. Each bridge arm consists of four high-voltage MMC submodules with a rated voltage of 4.5 kV and a submodule capacitance of 2000 μF. Each submodule employs a CPS-PWM modulation strategy. The DC bus voltage is set to 18 kV. (Bridge arm inductance...) L a Designed to have an equivalent resistance of 10 mH. R a It is 4 Ω.

[0045] Figure 12 To simulate the control system structure of the MMC model, the main components include grid-connected active and reactive power control on the AC side. Instantaneous reactive power control is used on the AC side, with the d-axis current reference value set to 30 A and the q-axis current reference value set to 0 A. Capacitor power balance control is implemented between phases, generating a common-mode modulation voltage by adjusting the sum and difference of the upper and lower bridge arm capacitor voltages. Common-mode modulation voltage Differential mode voltage The signals are superimposed and modulated using CPS-PWM to generate phase-shifting switching signals for each submodule.

[0046] Figure 13 The average voltage control waveform of the upper and lower bridge arms consists of the common-mode voltage DC component. adjust. Figure 13 In the diagram, (a) represents the moving average of the upper and lower bridge arm capacitor voltages. In stages I and II, without closed-loop control, the bridge arm capacitor voltages deviate slightly from the rated value of 18 kV. In stage III, the common-mode voltage controller is activated, and the average voltage of the two bridge arms is effectively compensated and stabilized at 18 kV. Figure 13 (b) shows a comparison between the moving average capacitor voltage and the original waveform. Due to the influence of AC differential-mode current and common-mode current, the original capacitor voltage exhibits significant fluctuations. Sampling period T sThe moving average filter operates at 0.02s, effectively suppressing pulsation components and preventing disturbances from adversely affecting control performance.

[0047] Figure 14 The differential voltage waveform between the upper and lower bridge arms reflects the relative voltage deviation within each phase. Figure 14 In Figure (a), the differential-mode voltage is the moving average. In Stage II, without closed-loop compensation, the differential-mode voltage exhibits a significant deviation from zero, indicating a voltage imbalance between the upper and lower bridge arms. When the common-mode voltage controller is activated in Stage III, the differential-mode voltage is effectively suppressed and converges to near zero, achieving capacitor voltage balance between the bridge arms. Figure 14 (b) compares the moving average differential-mode voltage with the original differential-mode waveform. The original signal contains fluctuations caused by AC-side differential-mode and common-mode currents. After the sampling period... T s A moving average filter with a value of 0.02s smooths out pulsating components, preventing interference with voltage balance control.

[0048] Figure 15 The common-mode current of phase a Differential mode voltage The waveform showing the change in the synchronization angle between them. Figure 15 In the diagram, (a) represents the steady-state time-domain waveform. In steady state, the capacitor voltages of the upper and lower bridge arms are balanced, and there is no active power exchange between the bridge arms. At this time, the synchronization angle... It is 0.5π. Figure 15 (b) shows the change in synchronization angle at different stages. In stage I, due to... =0, common-mode current =0, synchronization angle It exhibits random fluctuations and has no practical significance. In Phase II, =50 V, synchronization angle It stabilizes near a steady-state point of 0.5π. In Stage III, to compensate for the unbalanced power output between the upper and lower bridge arms, the synchronization angle... Deviation from steady state. In stage IV, after external energy injection into all submodules, the voltage gradually balances, and the synchronization angle... Regression to steady-state value.

[0049] Figure 16 The fundamental common-mode current in a three-phase system , and Waveform. Figure 16 (a) shows the time-domain waveform during the simulation. In stage I, the fluctuation of the submodule capacitor voltage generates the fundamental common-mode current. From stage II to stage IV, the common-mode voltage is superimposed... After reaching 50V, the amplitude of the fundamental common-mode current is 22A. Figure 16 (b) in the figure is a magnified view of the waveform, highlighting the dynamic characteristics of the common-mode current in each stage.

[0050] The above results show that the common-mode voltage injection method proposed in this invention will generate a controllable fundamental frequency common-mode current between bridge arms. This current can effectively compensate for the power imbalance between in-phase bridge arms and maintain capacitor voltage balance.

[0051] Example 3 In this embodiment, a self-synchronizing common-mode current control system for power balance of energy storage MMC is proposed, specifically including: Signal acquisition module: Real-time acquisition of capacitor voltages of each phase's upper and lower bridge arm submodules; Signal filtering module: Calculates the collected capacitor voltages of the upper and lower bridge arm submodules to obtain the sum and difference of the voltages of the upper and lower bridge arms, and filters them to extract the steady-state values ​​of the DC component and the fundamental frequency component of the common-mode voltage. Dual closed-loop control module: Employs dual closed-loop control including phase-level voltage control and bridge arm-level voltage control; in phase-level voltage control, the small-signal portion of the common-mode voltage DC component is controlled and compared with the zero reference value under steady state. The steady-state value of the common-mode voltage DC component is superimposed by a discrete PI controller to generate the common-mode voltage DC component. In bridge arm voltage control, the small-signal portion of the phase angle between the common-mode voltage fundamental frequency component and the differential-mode voltage fundamental frequency component is controlled and compared with the zero reference value under steady state. This is combined with the phase angle between the common-mode current fundamental frequency component and the differential-mode voltage fundamental frequency component. The phase angle of the common-mode voltage fundamental frequency component relative to the differential-mode voltage fundamental frequency component is generated by superimposing the phase angle of the steady-state value of the common-mode voltage fundamental frequency component using a discrete PI controller. ; Synchronization Angle Injection Module: Utilizing the obtained Generate synchronously controllable common-mode voltage fundamental frequency component ; Signal synthesis module: converts the common-mode voltage DC component Common-mode voltage fundamental frequency component Differential mode voltage fundamental frequency component The signals are superimposed and used to generate submodule drive signals via CPS-PWM.

[0052] The methods of the present invention can be implemented in hardware, firmware, or as software or computer code that can be stored in a recording medium (such as a CD-ROM, RAM, floppy disk, hard disk, or magneto-optical disk), or as computer code originally stored on a remote recording medium or a non-transitory machine-readable medium and subsequently stored on a local recording medium, downloaded via a network. Thus, the methods described herein can be processed by software stored on a recording medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware (such as an ASIC or FPGA). It is understood that the computer, processor, microprocessor controller, or programmable hardware includes storage components (e.g., RAM, ROM, flash memory, etc.) capable of storing or receiving software or computer code that, when accessed and executed by the computer, processor, or hardware, implements the methods described herein. Furthermore, when a general-purpose computer accesses the code used to implement the methods shown herein, the execution of the code transforms the general-purpose computer into a dedicated computer for performing the methods shown herein.

[0053] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the claimed invention.

Claims

1. A self-synchronizing common-mode current control method for power balancing in energy storage-type MMCs, characterized in that, Includes the following steps: S1, real-time acquisition of capacitor voltage of each phase upper and lower bridge arm submodule; S2, calculate the collected upper and lower bridge arm submodule capacitor voltages, obtain the sum and difference of the upper and lower bridge arm voltages, filter them, and extract the steady-state value of the DC component of the common-mode voltage and the steady-state value of the fundamental frequency component of the common-mode voltage. S3 employs a dual closed-loop control system, including phase-level voltage control and bridge arm-level voltage control. In the phase-level voltage control, the small-signal portion of the common-mode voltage DC component is controlled and compared with the zero reference value under steady-state conditions. The steady-state value of the common-mode voltage DC component from S2 is then superimposed using a discrete PI controller to generate the common-mode voltage DC component. ; In bridge arm voltage control, the small-signal portion of the phase angle between the common-mode voltage fundamental frequency component and the differential-mode voltage fundamental frequency component is controlled. This is compared with the zero reference value under steady state, and combined with the phase angle between the common-mode current fundamental frequency component and the differential-mode voltage fundamental frequency component. The phase angle of the common-mode voltage fundamental frequency component relative to the differential-mode voltage fundamental frequency component is generated by superimposing the steady-state value of the common-mode voltage fundamental frequency component in S2 using a discrete PI controller. ; S4, obtained using S3 Generate synchronously controllable common-mode voltage fundamental frequency component ; S5, the common-mode voltage DC component Common-mode voltage fundamental frequency component Differential mode voltage fundamental frequency component The signals are superimposed and used to generate submodule drive signals via CPS-PWM.

2. The self-synchronizing common-mode current control method for power balancing of energy storage MMC according to claim 1, characterized in that, The calculation process for the voltages of the upper and lower bridge arms is as follows: in, This is the fundamental frequency component of the common-mode voltage. This represents the amplitude of the fundamental frequency component of the common-mode voltage. The common-mode voltage fundamental frequency component relative to the differential-mode voltage fundamental frequency component The phase angle; For the upper bridge arm voltage, This is the voltage of the lower bridge arm. This is the DC component of the common-mode voltage. For AC power grid frequency, This is the DC bus voltage.

3. The self-synchronizing common-mode current control method for power balancing of energy storage MMC according to claim 2, characterized in that, In S2, the filtering process is as follows: The DC component of the output power within one fundamental cycle is extracted using a moving average filter (MAF), yielding the DC components of the instantaneous power of the upper and lower bridge arms as follows: Among them, symbols This indicates that the MAF step is applied to the variable. The MAF value represents the instantaneous common-mode power of the bridge arm. The MAF value represents the instantaneous power of the differential mode of the bridge arm; This represents the steady-state value of the DC component of the common-mode voltage. This represents the steady-state value of the DC component of the common-mode current. This represents the phase angle between the fundamental frequency component of the differential-mode current and the fundamental frequency component of the differential-mode voltage. This represents the phase angle between the fundamental frequency component of the common-mode current and the fundamental frequency component of the differential-mode voltage. This represents the phase angle between the common-mode voltage fundamental frequency component and the differential-mode voltage fundamental frequency component. This is the DC side current. This represents the amplitude of the fundamental frequency component of the common-mode voltage.

4. The self-synchronizing common-mode current control method for power balancing of energy storage MMC according to claim 1, characterized in that, The phase-level voltage control, through a discrete controller, maintains the DC component of the system's common-mode current, thereby adjusting the average capacitor voltage of that phase; the bridge arm-level voltage control, through adjustment... To adjust Synchronization angle enables the redistribution of power between bridge arms and maintains the balance of capacitor voltage.

5. The self-synchronizing common-mode current control method for power balancing of energy storage MMC according to claim 3, characterized in that, In S3, the control process for the small signal of the common-mode voltage DC component is as follows: In phase-level voltage control, the differential relationship between common-mode voltage and common-mode current, derived from the common-mode voltage small-signal model, is as follows: in, Ra For the bridge arm resistance, La For bridge arm inductance, For common-mode voltage small signal, For common-mode current small signal; The transfer function of the common-mode voltage small-signal model is: Discretize the transfer function using the zero-order preservation method, and use express ,use express The discrete transfer function is obtained as follows: The sampling period Ts is set to 2ms. The system is discretized using the zero-order hold discretization method. A discrete transfer function is established from the modulation voltage to the total capacitance voltage of the upper and lower bridge arms. The small signal transfer function is derived from the phase capacitor charging process. The discretized transfer function is: in, N For the number of bridge arm sub-modules, Csm For submodule capacitors, Usm The rated voltage of the submodule. uc This refers to the capacitor voltage of the submodule. This refers to the small-signal portion of the DC component of the common-mode power of the bridge arm. And introduce a discrete controller Dp ( z and moving average filter H ( z This enables closed-loop control of phase-to-phase voltage.

6. The self-synchronizing common-mode current control method for power balancing of energy storage MMC according to claim 5, characterized in that, The small signal control process is as follows: The small-signal equations for common-mode voltage and common-mode current are derived from the small-signal model: in, for The steady-state operating point, for The steady-state operating point; Its transfer function is: Take sampling period T s For a time interval of 2ms, the zero-order hold method is used for discretization to obtain the small signal. voltage difference between upper and lower bridge arms Discrete transfer function: in, This is the small DC component of the common-mode power of the bridge arm; Introducing a discrete PI controller D a ( z The MAF (Magnetic Filter) performs closed-loop control on the voltage of the lower bridge arm capacitor.

7. A self-synchronizing common-mode current control system for power balancing in energy storage-type MMCs, characterized in that, include: Signal acquisition module: Real-time acquisition of capacitor voltages of each phase's upper and lower bridge arm submodules; Signal filtering module: Calculates the collected capacitor voltages of the upper and lower bridge arm submodules to obtain the sum and difference of the voltages of the upper and lower bridge arms, and filters them to extract the steady-state values ​​of the DC component and the fundamental frequency component of the common-mode voltage. Dual closed-loop control module: It adopts dual closed-loop control including phase-level voltage control and bridge arm-level voltage control; In phase-level voltage control, the small-signal portion of the common-mode voltage DC component is controlled and compared with the steady-state zero reference value. The steady-state value of the common-mode voltage DC component is then superimposed using a discrete PI controller to generate the common-mode voltage DC component. ; In bridge arm voltage control, the small-signal portion of the phase angle between the common-mode voltage fundamental frequency component and the differential-mode voltage fundamental frequency component is controlled. This is compared with the zero reference value under steady state, and combined with the phase angle between the common-mode current fundamental frequency component and the differential-mode voltage fundamental frequency component. The phase angle of the common-mode voltage fundamental frequency component relative to the differential-mode voltage fundamental frequency component is generated by superimposing the phase angle of the steady-state value of the common-mode voltage fundamental frequency component using a discrete PI controller. ; Synchronization Angle Injection Module: Utilizing the obtained Generate synchronously controllable common-mode voltage fundamental frequency component ; Signal synthesis module: converts the common-mode voltage DC component Common-mode voltage fundamental frequency component Differential mode voltage fundamental frequency component The signals are superimposed and used to generate submodule drive signals via CPS-PWM.

8. A computer storage medium storing a readable program, characterized in that, When the program is running, it can instruct the computing device to perform the self-synchronizing common-mode current control method for power balancing of energy storage MMC as described in any one of claims 1-6.

9. An electronic device, characterized in that, include: The processor, memory, communication interface, and communication bus are provided, wherein the processor, memory, and communication interface communicate with each other via the communication bus. The memory is used to store at least one executable instruction that causes the processor to perform the operation corresponding to the self-synchronizing common-mode current control method for power balancing of energy storage MMC as described in any one of claims 1-6.

10. A computer program product comprising computer instructions, characterized in that, The computer instructions instruct the computing device to perform the operation corresponding to the self-synchronizing common-mode current control method for power balancing of energy storage MMC as described in any one of claims 1-6.

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