Bidirectional amplifier and electronic equipment

Abstract

The invention provides a bidirectional amplifier and electronic equipment, the bidirectional amplifier comprises a low noise amplification module, a power amplification module and a multiplexing matching network module, the multiplexing matching network module comprises a three-coil transformation unit, a first switch and a second switch; the first switch and the second switch are used for switching in-phase coupling of a second winding and a third winding in the three-coil transformation unit according to the sent voltage signal and switching in-phase coupling of the second winding and the third winding according to the received voltage signal; therefore, high isolation of a sending signal of the bidirectional amplifier, power additional efficiency of a high-frequency output signal and high gain and low noise of a receiving signal are realized. And the first switch and the second switch are embedded in the three-coil transformation unit, so that the chip area is not additionally occupied, and the advantages of high area efficiency and low cost are achieved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of radio frequency circuits, and in particular to a bidirectional amplifier and an electronic device. BACKGROUND

[0002] At present, millimeter wave communication is attracting much attention due to the wide bandwidth available for higher information transmission rates. However, millimeter wave communication faces the challenge of greater transmission loss. The phased array technology cooperates with multiple transceiving units to control the phase and amplitude of the signal of each unit, realizes the concentration and directivity control of the antenna beam, and concentrates the transmitted and received energy in a certain direction, thereby effectively overcoming the path loss of millimeter wave communication. As a key component of the phased array, the millimeter wave transceiver front end directly affects the performance of the entire system.

[0003] Since the single-pole double-throw switch commonly used in the traditional transceiver front end will introduce loss and occupy additional circuit area, in order to overcome the influence caused by the single-pole double-throw switch, the prior art usually selects a transformer matching network to realize the switching and impedance matching of the transceiver mode.

[0004] However, the transformer matching network of the prior art causes the isolation of the bidirectional amplifier in the signal transmission mode to be poor, thereby causing the power added efficiency of the transmitting amplifier to be reduced. SUMMARY

[0005] The present application provides a bidirectional amplifier and an electronic device to realize high isolation of the bidirectional amplifier transmitting signals, and high gain and low noise of the bidirectional amplifier receiving signals without occupying additional chip area.

[0006] According to a first aspect of the present application, a bidirectional amplifier is provided, comprising: a low noise amplification module, configured to amplify signals received by an antenna, the low noise amplification module comprising a first-stage common-gate differential amplification unit; a power amplification module, configured to amplify signals output by the antenna, the power amplification module comprising a second-stage common-source differential amplification unit; The multiplexing matching network module comprises a three-coil transformer unit, a first switch and a second switch; a first winding in the three-coil transformer unit is connected to an antenna; a first end of a second winding in the three-coil transformer unit is respectively connected to a source of a first common-gate transistor in the first-stage common-gate differential amplification unit and a drain of a first common-source transistor in the second-stage common-source differential amplification unit; a second end of the second winding is respectively connected to a source of a second common-gate transistor in the first-stage common-gate differential amplification unit and a drain of a second common-source transistor in the second-stage common-source differential amplification unit; the first switch connects a gate of the first common-gate transistor to a first end of a third winding in the three-coil transformer unit according to a transmission voltage signal; the second switch connects a gate of the second common-gate transistor to a second end of the third winding according to the transmission voltage signal, so that the second winding and the third winding are coupled in phase; the first switch further connects the gate of the first common-gate transistor to the second end of the third winding according to a reception voltage signal; and the second switch further connects the gate of the second common-gate transistor to the first end of the third winding according to the reception voltage signal, so that the second winding and the third winding are coupled in anti-phase; and the first switch and the second switch are embedded in the three-coil transformer unit.

[0007] Optionally, the first switch comprises a first switch tube and a second switch tube; a first end of the first switch tube and a first end of the second switch tube are both connected to the gate of the first common-gate transistor; a second end of the first switch is connected to the first end of the third winding; and a second end of the second switch is connected to the second end of the third winding. The first switch tube and the fourth switch tube are both turned off according to the transmission voltage signal; the second switch tube and the third switch tube are both turned on according to the transmission voltage signal; the first switch tube and the fourth switch tube are both turned on according to the reception voltage signal; and the second switch tube and the third switch tube are both turned off according to the reception voltage signal.

[0008] Optionally, the on-resistance of the first switch tube and the fourth switch tube is equal to the off-resistance of the second switch tube and the third switch tube.

[0009] Optionally, the low-noise amplification module comprises a first input matching unit, a first-stage common-gate differential amplification unit, a first inter-stage matching unit, a second-stage common-source differential amplification unit and a first output matching unit connected in series. The first input matching unit is equivalent to the multiplexing matching network module; The first-stage common-gate differential amplification unit is configured to perform first-stage amplification on the signal input by the antenna and output the first-stage amplified signal to the first-stage inter-stage matching unit; The first-stage inter-stage matching unit is configured to perform impedance matching on the first-stage amplified signal and output the first-stage amplified signal after impedance matching to the second-stage common-source differential amplification unit; The second-stage common-source differential amplification unit is configured to perform second-stage amplification on the first-stage amplified signal output by the first-stage inter-stage matching unit and output the amplified signal to the first output matching unit; The first output matching unit is configured to perform output impedance matching on the second-stage amplified signal output by the second-stage common-source differential amplification unit.

[0010] Optionally, the first-stage common-gate differential amplification unit comprises a first common-gate transistor and a second common-gate transistor; the drain of the first common-gate transistor is connected to a first end of the first-stage inter-stage matching unit, and the drain of the second common-gate transistor is connected to a second end of the first-stage inter-stage matching unit; The first-stage inter-stage matching unit comprises a first transformer, a first capacitor and a second capacitor; a first end of a primary winding of the first transformer serves as a first end of the first-stage inter-stage matching unit, and a second end of the primary winding serves as a second end of the first-stage inter-stage matching unit; the first capacitor is connected between the first end of the primary winding and a first end of a secondary winding of the first transformer, and the second capacitor is connected between the second end of the primary winding and a second end of the secondary winding; The second-stage common-source differential amplification unit comprises a third common-source transistor, a fourth common-source transistor, a third capacitor and a fourth capacitor; the gate of the third common-source transistor is connected to the first end of the secondary winding, the source of the third common-source transistor and the source of the fourth common-source transistor are both connected to a ground terminal, and the drain of the third common-source transistor is connected to a second end of the third capacitor; the second end of the third capacitor is connected to the gate of the fourth common-source transistor; the gate of the third common-source transistor is also connected to a second end of the second capacitor, the drain of the fourth common-source transistor is connected to a second end of the fourth capacitor, and a first end of the fourth capacitor is connected to the gate of the third common-source transistor; The first output matching unit comprises a second transformer; a first end of a primary winding of the second transformer is connected to the second end of the third capacitor, a second end of the primary winding is connected to the second end of the fourth capacitor, a first end of a secondary winding of the second transformer outputs the second-stage amplified signal, and a second end of the secondary winding is connected to a ground terminal.

[0011] Optionally, the first common-gate transistor and the second common-gate transistor are PMOS tubes; and the third common-source transistor and the fourth common-source transistor are NMOS tubes.

[0012] Optionally, the power amplification module comprises a second input matching unit, a first-stage common-source differential amplification unit, a second inter-stage matching unit, a second-stage common-source differential amplification unit and a second output matching unit connected in series. The second input matching unit is configured to perform input impedance matching on the to-be-amplified signal and output the impedance-matched to-be-amplified signal to the first-stage common-source differential amplification unit. The first-stage common-source differential amplification unit is configured to perform first-stage amplification on the impedance-matched to-be-amplified signal and output the first-stage amplified signal to the second inter-stage matching unit. The second inter-stage matching unit is configured to perform impedance matching on the first-stage amplified signal and output the impedance-matched first-stage amplified signal to the second-stage common-source differential amplification unit.

[0013] The second-stage common-source differential amplification unit is configured to perform second-stage amplification on the impedance-matched first-stage amplified signal and output the second-stage amplified signal. The second output matching unit is equivalent to the multiplexing matching network module.

[0014] Optionally, the second input matching unit comprises a third transformer, a first end of a primary winding of the third transformer is connected to the to-be-amplified signal, and a second end of the primary winding is connected to a ground terminal; a secondary winding of the third transformer outputs the impedance-matched to-be-amplified signal. The first-stage common-source differential amplification unit comprises a fifth capacitor, a sixth capacitor, a fifth common-source transistor and a sixth common-source transistor; a first end of the fifth capacitor is connected to a gate of the sixth common-source transistor, and a second end of the fifth capacitor is connected to a drain of the fifth common-source transistor; a first end of the sixth capacitor is connected to a gate of the fifth common-source transistor, and a second end of the sixth capacitor is connected to a drain of the sixth common-source transistor; a gate of the fifth common-source transistor is further connected to the first end of the primary winding of the third transformer, a source of the fifth common-source transistor and a source of the sixth common-source transistor are both connected to the ground terminal; and a gate of the sixth common-source transistor is connected to the second end of the primary winding. The second inter-stage matching unit comprises a fourth transformer, a first end of a primary winding of the fourth transformer is connected to the drain of the fifth common-source transistor, a second end of the primary winding is connected to the drain of the sixth common-source transistor, and a secondary winding of the fourth transformer outputs the impedance-matched first-stage amplified signal to the second-stage common-source differential amplification unit. The secondary common-source differential amplification unit comprises a seventh capacitor, an eighth capacitor, a first common-source transistor and a second common-source transistor; a first end of the seventh capacitor is connected to a gate of the sixth common-source transistor, a second end of the seventh capacitor is connected to a drain of the first common-source transistor, a first end of the eighth capacitor is connected to a gate of the first common-source transistor, and a second end of the eighth capacitor is connected to a drain of the second common-source transistor; a gate of the first common-source transistor is connected to a first end of a secondary winding of the fourth transformer, a source of the first common-source transistor and a source of the second common-source transistor are both connected to a ground terminal; and a gate of the second common-source transistor is connected to a second end of the secondary winding.

[0015] Optionally, the first common-source transistor, the second common-source transistor, the third common-source transistor and the fourth common-source transistor are all NMOS tubes.

[0016] According to the second aspect of the present application, an electronic device is provided, which comprises the bidirectional amplifier provided by the first aspect of the present application.

[0017] Compared with the prior art, the technical scheme of the present application has the following beneficial effects: In the bidirectional amplifier provided by this invention, a low-noise amplification module amplifies the signal received by the antenna, a power amplification module amplifies the signal output by the antenna, and a three-coil transformer unit in the multiplexing matching network module is used as the input matching network of the low-noise amplification module and the output matching network of the power amplification module, thereby constructing a complete bidirectional amplifier structure. Since a switch connects the gate of the first common-gate transistor to the first end of the third winding in the three-coil transformer unit according to the transmitted voltage signal, and a second switch connects the gate of the second common-gate transistor to the second end of the third winding according to the transmitted voltage signal, so that the second winding and the third winding are in-phase coupled, it ensures that both the first and second common-gate transistors are turned off in the signal transmission mode of the bidirectional amplifier, thereby improving the isolation and power-added efficiency of the power amplification module in the signal transmission mode. Furthermore, since the first switch also connects the gate of the first common-gate transistor to the second end of the third winding according to the received voltage signal, and the second switch also connects the gate of the second common-gate transistor to the first end of the third winding according to the received voltage signal, so that the second winding and the third winding are in-phase coupled, it ensures high gain and low noise of the low-noise amplification module in the signal reception mode. Finally, since both the first and second switches are embedded in the three-coil transformer unit, they do not occupy additional chip area, thus offering advantages in high area efficiency and low cost. In summary, the bidirectional amplifier of this invention, without occupying additional chip area, not only improves the isolation of the power amplifier module in signal transmission mode and the power-added efficiency of the high-frequency output signal, but also ensures high gain and low noise of the low-noise amplifier module in signal reception mode. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 A schematic diagram of the circuit structure of an embodiment of a bidirectional amplifier; Figure 2 Schematic diagram of the circuit structure of the bidirectional amplifier provided in this embodiment Figure 1 ; Figure 3 Schematic diagram of the circuit structure of the bidirectional amplifier provided in this embodiment Figure 2 ; Figure 4 Schematic diagram of the circuit structure of the bidirectional amplifier provided in this embodiment Figure 3 ; Figure 5 The waveforms of the gate-source voltage of the first common-gate transistor provided in this embodiment when the second and third windings are in different coupling states; Figure 6 A waveform diagram showing the power-added efficiency of the signal when the second and third windings are in the same-phase coupling state, as provided in this embodiment; Figure 7 Schematic diagram of the circuit structure of the bidirectional amplifier provided in this embodiment Figure 4 ; Figure 8 This is a three-dimensional structural diagram of the multiplexing matching network module provided in this embodiment; Figure 9 Waveforms of multiple parameters in the low-noise amplification module provided in this embodiment Figure 1 ; Figure 10 The second diagram shows the waveforms of multiple parameters in the low-noise amplification module provided in this embodiment. Detailed Implementation

[0020] As described in the background section, existing transformer matching networks degrade the isolation of bidirectional amplifiers in signal transmission mode, leading to a decrease in the power-added efficiency of the transmitting amplifier. The problems with the existing technology are explained below: Figure 1 This is a schematic diagram of the circuit structure of an embodiment of a bidirectional amplifier.

[0021] Please refer to Figure 2 The bidirectional amplifier includes a three-coil transformer 310, a low-noise amplifier 110, and a power amplifier 210.

[0022] The low-noise amplifier 110 amplifies and outputs the signal received by the antenna. The low-noise amplifier 110 includes a first input matching network, a first-stage common-gate differential amplifier 111, a first-stage inter-stage matching network 112, a second-stage common-source differential amplifier 113, and a first output matching network 114. The first-stage common-gate differential amplifier 111 includes a first common-gate PMOS transistor p1 and a second common-gate PMOS transistor p2. The drain of the first common-gate PMOS transistor p1 is connected to the first terminal of the first-stage inter-stage matching network 112, and the drain of the second common-gate PMOS transistor p2 is connected to the second terminal of the first-stage inter-stage matching network 112. The second-stage common-source differential amplifier 113 is specifically an NNOS common-source differential amplifier with a neutralizing capacitor. The first-stage inter-stage matching network 112 and the first output matching network 114 are both conventional transformers.

[0023] The power amplifier 210 is used to amplify the signal to be output by the antenna and output by the antenna. The power amplifier 210 includes a second output matching network, a second-stage common-source differential amplifier 211, a second inter-stage matching network 212, a first-stage common-source differential amplifier 213, and a second input matching network 214. The second-stage common-source differential amplifier 211 includes a first common-source NMOS transistor n1, a second common-source NMOS transistor n2, a first common-source capacitor c1, and a second common-source capacitor c2. The source of the first common-source NMOS transistor n1 and the source of the second common-source NMOS transistor n2 are both connected to a ground terminal. The gate of the first common-source NMOS transistor n1 is connected to a first end of the second inter-stage matching network 212, and the gate of the second common-source NMOS transistor n2 is connected to a second end of the second inter-stage matching network 212. The first common-source capacitor c1 is connected between the drain of the first common-source NMOS transistor n1 and the gate of the second common-source NMOS transistor n2, and the second common-source capacitor c2 is connected between the drain of the second common-source NMOS transistor n2 and the gate of the first common-source NMOS transistor n1. The first-stage common-source differential amplifier 213 is also a NNOS common-source differential amplifier with a neutral capacitor. The second inter-stage matching network 212 and the second input matching network 214 are both conventional transformers.

[0024] The three-coil transformer 310 is a multiplexing structure of the first input matching network and the second output matching network. The three-coil transformer 310 includes a first winding l1, a second winding l2, and a third winding l3 that share the same magnetic core structure. The first winding l1 is connected to the antenna. The first end of the second winding l2 is connected to the source of the first common-gate PMOS transistor p1 and the drain of the first common-source NMOS transistor n1, respectively. The second end of the second winding l2 is connected to the source of the second common-gate PMOS transistor p2 and the drain of the second common-source NMOS transistor n2, respectively. The first end of the third winding l3 is connected to the gate of the second common-gate PMOS transistor p2, and the second end of the third winding l3 is connected to the gate of the first common-gate PMOS transistor p1, so that the second winding l2 and the third winding l3 are in an anti-phase coupling state.

[0025] When the antenna receives an external input signal, the power amplifier stops working, and the low-noise amplifier 110 filters and amplifies the signal input by the antenna. Since the second winding l2 and the third winding l3 are in an anti-phase coupling state, the high gain and low noise of the low-noise amplifier 110 are ensured.

[0026] The problem of the scheme is that when the signal needs to be sent out through the antenna, the power amplifier amplifies the signal needed to be output internally and outputs through the antenna. At this time, the low noise amplifier 110 should stop working, that is, the first common-gate PMOS tube p1 and the second common-gate PMOS tube p2 should be in the off state to ensure the transmission isolation of the power amplifier. Although at this time, the gate voltage of the first common-gate PMOS tube p1 and the second common-gate PMOS tube p2 is greater than the source voltage under the action of the direct current voltage difference, for example, the gate voltage of the first common-gate PMOS tube p1 is 2.2V and the source voltage is 1.1V, so that the first common-gate PMOS tube p1 is turned off. But due to the anti-phase coupling state of the second winding l2 and the third winding l3, the gate voltage of the first common-gate PMOS tube p1 decreases with the power amplifier output signal, and the source voltage of the first common-gate PMOS tube p1 increases with the power amplifier output signal, so that the source voltage of the first common-gate PMOS tube p1 is greater than the gate voltage, and the first common-gate PMOS tube p1 is turned on in the signal transmission mode, and the second common-gate PMOS tube p2 is also turned on. The turn-on of the first common-gate PMOS tube p1 and the second common-gate PMOS tube p2 is equivalent to connecting a small resistance in parallel with the drain of the first common-source NMOS tube n1 and the drain of the second common-source NMOS tube n2, respectively, so that the emission efficiency of the signal output from the drain of the first common-source NMOS tube n1 and the drain of the second common-source NMOS tube n2 is seriously deteriorated, and the power of the power amplifier signal output is greatly reduced.

[0027] Therefore, the technical scheme of the present application provides a new bidirectional amplifier, which comprises a low noise amplification module, a power amplification module and a multiplex matching network module, the multiplex matching network module comprises a three-coil transformer unit, a first switch and a second switch; the first switch and the second switch switch the second winding and the third winding in the three-coil transformer unit to be in-phase coupling according to a transmission voltage signal, and switch the second winding and the third winding to be in anti-phase coupling according to a reception voltage signal, so as to realize high isolation of the bidirectional amplifier in signal transmission and high gain and low noise in signal reception. Since the first switch and the second switch are embedded in the three-coil transformer unit, no additional chip area is occupied, and the advantages of high area efficiency and low cost are achieved. In summary, the bidirectional amplifier of the present application not only improves the isolation and power added efficiency of the power amplification module in the signal transmission mode, but also ensures the high gain and low noise of the low noise amplification module in the signal reception mode without occupying additional chip area.

[0028] With reference to the drawings of the embodiments of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments of the present application, all the other embodiments obtained by a person of ordinary skill in the art without creative effort belong to the scope of protection of the present application.

[0029] The terms "first", "second", "third", "fourth" and the like (if any) in the description and claims of the present application and above drawings are used to distinguish similar objects, and do not necessarily indicate a specific order or sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in other than the order illustrated or described herein. In addition, the terms "comprise" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device comprising a series of steps or units does not necessarily limit to the clearly listed steps or units, but can include other steps or units not clearly listed or inherent to the process, method, product or device.

[0030] The technical solutions of the present application will be described in detail below with specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes can not be described in some embodiments.

[0031] Figure 1 Circuit structure diagram of the bidirectional amplifier provided in the embodiment Figure 3 . Circuit structure diagram of the bidirectional amplifier provided in the embodiment Figure 2 . Circuit structure diagram of the bidirectional amplifier provided in the embodiment Figure 2 . Circuit structure diagram of the bidirectional amplifier provided in the embodiment

[0032] Please refer to Figure 3 The bidirectional amplifier provided in the embodiment includes a low-noise amplification module 10, a power amplification module 20 and a multiplex matching network module 30.

[0033] The low-noise amplification module 10 is used to amplify the signal received by the antenna and output to the device in the rear stage, and at this time the power amplification module 20 stops working. The low-noise amplification module 10 starts from the first input matching unit, and includes the first input matching unit, the first-stage common-gate differential amplification unit 11, the first-stage inter-stage matching unit 12, the second-stage common-source differential amplification unit 13 and the first output matching unit 14 connected in series.

[0034] Please refer to Figure 2 and Figure 3Specifically, as a first-stage amplification structure of the low-noise amplification module 10, the first-stage common-gate differential amplification unit 11 is configured to perform first-stage amplification on the signal input by the antenna and output the first-stage amplified signal to the first-stage inter-stage matching unit 12. Further, the first-stage common-gate differential amplification unit 11 includes a first common-gate transistor P1 and a second common-gate transistor P2. The drain of the first common-gate transistor P1 is connected to a first end of the first-stage inter-stage matching unit 12, and the drain of the second common-gate transistor P2 is connected to a second end of the first-stage inter-stage matching unit 12. In this embodiment, both the first common-gate transistor P1 and the second common-gate transistor P2 are PMOS transistors.

[0035] Please refer to Figure 2 and Figure 3 Specifically, the first-stage inter-stage matching unit 12 is configured to perform impedance matching on the first-stage amplified signal output by the first-stage common-gate differential amplification unit 11 and output the first-stage amplified signal after impedance matching to the second-stage common-source differential amplification unit 13. Further, the first-stage inter-stage matching unit 12 includes a first transformer Ts1, a first capacitor C1 and a second capacitor C2; a first end of a primary winding of the first transformer Ts1 is configured as a first end of the first-stage inter-stage matching unit 12, and a second end of the primary winding is configured as a second end of the first-stage inter-stage matching unit 12. The first capacitor C1 is connected between the first end of the primary winding and a first end of a secondary winding of the first transformer Ts1, and the second capacitor C2 is connected between the second end of the primary winding and a second end of the secondary winding.

[0036] Please refer to Figure 2 and Figure 3 Specifically, the second-stage common-source differential amplification unit 13 is configured to perform second-stage amplification on the first-stage amplified signal output by the first-stage inter-stage matching unit 12 and output the amplified signal to the first output matching unit 14. Further, the second-stage common-source differential amplification unit 13 includes a third common-source transistor N3, a fourth common-source transistor N4, a third capacitor C3 and a fourth capacitor C4; a gate of the third common-source transistor N3 is connected to a first end of the secondary winding of the first transformer Ts1, a source of the third common-source transistor N3 and a source of the fourth common-source transistor N4 are both connected to a ground terminal, a drain of the third common-source transistor N3 is connected to a second end of the third capacitor C3; the second end of the third capacitor C3 is connected to a gate of the fourth common-source transistor N4; the gate of the third common-source transistor N3 is also connected to a second end of the second capacitor C2, a drain of the fourth common-source transistor N4 is connected to a second end of the fourth capacitor C4; a first end of the fourth capacitor C4 is connected to the gate of the third common-source transistor N3. In this embodiment, both the third common-source transistor N3 and the fourth common-source transistor N4 are NMOS transistors.

[0037] Please refer to Figure 2 and Figure 3, specifically, the first output matching unit 14 is configured to perform output impedance matching on the amplified signal output by the second-stage common-source differential amplification unit 13. Further, the first output matching unit 14 comprises a second transformer Ts2, a first end of a primary winding of the second transformer Ts2 is connected to a second end of a third capacitor C3, a second end of the primary winding is connected to a second end of a fourth capacitor C4, a first end of a secondary winding of the second transformer Ts2 outputs a second-stage amplified signal, and a second end of the secondary winding is connected to a ground terminal.

[0038] The power amplification module 20 is configured to amplify a signal to be output by an antenna and output the signal by the antenna, and at this time, the low-noise amplification module 10 stops working. The power amplification module 20 comprises, from the second input matching unit 24, the second input matching unit 24, the first-stage common-source differential amplification unit 23, the second inter-stage matching unit 22, the second-stage common-source differential amplification unit 21, and the second output matching unit connected in series.

[0039] Please refer to Figure 2 and Figure 3 , specifically, the second input matching unit 24 is configured to perform input impedance matching on the signal to be amplified, and output the impedance-matched signal to be amplified to the first-stage common-source differential amplification unit 23. Further, the second input matching unit 24 comprises a third transformer Ts2, a first end of a primary winding of the third transformer Ts2 is connected to the signal to be amplified, and a second end of the primary winding is connected to a ground terminal; a secondary winding of the third transformer Ts2 outputs the impedance-matched signal to be amplified.

[0040] Please refer to Figure 2 and Figure 3 , specifically, the first-stage common-source differential amplification unit 23 is configured to perform first-stage amplification on the impedance-matched signal to be amplified, and output the first-stage amplified signal to the second inter-stage matching unit 22. Further, the first-stage common-source differential amplification unit 23 comprises a fifth capacitor C5, a sixth capacitor C6, a fifth common-source transistor N5, and a sixth common-source transistor N6; a first end of the fifth capacitor C5 is connected to a gate of the sixth common-source transistor N6, and a second end of the fifth capacitor C5 is connected to a drain of the fifth common-source transistor N5; a first end of the sixth capacitor C6 is connected to a gate of the fifth common-source transistor N5, and a second end of the sixth capacitor C6 is connected to a drain of the sixth common-source transistor N6; a gate of the fifth common-source transistor N5 is also connected to the first end of the primary winding of the third transformer Ts2, and a source of the fifth common-source transistor N5 and a source of the sixth common-source transistor N6 are both connected to a ground terminal; a gate of the sixth common-source transistor N6 is connected to the second end of the primary winding. In this embodiment, the fifth common-source transistor N5 and the sixth common-source transistor N6 are both NMOS transistors.

[0041] Please refer to Figure 4 and Figure 5Specifically, the second inter-stage matching unit 22 is configured to perform impedance matching on the first amplified signal and output the first amplified signal after impedance matching to the second common-source differential amplification unit 21. Further, the second inter-stage matching unit 22 comprises a fourth transformer Ts4, a first end of a primary winding of the fourth transformer Ts4 is connected to a drain of a fifth common-source transistor N5, a second end of the primary winding is connected to a drain of a sixth common-source transistor N6, and a secondary winding of the fourth transformer Ts4 outputs the first amplified signal after impedance matching to the second common-source differential amplification unit 21.

[0042] Please continue to refer to Figure 5 and Figure 5 Specifically, the second common-source differential amplification unit 21 is configured to perform second amplification on the first amplified signal after impedance matching and output the second amplified signal. Further, the second common-source differential amplification unit comprises a seventh capacitor C7, an eighth capacitor C8, a first common-source transistor N1 and a second common-source transistor N2, a first end of the seventh capacitor C7 is connected to a gate of the sixth common-source transistor N6, a second end of the seventh capacitor C7 is connected to a drain of the first common-source transistor N1, a first end of the eighth capacitor C8 is connected to a gate of the first common-source transistor N1, and a second end of the eighth capacitor C8 is connected to a drain of the second common-source transistor N2, a gate of the first common-source transistor N1 is connected to a first end of the secondary winding of the fourth transformer Ts4, a source of the first common-source transistor N1 and a source of the second common-source transistor N2 are both connected to a ground terminal, and a gate of the second common-source transistor N2 is connected to a second end of the secondary winding. In this embodiment, the first common-source transistor N1 and the second common-source transistor N2 are both NMOS transistors.

[0043] The multiplex matching network module 30 is equivalent to the first input matching unit to perform input impedance matching on the signal input by the antenna and output to the first common-gate differential amplification unit 11. Meanwhile, the multiplex matching network module 30 is also equivalent to the second output matching unit to perform output impedance matching on the second amplified signal output by the second common-source differential amplification unit 21 and output through the antenna. Therefore, the multiplex matching network module 30 is simultaneously used as the first input matching unit and the second output matching unit. The multiplex matching network module 30 comprises a three-coil transformer unit, a first switch SW1 and a second switch SW2.

[0044] Please continue to refer to Figure 6 and Figure 6, specifically, the three-coil transformer unit includes a first winding L1, a second winding L2, and a third winding L3; the first winding L1 is connected to the antenna; a first end of the second winding L2 is respectively connected to a source of a first common-gate transistor P1 and a drain of a first common-source transistor N1, and a second end of the second winding L2 is respectively connected to a source of a second common-gate transistor P2 and a drain of a second common-source transistor N2; a first end of the third winding L3 is respectively connected to a second end of a first switch SW1 and a second end of a second switch SW2, and a second end of the third winding L3 is respectively connected to a third end of the first switch SW1 and a third end of the second switch SW2.

[0045] A first end of the first switch SW1 is connected to a gate of the first common-gate transistor P1, and a first end of the second switch SW2 is connected to a gate of the second common-gate transistor P2.

[0046] Please refer to Figure 7 When it is necessary to output a signal through the antenna, that is, the bidirectional amplifier is in a signal transmission state, an external controller inputs a transmission voltage signal to the first switch SW1 and the second switch SW2; the first switch SW1 connects its first end to its second end according to the transmission voltage signal, so that the gate of the first common-gate transistor P1 is connected to the first end of the third winding L3; the second switch SW2 connects its first end to its third end according to the transmission voltage signal, so that the gate of the second common-gate transistor P2 is connected to the second end of the third winding L3.

[0047] At this time, the second winding L2 and the third winding L3 are in a same-phase coupling state, so that the gate voltage and the source voltage of each of the first common-gate transistor P1 and the second common-gate transistor P2 are in a same-phase change state. For example, if the gate voltage increases due to an alternating voltage, the source voltage also increases; if the gate voltage decreases due to an alternating voltage, the source voltage also decreases. Moreover, because the gate-source voltage of the first common-gate transistor P1 is less than the turn-on threshold voltage of the PMOS tube due to an inherent direct current voltage difference in the signal transmission mode, for example, the source voltage of the first common-gate transistor P1 is 1.1V, and the gate voltage of the first common-gate transistor P1 is 2.2V. Therefore, the gate-source voltage of the first common-gate transistor P1 and the gate-source voltage of the second common-gate transistor P2 are both stably lower than the respective turn-on threshold voltages when the bidirectional amplifier is in the signal transmission state, thereby ensuring that the first common-gate transistor P1 and the second common-gate transistor P2 are both turned off when the bidirectional amplifier is in the signal transmission state, and thereby greatly improving the isolation of the power amplification module 20.

[0048] Taking the first common-gate transistor P1 as an example, please refer to Figure 8 In the signal transmission mode of the bidirectional amplifier, Figure 8The dashed line represents the gate-source voltage waveform of the first common-gate transistor P1 when the second winding L2 and the third winding L3 are in anti-phase coupling; the solid line represents the gate-source voltage waveform of the first common-gate transistor P1 when the second winding L2 and the third winding L3 are in in-phase coupling. Figure 9 As can be seen, when the second winding L2 and the third winding L3 are in an anti-phase coupling state, the maximum value of the gate-source voltage of the first common-gate transistor P1 will reach more than 1.5V, thus causing the first common-gate transistor P1 to be turned on. However, when the second winding L2 and the third winding L3 are in a non-phase coupling state, the maximum value of the gate-source voltage of the first common-gate transistor P1 is only 0.2V, thus ensuring that the first common-gate transistor P1 is turned off.

[0049] When the antenna output signal is required, in addition to the first common gate transistor P1 and the second common gate transistor P2 being turned off, the third common source transistor N3 and the fourth common source transistor N4 also need to be turned off. Therefore, the bias connected to the secondary winding of the first transformer Ts1 is set to ground.

[0050] In addition, please refer to Figure 10 , Figure 9 The solid line represents the power-added efficiency (PEP) of the signal as a function of frequency when the second winding L2 and the third winding L3 are in phase coupling. The dashed line represents the PEP of the signal as a function of frequency when the second winding L2 and the third winding L3 are in phase coupling. It is clear from the figures that when the transmitted signal is at a high frequency, the PEP of the signal corresponding to the dashed line decreases significantly with increasing frequency, while the PEP of the signal corresponding to the solid line remains stable with increasing frequency. Therefore, it can be seen that in the bidirectional amplifier's signal transmission mode, this embodiment effectively stabilizes the PEP of the high-frequency output signal by setting the second winding L2 and the third winding L3 to a phase coupling state through the first switch SW1 and the second switch SW2.

[0051] The reason why the anti-phase coupling of the second winding L2 and the third winding L3 degrades the power-added efficiency of the high-frequency output signal is that this anti-phase coupling causes the first common-gate transistor P1 and the second common-gate transistor P2 to conduct. The conduction of the first common-gate transistor P1 and the second common-gate transistor P2 is equivalent to connecting a small resistor in parallel at the output of the two-stage common-source differential amplifier unit. As the frequency of the transmitted signal increases, the small parallel resistor greatly increases the signal attenuation, thus severely degrading the power-added efficiency of the signal to be transmitted.

[0052] Please refer to Figure 10When the antenna receives signals, i.e. the bidirectional amplifier is in a signal receiving state, an external controller inputs a receiving voltage signal to the first switch SW1 and the second switch SW2. The first switch SW1 connects its first end to its third end according to the receiving voltage signal, so that the gate of the first common-gate transistor P1 is connected to the second end of the third winding L3. The second switch SW2 connects its first end to its second end according to the receiving voltage signal, so that the gate of the second common-gate transistor P2 is connected to the first end of the third winding L3.

[0053] At this time, the second winding L2 and the third winding L3 are in an anti-phase coupling state, so that the gate voltage and the source voltage of the first common-gate transistor P1 and the second common-gate transistor P2 are in an anti-phase change state. For example, the gate voltage of the first common-gate transistor P1 is biased at 0.47V, and the source of the first common-gate transistor P1 is connected to a 1.1V power supply, so that the source-gate voltage of the first common-gate transistor P1 is greater than the on voltage of the transistor, thereby turning on the first common-gate transistor P1. The second common-gate transistor P2 is also turned on for the same reason. At the same time, the bias voltage connected to the secondary winding of the first transformer Ts1 is 0.49V.

[0054] In order to ensure the isolation degree of the low-noise amplification module 10 when the bidirectional amplifier is in a signal receiving state, all the common-source transistors in the power amplification module 20 need to be in an off state. Therefore, the bias ground end of the secondary winding of the fourth transformer Ts4 is set, so that the first common-source transistor N1, the second common-source transistor, the fifth common-source transistor N5 and the sixth common-source transistor N6 are turned off.

[0055] Please refer to Figure 9 From Figure 10 It can be seen that in the actual structure, the first switch SW1 and the second switch SW2 are embedded in the three-coil transformer unit, i.e. the three-coil transformer, so that no additional chip area is occupied, thereby improving the utilization rate of the chip area and reducing the circuit cost.

[0056] Specifically, the first switch SW1 includes a first switch SW1 tube and a second switch SW2 tube, and the first end of the first switch SW1 tube and the first end of the second switch SW2 tube are both connected to the gate of the first common-gate transistor P1. The second end of the first switch SW1 is connected to the first end of the third winding L3, and the second end of the second switch SW2 is connected to the second end of the third winding L3. The second switch SW2 includes a third switch tube and a fourth switch tube, and the first end of the third switch tube and the first end of the fourth switch tube are both connected to the gate of the first common-gate transistor P1. The second end of the third switch is connected to the first end of the third winding L3, and the second end of the fourth switch is connected to the second end of the third winding L3.

[0057] When the bidirectional amplifier is in the signal receiving state, the first switch SW1 and the fourth switch are both turned off according to the transmitting voltage signal, and the second switch SW2 and the third switch are both turned on according to the transmitting voltage signal. When the bidirectional amplifier is in the signal transmitting state, the first switch SW1 and the fourth switch are both turned on according to the receiving voltage signal, and the second switch SW2 and the third switch are both turned off according to the receiving voltage signal.

[0058] In order to avoid the deterioration of the noise of the low-noise amplification module 10 receiving signals, it is necessary to set the second switch SW2 and the third switch to be large in size, so as to reduce the on-resistance of the second switch SW2 and the third switch; and set the first switch SW1 and the fourth switch to be small in size, so as to increase the off-resistance of the first switch SW1 and the fourth switch.

[0059] However, if the second switch SW2 and the third switch are set to be too large in size, the off-resistance of the second switch SW2 and the third switch will be smaller than the on-resistance of the first switch SW1 and the fourth switch, so that the second winding L2 and the third winding L3 cannot be in the in-phase coupling state, and the first common-gate transistor P1 and the second common-gate transistor P2 cannot be turned off when the bidirectional amplifier is in the signal transmitting state. If the first switch SW1 and the fourth switch are set to be too small in size, the on-resistance of the first switch SW1 and the fourth switch will be too large, and the isolation of the power amplification module 20 will also be problematic.

[0060] Therefore, in order to balance the receiving noise of the low-noise amplification module 10 and the isolation of the power amplification module 20, the on-resistance of the first switch SW1 and the fourth switch can be set to be equal to the off-resistance of the second switch SW2 and the third switch.

[0061] Please refer to Figure 9 and Figure 10 , ​ is a waveform diagram of various parameters changing with frequency when the first switch SW1 and the second switch SW2 are not embedded in the three-coil transformer unit and the low-noise amplifier is working. ​ is a waveform diagram of various parameters changing with frequency when the first switch SW1 and the second switch SW2 are embedded in the three-coil transformer unit and the low-noise amplifier is working. ​ and ​ In S21, the gain of the low-noise amplification module is used to represent; NF (Noise Figure) is used to represent the receiving noise; S11 and S12 are used to represent the loss of signal transmission together.

[0062] From ​ and ​It can be obviously seen that embedding the first switch SW1 and the second switch SW2 in the three-coil transformer unit only makes the receiving noise of the low-noise amplification module 10 deteriorate by 0.5 dB, and the gain remains unchanged, thus ensuring the low noise and high gain of the low-noise amplification module 10.

[0063] In conclusion, the bidirectional amplifier provided by the embodiment can switch the coupling states of the second winding and the third winding in the three-coil transformer unit through the first switch and the second switch embedded in the three-coil transformer unit according to the differences between the signal receiving mode and the signal sending mode, so that the isolation degree of the power amplification module in the signal sending mode and the power addition efficiency of the high-frequency output signal are improved without occupying additional chip area, and the high gain and low noise of the low-noise amplification module in the signal receiving mode are ensured.

[0064] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A bidirectional amplifier, characterized in that, include: A low-noise amplifier module is used to amplify the signal received by the antenna, and the low-noise amplifier module includes a first-stage common-grid differential amplifier unit. A power amplifier module is used to amplify the signal output by the antenna, and the power amplifier module includes a two-stage common-source differential amplifier unit; The multiplexing matching network module includes a three-coil transformer unit, a first switch, and a second switch. The first winding of the three-coil transformer unit is connected to an antenna. The first end of the second winding of the three-coil transformer unit is connected to the source of the first common-gate transistor in the first-stage common-source differential amplifier unit and the drain of the first common-source transistor in the second-stage common-source differential amplifier unit. The second end of the second winding is connected to the source of the second common-gate transistor in the first-stage common-source differential amplifier unit and the drain of the second common-source transistor in the second-stage common-source differential amplifier unit. The first switch switches the first common-gate transistor according to the transmitted voltage signal. The gate is connected to the first end of the third winding in the three-coil transformer unit. The two switches connect the gate of the second common-gate transistor to the second end of the third winding according to the transmitted voltage signal, so that the second winding and the third winding are coupled in phase. The first switch also connects the gate of the first common-gate transistor to the second end of the third winding according to the received voltage signal. The second switch also connects the gate of the second common-gate transistor to the first end of the third winding according to the received voltage signal, so that the second winding and the third winding are coupled in reverse phase. Both the first switch and the second switch are embedded in the three-coil transformer unit.

2. The bidirectional amplifier according to claim 1, characterized in that, The first switch includes a first switching transistor and a second switching transistor; the first end of the first switching transistor and the first end of the second switching transistor are both connected to the gate of the first common-gate transistor, the second end of the first switch is connected to the first end of the third winding, and the second end of the second switch is connected to the second end of the third winding; the second switch includes a third switching transistor and a fourth switching transistor, the first end of the third switching transistor and the first end of the fourth switching transistor are both connected to the gate of the first common-gate transistor, the second end of the third switch is connected to the first end of the third winding, and the second end of the fourth switch is connected to the second end of the third winding; Both the first and fourth switches are turned off according to the transmitted voltage signal, and both the second and third switches are turned on according to the transmitted voltage signal; both the first and fourth switches are turned on according to the received voltage signal, and both the second and third switches are turned off according to the received voltage signal.

3. The bidirectional amplifier according to claim 2, characterized in that, The on-resistance of the first switch and the fourth switch is equal to the off-resistance of the second switch and the third switch.

4. The bidirectional amplifier according to claim 1, characterized in that, The low-noise amplification module includes a first input matching unit, a first-stage common-grid differential amplification unit, a first-stage inter-stage matching unit, a second-stage common-source differential amplification unit, and a first output matching unit connected in series. The first input matching unit is equivalent to the multiplexed matching network module; The first-stage common-grid differential amplifier unit is used to amplify the signal input from the antenna in one stage, and output the amplified signal to the first-stage inter-matching unit. The first interstage matching unit is used to perform impedance matching on the first-stage amplified signal and output the first-stage amplified signal after impedance matching to the second-stage common-source differential amplifier unit. The secondary common-source differential amplifier unit is used to amplify the primary amplified signal output by the first inter-stage matching unit in a secondary manner, and output the amplified signal to the first output matching unit; The first output matching unit is used to perform output impedance matching on the secondary amplified signal output by the secondary common-source differential amplifier unit.

5. The bidirectional amplifier according to claim 4, characterized in that, The first-stage common-gate differential amplifier unit includes a first common-gate transistor and a second common-gate transistor; the drain of the first common-gate transistor is connected to the first terminal of the first-stage inter-matching unit, and the drain of the second common-gate transistor is connected to the second terminal of the first-stage inter-matching unit. The first interstage matching unit includes a first transformer, a first capacitor, and a second capacitor; the first end of the primary winding of the first transformer serves as the first end of the first interstage matching unit, and the second end of the primary winding serves as the second end of the first interstage matching unit; the first capacitor is connected between the first end of the primary winding and the first end of the secondary winding of the first transformer, and the second capacitor is connected between the second end of the primary winding and the second end of the secondary winding. The secondary common-source differential amplifier unit includes a third common-source transistor, a fourth common-source transistor, a third capacitor, and a fourth capacitor. The gate of the third common-source transistor is connected to the first terminal of the secondary winding. The sources of both the third and fourth common-source transistors are connected to ground. The drain of the third common-source transistor is connected to the second terminal of the third capacitor. The second terminal of the third capacitor is connected to the gate of the fourth common-source transistor. The gate of the third common-source transistor is also connected to the second terminal of the second capacitor. The drain of the fourth common-source transistor is connected to the second terminal of the fourth capacitor. The first terminal of the fourth capacitor is connected to the gate of the third common-source transistor. The first output matching unit includes a second transformer. The first end of the primary winding of the second transformer is connected to the second end of the third capacitor, the second end of the primary winding is connected to the second end of the fourth capacitor, the first end of the secondary winding of the second transformer outputs the second-stage amplified signal, and the second end of the secondary winding is connected to ground.

6. The bidirectional amplifier according to claim 5, characterized in that, The first common-gate transistor and the second common-gate transistor are both PMOS transistors; the third common-source transistor and the fourth common-source transistor are both NMOS transistors.

7. The bidirectional amplifier according to claim 1, characterized in that, The power amplification module includes a second input matching unit, a first-stage common-source differential amplification unit, a second-stage inter-stage matching unit, a second-stage common-source differential amplification unit, and a second output matching unit connected in series. The second input matching unit is used to perform input impedance matching on the signal to be amplified, and outputs the impedance-matched signal to be amplified to the first-stage common-source differential amplifier unit; The first-stage common-source differential amplifier unit is used to amplify the impedance-matched signal in the first stage and output the amplified signal to the second-stage inter-matching unit. The second-stage inter-matching unit is used to perform impedance matching on the first-stage amplified signal and output the impedance-matched first-stage amplified signal to the second-stage common-source differential amplifier unit. The secondary common-source differential amplifier unit is used to perform secondary amplification on the impedance-matched primary amplified signal and output the secondary amplified signal; The second output matching unit is equivalent to the multiplexed matching network module.

8. The bidirectional amplifier according to claim 7, characterized in that, The second input matching unit includes a third transformer, the first end of the primary winding of the third transformer is connected to the signal to be amplified, and the second end of the primary winding is connected to ground; the secondary winding of the third transformer outputs the impedance-matched signal to be amplified. The first-stage common-source differential amplifier unit includes a fifth capacitor, a sixth capacitor, a fifth common-source transistor, and a sixth common-source transistor. The first terminal of the fifth capacitor is connected to the gate of the sixth common-source transistor, and the second terminal of the fifth capacitor is connected to the drain of the fifth common-source transistor. The first terminal of the sixth capacitor is connected to the gate of the fifth common-source transistor, and the second terminal of the sixth capacitor is connected to the drain of the sixth common-source transistor. The gate of the fifth common-source transistor is also connected to the first terminal of the primary winding of the third transformer. The sources of both the fifth and sixth common-source transistors are connected to ground. The gate of the sixth common-source transistor is connected to the second terminal of the primary winding. The second-stage matching unit includes a fourth transformer. The first end of the primary winding of the fourth transformer is connected to the drain of the fifth common-source transistor, and the second end of the primary winding is connected to the drain of the sixth common-source transistor. The secondary winding of the fourth transformer outputs the impedance-matched first-stage amplified signal to the second-stage common-source differential amplifier unit. The secondary common-source differential amplifier unit includes: a seventh capacitor, an eighth capacitor, a first common-source transistor, and a second common-source transistor; The first terminal of the seventh capacitor is connected to the gate of the sixth common-source transistor, the second terminal of the seventh capacitor is connected to the drain of the first common-source transistor, the first terminal of the eighth capacitor is connected to the gate of the first common-source transistor, and the second terminal of the eighth capacitor is connected to the drain of the second common-source transistor; the gate of the first common-source transistor is connected to the first terminal of the secondary winding of the fourth transformer, and the sources of the first common-source transistor and the second common-source transistor are both connected to ground; the gate of the second common-source transistor is connected to the second terminal of the secondary winding.

9. The bidirectional amplifier according to claim 8, characterized in that, The first common-source transistor, the second common-source transistor, the third common-source transistor, and the fourth common-source transistor are all NMOS transistors.

10. An electronic device, characterized in that, Includes the bidirectional amplifier as described in any one of claims 1 to 9.

Images