Optimized double-development wafer processing technology

Abstract

The invention provides an optimized double-development wafer processing technology, and particularly relates to the technical field of semiconductor processing, and the optimized double-development wafer processing technology comprises the following steps: S1, cleaning the surface of a wafer, and carrying out HMDS coating after cleaning; s2, the film thickness is determined according to the curve of the optimal rotating speed and the film thickness, the optimal soft baking temperature and the optimal soft baking time are determined, and photoresist coating is carried out; s3, determining the optimal time of pre-development, carrying out pre-development treatment, destroying the molecular structure of the upper layer of the photoresist, and forming a preliminary pattern; s4, testing an optimal exposure condition, and performing exposure treatment on the photoresist subjected to the pre-developing treatment; and S5, after exposure treatment, testing an optimal secondary development condition, carrying out baking before development, then carrying out secondary development treatment, and enabling the graph to form an inverted-ox-horn-shaped section morphology, so that the working difficulty of a subsequent Lift-off process is reduced, and the product yield is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor processing, and in particular to an optimized double-developing wafer processing technology. BACKGROUND

[0002] The double-layer resist process is a commonly used semiconductor process, which can achieve better resolution. The double-layer resist process is generally used in the Lift-off process. The resolution of the Lift-off resist is relatively low, and it is difficult to form a more fine structure. However, the upper layer of the double-layer resist has a smaller opening, and the lower layer of the resist has a larger opening, which enables the formation of a smaller pattern during film plating.

[0003] However, the double-layer resist process requires a bottom layer of non-photosensitive resist, which needs a long baking time, resulting in low production efficiency. In addition, the bottom layer material may introduce additional thickness or refractive index changes, increasing the error of alignment mark recognition and affecting the shell precision. If the non-photosensitive bottom layer reacts with the positive resist developer, it may generate insoluble by-products, resulting in post-development residues or micro-bridge defects, etc. Finally, the particles or contaminants on the surface of the bottom layer may be removed during the coating process, increasing the photolithography defect density.

[0004] Therefore, the present application provides an optimized double-developing wafer processing technology that can replace the double-layer resist process. SUMMARY

[0005] To solve the above problems, the present application provides an optimized double-developing wafer processing technology.

[0006] The present application is achieved by the following technical solutions:

[0007] The present application provides an optimized double-developing wafer processing technology, which includes the following steps:

[0008] S1. Clean the surface of the wafer, and then perform HMDS coating after cleaning;

[0009] S2. Determine the film thickness according to the curve of the optimal rotation speed and film thickness, and determine the optimal soft baking temperature and time, and perform resist coating;

[0010] S3. Confirm the optimal pre-development time, and perform pre-development treatment, destroy the molecular structure of the upper layer of the resist, and form a preliminary pattern;

[0011] S4. Test the optimal exposure conditions, and perform exposure treatment on the pre-developed resist;

[0012] S5. After the exposure process, test the optimal second development condition and perform a pre-development bake, then perform a second development process, and make the pattern profile into an inverted horn shape.

[0013] Further, the step S2 of determining the optimal soft bake temperature and the optimal soft bake time includes:

[0014] Selecting the optimal soft bake time temperature of 90℃ or 100℃ and the heating time of 60s as the intermediate value;

[0015] Controlling the temperature unchanged, taking the heating time of 60s as the starting value, increasing by every 5s as a group of gradients, and increasing to 180s;

[0016] Determining the optimal soft bake time according to the influence degree of the time change on CD and FIB analysis or TEM analysis profile;

[0017] Controlling the time unchanged, taking the temperature of 90℃ or the temperature of 100℃ as the starting value, changing by every 2℃ as a group of gradients, increasing to 120℃ and decreasing to 80℃;

[0018] Determining the optimal soft bake temperature according to the influence degree of the temperature change on CD and FIB analysis or TEM analysis profile.

[0019] Further, the step S3 of confirming the optimal pre-development time includes:

[0020] Taking the pre-development time of 60s as the center value, changing by every 5s as a group of gradients, increasing to 100s and decreasing to 40s;

[0021] Measuring the CD using a CDSEM measurement device to confirm the change of line width after the pre-development time change;

[0022] Determining the optimal development time according to FIB analysis or TEM analysis profile.

[0023] Further, the step S5 of testing the optimal exposure condition includes:

[0024] Determining the optimal pre-second development bake temperature;

[0025] Adjusting and determining the optimal pre-second development bake time;

[0026] Determining the optimal development time.

[0027] Further, the step of determining the optimal pre-second development bake temperature includes:

[0028] Controlling the bake time of 60s unchanged, taking the temperature of 110℃ as the center value, changing by every 2℃ as a group of gradients, increasing to 130℃ and decreasing to 90℃;

[0029] The CDSEM measuring device is used to monitor the CD variation and the topography;

[0030] The optimal pre-development baking temperature is determined according to the variation and the topography.

[0031] Further, the optimal pre-development baking time is determined by adjusting the optimal pre-development baking temperature.

[0032] The baking temperature is controlled to be 110 DEG C, and the time is set to be 60s, and the baking temperature is increased by 5s every time until 180s.

[0033] The CDSEM measuring device is used to monitor the CD variation and the topography;

[0034] The optimal pre-development baking time is determined according to the variation and the topography.

[0035] Further, the optimal pre-development baking time is determined by adjusting the optimal pre-development baking temperature.

[0036] The optimal pre-development baking temperature and the optimal pre-development baking time are controlled to be constant, and the baking time is subjected to the pull-off test, and the development time is set to be 60s, and the baking time is increased by 5s every time until 180s and decreased by 5s every time until 40s.

[0037] The CDSEM measuring device is used to monitor the CD variation and the topography;

[0038] The optimal pre-development baking time is determined according to the variation and the topography.

[0039] The present application has the following beneficial effects:

[0040] The optimal double-development wafer processing technology can improve the reaction speed of the upper photoresist, so that the reaction rates of the upper photoresist and the lower photoresist are inconsistent, and the inverted horn topography of top large and bottom small is realized in the subsequent second development, the working difficulty of the subsequent Lift-off process is reduced, and the product yield is improved. BRIEF DESCRIPTION OF DRAWINGS

[0041] Figure 1 The photoresist thickness and the rotation speed relationship of an embodiment of the optimal double-development wafer processing technology;

[0042] Figure 2 The photoresist thickness and the temperature relationship of an embodiment of the optimal double-development wafer processing technology;

[0043] Figure 3 The photoresist thickness and the rotation speed relationship of another embodiment of the optimal double-development wafer processing technology;

[0044] Figure 4A photoresist thickness and temperature relationship for another embodiment of the optimized double developing wafer processing method of the present application;

[0045] Figure 5 A structure diagram after pre-development for the optimized double developing wafer processing method of the present application;

[0046] Figure 6 A structure diagram of inverted horn cross-section after secondary development for the optimized double developing wafer processing method of the present application;

[0047] The purposes, functional features and advantages of the present application will be further explained with reference to the embodiments and the accompanying drawings. DETAILED DESCRIPTION

[0048] In order to more clearly and completely explain the technical solutions of the present application, the present application will be further explained below with reference to the accompanying drawings.

[0049] Please refer to Figures 1-2 The present application proposes an optimized double developing wafer processing method including the following steps:

[0050] S1. Clean the wafer surface, and perform HMDS coating after cleaning;

[0051] S2. Determine the film thickness according to the curve of the optimal rotation speed and film thickness, determine the optimal soft baking temperature and the optimal soft baking time, and perform photoresist coating;

[0052] S3. Confirm the optimal pre-development time, and perform pre-development treatment, destroy the molecular structure of the upper layer of the photoresist, and form a preliminary pattern;

[0053] S4. Test the optimal exposure condition, and perform exposure treatment on the photoresist after pre-development treatment;

[0054] S5. After exposure treatment, test the optimal secondary development condition, perform development pre-baking, and then perform secondary development treatment, so that the pattern forms an inverted horn-shaped cross-sectional morphology.

[0055] In the specific embodiment, the wafer surface can be cleaned by ion washing or OK73 to reduce the defects on the wafer surface, resulting in abnormal glue coating, and the HMDS adhesion enhancer treatment can increase the adhesion of the photoresist and the wafer, and the purpose of pre-exposure is to destroy the molecular structure of the upper layer of the photoresist, so that the surface layer has a slower reaction speed when exposed, while the middle layer and the bottom layer of the photoresist have unchanged reaction speed, and the middle layer has a slow reaction speed with the developing solution, and the bottom layer has a fast reaction speed, so that the entire photoresist forms an inverted horn cross-sectional morphology; the second development can develop the latent image after exposure, so that the microscope can clearly distinguish the difference between the exposed area and the unexposed area, and develop the required pattern; the present application can improve the reaction speed of the upper layer of the photoresist through pre-exposure, so that the reaction rates of the upper layer and the bottom layer of the photoresist are inconsistent, and the inverted horn morphology of top large and bottom small is realized during the subsequent second development, thereby reducing the working difficulty of the subsequent Lift-off process and improving the product yield.

[0056] In one embodiment, by controlling the thickness of the pre-exposure, the chemical reaction of the exposed area can be more concentrated, the contrast of the photoacid reaction is improved, and the pattern resolution is improved, and the pre-exposure can weaken the interface reaction between the photoresist layer and the wafer, thereby reducing the risk of residual glue bottom after exposure and development.

[0057] In one embodiment, if only pre-exposure is performed and no second development is performed, the pattern will only leave a latent image on the photoresist which cannot be observed under a microscope, and if only second development is performed without pre-exposure, the morphology of the photoresist cannot form an inverted horn shape, i.e. a normal right trapezoidal shape rather than an inverted horn structure, so pre-exposure and second development are required.

[0058] In one embodiment, the photoresist uses AZ5206 photoresist: the photoetching FEM matrix CD data is as follows:

[0059] F(um) / E(mesc) 370 390 410 430 450 470 490 -0.6 915.6 819.91 953.45 964.71 1002.72 1034.69 1057.33 -0.4 916.37 953.52 948.45 992.51 1015.67 1038.91 1066.96 -0.2 929.03 961.02 979.22 999.33 1016.56 1047.21 1069.06 0 949.64 969.76 980.76 999.82 1029.43 1043.14 1080.35 0.2 950.78 967.24 986.43 1004.31 1031.44 1046.84 1076.41 0.4 951.89 955.51 973.66 998.89 1021.66 1046.61 1070.35 0.6 943.29 949.92 976.6 993.03 1022.19 1046.9 1068.75

[0060] In one embodiment, the photoresist uses AR80 photoresist: the photoetching FEM matrix CD data is as follows:

[0061] F(um) / E(mesc) 290 310 330 350 370 390 410 -0.6 229.5 238.91 372.45 383.71 421.72 453.69 463.12 -0.4 335.37 372.52 367.45 411.51 434.67 457.91 485.96 -0.2 348.03 380.02 398.22 418.33 435.56 466.21 488.06 0 368.64 388.76 399.76 418.82 448.43 462.14 499.35 0.2 369.78 386.24 405.43 423.31 450.44 465.84 495.41 0.4 370.89 374.51 392.66 417.89 440.66 465.61 489.35 0.6 365.12 368.92 395.6 412.03 441.19 465.9 479.63

[0062] Further, the step of determining the optimal soft-baking temperature and the optimal soft-baking time in the S2 step comprises:

[0063] The optimal soft-baking temperature and heating time of 90 DEG C or 100 DEG C and 60 s are selected as intermediate values;

[0064] The temperature is kept constant, and the heating time is increased by 5 s as a group of gradients from the starting value of 60 s to 180 s;

[0065] According to the degree of influence on CD after the change of time and the FIB analysis or TEM analysis morphology to determine the best soft baking time;

[0066] The control time is unchanged, and the temperature is taken as a starting value of 90 DEG C or 100 DEG C, and is changed in a gradient of every 2 DEG C, and is increased to 120 DEG C and decreased to 80 DEG C;

[0067] According to the degree of influence on CD after the change of temperature and the FIB analysis or TEM analysis morphology to determine the best soft baking temperature.

[0068] In the specific embodiment, the best soft baking temperature of the photoresist can be determined by the soft baking test, so that the pre-exposure effect is more obvious.

[0069] Further, the S3 step of confirming the best pre-exposure time comprises:

[0070] The pre-exposure time 60s is taken as a center value, and is changed in a gradient of every 5s, and is increased to 100s and decreased to 40s;

[0071] The CDSEM measurement device is used to measure CD to confirm the change of line width after the change of pre-exposure time;

[0072] According to the FIB analysis or TEM analysis morphology to determine the best exposure time.

[0073] In the specific embodiment, if the pre-exposure time is insufficient, the molecular structure of the surface layer of the photoresist is not completely affected, which directly affects the subsequent photoresist morphology, and the inverted horn morphology cannot be formed, which directly affects the subsequent lift-off process; if the pre-exposure time is too long, the subsequent second development will be difficult to develop the photoresist opening area, and part of the photoresist will be left, which seriously affects the pattern morphology of the photoresist and seriously affects the performance of the product.

[0074] Further, the S5 step of testing the best exposure condition comprises:

[0075] Determine the best baking temperature before the second development;

[0076] Adjust and determine the best baking time before the second development;

[0077] Determine the best development time.

[0078] Further, the S5 step of testing the best exposure condition comprises:

[0079] The baking time 60s is unchanged, and the temperature is taken as a center value of 110 DEG C, and is changed in a gradient of every 2 DEG C, and is increased to 130 DEG C and decreased to 90 DEG C;

[0080] The CDSEM measuring device is used to monitor the CD variation and the topography;

[0081] The optimal pre-development baking temperature is determined according to the variation and the topography.

[0082] Further, the optimal pre-development baking time is determined by adjusting the optimal pre-development baking temperature.

[0083] The baking temperature is controlled to be 110 DEG C, and the time is set to be 60s, and the baking temperature is increased by 5s every time until 180s.

[0084] The CDSEM measuring device is used to monitor the CD variation and the topography;

[0085] The optimal pre-development baking time is determined according to the variation and the topography.

[0086] Further, the optimal development time is determined by adjusting the optimal pre-development baking time.

[0087] The optimal pre-development baking temperature and the optimal pre-development baking time are controlled to be constant, and the baking time is tested by pulling the bias, the development time is set to be 60s, and the baking time is increased by 5s every time until 180s and decreased by 5s every time until 40s.

[0088] The CDSEM measuring device is used to monitor the CD variation and the topography;

[0089] The optimal development time is determined according to the variation and the topography.

[0090] In the embodiment, if the development time is insufficient, the developed area is not developed, and part of the photoresist is remained, which seriously affects the photoresist pattern topography and the product performance; if the development time is too long, the developed area is over-developed, the photoresist sidewall topography is gradually narrowed, and the photoresist topography may be collapsed or pressed to collapse during the metal evaporation, which directly affects the product performance.

[0091] Of course, the present application also has other various embodiments, and based on the embodiment, other embodiments obtained by those skilled in the art without any creative labor are within the protection scope of the present application.

Claims

1. An optimized dual-development wafer processing technology, characterized in that, Includes the following steps: S1. Clean the wafer surface, and then apply HMDS coating after cleaning; S2. Determine the film thickness based on the curve of optimal rotation speed and film thickness, and determine the optimal soft baking temperature and optimal soft baking time, and then apply photoresist; S3. Confirm the optimal pre-development time, perform pre-development treatment, and destroy the molecular structure of the upper layer of photoresist to form a preliminary pattern; S4. Test the optimal exposure conditions and expose the photoresist after pre-development. S5. After exposure, test the optimal secondary development conditions and bake before development, then perform secondary development to form an inverted horn-shaped cross-sectional morphology.

2. The optimized dual-development wafer processing technology according to claim 1, characterized in that, The steps in step S2 that determine the optimal soft-bake temperature and optimal soft-bake time include: The optimal baking temperature of 90℃ or 100℃ and the heating time of 60s were selected as intermediate values. Keep the temperature constant, starting with a heating time of 60 seconds, and gradually increase it in increments of 5 seconds each, up to 180 seconds. The optimal softening time is determined based on the degree of impact on CD after time changes and the morphology of FIB or TEM analysis. With the control time unchanged, starting from a temperature of 90℃ or 100℃, the temperature is varied in increments of 2℃, increasing to 120℃ and decreasing to 80℃. The optimal softening temperature was determined based on the degree of influence of temperature changes on CD and the morphology analyzed by FIB or TEM.

3. The optimized dual-development wafer processing technology according to claim 1, characterized in that, The optimal pre-development time confirmed in step S3 includes: Using a pre-development time of 60s as the center value, the gradient changes were set in groups of 5s, increasing to 100s and decreasing to 40s. The CDSEM measurement equipment was used to measure the line width changes after the pre-development time was changed to confirm the CD. The optimal development time is determined based on FIB analysis or TEM analysis of the morphology.

4. The optimized dual-development wafer processing technology according to claim 1, characterized in that, The optimal exposure conditions tested in step S5 include: Determine the optimal baking temperature before secondary development; Adjust and determine the optimal baking time before secondary development; Determine the optimal development time.

5. The optimized dual-development wafer processing technology according to claim 4, characterized in that, Determining the optimal baking temperature before secondary development includes: Keep the baking time constant at 60 seconds, with the temperature 110℃ as the center value, and change it in 2℃ increments, increasing to 130℃ and decreasing to 90℃. The CDSEM measurement equipment was used to monitor the changes and morphology of CD. The optimal baking temperature before secondary development is determined based on the changes and morphology.

6. The optimized dual-development wafer processing technology according to claim 4, characterized in that, The process of adjusting and determining the optimal baking time before secondary development includes: Keep the baking temperature constant at 110℃, starting with a time of 60s, and gradually increase the time to 180s in increments of 5s. The CDSEM measurement equipment was used to monitor the changes and morphology of CD. The optimal baking time before secondary development is determined based on the changes and morphology.

7. The optimized dual-development wafer processing technology according to claim 1, characterized in that, Determining the optimal time for secondary development includes: Keeping the optimal temperature and time for pre-baking constant, a stretching test was conducted on the baking time. With the development time of 60s as the center value, a gradient change was performed every 5s, increasing to 180s and decreasing to 40s. The CDSEM measurement equipment was used to collect data on changes in the CD and its morphology. The optimal secondary development time is determined based on the changes in condition and morphology.

Images