Methods, electronic devices, and media for obtaining the target thread index
By obtaining the three-dimensional modulus of the target thread and dividing it into groups, and by using clock cycle calculation and lookup table optimization, the problem of quickly and accurately obtaining the target thread index is solved, thus improving processing efficiency and accuracy.
Patent Information
- Application Number
- CN202511525597.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-24
- Publication Date
- 2026-01-30
- Estimated Expiration
- 2045-10-24
AI Technical Summary
How to quickly and accurately obtain the index information of the target thread in the process so that the chip execution unit can effectively execute the thread.
By obtaining the three-dimensional modulus of the target thread in the process, dividing it into multiple groups, and calculating the dimension coordinate value of the target thread in each group according to the clock cycle, setting the cycle delay, and using a lookup table to optimize the calculation of non-integer powers of dimensions, an index lookup table for the target thread is generated.
It enables the rapid and accurate acquisition of the target thread's index information within the process, improving processing efficiency and accuracy.
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Figure CN120994255B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The application relates to the chip technical field, in particular to a target thread index acquisition method, an electronic device and a medium. BACKGROUND
[0002] A program is a static instruction (wave) set, a process is a dynamic execution instance of the program, an instruction is a basic unit of process execution, and a thread is a smaller unit capable of concurrent execution in the process, which cooperates with each other to realize complex software functions in a computer system. A process can include multiple instructions, an instruction can include multiple threads, and multiple dimensions of indexes are needed in a process to determine the specific position of a thread. When an execution unit (Accelerated Processor, AP for short) of a chip executes a thread in an instruction, the position information of the thread in each dimension of the process needs to be acquired. Therefore, how to quickly and accurately acquire the index information of the target thread in the process becomes a technical problem to be solved. SUMMARY
[0003] The application aims to provide a target thread index acquisition method, an electronic device and a medium, which can quickly and accurately acquire the index information of the target thread in the process.
[0004] According to a first aspect of the application, a target thread index acquisition method is provided, which comprises the following steps:
[0005] Step S1: acquiring the modulus (Z, Y, X) of the target thread in the process corresponding to three dimensions, wherein X is the modulus of the target thread in the process corresponding to the first dimension, Y is the modulus of the target thread in the process corresponding to the second dimension, and Z is the modulus of the target thread in the process corresponding to the third dimension;
[0006] Step S2: acquiring the total number P of target threads X*Y*Z, and the number A of threads that can be executed in a clock cycle N / B, P≤M*N, M is the maximum number of instructions contained in the process, N is the maximum number of threads contained in the instruction, and B is the number of clock cycles required to execute an instruction;
[0007] Step S3: dividing the P target threads into Q groups {C0, C1,..., C q ,...,C Q-1}, C q is the qth group of target threads, the value range of q is 0 to Q-1, Q=roundup(P / A), roundup() represents the upward rounding function, and C q ={t0 q ,t1 q ,...,t i q ,...,tf(q) q}, t i q C q The i-th target thread in the context, where i ranges from 0 to f(q), and f(q) is a function of C. q The number of target threads included, t i q The target line program number is u i q u i q =q×A+i, if P / A is an integer, then all f(q) are equal to A-1; if P / A is not an integer, then when q=Q-1, f(q) is the remainder of P / A; when q≠Q-1, f(q)=A-1.
[0008] Step S4: Set v to take values from 0 to Q+1 sequentially. In the v-th clock cycle: when v=0, execute process 1; when v=1, execute process 1 and process 2; when 3≤v≤Q-1, execute process 1, process 2, process 3 and process 4; when v=Q, execute process 2, process 3 and process 4; when v=Q+1, execute process 3 and process 4.
[0009] Process 1: Based on u i v And X determines t i v The corresponding first-dimensional coordinate x i v and t i v The corresponding second-dimensional carry value r i v ;
[0010] Process 2: r determined based on the (v-1)th clock cycle i v-1 And Y determine t i v-1 The corresponding second-dimensional coordinate y i v-1 and t i v-1 The corresponding third-dimensional carry value s i v-1 ;
[0011] Step 3: Based on s determined in the (v-2)th clock cycle i v-2 And Z determine t i v-2 The corresponding third-dimensional coordinate z i v-2 ;
[0012] Flow 4: output t i v-2 Corresponding index information (z i v-2 , y i v-2 , x i v-2 ).
[0013] According to a second aspect of the present application, an electronic device is provided, comprising: at least one processor; and a memory connected to the at least one processor in communication; wherein the memory stores instructions executed by the at least one processor, the instructions are configured to perform the method of the first aspect of the present application.
[0014] According to a third aspect of the present application, a computer readable storage medium is provided, which stores computer executable instructions for performing the method of the first aspect of the present application.
[0015] The present application has obvious advantages and beneficial effects compared with the prior art. By the above technical solution, the target thread index acquisition method, electronic device and medium provided by the present application can achieve considerable technical progress and practicality, and have wide industrial utilization value, which at least has the following beneficial effects:
[0016] The present application first acquires the modulus of the target thread in the process corresponding to three dimensions and the total number of target threads, then divides the target thread into multiple groups, and then calculates the coordinate value of each dimension in each group of target threads according to the clock cycle, and a one-cycle delay is set between the three dimensions, so that the index information of the target thread in the process can be quickly and accurately acquired. BRIEF DESCRIPTION OF DRAWINGS
[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiment description. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative labor on the basis of these drawings.
[0018] Figure 1 The target thread index acquisition method flowchart provided by the embodiment of the present application. DETAILED DESCRIPTION
[0019] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0020] This invention provides a method for obtaining a target thread index, such as... Figure 1 As shown, it includes:
[0021] Step S1: Obtain the three-dimensional modulus (Z, Y, X) of the target thread in the process, where X is the first-dimensional modulus of the target thread in the process, Y is the second-dimensional modulus of the target thread in the process, and Z is the third-dimensional modulus of the target thread in the process.
[0022] It should be noted that an origin and coordinate axes of the first, second, and third dimensions are established in the process. The target thread is located in a cube in the process with (Z, Y, X) and the origin as vertices, together with the three coordinate axes. The magnitude of each dimension is the maximum length value of the target thread in the corresponding dimension.
[0023] Step S2: Obtain the total number of target threads P=X×Y×Z, and the number of threads that can be executed in one clock cycle A=N / B, P≤M×N, where M is the maximum number of instructions contained in the process, N is the maximum number of threads contained in the instruction, and B is the number of clock cycles required to execute one instruction.
[0024] Where M×N is the maximum number of threads that the process can accommodate, and P=X×Y×Z is the target total number of threads. Therefore, P≤M×N. For example, if the process contains a maximum of 16 instructions, and each instruction contains a maximum of 64 threads, then M=16, N=64, and M×N=1024. B is a known value, and the setting of the value of B needs to meet the timing requirements.
[0025] Step S3: Divide the P target threads into Q groups {C0, C1, ..., C...} q ,...,C Q-1}, C q For the q-th target thread, the value of q ranges from 0 to Q-1, Q = roundup(P / A), where roundup() represents the round-up function. q ={t0 q ,t1 q ,...,t i q ,...,t f(q) q}, t iq is C q , i is the i-th target thread in C q , i is the i-th target thread in C i q , u is the target thread number of t i q , u is the target thread number of t i q , u is the target thread number of t i v , u is the target thread number of t i v , u is the target thread number of t i v , u is the target thread number of t i v , u is the target thread number of t i v .
[0026] , wherein, "roundup(P / A)" represents rounding up the result of P / A. It should be noted that P target threads are divided into Q groups, so that the coordinate information of the target threads in each group can be calculated in turn according to the clock cycle, and the coordinate of the target thread of the thread number that can be executed is calculated as much as possible in each clock cycle, so as to improve the processing efficiency as much as possible on the basis of ensuring accuracy.
[0027] Step S4, v is set to take values from 0 to Q+1 in turn, in the v-th clock cycle: when v=0, flow 1 is executed, when v=1, flow 1 and flow 2 are executed; when 3≤v≤Q-1, flow 1, flow 2, flow 3 and flow 4 are executed, when v=Q, flow 2, flow 3 and flow 4 are executed, when v=Q+1, flow 3 and flow 4 are executed.
[0028] Flow 1: determining t i v based on u i v and X. i v and t i v corresponding to the second dimension coordinate y i v .
[0029] It can be understood that u i v is one of the target thread numbers, t i v is a target thread in the v-th group of target threads.
[0030] Flow 2: determining t i v-1 based on r i v-1 determined in the (v-1)-th clock cycle and Y. i v-1 and ti v-1 The corresponding third-dimension carry value s i v-1 .
[0031] It can be understood that t i v-1 is a target thread of the v-1th group of target threads.
[0032] Flow 3: determining s i v-2 and Z to determine t i v-2 The corresponding third-dimension coordinate z i v-2 .
[0033] It can be understood that t i v-2 is a target thread of the v-2th group of target threads.
[0034] Flow 4: outputting t i v-2 The corresponding index information (z i v-2 , y i v-2 , x i v-2 .
[0035] It can be understood that through the above steps, the index information of each t i q corresponding to each target thread can be finally obtained. i q The corresponding index information (z i q , y i q .
[0036] It should be noted that in addition to obtaining the index information corresponding to each target thread, the corresponding relationship between each target thread and the target instruction can also be obtained, and as an embodiment, the step S3 comprises:
[0037] Step S31, dividing P target threads in F target instructions {W0, W1,..., W f ,..., W F-1}, W f is the fth target instruction, the value range of f is 0 to F-1, and F=roundup(P / N).
[0038] Wherein, roundup(P / N) represents rounding up the result of P / N. It can be understood that W0 to W F-1Each part is divided into N threads, W F The number of threads in the pool is less than or equal to N, depending on whether the result of P / N is an integer. If it is an integer, then W... F The number of threads in the W is N; otherwise, W F The number of threads is the remainder of P / N.
[0039] Step S32: If 0, B, 2×B, ..., f×B, ..., (F-2)×B, then C k To C k+B-1 The target instructions in the middle are divided into the corresponding W. f In the middle, if k = (F-1) × B, then C k To C Q-1 The target instructions in the middle are divided into the corresponding W. F middle.
[0040] It should be noted that through steps S31-S32, a mapping relationship between each target instruction and its corresponding target instruction can be established.
[0041] As one embodiment, in step S4, process 1, i.e., the process based on u i v And X determines t i v The corresponding first-dimensional coordinate x i v and t i v The corresponding second-dimensional carry value r i v ,include:
[0042] Step S41, if u i v If the result is greater than or equal to X, then proceed to step S42; otherwise, proceed to step S43.
[0043] Step S42, obtain u i v The quotient divided by X and u i v The remainder when divided by X, u i v The remainder when divided by X is determined as t. i v The corresponding first-dimensional coordinate x i v , will u i v The quotient divided by X is determined as t. i v The corresponding second-dimensional carry value r i v .
[0044] Step S43, u i v is determined as t i v the corresponding first dimension coordinate x i v , t i v the corresponding second dimension carry value r i v is determined as 0.
[0045] It should be noted that if the value of X is an integer power of 2, the calculation can be based on the logic of steps S41-S43. In order to improve processing efficiency, if the value of X is not an integer power of 2, for example, the value of X is 3, 5, 6, 7, etc., a corresponding lookup table can be set in advance based on the value of X, and the corresponding relationship between the input value and the corresponding output quotient and remainder is set through the lookup table. The quotient and remainder corresponding to the input value are obtained through the lookup table.
[0046] As an embodiment, in step S4, the flow 2, i.e., the r i v-1 and Y determine t i v-1 the corresponding second dimension coordinate y i v-1 and t i v-1 the corresponding third dimension carry value s i v-1 , including:
[0047] Step C41, if r i v-1 ≥ Y, step C42 is executed, otherwise, step C43 is executed.
[0048] Step C42, the quotient of r i v-1 divided by Y and r i v-1 the remainder of r i v-1 divided by Y is determined as t i v-1 the corresponding second dimension coordinate y i v-1 , r i v-1 the quotient of r i v-1 divided by Y is determined as t i v-1 .
[0049] Step C43, ri v-1 is determined as t i v-1 the corresponding second dimension coordinate y i v-1 is determined as t i v-1 the corresponding third dimension carry value s i v-1 is determined as 0.
[0050] It should be noted that, according to the flow 2, the calculation of the coordinate of the second dimension of each target thread is based on the corresponding first dimension carry value, and thus is delayed by one clock cycle compared with the calculation of the coordinate of the first dimension. In addition, if the value of Y is a power of 2, the calculation can be performed based on the logic of steps C41-C43. In order to improve the processing efficiency, if the value of Y is not a power of 2, for example, the value of Y is 3, 5, 6, 7, etc., a corresponding lookup table can be set in advance based on the value of Y, the corresponding relationship between the input value and the corresponding quotient and remainder is set through the lookup table, and the quotient and remainder corresponding to the input value are obtained through the lookup table.
[0051] As an embodiment, in the step S4, the flow 3, that is, s i v-2 and Z determine t i v-2 the corresponding third dimension coordinate z i v-2 , comprising:
[0052] Step D41, if s i v-2 ≥ Z, step D42 is performed, otherwise, step D43 is performed.
[0053] Step D42, the quotient of s i v-2 divided by Z is obtained, and s i v-2 divided by Z is determined as t i v-2 the corresponding third dimension coordinate z i v-2 .
[0054] Step D43, s i v-2 is determined as t i v-2 the corresponding third dimension coordinate z i v-2 .
[0055] It should be noted that, as shown in process 3, the calculation of the third-dimensional coordinates of each target thread is based on the carry-in value of the corresponding second-dimensional coordinates, thus delaying the calculation of the second-dimensional coordinates by one clock cycle. Furthermore, if the Z value is a power of 2, it can be calculated based on the logic of steps D41-D43. To improve processing efficiency, if the Z value is not a power of 2, for example, if the Z value is 3, 5, 6, 7, etc., a corresponding lookup table can be pre-set based on the Z value. The lookup table establishes the correspondence between the input value and the corresponding output remainder, and the remainder corresponding to the input value is obtained through the lookup table. If any two values of X, Y, and Z are the same, the same lookup table can be reused.
[0056] As one embodiment, in step S4, process 4, i.e., the output t i v-2 Corresponding index information (z) i v-2 y i v-2 x i v-2 ),include:
[0057] Step E41: Obtain each t in the target thread of the v-2 group. i v-2 The corresponding first-dimensional coordinate x i v-2 Second-dimensional coordinate y i v-2 and the third-dimensional coordinate z i v-2 .
[0058] Step E42, based on each t i v-2 The corresponding x i v-2 y i v-2 z i v-2 Generate each t i v-2 Corresponding index information (z) i v -2 y i v-2 x i v-2 ).
[0059] Step E43: Output each t in the target thread of group v-2. i v-2 Corresponding (z) i v-2 y iv-2 , x i v-2 ).
[0060] As an embodiment, the step S4 is followed by a step S5 of generating a target thread index lookup table based on the index information of the target threads and the target instructions; the target thread index lookup table comprises F×(B+1) rows and A columns, wherein the row number and the column number of the target thread index lookup table are numbered from 0; W f the identification of the f-th target thread is stored in the f×(B+1)-th row of the target thread index lookup table.t i q the corresponding index information (z i q , y i q , x i q ) is stored in the i-th column of the q+roundup[(q+1) / B)]-th row of the target thread index lookup table. The step S5 comprises a step S51 of filling all the spaces of the target thread index lookup table, which are not in the row of the W f th target thread and are not filled with index information, with invalid identifications, which can be directly set as 0.
[0061] Taking X=16, Y=5, and Z=3 as an example, four target instructions, wave0, wave1, wave2, and wave3, and 240 target threads are obtained by the method, and the target thread index lookup table generated is shown in Table 1:
[0062] Table 1
[0063]
[0064] After the index information of each target thread and the corresponding target instruction identification are obtained, the execution unit of the chip can execute the target instruction by obtaining the index information of all the target threads corresponding to the target instruction, or can execute the target instruction by obtaining the index information of a target thread.
[0065] It should be noted that some example embodiments are described as processes or methods depicted as flow diagrams. Although the processes are described in a particular sequential order, many of the processes can be performed concurrently, in parallel, or simultaneously. In addition, the order of the processes can be re-arranged. The processes can terminate when their operations are completed, but can also have additional steps not included in the figure. The processes can correspond in part to method steps for implementing the methods.
[0066] The embodiment of the present application further provides an electronic device, comprising: at least one processor; and a memory connected with the at least one processor in communication; wherein the memory stores instructions executed by the at least one processor, and the instructions are arranged to execute the method of the embodiment of the present application.
[0067] The embodiment of the present application further provides a computer readable storage medium, which stores computer executable instructions, and the computer executable instructions are used to execute the method of the embodiment of the present application.
[0068] The embodiment of the present application first acquires the modulus of three dimensions corresponding to the target thread in the process and the total number of target threads, then divides the target threads into multiple groups, and then calculates the coordinate value of each dimension in each group of target threads according to the clock cycle, and a delay of one cycle is sequentially set between the three dimensions, so that the index information of the target thread in the process can be quickly and accurately acquired.
[0069] The above is only a preferred embodiment of the present application, and does not limit the present application in any form. Although the present application has been disclosed as above, it is not intended to limit the present application. Any person skilled in the art can make some changes or modifications to the above disclosed technical content without departing from the scope of the technical solution of the present application, and the equivalent embodiments with equivalent changes are equivalent. Any simple modification, equivalent change and modification of the above embodiments according to the technical essence of the present application are still within the scope of the technical solution of the present application.
Claims
1. A method for obtaining a target thread index, characterized in that, Comprising: Step S1, obtaining the modulus (Z, Y, X) of the target thread in the process corresponding to three dimensions, wherein X is the modulus of the first dimension corresponding to the target thread in the process, Y is the modulus of the second dimension corresponding to the target thread in the process, and Z is the modulus of the third dimension corresponding to the target thread in the process; Step S2, obtaining the total number of target threads P=X×Y×Z, and the number of threads that can be executed in a clock cycle A=N / B, P≤M×N, M is the maximum number of instructions contained in the process, N is the maximum number of threads contained in the instruction, and B is the number of clock cycles required to execute an instruction; Step S3, divide the P target threads into Q groups {C0, C1,..., C q ,...,C Q-1}, C q is the qth group of target threads, q ranges from 0 to Q-1, Q=roundup(P / A), roundup() represents the upward rounding function, C q ={t0 q ,t1 q ,...,t i q ,...,t f(q) q}, t i q is the ith target thread in C q , i ranges from 0 to f(q), f(q) is the number of target threads contained in C q , the target thread number of t i q is u i q , u i q =q×A+i, if P / A is an integer, all f(q) are equal to A-1, if P / A is not an integer, when q=Q-1, f(q) is the remainder of P / A, when q≠Q-1, f(q)=A-1; Step S4, set v to take values from 0 to Q+1 in turn, in the vth clock cycle: when v=0, execute flow 1, when v=1, execute flow 1 and flow 2; when 3≤v≤Q-1, execute flow 1, flow 2, flow 3 and flow 4, when v=Q, execute flow 2, flow 3 and flow 4, when v=Q+1, execute flow 3 and flow 4; Process 1 comprises: Step S41, if u i v ≥ X, step S42 is performed, otherwise, step S43 is performed; Step S42, obtaining u i v Quotient by X and u i v Remainder by X, u i v Remainder by X is determined as t i v Corresponding first dimension coordinate x i v u i v Quotient by X is determined as t i v Corresponding second dimension carry value r i v ; Step S43, u i v is determined as t i v The corresponding first dimension coordinate x i v is determined as t i v The corresponding second dimension carry value r i v is determined as 0; Process 2 comprises: Step C41, if r i v-1 ≥ Y, then Step C42 is performed, otherwise Step C43 is performed; Step C42, get r i v-1 Quotient by Y and r i v-1 Remainder by Y, r i v-1 Remainder by Y is determined to be t i v-1 Corresponding second-dimension coordinate y i v-1 r i v-1 Quotient by Y is determined to be t i v-1 Corresponding third-dimension carry value s i v-1 ; Step C43, r i v-1 is determined to be t i v-1 the corresponding second dimension coordinate y i v-1 is determined to be t i v-1 the corresponding third dimension carry value s i v-1 is determined to be 0; Process 3 comprises: Step D41, if s i v-2 ≥ Z, then Step D42 is performed, otherwise Step D43 is performed; Step D42, obtain s i v-2 s divided by Z with a remainder, t i v-2 t determined as the remainder of s divided by Z i v-2 corresponding third dimension coordinate z i v-2 ; Step D43, s i v-2 determined as t i v-2 corresponding third dimension coordinate z i v-2 ; Process 4 comprises: Step E41, obtaining each t in the v-2th group of target threads i v-2 corresponding first dimension coordinate x i v-2 , second dimension coordinate y i v-2 and third dimension coordinate z i v-2 ; Step E42, based on each t i v-2 Corresponding x i v-2 , y i v-2 , z i v-2 Generate each t i v-2 Corresponding index information (z i v-2 , y i v -2 , x i v-2 ); Step E43, output each t in the v-2th group of target threads i v-2 corresponding index information (z i v-2 , y i v-2 , x i v-2 .
2. The method of claim 1, wherein, Said step S3 comprises: Step S31, divide the P target threads in the F target instructions {W0, W1,..., W f ,...,W F-1}, W f is the fth target instruction, f has a value range of 0 to F-1, and F = roundup(P / N). Step S32, if 0, B, 2xB,..., fxB,..., (F-2)xB, then divide the target instruction in C k to the corresponding W k+B-1 . In the case where k = (F-1)xB, divide the target instruction in C f to the corresponding W k . In the case where k = (F-2)xB, divide the target instruction in C Q-1 to the corresponding W F .
3. The method of claim 2, wherein, Said step S4 further comprises step S5: generating a target thread index lookup table based on the index information of the target thread and the target instruction; The target thread index lookup table comprises F×(B+1) rows and A columns, wherein the row number and column number of the target thread index lookup table are numbered from 0; W f the identification of the target thread index lookup table at the f x (B + 1) row; t i q corresponding index information (z i q , y i q , x i q is stored in the (q+1)th row and the ith column of the target thread index lookup table.
4. The method of claim 3, wherein, Said step S5 comprises: Step S51, fill all the spaces of the non-W f invalid identification in the spaces of all the unfilled index information of the located row.
5. An electronic device, comprising: Comprising: At least one processor; And a memory in communication connection with the at least one processor; Wherein the memory stores instructions executed by the at least one processor, the instructions are set to execute the method of any one of the preceding claims 1-4.
6. A computer-readable storage medium, characterized in that, Computer executable instructions are stored, and the computer executable instructions are used to execute the method of any one of the preceding claims 1-4.
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