Signal configuration method, system and device and computer readable storage medium

Abstract

The invention discloses a signal configuration method, system and device and a computer readable storage medium, relates to the technical field of computers, is applied to a basic input and output system, and comprises the following steps: reading a cable in-place signal obtained after a CPU detects a compatibility port; analyzing the connection type of the compatible port based on the signal whether the cable is in place or not; if the connection type represents that the compatibility port is connected with the NVMe hard disk, the compatibility port is configured to be of a PCIe type, so that the compatibility port outputs a PCIe signal; and in response to the connection type representing that the compatibility port is connected with the SATA hard disk, configuring the compatibility port as an SATA type, so that the compatibility port outputs an SATA signal. In the application, as the cable in-place signal generated by the CPU can accurately reflect the connection type of the compatibility port, the BIOS can accurately perform signal configuration on the compatibility port according to the cable in-place signal.

Description

Technical Field

[0001] This application relates to the field of computer technology, and more specifically, to a signal configuration method, system, device, and computer-readable storage medium. Background Technology

[0002] On a server, the signal type from the motherboard CPU (Central Processing Unit) is usually PCIe (Peripheral Component Interconnect-express) or SATA (Serial Advanced Technology Attachment). In addition, some signal ports of the CPU can output both PCIe and SATA signals. Such ports that support both PCIe and SATA are usually called compatibility ports.

[0003] During CPU operation, the type of signal output by the compatibility port depends on the BIOS (Basic Input / Output System) settings for that port. For example, if the port is required to output a PCIe signal, a different BIOS version is flashed under user intervention. Conversely, if the port is required to output a SATA signal, a different BIOS version is flashed under user intervention. However, this BIOS flashing method can lead to incorrect BIOS versions being flashed, resulting in incorrect output signal types from the compatibility port and affecting CPU operation.

[0004] In summary, how to accurately configure the CPU's compatibility ports via BIOS is a problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0005] The purpose of this application is to provide a signal configuration method that can, to some extent, solve the technical problem of how to accurately configure the signals of the CPU's compatibility ports through the BIOS. This application also provides a signal configuration system, an electronic device, and a computer-readable storage medium.

[0006] To achieve the above objectives, this application provides the following technical solution:

[0007] A signal configuration method, applied to a basic input / output system, includes:

[0008] Read the signal indicating whether the cable is present, obtained after the CPU detects the compatibility port.

[0009] resolve the connection type of the compatibility port based on the cable presence signal;

[0010] configure the compatibility port as a PCIe type to make the compatibility port output a PCIe signal in response to the connection type representing that the compatibility port is connected with an NVMe hard disk;

[0011] configure the compatibility port as a SATA type to make the compatibility port output a SATA signal in response to the connection type representing that the compatibility port is connected with a SATA hard disk.

[0012] In an example embodiment, the cable presence signal obtained by the reading CPU after detecting the compatibility port includes:

[0013] The cable presence signal obtained by the reading CPU after detecting the compatibility port includes a presence signal of an SGPIO connector;

[0014] The resolving the connection type of the compatibility port based on the target cable presence signal includes:

[0015] detecting whether the SGPIO connector is present based on the presence signal of the SGPIO connector;

[0016] determining that the connection type of the compatibility port represents that the compatibility port is connected with a SATA hard disk in response to the presence signal of the SGPIO connector representing that the SGPIO connector is present;

[0017] determining that the connection type of the compatibility port represents that the compatibility port is connected with an NVMe hard disk in response to the presence signal of the SGPIO connector representing that the SGPIO connector is not present;

[0018] The SGPIO connector is equipped on a server mainboard and is bound with the compatibility port, and the presence of the SGPIO connector represents that the SGPIO connector is connected with an SGPIO cable on a server backplane.

[0019] In an example embodiment, the detecting whether the SGPIO connector is present based on the presence signal of the SGPIO connector includes:

[0020] detecting whether the presence signal of the SGPIO connector is a low level;

[0021] determining that the presence signal of the SGPIO connector represents that the SGPIO connector is present in response to the presence signal of the SGPIO connector being a low level.

[0022] in response to the presence / absence signal of the SGPIO connector being high, it is determined that the presence / absence signal of the SGPIO connector represents that the SGPIO connector is not present.

[0023] A signal configuration method applied to a CPU, comprising:

[0024] detecting a compatibility port to obtain a cable presence / absence signal;

[0025] transmitting the cable presence / absence signal to a basic input / output system, so that the basic input / output system analyzes a connection type of the compatibility port based on the cable presence / absence signal; and then the basic input / output system configures the compatibility port as a PCIe type in response to the connection type representing that the compatibility port is connected with an NVMe hard disk, and configures the compatibility port as a SATA type in response to the connection type representing that the compatibility port is connected with a SATA hard disk;

[0026] in response to the compatibility port being configured as the PCIe type, outputting a PCIe signal through the compatibility port;

[0027] in response to the compatibility port being configured as the SATA type, outputting a SATA signal through the compatibility port.

[0028] In an exemplary embodiment, the detecting the compatibility port to obtain the cable presence / absence signal comprises:

[0029] detecting whether an SGPIO connector bound with the compatibility port is connected with an SGPIO cable;

[0030] in response to the SGPIO connector being connected with the SGPIO cable, generating a presence / absence signal of the SGPIO connector representing that the SGPIO connector is present;

[0031] in response to the SGPIO connector not being connected with the SGPIO cable, generating a presence / absence signal of the SGPIO connector representing that the SGPIO connector is not present;

[0032] taking the presence / absence signal of the SGPIO connector as the cable presence / absence signal;

[0033] wherein the SGPIO connector is equipped on a server mainboard, and the SGPIO cable is equipped on a server backplane.

[0034] In an example embodiment, the detecting whether the SGPIO connector of the compatibility port binding is connected with the SGPIO cable comprises:

[0035] performing a level reading on a second pin connected with the first pin in the CPU;

[0036] in response to the level of the second pin being high, determining that the SGPIO connector of the compatibility port binding is not connected with the SGPIO cable;

[0037] in response to the level of the second pin being low, determining that the SGPIO connector of the compatibility port binding is connected with the SGPIO cable;

[0038] wherein the first pin is arranged in the SGPIO connector; and when the SGPIO connector is not connected with the SGPIO cable, the level of the first pin is high, and when the SGPIO connector is connected with the SGPIO cable, the first pin is short-circuited with a ground end of the SGPIO cable and switches to low.

[0039] A signal configuration system applied to a basic input / output system, comprising:

[0040] a cable signal reading module configured to read a cable in-place or not signal obtained after the CPU detects the compatibility port;

[0041] a connection type analysis module configured to analyze a connection type of the compatibility port based on the cable in-place or not signal;

[0042] a port configuration module configured to, in response to the connection type representing that the compatibility port is connected with an NVMe hard disk, configure the compatibility port as a PCIe type to make the compatibility port output a PCIe signal; and in response to the connection type representing that the compatibility port is connected with an SATA hard disk, configure the compatibility port as an SATA type to make the compatibility port output an SATA signal.

[0043] A signal configuration system applied to a CPU, comprising:

[0044] a cable signal detection module configured to detect a compatibility port to obtain a cable in-place or not signal;

[0045] The cable signal transmission module is configured to transmit the cable presence / absence signal to a basic input / output system, so that the basic input / output system analyzes the connection type of the compatibility port based on the cable presence / absence signal; and then the basic input / output system configures the compatibility port as a PCIe type in response to the connection type representing that the compatibility port is connected with an NVMe hard disk, and configures the compatibility port as a SATA type in response to the connection type representing that the compatibility port is connected with a SATA hard disk.

[0046] The port signal control module is configured to output a PCIe signal through the compatibility port in response to the compatibility port being configured as the PCIe type, and output a SATA signal through the compatibility port in response to the compatibility port being configured as the SATA type.

[0047] An electronic device comprises:

[0048] A memory is configured to store a computer program.

[0049] A processor is configured to implement the steps of the signal configuration method according to any one of the above embodiments when executing the computer program.

[0050] A computer readable storage medium stores a computer program, and the computer program is configured to implement the steps of the signal configuration method according to any one of the above embodiments when executed by a processor.

[0051] The signal configuration method provided in the application is applied to a basic input and output system, reads a cable presence signal obtained after a CPU detects a compatibility port, analyzes a connection type of the compatibility port based on the cable presence signal, and configures the compatibility port as a PCIe type in response to the connection type representing that the compatibility port is connected with an NVMe hard disk, so that the compatibility port outputs a PCIe signal; and configures the compatibility port as a SATA type in response to the connection type representing that the compatibility port is connected with a SATA hard disk, so that the compatibility port outputs a SATA signal. In the application, the CPU can detect the compatibility port to obtain the cable presence signal, the cable presence signal can reflect the connection type of the compatibility port, and thus, after the BIOS obtains the cable presence signal, the BIOS can configure the compatibility port as the PCIe type when the connection type represents that the compatibility port is connected with the NVMe hard disk, and configure the compatibility port as the SATA type when the connection type represents that the compatibility port is connected with the SATA hard disk. Since the cable presence signal generated by the CPU can accurately reflect the connection type of the compatibility port, and the CPU and the BIOS only need to transmit the cable presence signal and do not need to perform other operations, the interference on the signal configuration of the compatibility port is reduced, and thus, the BIOS can accurately configure the signal of the compatibility port according to the cable presence signal. The signal configuration system, the electronic device and the computer readable storage medium provided in the application also solve the corresponding technical problems. BRIEF DESCRIPTION OF DRAWINGS

[0052] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings needed to be used in the embodiments or the prior art description will be briefly introduced. Obviously, the drawings in the following description only constitute the embodiments of the present application, and for those skilled in the art, other drawings can be obtained without creative labor on the basis of the provided drawings.

[0053] Figure 1 A flowchart of a signal configuration method provided for the embodiments of the present application;

[0054] Figure 2 A flowchart of signal configuration of the BIOS based on the presence signal of the SGPIO connector;

[0055] Figure 3 Another flowchart of a signal configuration method provided for the embodiments of the present application;

[0056] Figure 4 A structural schematic diagram of a signal configuration system provided for the embodiments of the present application;

[0057] Figure 5A structural schematic diagram of an electronic device provided by an embodiment of the present application is shown in the figure;

[0058] Figure 6 Another structural schematic diagram of an electronic device provided by an embodiment of the present application is shown in the figure. DETAILED DESCRIPTION

[0059] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort belong to the scope of protection of the present application.

[0060] Please refer to Figure 1 , Figure 1 A flowchart of a signal configuration method provided by an embodiment of the present application is shown in the figure.

[0061] The signal configuration method provided by an embodiment of the present application is applied to a basic input and output system and can include the following steps.

[0062] Step S101: reading a cable presence signal obtained after the CPU detects the compatibility port.

[0063] In actual application, considering that the compatibility port is connected to the CPU, the CPU can be used to detect the connection type of the compatibility port. On this basis, although the compatibility port supports both PCIe and SATA, at the same time, the compatibility port can only support PCIe or SATA. In this way, at the same time, the compatibility port can only be connected to the NVMe hard disk or the SATA hard disk. It is not difficult to understand that when the compatibility port is connected to the NVMe hard disk, the interface for connecting to the SATA hard disk is in an idle state. Correspondingly, when the compatibility port is connected to the SATA hard disk, the interface for connecting to the NVMe hard disk is in an idle state. Whether the compatibility interface is idle can be reflected by the corresponding cable presence signal. Therefore, the CPU can generate the cable presence signal after detecting the compatibility port and transmit it to the BIOS. Correspondingly, the BIOS only needs to read the cable presence signal and apply it, so as to configure the signal of the compatibility port accordingly.

[0064] Step S102: analyzing the connection type of the compatibility port based on the cable presence signal.

[0065] In actual application, after the BIOS reads the presence signal of the compatibility port, it can analyze the connection type of the compatibility port based on the cable presence signal, so as to subsequently configure the signal of the compatibility port according to the connection type.

[0066] It should be noted that the connection type resolution process is related to the type of cable presence / absence signal. For example, when the cable presence / absence signal includes both NVMe and SATA hard drive connector presence / absence signals, each type of connector presence / absence signal can be resolved. If the NVMe hard drive connector presence / absence signal is "not present" and the SATA hard drive connector presence / absence signal is "present," then the connection type of the compatibility port can be determined as a connection between the compatibility port and the SATA hard drive. Conversely, if the NVMe hard drive connector presence / absence signal is "present" and the SATA hard drive connector presence / absence signal is "not present," then the connection type of the compatibility port can be determined as a connection between the compatibility port and the NVMe hard drive. Here, the NVMe hard drive connector refers to the connector configured on the compatibility port for connecting to an NVMe hard drive; for example, an NVMe hard drive connector could be a VPP (Virtual Pin Port) connector. The SATA hard drive connector refers to the connector configured on the compatibility port for connecting to a SATA hard drive; for example, a SATA hard drive connector could be an SGPIO (Serial General Purpose Input Output) connector.

[0067] In the example embodiment, the connection type of the compatibility port can be accurately defined by means of the NVMe hard disk connector in-place signal and the SATA hard disk connector in-place signal, however, considering the connection complexity of the NVMe hard disk connector and the detection difficulty of the in-place signal, after comprehensive consideration, only the easily measured SATA hard disk connector in-place signal can be provided as the cable in-place signal of the compatibility port to the BIOS, so as to reduce the implementation complexity of the signal configuration and improve the signal configuration efficiency, so that the compatibility port can quickly respond to the processing demand and improve the user experience, that is, in the process of reading the cable in-place signal obtained by the CPU after detecting the compatibility port, the cable in-place signal obtained by the CPU after detecting the compatibility port can be read, and the cable in-place signal includes the in-place signal of the SGPIO connector; correspondingly, in the process of analyzing the connection type of the compatibility port based on the target cable in-place signal, whether the SGPIO connector is in place can be detected based on the in-place signal of the SGPIO connector, in response to the in-place signal of the SGPIO connector indicating that the SGPIO connector is in place, it is determined that the connection type of the compatibility port indicates that the compatibility port is connected with the SATA hard disk, and in response to the in-place signal of the SGPIO connector indicating that the SGPIO connector is not in place, it is determined that the connection type of the compatibility port indicates that the compatibility port is connected with the NVMe hard disk; in this process, the SGPIO connector needs to be equipped on the server mainboard and bound with the compatibility port, and the state that the SGPIO connector is connected with the SGPIO cable on the server backplane can be defined as the in-place of the SGPIO connector, and the state that the SGPIO connector is not connected with the SGPIO cable on the server backplane can be defined as the out-of-place of the SGPIO connector.

[0068] In a specific application scenario, considering that the signal level when the SGPIO connector is connected with the SGPIO cable on the server backplane is different from the signal level when the SGPIO connector is not connected with the SGPIO cable on the server backplane, the in-place and out-of-place signals of the SGPIO connector can be represented by means of the level attribute, correspondingly, in the process of detecting whether the SGPIO connector is in place based on the in-place and out-of-place signals of the SGPIO connector, whether the in-place and out-of-place signals of the SGPIO connector are low can be detected, in response to the in-place and out-of-place signals of the SGPIO connector being low, it is determined that the in-place and out-of-place signals of the SGPIO connector indicate that the SGPIO connector is in place, and in response to the in-place and out-of-place signals of the SGPIO connector being high, it is determined that the in-place and out-of-place signals of the SGPIO connector indicate that the SGPIO connector is not in place, as shown in Figure 2 .

[0069] For the convenience of understanding, it is assumed that a judgment signal for detecting whether the SGPIO cable is in place is added on the SGPIO connector, which is assumed to be named SGPIO_CABLE_PRESENT_N, and is pulled up to the standby power supply of about 3.3V by default, and is low active, and the signal is connected to the GPIO pin of the CPU. In this way, when the SGPIO connector is plugged into the SGPIO cable, the in-place signal is shorted to GND on the side of the SGPIO cable, so as to be switched from high level to low level. Therefore, when the signal is low, it indicates that the SGPIO connector is not connected with the SGPIO cable, and when the signal is high, it indicates that the SGPIO connector is connected with the SGPIO cable.

[0070] In the example embodiment, in the process of informing the BIOS of the in-place signal of the SGPIO connector of the compatibility port, the CPU can write the in-place signal of the SGPIO connector into the corresponding register, and map the register to the corresponding physical memory address. The BIOS reads the physical memory address, and can obtain the in-place signal of the SGPIO connector. In this way, only by means of the register and the memory, the in-place signal of the SGPIO connector detected by the CPU can be transmitted to the BIOS, which is simple and easy to implement, so as to improve the signal configuration efficiency.

[0071] Step S103: In response to the connection type representing that the compatibility port is connected with the NVMe hard disk, the compatibility port is configured as the PCIe type, so as to make the compatibility port output the PCIe signal.

[0072] Step S104: In response to the connection type representing that the compatibility port is connected with the SATA hard disk, the compatibility port is configured as the SATA type, so as to make the compatibility port output the SATA signal.

[0073] In actual application, after the BIOS parses the connection type of the compatibility port, the signal of the compatibility port can be set according to the connection type, that is, in the case that the connection type represents that the compatibility port is connected with the NVMe hard disk, the compatibility port is configured as the PCIe type, so as to make the compatibility port output the PCIe signal; in the case that the connection type represents that the compatibility port is connected with the SATA hard disk, the compatibility port is configured as the SATA type, so as to make the compatibility port output the SATA signal.

[0074] The signal configuration method provided in the application is applied to a basic input and output system, reads a cable presence signal obtained after a CPU detects a compatibility port, analyzes a connection type of the compatibility port based on the cable presence signal, configures the compatibility port as a PCIe type in response to the connection type representing that the compatibility port is connected with an NVMe hard disk, so that the compatibility port outputs a PCIe signal, and configures the compatibility port as a SATA type in response to the connection type representing that the compatibility port is connected with a SATA hard disk, so that the compatibility port outputs a SATA signal. In the application, the CPU can detect the compatibility port to obtain the cable presence signal, the cable presence signal can reflect the connection type of the compatibility port, and thus, after the BIOS obtains the cable presence signal, the BIOS can configure the compatibility port as the PCIe type when the connection type represents that the compatibility port is connected with the NVMe hard disk, and configure the compatibility port as the SATA type when the connection type represents that the compatibility port is connected with the SATA hard disk. Since the cable presence signal generated by the CPU can accurately reflect the connection type of the compatibility port, and the CPU and the BIOS only need to transmit the cable presence signal and do not need to perform other operations, the interference on the signal configuration of the compatibility port is reduced, so the BIOS can accurately configure the signal of the compatibility port according to the cable presence signal. Further, the application avoids the situation that a wrong BIOS version causes an error of the signal type output by the compatibility port, reduces the risk of brushing a wrong BIOS version during production, and reduces the development and maintenance time of the BIOS developer.

[0075] On the basis of the above-mentioned embodiments, considering that the application needs the cooperation of the CPU, a signal configuration method applied to the CPU is provided. Please refer to Figure 3 , Figure 3 Another flowchart of the signal configuration method provided in the application embodiments.

[0076] The signal configuration method provided in the application embodiments and applied to the CPU can include the following steps:

[0077] Step S201: detecting the compatibility port to obtain a cable presence signal.

[0078] In the example embodiment, the CPU can detect whether the SGPIO connector bound to the compatibility port is connected with the SGPIO cable during the process of detecting the cable presence / absence signal; in response to the SGPIO connector being connected with the SGPIO cable, a signal indicating the presence / absence of the SGPIO connector is generated to indicate that the SGPIO connector is present; in response to the SGPIO connector not being connected with the SGPIO cable, a signal indicating the presence / absence of the SGPIO connector is generated to indicate that the SGPIO connector is not present; and the signal indicating the presence / absence of the SGPIO connector is taken as the cable presence / absence signal; wherein the SGPIO connector is provided on the server motherboard, and the SGPIO cable is provided on the server backplane.

[0079] In a specific application scenario, the CPU can perform level reading on a second pin connected with the first pin in the CPU during the process of detecting whether the SGPIO connector bound to the compatibility port is connected with the SGPIO cable; in response to the level of the second pin being high, it is determined that the SGPIO connector bound to the compatibility port is not connected with the SGPIO cable; in response to the level of the second pin being low, it is determined that the SGPIO connector bound to the compatibility port is connected with the SGPIO cable; wherein the first pin is provided in the SGPIO connector; and when the SGPIO connector is not connected with the SGPIO cable, the level of the first pin is high, and when the SGPIO connector is connected with the SGPIO cable, the first pin is short-circuited with the ground end of the SGPIO cable and switches to low.

[0080] Step S202: transmitting the cable presence / absence signal to the basic input / output system, so that the basic input / output system analyzes the connection type of the compatibility port based on the cable presence / absence signal; and then the basic input / output system configures the compatibility port as the PCIe type in response to the connection type indicating that the compatibility port is connected with the NVMe hard disk, and configures the compatibility port as the SATA type in response to the connection type indicating that the compatibility port is connected with the SATA hard disk.

[0081] Step S203: in response to the compatibility port being configured as the PCIe type, outputting the PCIe signal through the compatibility port.

[0082] Step S204: in response to the compatibility port being configured as the SATA type, outputting the SATA signal through the compatibility port.

[0083] For the related description of the signal configuration method applied to the CPU provided in the embodiment, reference can be made to the above-described embodiments, which will not be repeated here.

[0084] The signal configuration method provided in the application is applied to a CPU, detects a compatibility port to obtain a cable presence signal, transmits the cable presence signal to a basic input / output system, so that the basic input / output system analyzes the connection type of the compatibility port based on the cable presence signal, and then the basic input / output system configures the compatibility port as a PCIe type in response to the connection type representing that the compatibility port is connected with an NVMe hard disk, and configures the compatibility port as a SATA type in response to the connection type representing that the compatibility port is connected with a SATA hard disk, outputs a PCIe signal through the compatibility port in response to the compatibility port being configured as the PCIe type, and outputs a SATA signal through the compatibility port in response to the compatibility port being configured as the SATA type. In the application, the CPU can detect the compatibility port to obtain the cable presence signal, the cable presence signal can reflect the connection type of the compatibility port, so that the BIOS can configure the compatibility port as the PCIe type when the connection type represents that the compatibility port is connected with the NVMe hard disk, and configure the compatibility port as the SATA type when the connection type represents that the compatibility port is connected with the SATA hard disk. Since the cable presence signal generated by the CPU can accurately reflect the connection type of the compatibility port, and the CPU and the BIOS only need to transmit the cable presence signal and do not need to perform other operations, the interference on the signal configuration of the compatibility port is reduced, so the BIOS can accurately configure the signal of the compatibility port according to the cable presence signal.

[0085] Please refer to Figure 4 , Figure 4 The structure diagram of a signal configuration system provided in an embodiment of the application.

[0086] The signal configuration system provided in the embodiment of the application is applied to a basic input / output system, and can include:

[0087] The cable signal reading module 101 is configured to read the cable presence signal obtained after the CPU detects the compatibility port.

[0088] The connection type analysis module 102 is configured to analyze the connection type of the compatibility port based on the cable presence signal.

[0089] The port configuration module 103 is configured to configure the compatibility port as a PCIe type in response to the connection type representing that the compatibility port is connected with an NVMe hard disk, so that the compatibility port outputs a PCIe signal, and configure the compatibility port as a SATA type in response to the connection type representing that the compatibility port is connected with a SATA hard disk, so that the compatibility port outputs a SATA signal.

[0090] The signal configuration system provided by the embodiment of the application is applied to a basic input / output system, and the cable signal reading module can include:

[0091] The cable signal reading unit is configured to read a cable presence / absence signal obtained after the CPU detects the compatibility port, and the cable presence / absence signal includes a presence / absence signal of an SGPIO connector.

[0092] The connection type analysis module can include:

[0093] The connection type analysis unit is configured to detect whether the SGPIO connector is present based on the presence / absence signal of the SGPIO connector, and determine that the connection type of the compatibility port represents that the compatibility port is connected with a SATA hard disk in response to the presence / absence signal of the SGPIO connector representing that the SGPIO connector is present, and determine that the connection type of the compatibility port represents that the compatibility port is connected with an NVMe hard disk in response to the presence / absence signal of the SGPIO connector representing that the SGPIO connector is not present, wherein the SGPIO connector is provided on a server mainboard and is bound to the compatibility port, and the presence of the SGPIO connector represents that the SGPIO connector is connected with an SGPIO cable on a server backplane.

[0094] The connection type analysis unit of the signal configuration system provided by the embodiment of the application is applied to a basic input / output system, and can be configured to detect whether the presence / absence signal of the SGPIO connector is a low level, determine that the presence / absence signal of the SGPIO connector represents that the SGPIO connector is present in response to the presence / absence signal of the SGPIO connector being a low level, and determine that the presence / absence signal of the SGPIO connector represents that the SGPIO connector is not present in response to the presence / absence signal of the SGPIO connector being a high level.

[0095] The signal configuration system provided by the embodiment of the application is applied to a CPU, and can include:

[0096] The cable signal detection module is configured to detect the compatibility port to obtain a cable presence / absence signal.

[0097] The cable signal transmission module is configured to transmit the cable presence / absence signal to the basic input / output system, so that the basic input / output system analyzes the connection type of the compatibility port based on the cable presence / absence signal, and further configures the compatibility port as a PCIe type in response to the connection type representing that the compatibility port is connected with an NVMe hard disk, and configures the compatibility port as a SATA type in response to the connection type representing that the compatibility port is connected with a SATA hard disk.

[0098] The port signal control module is configured to output a PCIe signal through the compatibility port in response to the compatibility port being configured as a PCIe type, and output a SATA signal through the compatibility port in response to the compatibility port being configured as a SATA type.

[0099] The signal configuration system provided by the embodiment of the present application is applied to a CPU, and the cable signal detection module can include:

[0100] The cable signal detection unit is configured to detect whether the SGPIO connector bound to the compatibility port is connected to an SGPIO cable, generate an SGPIO connector presence signal indicating that the SGPIO connector is present in response to the SGPIO connector being connected to the SGPIO cable, generate an SGPIO connector presence signal indicating that the SGPIO connector is not present in response to the SGPIO connector not being connected to the SGPIO cable, and use the SGPIO connector presence signal as the cable presence signal.

[0101] The SGPIO connector is provided on a server mainboard, and the SGPIO cable is provided on a server backplane.

[0102] The signal configuration system provided by the embodiment of the present application is applied to a CPU, and the cable signal detection unit can be configured to perform level reading on a second pin connected to a first pin in the CPU, determine that the SGPIO connector bound to the compatibility port is not connected to the SGPIO cable in response to the level of the second pin being a high level, and determine that the SGPIO connector bound to the compatibility port is connected to the SGPIO cable in response to the level of the second pin being a low level.

[0103] The first pin is provided in the SGPIO connector, and the level of the first pin is a high level when the SGPIO connector is not connected to the SGPIO cable, and the first pin is short-circuited to a ground end of the SGPIO cable and switched to a low level when the SGPIO connector is connected to the SGPIO cable.

[0104] The present application also provides an electronic device and a computer readable storage medium, both of which have the corresponding effects of the signal configuration method provided by the embodiment of the present application. Please refer to Figure 5 , Figure 5 The structure diagram of the electronic device provided by the embodiment of the present application is shown.

[0105] The electronic device provided by the embodiment of the present application includes a memory 201 and a processor 202, the memory 201 stores a computer program, and the processor 202 implements the steps of the signal configuration method described in any of the above embodiments when executing the computer program.

[0106] Please refer toFigure 6 The electronic device provided by the embodiment of the present application can further comprise: an input port 203 connected to the processor 202, configured to transmit the command inputted by the outside to the processor 202; a display unit 204 connected to the processor 202, configured to display the processing result of the processor 202 to the outside; and a communication module 205 connected to the processor 202, configured to realize the communication between the electronic device and the outside. The display unit 204 can be a display panel, a laser scanning display, etc. The communication mode adopted by the communication module 205 includes but is not limited to the Mobile High-Definition Link (MHL), the Universal Serial Bus (USB), the High-Definition Multimedia Interface (HDMI), the wireless connection: the WIreless Fidelity (WiFi), the Bluetooth communication technology, the low-power Bluetooth communication technology, and the communication technology based on IEEE 802.11s.

[0107] The computer readable storage medium provided by the embodiment of the present application stores a computer program, and the computer program is executed by the processor to realize the steps of the signal configuration method described in any one of the above embodiments.

[0108] The computer readable storage medium involved in the present application includes a Random Access Memory (RAM), a memory, a Read-Only Memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a hard disk, a removable magnetic disk, a Compact Disc Read-Only Memory (CD-ROM), or any other form of storage medium known in the technical field.

[0109] The computer program product provided by the embodiment of the present application comprises computer programs / instructions, and the computer programs / instructions are executed by the processor to realize the steps of the signal configuration method described in any one of the above embodiments.

[0110] The signal configuration system, the electronic device, and the related part of the computer readable storage medium provided by the embodiment of the present application are described in detail in the corresponding part of the signal configuration method provided by the embodiment of the present application, and thus the description is not repeated here. In addition, the part of the above technical solution provided by the embodiment of the present application which is consistent with the implementation principle of the corresponding technical solution in the prior art is not described in detail, so as to avoid excessive description.

[0111] It is also to be noted that, as used in this specification and the appended claims, the singular forms "a," "an," and "the" include plural referents unless the context clearly dictates otherwise. Thus, for example, reference to "a component" can include a combination of two or more components, and the term "an element" can include comparable reference to a plurality of elements. Additionally, the term "or" as used herein means any one member of a logical disjunction (i.e., it is equivalent to "or" and "or else") and not a logical exclusion. Also, the terms "comprise," "comprising," "include," "including," and the like mean "including but not limited to." Furthermore, the terms "first," "second," "third," etc. are used merely as labels, and are not intended to impose numerical requirements on their objects.

[0112] The above description of disclosed embodiments provides information sufficient to understand how to make and use the application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein can be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A signal configuration method, characterized in that, Applied to basic input / output systems, including: Read the signal indicating whether the cable is present, obtained after the CPU detects the compatibility port. Based on the presence or absence of the cable signal, the connection type of the compatibility port is analyzed; In response to the connection type indicating that the compatibility port is connected to an NVMe hard drive, the compatibility port is configured as a PCIe type so that the compatibility port outputs a PCIe signal; In response to the connection type indicating that the compatibility port is connected to a SATA hard drive, the compatibility port is configured as a SATA type so that the compatibility port outputs a SATA signal.

2. The signal configuration method according to claim 1, characterized in that, The step of reading the cable presence / absence signal obtained by the CPU after detecting the compatibility port includes: The system reads the cable presence / absence signal obtained by the CPU after detecting the compatibility port, and the cable presence / absence signal includes the SGPIO connector presence / absence signal. The step of parsing the connection type of the compatibility port based on the target cable presence signal includes: Based on the presence or absence signal of the SGPIO connector, detect whether the SGPIO connector is in place; In response to the presence or absence signal of the SGPIO connector indicating that the SGPIO connector is present, the connection type of the compatibility port is determined to indicate that the compatibility port is connected to a SATA hard drive; In response to the presence or absence signal of the SGPIO connector indicating that the SGPIO connector is not present, the connection type of the compatibility port is determined to indicate that the compatibility port is connected to the NVMe hard drive; The SGPIO connector is mounted on the server motherboard and bound to the compatibility port. The presence of the SGPIO connector indicates that the SGPIO connector is connected to the SGPIO cable on the server backplane.

3. The signal configuration method according to claim 2, characterized in that, The step of detecting whether the SGPIO connector is in place based on the presence / absence signal of the SGPIO connector includes: Detect whether the presence / absence signal of the SGPIO connector is low; In response to the presence / absence signal of the SGPIO connector being low, it is determined that the presence / absence signal of the SGPIO connector indicates that the SGPIO connector is in place. In response to the presence / absence signal of the SGPIO connector being high, it is determined that the presence / absence signal of the SGPIO connector indicates that the SGPIO connector is not in place.

4. A signal configuration method, characterized in that, Applied to CPUs, including: The compatibility port is checked to obtain a signal indicating whether the cable is in place; The presence / absence signal of the cable is transmitted to the Basic Input / Output System (PIS) so that the PIS can resolve the connection type of the compatibility port based on the presence / absence signal; thereby, the PIS configures the compatibility port as PCIe type if the connection type indicates that the compatibility port is connected to an NVMe hard drive, and configures the compatibility port as SATA type if the connection type indicates that the compatibility port is connected to a SATA hard drive. In response to the compatibility port being configured as PCIe type, a PCIe signal is output through the compatibility port; In response to the compatibility port being configured as SATA type, a SATA signal is output through the compatibility port.

5. The signal configuration method according to claim 4, characterized in that, The detection of the compatibility port to obtain a signal indicating whether the cable is present includes: Check whether the SGPIO connector bound to the compatibility port is connected to the SGPIO cable; In response to the connection of the SGPIO connector to the SGPIO cable, an SGPIO connector presence signal is generated, indicating whether the SGPIO connector is present. In response to the fact that the SGPIO connector is not connected to the SGPIO cable, an SGPIO connector presence / absence signal is generated, indicating that the SGPIO connector is not in place. The presence / absence signal of the SGPIO connector is used as the presence / absence signal of the cable; The SGPIO connector is mounted on the server motherboard, and the SGPIO cable is mounted on the server backplane.

6. The signal configuration method according to claim 5, characterized in that, The detection of whether the SGPIO connector bound to the compatibility port is connected to the SGPIO cable includes: The level of the second pin in the CPU connected to the first pin is read. If the level of the second pin is high, it is determined that the SGPIO connector bound to the compatibility port is not connected to the SGPIO cable; In response to the second pin being at a low level, it is determined that the SGPIO connector bound to the compatibility port is connected to the SGPIO cable; The first pin is located in the SGPIO connector; when the SGPIO connector is not connected to the SGPIO cable, the level of the first pin is high; when the SGPIO connector is connected to the SGPIO cable, the first pin is shorted to the ground terminal of the SGPIO cable and switches to low level.

7. A signal configuration system, characterized in that, Applied to basic input / output systems, including: The cable signal reading module is used to read the cable presence or absence signal obtained by the CPU after detecting the compatibility port; The connection type parsing module is used to parse the connection type of the compatibility port based on the presence or absence of the cable signal; The port configuration module is configured to configure the compatibility port as PCIe type in response to the connection type indicating that the compatibility port is connected to an NVMe hard drive, so that the compatibility port outputs a PCIe signal; and to configure the compatibility port as SATA type in response to the connection type indicating that the compatibility port is connected to a SATA hard drive, so that the compatibility port outputs a SATA signal.

8. A signal configuration system, characterized in that, Applied to CPUs, including: The cable signal detection module is used to detect the compatibility port and obtain a signal indicating whether the cable is present or not. A cable signal transmission module is used to transmit a cable presence / absence signal to a basic input / output system (PIS), so that the PIS can resolve the connection type of the compatibility port based on the cable presence / absence signal; thereby, the PIS configures the compatibility port as PCIe type if the connection type indicates that the compatibility port is connected to an NVMe hard drive, and configures the compatibility port as SATA type if the connection type indicates that the compatibility port is connected to a SATA hard drive. A port signal control module is configured to output a PCIe signal through the compatibility port when the compatibility port is configured as PCIe type, and to output a SATA signal through the compatibility port when the compatibility port is configured as SATA type.

9. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor, configured to implement the steps of the signal configuration method as described in any one of claims 1 to 6 when executing the computer program.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the signal configuration method as described in any one of claims 1 to 6.

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