Parallel control method, uninterruptible power supply parallel system and storage medium

Abstract

The invention provides a parallel control method, an uninterruptible power supply parallel system and a readable storage medium, and the method comprises the steps: controlling a first uninterruptible power supply to supply power to a first AC bus and a second uninterruptible power supply to supply power to a second AC bus when the first uninterruptible power supply and the second uninterruptible power supply are normal; when the first uninterruptible power supply is abnormal, the first bypass static switch is controlled to be closed, so that the first alternating-current bus is switched to be powered by the third alternating-current power supply; after the first bypass static switch is closed, the output of the second uninterruptible power supply is controlled to be matched with the voltage amplitude, frequency and phase of the third alternating current power supply, the second bypass static switch is forbidden to be switched to a closed state, and meanwhile, a command for allowing the bus interconnection switch to be closed is output; and after the bus interconnection switch is switched on, the first bypass static switch is controlled to be switched off. According to the invention, double-bypass power supply guarantee can be realized, and the power supply continuity and reliability of the uninterruptible power supply parallel system are improved.

Description

Technical Field

[0001] This invention relates to the field of uninterruptible power supplies (UPS), and more specifically, to a parallel control method, a parallel UPS system, and a storage medium. Background Technology

[0002] An uninterruptible power supply (UPS) parallel system refers to connecting multiple UPS units together in a specific way to provide a more reliable and larger capacity power protection solution. This system is mainly used in applications with extremely high requirements for power continuity and stability, such as data centers, medical facilities, and industrial control systems.

[0003] like Figure 1 The diagram shows a parallel system consisting of two uninterruptible power supplies (UPS). In this system, UPS A and UPS B are connected to different AC power sources and supply power to two sets of loads respectively. However, in this parallel system, the bypass circuits of UPS A and UPS B are connected to the same AC power source. When this bypass AC power source malfunctions, the entire parallel system will be in an unsafe power supply state, failing to meet the requirements of certain applications with extremely high demands for power supply continuity and stability. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to address the issue that the bypass connection of multiple uninterruptible power supplies to the same AC power source affects the continuity and stability of power supply in the above-mentioned uninterruptible power supply parallel system, and to provide a parallel control method, an uninterruptible power supply parallel system, and a storage medium.

[0005] The technical solution of this invention to solve the above-mentioned technical problems is to provide a parallel control method applied to an uninterruptible power supply (UPS) parallel system. The UPS parallel system includes a first AC bus, a second AC bus, a bus tie switch connected between the first and second AC buses, a first UPS connected between a first AC power source and the first AC bus, a second UPS connected between a second AC power source and the second AC bus, a first bypass static switch connected between a third AC power source and the first AC bus, and a second bypass static switch connected between a fourth AC power source and the second AC bus. The UPS parallel system supplies power to the AC load through the first and second AC buses. The parallel control method includes:

[0006] When both the first uninterruptible power supply and the second uninterruptible power supply are normal, control the first uninterruptible power supply to supply power to the first AC bus and the second uninterruptible power supply to supply power to the second AC bus, and output a command to prohibit the closing of the bus tie switch;

[0007] When the first uninterruptible power supply is abnormal, the first bypass static switch is closed to switch the first AC bus to the third AC power supply; after the first bypass static switch is closed, the output of the second uninterruptible power supply is matched with the voltage amplitude, frequency and phase of the third AC power supply and the second bypass static switch is prohibited from switching to the closed state, while a command is output to allow the bus tie switch to close; after the bus tie switch is closed, the first bypass static switch is opened.

[0008] As a further improvement of the present invention, after the first bypass static switch is closed, the output voltage of the second uninterruptible power supply is controlled to match the output voltage of the first bypass static switch within 10 power frequency cycles.

[0009] As a further improvement of the present invention, the parallel control method includes: when both the first uninterruptible power supply and the second uninterruptible power supply are normal, the first uninterruptible power supply maintains its output voltage synchronized with the voltage of the third AC power supply, and the second uninterruptible power supply maintains its output voltage synchronized with the voltage of the fourth AC power supply.

[0010] As a further improvement of the present invention, the uninterruptible power supply parallel system includes a status indication unit, which is adjacent to the bus tie switch. The status indication unit generates a first signal output to prohibit the closing of the bus tie switch and generates a second signal output to allow the closing of the bus tie switch.

[0011] As a further improvement of the present invention, the AC load includes only a plurality of single-power-supply loads, and the input terminals of the plurality of single-power-supply loads are respectively connected to one of the first AC bus and the second AC bus.

[0012] As a further improvement of the present invention, the AC load includes multiple single-power-supply loads and at least one dual-power-supply load, the uninterruptible power supply parallel system includes a static switching device, the input terminal of the static switching device is electrically connected to the first AC bus and the second AC bus respectively, the input terminals of the multiple single-power-supply loads are electrically connected to the output terminal of the static switching device respectively, and the input terminals of the dual-power-supply loads are electrically connected to the first AC bus and the second AC bus respectively.

[0013] As a further improvement of the present invention, when the inverter of the first uninterruptible power supply fails or the energy storage battery discharges and terminates, the abnormality of the first uninterruptible power supply is confirmed.

[0014] The present invention also provides an uninterruptible power supply (UPS) parallel system, the UPS parallel system comprising a first AC bus for supplying power to an AC load, a second AC bus for supplying power to an AC load, a bus tie switch connected between the first AC bus and the second AC bus, a first UPS connected between a first AC power source and the first AC bus, and a second UPS connected between a second AC power source and the second AC bus; the UPS parallel system further comprises a first bypass static switch, a second bypass static switch, and a main control device, wherein the first bypass static switch is connected between a third AC power source and the first AC bus, and the second bypass static switch is connected between a fourth AC power source and the second AC bus;

[0015] The main control device includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the parallel control method described above.

[0016] The present invention also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the parallel control method described above.

[0017] The present invention has the following beneficial effects: by connecting the first bypass static switch and the second bypass static switch to different AC power sources respectively, and by making the output of the second uninterruptible power supply track the AC power source connected to the first bypass static switch when the first uninterruptible power supply is abnormal, the abnormal uninterruptible power supply can be removed, thereby realizing dual bypass power supply protection and improving the power supply continuity and reliability of the uninterruptible power supply parallel system. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of an existing parallel uninterruptible power supply system.

[0019] Figure 2 This is a schematic diagram of an uninterruptible power supply parallel system provided in an embodiment of the present invention.

[0020] Figure 3 This is a flowchart illustrating the parallel control method provided in an embodiment of the present invention.

[0021] Figure 4 This is a schematic diagram of an uninterruptible power supply parallel system provided in an embodiment of the present invention, which simultaneously connects a single-power-supply load and a dual-power-supply load. Detailed Implementation

[0022] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0023] like Figure 3 The diagram shown is a schematic flowchart of a parallel control method provided in an embodiment of the present invention. This parallel control method can be applied to applications such as... Figure 2 The diagram shows an uninterruptible power supply (UPS) parallel system. This UPS parallel system includes a first UPS 11, a second UPS 21, a first bypass static switch 12, a second bypass static switch 22, a first AC bus 15, a second AC bus 25, a bus tie switch Q4, and a main control device. The bus tie switch Q4 is connected between the first AC bus 15 and the second AC bus 25, and the UPS parallel system supplies power to the AC load through the first AC bus 15 and the second AC bus 25. The bus tie switch Q4 is a normally open switch, meaning that under normal circumstances, the bus tie switch Q4 is in the open state.

[0024] The first uninterruptible power supply 11 has its AC input terminal connected to the first AC power supply 13 and its AC output terminal connected to the first AC bus 15. This means the first uninterruptible power supply 11 can convert (including voltage and frequency) the AC power input from the first AC power supply 13 and output it to the first AC bus 15. The second uninterruptible power supply 21 has its AC input terminal connected to the second AC power supply 23 and its AC output terminal connected to the second AC bus 25. This means the second uninterruptible power supply 21 can convert (including voltage and frequency) the AC power input from the second AC power supply 23 and output it to the second AC bus 25. The first bypass static switch 12 is connected between the third AC power supply 14 and the first AC bus 15, and is used to supply power to the first AC bus 15 in place of the first uninterruptible power supply 11 when it malfunctions. The second bypass static switch 22 is connected between the fourth AC power supply 24 and the second AC bus 25, and is used to supply power to the second AC bus 25 in place of the second uninterruptible power supply 21 when it malfunctions.

[0025] Those skilled in the art will understand that the first AC power supply 13, the second AC power supply 23, the third AC power supply 14, and the fourth AC power supply 24 are independent of each other and have different phases or amplitudes, etc.; the first uninterruptible power supply 11 and the second uninterruptible power supply 21 respectively include rectifiers, inverters, and energy storage batteries, etc., and can convert the input AC power into DC power through the rectifier, and then convert the DC power into high-quality AC power output through the inverter, or convert the electrical energy stored in the energy storage battery into AC power output through the inverter (for example, when the AC power supply connected to the AC input terminal is abnormal); the first bypass static switch 12 and the second bypass static switch 22 can both be static switches, etc. In practical applications, the first uninterruptible power supply 11, the second uninterruptible power supply 21, the first bypass static switch 12, and the second bypass static switch 22 can all adopt conventional solutions in the art, which will not be described in detail here.

[0026] The main control device is used to execute the control logic of the uninterruptible power supply parallel system. It can be integrated into the control unit of the first uninterruptible power supply 11 or the second uninterruptible power supply 21. The main control device can also be independent of the first uninterruptible power supply 11 and the second uninterruptible power supply 21, and is connected to the first uninterruptible power supply 11, the second uninterruptible power supply 21, the first bypass static switch 12, and the second bypass static switch 22 respectively (that is, the main control device can obtain the status of the first uninterruptible power supply 11, the second uninterruptible power supply 21, the first bypass static switch 12, and the second bypass static switch 22, and the first uninterruptible power supply 11, the second uninterruptible power supply 21, the first bypass static switch 12, and the second bypass static switch 22 can execute the instructions from the main control device).

[0027] The parallel control method of this embodiment includes the following steps executed by the main control device:

[0028] Step S31: Determine if the first uninterruptible power supply 11 is abnormal. If the first uninterruptible power supply is abnormal, proceed to step S32; otherwise, proceed to step S35. This step continues to be executed during the operation of the parallel uninterruptible power supply system until the first uninterruptible power supply 11 becomes abnormal. Specific abnormalities of the first uninterruptible power supply 11 include inverter failure, depletion of the energy storage battery (e.g., voltage below a preset value), etc.

[0029] Step S32: Control the first bypass static switch 12 to close, switching the first AC bus 15 to the third AC power supply 14. This means stopping the abnormal first uninterruptible power supply 11 and having its bypass power supply replace it to power the first AC bus, thus not affecting the continuity of power supply to the load on the first AC bus 15. The switching of the uninterruptible power supply to the bypass in the above-mentioned fault can adopt conventional solutions in the art, which will not be elaborated here.

[0030] Step S33: After the first bypass static switch 12 is closed, the output of the second uninterruptible power supply 21 is matched with the voltage amplitude, frequency, and phase of the third AC power supply 14 (i.e., the voltage at the output terminal of the first bypass static switch 12), and the second bypass static switch 22 is prohibited from switching to the closed state. Simultaneously (i.e., when the output of the second uninterruptible power supply 21 matches the output of the third AC power supply 14), a command is output to allow the bus tie switch Q4 to close. Specifically, matching the output of the second uninterruptible power supply 21 with the voltage amplitude, frequency, and phase of the third AC power supply 14 means that the output of the second uninterruptible power supply 21 has the same voltage amplitude, frequency, and phase as the third AC power supply 14 under normal, fluctuation-free conditions.

[0031] In this step, the output of the second uninterruptible power supply 21 no longer follows the amplitude and phase of its own bypass voltage, but instead follows the amplitude and phase of the output voltage of the branch where the faulty first uninterruptible power supply 11 is located. Furthermore, since the output of the second uninterruptible power supply 21 differs in amplitude and phase from the voltage of the fourth AC power supply 24, if the second bypass static switch 22 is closed at this time, it will cause an abnormal power supply to the second AC bus 25. Therefore, even if the second uninterruptible power supply 21 is faulty at this time, the power supply to the second AC bus 25 cannot be switched to the fourth AC power supply 24.

[0032] In particular, to ensure the continuity of power supply to the second AC bus 25, after the first bypass static switch is closed, it is best to control the output voltage of the second uninterruptible power supply 21 to match the output voltage of the first bypass static switch 12 within 10 power frequency cycles, so as not to cause sudden changes in the phase and amplitude of the power supply voltage of the load of the second AC bus 25.

[0033] Step S34: After the bus tie switch Q4 is closed, the first bypass static switch 12 is opened. After the first bypass static switch 12 is opened, the closing prohibition of the second bypass static switch 22 is released, and the output voltage of the second uninterruptible power supply 21 is converted to follow the voltage amplitude and phase of the fourth AC power supply 24.

[0034] Specifically, on-site maintenance personnel can manually close the bus tie switch Q4. Through this step, the uninterruptible power supply (UPS) parallel system can be seamlessly switched to inverter power supply from the remaining normal second UPS 21. The load of the entire UPS parallel system changes from dual UPS power supply to single UPS power supply, while still ensuring reliable power supply. At this time, maintenance personnel can disconnect the output switch Q13, input switches Q11, and Q12 of the branch where the faulty first UPS 11 is located, and can thoroughly disconnect and repair the faulty first UPS 11.

[0035] Step S35: Determine if the second uninterruptible power supply 21 is abnormal. If the second uninterruptible power supply 21 is abnormal, execute step S36; otherwise, execute step S39. Similarly, this step continues to be executed during the operation of the parallel uninterruptible power supply system until the second uninterruptible power supply 21 becomes abnormal. The aforementioned abnormality of the second uninterruptible power supply 21 specifically includes inverter failure, depletion of the energy storage battery (e.g., voltage below a preset value), etc.

[0036] Step S36: Close the second bypass static switch 22 to switch the second AC bus 25 to the power supply of the fourth AC power source 24. This means that the abnormal second uninterruptible power supply (UPS) stops operating, and its bypass takes over the power supply to the second AC bus, thus not affecting the continuity of power supply to the load on the second AC bus 25. The switching of the UPS to bypass power supply in the above-mentioned fault can adopt conventional solutions in this field, which will not be elaborated here.

[0037] Step S37: After the second bypass static switch 22 is closed, the output of the first uninterruptible power supply 11 is matched with the voltage amplitude, frequency, and phase of the fourth AC power supply 24 (i.e., the voltage at the output terminal of the second bypass static switch 22), and the second bypass static switch 22 is prevented from switching to the closed state. Simultaneously (i.e., when the output of the first uninterruptible power supply 11 matches the output of the fourth AC power supply 24), a command is output to allow the bus tie switch Q4 to close. Specifically, matching the output of the first uninterruptible power supply 11 with the voltage amplitude, frequency, and phase of the fourth AC power supply 24 means that the output of the first uninterruptible power supply 11 has the same voltage amplitude, frequency, and phase as the fourth AC power supply 24 under normal, fluctuation-free conditions.

[0038] In this step, the output of the first uninterruptible power supply 11 no longer follows the amplitude and phase of its own bypass voltage, but instead follows the amplitude and phase of the output voltage of the branch where the faulty second uninterruptible power supply 21 is located. Furthermore, since the output of the first uninterruptible power supply 11 has a different amplitude and phase than the voltage of the third AC power supply 14, if the first bypass static switch 12 is closed at this time, it will cause abnormal power supply to the load on the first AC bus 15. Therefore, even if the first uninterruptible power supply 11 is faulty at this time, the power supply to the first AC bus 15 cannot be switched to the third AC power supply 14.

[0039] In particular, to ensure the continuity of power supply to the first AC bus 15, after the second bypass static switch 22 is closed, it is best to control the output voltage of the first uninterruptible power supply 11 to match the output voltage of the second bypass static switch 22 within 10 power frequency cycles, so as not to cause sudden changes in the phase and amplitude of the power supply voltage to the load on the first AC bus 15.

[0040] Step S38: After the bus tie switch Q4 is closed, the second bypass static switch 22 is opened. After the second bypass static switch 22 is opened, the closing restriction of the first bypass static switch 12 is lifted, and the output voltage of the first uninterruptible power supply 11 is converted to follow the voltage amplitude and phase of the third AC power supply 14.

[0041] Specifically, on-site maintenance personnel can manually close the bus tie switch Q4. Through this step, the uninterruptible power supply (UPS) parallel system can be seamlessly switched to inverter power supply from the remaining normal first UPS 11. The load of the entire UPS parallel system changes from dual UPS power supply to single UPS power supply, while still ensuring reliable power supply. At this time, maintenance personnel can disconnect the output switch Q23, input switches Q21, and Q22 of the branch where the faulty second UPS 21 is located, and can thoroughly disconnect and repair the faulty second UPS 21.

[0042] Step S39: Control the first uninterruptible power supply 11 to supply power to the first AC bus 15 and the second uninterruptible power supply 21 to supply power to the second AC bus 25, and output a command to prohibit the bus tie switch Q4 from closing (because the amplitude and phase of the voltage on the first AC bus 15 and the second AC bus 25 are different).

[0043] Those skilled in the art will understand that during the execution of step S39, steps S31 and S35 are continuously executed, and steps S31 and S35 can be executed in parallel until the first uninterruptible power supply 11 or the second uninterruptible power supply 21 malfunctions, at which point step S39 is interrupted.

[0044] The above-mentioned parallel control method applied to the uninterruptible power supply parallel system connects the first bypass static switch 12 and the second bypass static switch 22 to different AC power sources. When the first uninterruptible power supply 11 is abnormal, the output of the second uninterruptible power supply 21 tracks the AC power source connected to the first bypass static switch, thereby removing the abnormal uninterruptible power supply. This achieves dual bypass power supply protection and improves the power supply continuity and reliability of the uninterruptible power supply parallel system.

[0045] In one embodiment of the present invention, the above-mentioned parallel control method includes: when both the first uninterruptible power supply 11 and the second uninterruptible power supply 21 are normal, the first uninterruptible power supply 11 maintains its output voltage synchronized with the voltage of the third AC power supply 14 (including frequency and phase under fluctuating conditions), and the second uninterruptible power supply 21 maintains its output voltage synchronized with the voltage of the fourth AC voltage 24 (including frequency and phase under fluctuating conditions). Thus, if either the first uninterruptible power supply 11 or the second uninterruptible power supply 21 malfunctions, the corresponding bypass power supply can be quickly switched via the first bypass static switch 12 or the second bypass static switch 22 to ensure the continuity of power supply to the corresponding load.

[0046] In one embodiment of the present invention, the uninterruptible power supply parallel system further includes a status indication unit (e.g., a status indicator light), which is adjacent to the bus tie switch Q4. The main control device generates a first signal (e.g., a red light) through the status indication unit to output a command prohibiting the closing of the bus tie switch Q4, and generates a second signal (e.g., a green light) through the status indication unit to output a command allowing the closing of the bus tie switch Q4. Thus, on-site maintenance personnel can perform the closing operation by seeing the indication from the status indication unit.

[0047] In one embodiment of the present invention, the AC load of the above-mentioned uninterruptible power supply (UPS) parallel system includes only multiple single-power-supply loads, and the input terminals of the multiple single-power-supply loads are respectively connected to one of the first AC bus 15 and the second AC bus 25. Since maintenance personnel can quickly switch the dual UPS parallel system to single UPS power supply after any UPS failure, only the downstream load corresponding to the failed UPS is briefly powered by a bypass during the fault period, thus ensuring reliable power supply to the load.

[0048] Alternatively, the AC load of an uninterruptible power supply (UPS) parallel system may include multiple single-supply loads and at least one dual-supply load, such as... Figure 4 As shown, the above-mentioned uninterruptible power supply parallel system includes a static switching device 41. The input terminal of the static switching device 41 is electrically connected to the first AC bus 15 and the second AC bus 25, respectively. The input terminals of multiple single-power-supply loads are electrically connected to the output terminal of the static switching device 41, respectively. The input terminals of dual-power-supply loads are electrically connected to the first AC bus 15 and the second AC bus 25, respectively.

[0049] The aforementioned static switching device 41 can select one of the first AC bus 15 and the second AC bus 25 as the power supply to power the downstream single-power load. For example, when the first AC bus 15 is powered by the first bypass static switch 12 (i.e., the first uninterruptible power supply 11 is abnormal), the static switching device 41 switches to the second AC bus 25 to power the downstream single-power load; when the second AC bus 25 is powered by the second bypass static switch 22 (i.e., the second uninterruptible power supply 21 is abnormal), the static switching device 41 switches to the first AC bus 15 to power the downstream single-power load. Due to the existence of the aforementioned static switching device 41, the single-power load in the system is always powered online by the inverter of the uninterruptible power supply.

[0050] The present invention also provides an uninterruptible power supply (UPS) parallel system, the UPS parallel system comprising a first AC bus for supplying power to an AC load, a second AC bus for supplying power to an AC load, a bus tie switch connected between the first AC bus and the second AC bus, a first UPS connected between a first AC power source and the first AC bus, and a second UPS connected between a second AC power source and the second AC bus; the UPS parallel system further comprises a first bypass static switch, a second bypass static switch, and a main control device, wherein the first bypass static switch is connected between a third AC power source and the first AC bus, and the second bypass static switch is connected between a fourth AC power source and the second AC bus;

[0051] The main control device includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the parallel control method described above.

[0052] In this embodiment, the uninterruptible power supply is connected in parallel with the above-mentioned... Figure 2-4 The parallel control methods in the corresponding embodiments belong to the same concept. The specific implementation process can be found in the corresponding method embodiments. The technical features in the method embodiments are also applicable to this device embodiment, and will not be repeated here.

[0053] The present invention also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the parallel control method described above.

[0054] The computer-readable storage medium in this embodiment is the same as described above. Figure 2-4 The parallel control methods in the corresponding embodiments belong to the same concept. The specific implementation process can be found in the corresponding method embodiments. The technical features in the method embodiments are also applicable to this storage medium embodiment, and will not be repeated here.

[0055] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0056] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0057] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0058] In the embodiments provided in this application, it should be understood that the disclosed parallel control method and uninterruptible power supply parallel system can be implemented in other ways.

[0059] This application implements all or part of the processes in the methods of the above embodiments, which can also be accomplished by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include: any entity or interface switching device capable of carrying the computer program code, a recording medium, a USB flash drive, a portable hard drive, a magnetic disk, an optical disk, a computer memory, a read-only memory (ROM), a random access memory (RAM), an electrical carrier signal, a telecommunication signal, and a software distribution medium, etc.

[0060] The embodiments of the present invention have been described in detail above with reference to the accompanying drawings. However, the present invention is not limited to the above embodiments, and various changes can be made within the scope of knowledge possessed by those skilled in the art without departing from the spirit of the present invention. Furthermore, the embodiments of the present invention and the features thereof can be combined with each other unless otherwise specified.

Claims

1. A parallel control method applied to an uninterruptible power supply parallel system, characterized in that, The uninterruptible power supply (UPS) parallel system includes a first AC bus, a second AC bus, a bus tie switch connecting the first AC bus and the second AC bus, a first UPS connecting the first AC power source and the first AC bus, a second UPS connecting the second AC power source and the second AC bus, a first bypass static switch connecting the third AC power source and the first AC bus, and a second bypass static switch connecting the fourth AC power source and the second AC bus. The UPS parallel system supplies power to the AC load through the first AC bus and the second AC bus. The parallel control method includes: When both the first uninterruptible power supply and the second uninterruptible power supply are normal, control the first uninterruptible power supply to supply power to the first AC bus and the second uninterruptible power supply to supply power to the second AC bus, and output a command to prohibit the closing of the bus tie switch; When the first uninterruptible power supply is abnormal, the first bypass static switch is closed to switch the first AC bus to be powered by the third AC power supply; after the first bypass static switch is closed, the output of the second uninterruptible power supply is matched with the voltage amplitude, frequency and phase of the third AC power supply and the second bypass static switch is prohibited from switching to the closed state, while a command is output to allow the bus tie switch to close; after the bus tie switch is closed, the first bypass static switch is opened.

2. The parallel control method according to claim 1, characterized in that, After the first bypass static switch is closed, the amplitude, frequency and phase of the output voltage of the second uninterruptible power supply are controlled to match the amplitude, frequency and phase of the output voltage of the first bypass static switch within 10 power frequency cycles.

3. The parallel control method according to claim 1, characterized in that, The parallel control method includes: when both the first uninterruptible power supply and the second uninterruptible power supply are normal, the first uninterruptible power supply maintains its output voltage synchronized with the voltage of the third AC power supply, and the second uninterruptible power supply maintains its output voltage synchronized with the voltage of the fourth AC power supply.

4. The parallel control method according to claim 1, characterized in that, The uninterruptible power supply parallel system includes a status indicator unit, which is adjacent to the bus tie switch. The status indicator unit generates a first signal output to prohibit the closing of the bus tie switch, and generates a second signal output to allow the closing of the bus tie switch.

5. The parallel control method according to claim 1, characterized in that, The AC load includes only a plurality of single-power-supply loads, and the input terminals of the plurality of single-power-supply loads are respectively connected to one of the first AC bus and the second AC bus.

6. The parallel control method according to claim 1, characterized in that, The AC load includes multiple single-power-supply loads and at least one dual-power-supply load. The uninterruptible power supply parallel system includes a static switching device. The input terminal of the static switching device is electrically connected to the first AC bus and the second AC bus, respectively. The input terminals of the multiple single-power-supply loads are electrically connected to the output terminal of the static switching device, respectively. The input terminals of the dual-power-supply loads are electrically connected to the first AC bus and the second AC bus, respectively.

7. The parallel control method according to claim 1, characterized in that, When the inverter of the first uninterruptible power supply fails or the energy storage battery stops discharging, the abnormality of the first uninterruptible power supply is confirmed.

8. An uninterruptible power supply (UPS) parallel system, the UPS parallel system comprising a first AC bus for supplying power to an AC load, a second AC bus for supplying power to an AC load, a bus tie switch connected between the first AC bus and the second AC bus, a first UPS connected between a first AC power source and the first AC bus, and a second UPS connected between the second AC power source and the second AC bus; characterized in that, The uninterruptible power supply parallel system also includes a first bypass static switch, a second bypass static switch and a main control device. The first bypass static switch is connected between the third AC power supply and the first AC bus, and the second bypass static switch is connected between the fourth AC power supply and the second AC bus. The main control device includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the parallel control method as described in any one of claims 1 to 7.

9. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it implements the steps of the parallel control method as described in any one of claims 1 to 7.

Images