Clamping circuit and driving circuit applied to turn-off process of driving power tube

Abstract

The invention discloses a clamping circuit and a driving circuit applied to the turn-off process of a driving power tube, relates to the technical field of power electronics, and solves the problem that when the power tube is turned off, a parasitic device exists in the circuit, so that the collector voltage of the power tube has a peak value, and the power tube has a fault. According to the technical scheme, the circuit is characterized by comprising a clamping detection circuit, a driving circuit, a charging circuit and a power tube, the clamping detection circuit is used for comparing a preset reference voltage signal with the voltage detection signal to judge whether the power tube is in an overvoltage state, and outputting a control signal for controlling the turn-off process of the power tube if the power tube is in the overvoltage state; the driving circuit is used for responding to the control signal and stopping the turn-off process of the power tube; and after the turn-off process of the driving circuit is completed, the charging circuit is used for charging the grid electrode of the power tube or suspending the charging action according to the control signal, so that the power tube enters a soft start state from a turn-off state.

Description

Technical Field

[0001] This invention relates to the field of power electronics technology, and more specifically, to a clamping circuit used in the turn-off process of a driving power transistor. Background Technology

[0002] With the development of power electronics technology, improving the energy efficiency of switching power supplies has become one of the key indicators driving technological progress. In switching components, the application of high-efficiency, high-drive-capability, and low-conduction-loss power transistors such as IGBTs, MOSFETs, and SiC transistors is becoming increasingly widespread. Taking IGBTs as an example, they combine the advantages of power transistors and power MOSFETs, enabling operation at high frequencies and facilitating both driving and shutdown. In power electronic systems, IGBTs are extremely important power semiconductor devices; the reliability of the entire system is closely related to the durability and lifespan of the IGBTs. In practical applications, electrostatic discharge (ESD), electrical fast transients (EFT), or overvoltages caused by the Miller effect can easily damage IGBTs. Like other electronic devices, the reliability of IGBTs depends on both their inherent device performance and the protection circuitry. Therefore, designing reliable protection circuits has become a key challenge and a difficult aspect of power electronic systems.

[0003] Parasitic inductance exists in switching power supplies, such as line inductance or chip package inductance. IGBTs and other power transistors are typically used in high-current driving scenarios. Therefore, during the power transistor's shutdown, the current in the circuit may drop rapidly. This high-slew-rate current generates an extremely high electromotive force (EMF) across the parasitic inductance, which, combined with the current collector (drain) voltage, causes a sharp rise in the collector (drain) voltage, resulting in a voltage spike. Under normal conditions, the collector (drain) voltage of a power transistor will not be excessively high. Therefore, designing a corresponding power transistor protection circuit is essential to prevent overvoltage damage to the collector (drain) during the power transistor's shutdown process.

[0004] There are two traditional suppression methods: (1) adding a TVS diode between the gate and collector (drain) terminals of the power transistor, such as... Figure 1 As shown, when the IGBT collector voltage is too high during the IGBT shutdown process, the TVS transistor breaks down, and the current flows to the IGBT gate, causing the gate voltage to rise. At this time, the rate of decrease of the IGBT turn-off current I decreases, that is, the induced electromotive force on the parasitic inductance decreases, thereby protecting the IGBT transistor. (2) Increase the turn-off resistance at the gate, that is, increase the gate voltage drop time, slow down the power transistor's turn-off process, and the rate of decrease of its current decreases.

[0005] Both of the above suppression methods have their drawbacks: If a TVS diode is used for clamping, because its breakdown voltage is a fixed value, under certain circumstances, when the bus voltage is raised to a high voltage level, the TVS diode breaks down, and the IGBT gate voltage is pulled up or even turned on, posing a risk of system breakdown. Simultaneously, during the turn-off process, if the collector voltage is too high, after the TVS diode breaks down, because the IGBT drive is in a pull-down state, most of the current is absorbed by the pull-down transistor, and a small portion is used to hinder the rapid drop in gate voltage, resulting in energy loss. Increasing the turn-off resistor at the power transistor gate will increase turn-off losses, prolong turn-on and turn-off times, and affect the switching frequency of the power transistor. Summary of the Invention

[0006] The purpose of this invention is to provide a clamping circuit for the power transistor turn-off process, which solves the problem that when the power transistor is turned off, the collector voltage of the power transistor will have a peak value due to the presence of parasitic devices in the circuit, which will cause the power transistor to malfunction.

[0007] The above-mentioned technical objective of the present invention is achieved through the following technical solution: In a first aspect, the present invention provides a clamping circuit for use in the turn-off process of a driving power transistor. The circuit includes a clamping detection circuit, a driving circuit, a charging circuit, and a power transistor. The output terminal of the clamping detection circuit is connected to the input terminals of the driving circuit and the charging circuit, respectively, and the output terminals of the driving circuit and the charging circuit are connected to the gate of the power transistor, respectively. The clamping detection circuit is used to compare a preset reference voltage signal with a voltage detection signal to determine whether the power transistor is over-voltage. If the power transistor is over-voltage, a control signal is output to control the power transistor turn-off process. The driving circuit is used to respond to the control signal and stop the turn-off process of the power transistor. After the shutdown process of the driving circuit is completed, the charging circuit is used to charge the gate of the power transistor or pause the charging operation according to the control signal, so that the power transistor enters the soft-on state from the shutdown state.

[0008] In one implementation, the circuit includes an overvoltage detection circuit for detecting the collector voltage of the power transistor and outputting a voltage detection signal; The input terminal of the overvoltage detection circuit is connected to the collector of the power transistor, and the output terminal of the overvoltage detection circuit is connected to the input terminal of the clamping detection circuit.

[0009] In one implementation, the overvoltage detection circuit employs one of three methods: TVS diodes in series and parallel, resistors in series and parallel plus a comparator, or an analog-to-digital converter.

[0010] In one implementation, the circuit further includes a diode connected between the output of the overvoltage detection circuit and the gate of the power transistor; The diode is used to provide charging current to the gate of the power transistor; wherein the anode of the diode is connected to the output terminal of the overvoltage detection circuit, and the cathode of the diode is connected to the gate of the power transistor.

[0011] In one implementation, the clamp detection circuit includes a comparator with two ports and a filter connected to the output of the comparator. The output of the overvoltage detection circuit is connected to one port of the comparator, and the other port of the comparator uses a preset reference voltage signal.

[0012] In one implementation, a grounding resistor is connected in parallel to the port where the comparator is connected to the overvoltage detection circuit.

[0013] In one implementation, the charging circuit is configured to start timing when the clamp detection circuit outputs a control signal. If the timing reaches a preset time and the signal output by the clamp detection circuit is still a control signal, the parallel charging current is increased sequentially according to the preset time until the clamp detection circuit no longer outputs a control signal.

[0014] In one implementation, a resistor is connected between the overvoltage detection circuit and the clamping detection circuit.

[0015] In one implementation, the power transistor is one of three types: IGBT, MOSFET, and SiC transistor.

[0016] A second aspect of the present invention provides a driving circuit for driving the power transistor turn-off process, including a clamping circuit as provided in the first aspect of the present invention for driving the power transistor turn-off process.

[0017] Compared with the prior art, the present invention has the following beneficial effects: In the clamping circuit provided by this invention, the clamping detection circuit determines whether VCE overvoltage has occurred in the power transistor based on the voltage detection signal and the internal comparison circuit. If VCE overvoltage occurs, the power transistor's drive circuit is controlled to stop the power transistor's turn-off process, reducing the slope di / dt of the power path, thereby reducing the VCE overvoltage. Simultaneously, this invention also introduces a charging circuit at the power transistor's gate. After the power transistor's drive circuit stops the power transistor's turn-off process, the charging circuit selects to charge or pause the charging action at the power transistor's gate based on the control signal output by the clamping detection circuit, allowing the power transistor to enter a soft-on state from the turn-off state, reducing the power transistor's on-resistance, and further reducing the VCE overvoltage. Therefore, this invention can monitor the power transistor's collector voltage in real time and control the power transistor's turn-off speed, thereby reducing the peak voltage value during the power transistor's turn-off process and achieving a high-efficiency, low-cost clamping circuit. Attached Figure Description

[0018] The accompanying drawings, which are included to provide a further understanding of embodiments of the invention and form part of this application, do not constitute a limitation thereof. In the drawings: Figure 1 A schematic diagram of a clamping circuit provided for the prior art; Figure 2 A schematic diagram of a clamping circuit applied to the power transistor turn-off process provided in an embodiment of the present invention; Figure 3 A schematic diagram of a clamping circuit applied to the power transistor turn-off process provided in an embodiment of the present invention; Figure 4 The voltage timing diagram of each node of the clamping circuit applied to the power transistor turn-off process provided in the embodiment of the present invention; Figure 5 A schematic diagram of the structure of a clamping circuit for the power transistor turn-off process provided in this embodiment of the invention, combined with a clamping circuit provided in the prior art; Figure 6 The voltage timing diagram of each node when the clamping circuit for the power transistor turn-off process provided in the embodiments of the present invention is used in combination with the clamping circuit provided in the prior art.

[0019] Figure labels and figure descriptions: 1. Overvoltage detection circuit; 2. Clamping detection circuit; 3. Drive circuit; 4. Charging circuit; 5. Power transistor. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the embodiments and accompanying drawings. The illustrative embodiments and descriptions of the present invention are only used to explain the present invention and are not intended to limit the present invention.

[0021] It should be noted that the terms "comprising" or "may include" used in the various embodiments of this application indicate the presence of the claimed function, operation, or element, and do not limit the addition of one or more functions, operations, or elements. Furthermore, as used in the various embodiments of this application, the terms "comprising," "having," and their cognates are intended only to indicate a specific feature, number, step, operation, element, component, or combination of the foregoing, and should not be construed as primarily excluding the presence of one or more other features, numbers, steps, operations, elements, components, or combinations of the foregoing, or adding one or more combinations of the foregoing.

[0022] It should be understood that terms such as "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0023] Please refer to Figure 2 , Figure 2 A schematic diagram of a clamping circuit applied during the turn-off process of the driving power transistor 5, as provided in an embodiment of the present invention, is shown below. Figure 2 As shown, the circuit includes a clamping detection circuit 2, a driving circuit 3, a charging circuit 4, and a power transistor 5; wherein, the output terminal of the clamping detection circuit 2 is connected to the input terminals of the driving circuit 3 and the charging circuit 4 respectively, and the output terminals of the driving circuit 3 and the charging circuit 4 are connected to the gate of the power transistor 5 respectively. Clamping detection circuit 2 is used to compare a preset reference voltage signal with a voltage detection signal to determine whether the power transistor 5 is over-voltage. If the power transistor 5 is over-voltage, a control signal is output to control the power transistor 5 turn-off process. The drive circuit 3 is used to respond to the control signal and stop the turn-off process of the power transistor 5; After the turn-off process of the drive circuit 3 is completed, the charging circuit 4 is used to charge the gate of the power transistor 5 or pause the charging action according to the control signal, so that the power transistor 5 enters the soft-on state from the turn-off state.

[0024] In this embodiment, firstly, the type of power transistor 5 will be explained. Power transistor 5 adopts one of three types: IGBT, MOSFET, and SiC transistor. This embodiment uses IGBT as an example to explain the working principle of the clamping circuit driving the IGBT turn-off process. During the IGBT turn-off process: as follows... Figure 2 As shown, the collector voltage of the IGBT is first processed by the overvoltage detection circuit 1. The signal processed by the overvoltage detection circuit 1 is then transmitted to the clamping detection circuit 2. The clamping detection circuit 2, based on the voltage detection signal output by the overvoltage detection circuit 1 and combined with the comparison circuit inside the clamping detection circuit 2, determines whether the IGBT has experienced VCE overvoltage. If VCE overvoltage occurs, the drive circuit 3 of the IGBT is controlled to stop its turn-off process, reducing the slope di / dt of the power path, thereby reducing the VCE overvoltage state. It can be understood that the operating state of the drive circuit 3 can be controlled according to the level of the control signal. For example, when the control signal is high, the turn-off process of the power transistor 5 is stopped in response to the high-level control signal.

[0025] Meanwhile, this invention also introduces a charging circuit 4 at the gate of the IGBT. After the IGBT driving circuit 3 stops the IGBT turn-off process, the charging circuit 4 selects to charge the IGBT gate or pause the charging action according to the control signal output by the clamp detection circuit 2, allowing the IGBT to enter a soft-turn-on state from the turn-off state, reducing the IGBT's on-resistance, and further reducing VCE overvoltage. Therefore, this invention can monitor the IGBT's collector voltage in real time and control the IGBT's turn-off speed, thereby reducing the peak voltage value during the IGBT turn-off process and achieving a high-efficiency, low-cost clamping circuit.

[0026] As can be seen, the signal processed by the overvoltage detection circuit 1 is removed from the high-voltage domain where the collector of the power transistor 5 is located, so the clamping detection circuit 2 inside the chip can operate in the low-voltage domain. Therefore, the driver chip of the present invention can use a low-voltage transistor to realize the detection of the collector voltage, effectively reducing the internal area of ​​the driver chip, and reducing the transmission delay due to the simple path.

[0027] In some embodiments, such as Figure 2 As shown, the clamping circuit includes an overvoltage detection circuit 1, which is used to detect the collector voltage of the power transistor 5 and output a voltage detection signal; wherein, the input terminal of the overvoltage detection circuit 1 is connected to the collector of the power transistor 5, and the output terminal of the overvoltage detection circuit 1 is connected to the input terminal of the clamping detection circuit 2.

[0028] Specifically, the overvoltage detection circuit 1 adopts one of three methods: TVS diodes in series and parallel, resistors in series and parallel plus a comparator, and an analog-to-digital converter. These three methods are the conventional technical means used to realize voltage detection. Therefore, this embodiment will not describe them in detail.

[0029] In some embodiments, in one implementation, the clamping detection circuit 2 includes a comparator with two ports and a filter connected to the output of the comparator; wherein the output of the overvoltage detection circuit 1 is connected to one port of the comparator, and the other port of the comparator uses a preset reference voltage signal. A grounding resistor is connected in parallel to the port of the comparator connected to the overvoltage detection circuit 1.

[0030] In this embodiment, the comparator and filter are used together to form a signal comparator, which is a conventional technique in this field. Correspondingly, pulling down the ground resistor at the input port of the comparator is also a conventional technique. This embodiment will not describe its working principle in detail.

[0031] In some embodiments, the charging circuit 4 is used to start timing when the clamp detection circuit 2 outputs a control signal. If the timing reaches the corresponding preset time and the signal output by the clamp detection circuit 2 is still a control signal, the parallel charging current is increased sequentially according to the corresponding preset time until the clamp detection circuit 2 no longer outputs a control signal.

[0032] Specifically, such as Figure 3 As shown, the output of the overvoltage detection circuit 1 is connected to one port of the high-speed comparator. The other port of the high-speed comparator can use a fixed reference voltage signal. The output structure of the high-speed comparator is filtered to prevent false triggering. Internally, the output of the filter determines whether the driver chip needs VCE overvoltage protection. Here, it is assumed that the circuit is set so that VCE protection is required when the filter output is high. Its working process is described as follows: During the chip shutdown process, if the filter output is high, the drive circuit 3 stops the shutdown process of the power transistor 5, and the parallel charging logic of the charging circuit 4 starts timing, such as... Figure 4 As shown, within a set time period (e.g., within time t1), if the control signal output by the filter remains high, the charging circuit 4 activates a portion of the parallel charging current to slowly charge the gate of the power transistor 5, gradually increasing the potential of the gate of the power transistor 5, reducing the on-resistance of the power transistor 5, and further accelerating the reduction of the VCE voltage of the power transistor 5. If, within a set time period (e.g., within time t2), the level of the control signal output by the filter remains high, it indicates that the VCE overvoltage at the collector of the power transistor 5 still exists. Therefore, the parallel charging current of the charging circuit 4 is further increased, and so on, until the VCE overvoltage state at the collector of the power transistor 5 is relieved, the control signal output by the filter becomes low, the driver chip exits the VCE protection state, the charging circuit 4 is completely turned off, and the driver chip re-enters the turn-off process of the power transistor 5.

[0033] In some embodiments, the circuit further includes a diode connected between the output terminal of the overvoltage detection circuit 1 and the gate of the power transistor 5; the diode is used to provide charging current to the gate of the power transistor 5; wherein the anode of the diode is connected to the output terminal of the overvoltage detection circuit 1, and the cathode of the diode is connected to the gate of the power transistor 5.

[0034] In this embodiment, as Figure 5 The image shows another embodiment of the present invention, which compares the clamping circuit provided in the embodiments of the present invention with the clamping circuit provided in the prior art (such as...). Figure 1 In this embodiment, an external high-voltage TVS device is used to detect the VCE voltage. A diode connected between the output of the overvoltage detection circuit 1 and the gate of the power transistor 5 enhances the charging capability of the gate of the power transistor 5. This diode is a Dcharge diode. Its operation is described as follows: Figure 6 As shown, when power transistor 5 is turned off and VCE experiences overvoltage, the external TVS device breaks down, causing the voltage detection signal VCL potential to increase. If the change in the output of the high-speed comparator is detected by the filter, the control signal ACL_DET will be high. At this time, the power transistor 5 drive circuit 3 stops the gate pull-down process of power transistor 5, and the parallel charging logic starts timing. Furthermore, the Dcharge charging current provides charging capability to the gate of power transistor 5 through the Dcharge diode, which helps to quickly reduce the on-resistance of power transistor 5, reduce the current change rate of the IGBT, and further alleviate the overvoltage function of power transistor 5 VCE. It is understandable that... Figure 6 In the process, the charging current of Dcharge gradually decreases over time. This is because as the charging current continuously provided by the charging circuit 4 and the Dcharge diode causes the collector of the power transistor 5 to exit the overvoltage state, the collector voltage decreases, the TVS device returns to normal, and the current output to the Dcharge diode also gradually decreases. Therefore, the charging current of Dcharge gradually decreases over time.

[0035] In some embodiments, a resistor is connected between the overvoltage detection circuit 1 and the clamping detection circuit 2. The resistor R2 is an optional component used to limit the current entering the ACL pin through the overvoltage detection circuit 1, thereby reducing potential chip overheating.

[0036] This invention also provides a driving circuit for driving the power transistor turn-off process, including a clamping circuit as described in the above embodiments for driving the power transistor turn-off process.

[0037] The driving circuit provided in this embodiment can solve the fault conditions caused by the peak voltage during the power transistor's turn-off process.

[0038] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A clamping circuit applied to the turn-off process of a driving power transistor, characterized in that, The circuit includes a clamping detection circuit, a driving circuit, a charging circuit, and a power transistor; wherein, the output terminal of the clamping detection circuit is connected to the input terminals of the driving circuit and the charging circuit, respectively, and the output terminals of the driving circuit and the charging circuit are connected to the gate of the power transistor, respectively. The clamping detection circuit is used to compare a preset reference voltage signal with a voltage detection signal to determine whether the power transistor is over-voltage. If the power transistor is over-voltage, a control signal is output to control the power transistor turn-off process. The driving circuit is used to respond to the control signal and stop the turn-off process of the power transistor. After the shutdown process of the driving circuit is completed, the charging circuit is used to charge the gate of the power transistor or pause the charging operation according to the control signal, so that the power transistor enters the soft-on state from the shutdown state.

2. The clamping circuit applied to the power transistor turn-off process according to claim 1, characterized in that, The circuit includes an overvoltage detection circuit for detecting the collector voltage of the power transistor and outputting a voltage detection signal. The input terminal of the overvoltage detection circuit is connected to the collector of the power transistor, and the output terminal of the overvoltage detection circuit is connected to the input terminal of the clamping detection circuit.

3. A clamping circuit applied to the turn-off process of a driving power transistor according to claim 2, characterized in that, The overvoltage detection circuit employs one of three methods: TVS diodes in series and parallel, resistors in series and parallel plus a comparator, or an analog-to-digital converter.

4. A clamping circuit applied to the turn-off process of a driving power transistor according to claim 2, characterized in that, The circuit also includes a diode connected between the output terminal of the overvoltage detection circuit and the gate of the power transistor. The diode is used to provide charging current to the gate of the power transistor; wherein the anode of the diode is connected to the output terminal of the overvoltage detection circuit, and the cathode of the diode is connected to the gate of the power transistor.

5. A clamping circuit applied to the turn-off process of a driving power transistor according to claim 2, characterized in that, The clamp detection circuit includes a comparator with two ports and a filter connected to the output of the comparator. The output of the overvoltage detection circuit is connected to one port of the comparator, and the other port of the comparator uses a preset reference voltage signal.

6. A clamping circuit applied to the turn-off process of a driving power transistor according to claim 5, characterized in that, A grounding resistor is connected in parallel to the port where the comparator is connected to the overvoltage detection circuit.

7. A clamping circuit applied to the turn-off process of a driving power transistor according to claim 1, characterized in that, The charging circuit is used to start timing when the clamp detection circuit outputs a control signal. If the timing reaches the corresponding preset time and the signal output by the clamp detection circuit is still a control signal, the parallel charging current is increased sequentially according to the corresponding preset time until the clamp detection circuit no longer outputs a control signal.

8. A clamping circuit for the power transistor turn-off process according to claim 1, characterized in that, A resistor is connected between the overvoltage detection circuit and the clamping detection circuit.

9. A clamping circuit applied to the turn-off process of a driving power transistor according to claim 1, characterized in that, The power transistor is one of three types: IGBT, MOSFET, and SiC transistor.

10. A driving circuit for driving the power transistor's turn-off process, characterized in that, Includes a clamping circuit as described in any one of claims 1 to 9, applied to the power transistor turn-off process.

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