An injection-locked frequency multiplier circuit having an oscillator

Abstract

The application relates to the field of integrated circuit technology and discloses an injection-locked frequency multiplier circuit with an oscillator, which comprises the following: a differential mode resonant cavity for generating a fundamental wave signal and a third harmonic signal; a first oscillator unit connected with the differential mode resonant cavity and used for providing negative resistance; an injection unit connected with the differential mode resonant cavity, the injection unit being used for converting the fundamental wave signal and the third harmonic signal into a third harmonic component; a second oscillator unit used for providing negative resistance; and a fourth-order resonant cavity connected with the second oscillator unit and the injection unit and used for coupling the third harmonic component to be output. According to the application, the fundamental wave signal generated by the differential mode resonant cavity is converted into a triple-frequency output through the injection unit, the third harmonic signal is directly enhanced to be output, the third harmonic component output by the injection unit is coupled to be output through the fourth-order resonant cavity, the phase noise of the frequency multiplier is reduced, the energy efficiency is improved, and thus the demand of the local oscillator performance for millimeter wave high-speed wireless communication can be met.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit design technology, and more particularly to an injection-locked frequency multiplier circuit with an oscillator. Background Technology

[0002] With the increasing demand for applications such as 5G / 6G mobile communication, smart homes, and autonomous driving, wireless communication technology is developing rapidly. As wireless communication data rates increase, the requirements for signal quality also become more stringent. Low-frequency spectrum resources are largely occupied by communication standards in various countries, making it difficult to find continuous spectrum that can support high data rates. Therefore, to meet the demands of high data rates, the higher millimeter-wave band has been extensively studied.

[0003] With the rapid development of millimeter-wave multi-band wireless communication and point-to-point backhaul communication, new requirements have been placed on the key module, the phase-locked loop (PLL). However, the output noise of the local oscillator in existing millimeter-wave PLLs is poor, making it difficult to meet the needs of high-speed communication.

[0004] Therefore, existing technologies still need to be improved and developed. Summary of the Invention

[0005] In view of the shortcomings of the prior art, the purpose of this invention is to provide an injection-locked frequency multiplier circuit with an oscillator to solve the problem of poor output noise of the local oscillator of the existing millimeter-wave phase-locked loop.

[0006] The technical solution of the present invention is as follows:

[0007] In a first aspect, the present invention provides an injection-locked frequency multiplier circuit with an oscillator, comprising:

[0008] Differential-mode resonant cavity used to generate fundamental and third harmonic signals;

[0009] A first oscillator unit, connected to the differential-mode resonant cavity, is used to provide negative resistance;

[0010] An injection unit is connected to the differential mode resonant cavity, and the injection unit is used to convert the fundamental signal and the third harmonic signal into third harmonic components;

[0011] A fourth-order resonant cavity is connected to the injection unit and is used to couple the third harmonic component out.

[0012] The second oscillator unit is connected to the fourth-order resonant cavity and is used to provide negative resistance.

[0013] In a further embodiment of the present invention, the injection-locked frequency multiplier circuit further includes a common-mode resonant cavity, which is connected to the first oscillator unit and is used to extend the common-mode resonant bandwidth.

[0014] In a further embodiment of the present invention, the differential mode resonant cavity includes: a first inductor, a second inductor, a third inductor, a fourth inductor, a fifth inductor, a sixth inductor, a first capacitor, and a second capacitor;

[0015] One end of the first inductor is connected to one end of the second inductor, the other end of the first inductor is connected to the first oscillator unit, and the other end of the second inductor is connected to the first oscillator unit;

[0016] One end of the third inductor is connected to one end of the fourth inductor, and the other end of the third inductor is connected to the first oscillator unit and the injection unit, respectively. The other end of the fourth inductor is connected to the first oscillator unit and the injection unit, respectively.

[0017] One end of the fifth inductor is connected to one end of the sixth inductor;

[0018] The first capacitor is connected between the other end of the fifth inductor and the other end of the sixth inductor;

[0019] The second inductor is connected between the other end of the first inductor and the other end of the second inductor;

[0020] The common terminal of the first inductor and the second inductor is connected to a first bias voltage; the common terminal of the third inductor and the fourth inductor is connected to a first power supply voltage.

[0021] It also includes: a third capacitor, a fourth capacitor, and a switched capacitor array;

[0022] One end of the third capacitor is connected to one end of the fourth capacitor, and the other end of the third capacitor is connected to the other end of the first inductor;

[0023] The other end of the fourth capacitor is connected to the other end of the second inductor;

[0024] The common terminal of the third capacitor and the fourth capacitor is connected to the first control voltage;

[0025] One end of the switched capacitor array is connected to the other end of the first inductor, and the other end of the switched capacitor array is connected to the other end of the second inductor.

[0026] In a further embodiment of the present invention, the first oscillator unit includes: a first MOS transistor and a second MOS transistor;

[0027] The gate of the first MOS transistor is connected to the other end of the second inductor, the drain of the first MOS transistor is connected to the other end of the third inductor, and the source of the first MOS transistor is connected to the common-mode resonant cavity.

[0028] In a further embodiment of the present invention, the common-mode resonant cavity includes: a seventh inductor, an eighth inductor, a fifth capacitor, and a sixth capacitor; wherein,

[0029] One end of the seventh inductor is connected to one end of the eighth inductor and the source of the second MOS transistor, and the other end of the seventh inductor is connected to one end of the fifth capacitor, and the other end of the fifth capacitor is grounded.

[0030] One end of the eighth inductor is also connected to the source of the first MOS transistor, and the other end of the eighth inductor is grounded;

[0031] One end of the sixth capacitor is connected to the source of the second MOS transistor, and the other end of the sixth capacitor is grounded.

[0032] In a further embodiment of the present invention, the injection unit includes: a seventh capacitor, an eighth capacitor, a first resistor, a second resistor, a third MOSFET, and a fourth MOSFET; wherein,

[0033] One end of the seventh capacitor is connected to the common terminal of the drain of the first MOS transistor and the other end of the third inductor, and the other end of the seventh capacitor is connected to the gate of the third MOS transistor.

[0034] One end of the eighth capacitor is connected to the common terminal of the drain of the second MOS transistor and the other end of the fourth inductor, and the other end of the eighth capacitor is connected to the gate of the fourth MOS transistor.

[0035] One end of the first resistor is connected to the second bias voltage, and the other end of the first resistor is connected to the gate of the third MOS transistor.

[0036] One end of the second resistor is connected to a second bias voltage, and the other end of the second resistor is connected to the gate of the fourth MOS transistor.

[0037] The drain of the third MOS transistor is connected to the fourth-order resonant cavity, and the source of the third MOS transistor is grounded.

[0038] The drain of the fourth MOS transistor is connected to the fourth-order resonant cavity, and the source of the fourth MOS transistor is grounded.

[0039] In a further embodiment of the present invention, the fourth-order resonant cavity includes: a ninth inductor, a tenth inductor, an eleventh inductor, a twelfth inductor, a ninth capacitor, a tenth capacitor, an eleventh capacitor, and a twelfth capacitor; wherein,

[0040] One end of the ninth inductor is connected to the second oscillator unit, one end of the tenth inductor is connected to the second oscillator unit, and the other end of the ninth inductor and the common terminal of the other end of the tenth inductor are connected to the second power supply voltage.

[0041] One end of the eleventh inductor is connected to the drain of the third MOS transistor, and the other end of the eleventh inductor is connected to the third power supply voltage.

[0042] One end of the twelfth inductor is connected to the drain of the fourth MOS transistor, and the other end of the twelfth inductor is connected to the third power supply voltage;

[0043] One end of the ninth capacitor is connected to one end of the tenth capacitor, and the other end of the ninth capacitor is connected to the second oscillator unit;

[0044] The other end of the tenth capacitor is connected to the second oscillator unit;

[0045] The other end of the ninth capacitor and the common terminal of one end of the tenth capacitor are connected to the second control voltage;

[0046] One end of the eleventh capacitor is connected to one end of the twelfth capacitor, the other end of the eleventh capacitor is connected to one end of the eleventh inductor, and the other end of the twelfth capacitor is connected to the other end of the twelfth inductor.

[0047] The ninth inductor, the tenth inductor, the eleventh inductor, and the twelfth inductor constitute the third transformer; the third transformer is constructed from top to bottom through the first metal layer, the second metal layer, and the first aluminum layer.

[0048] In a further embodiment of the present invention, the second oscillator unit includes: a fifth MOS transistor and a sixth MOS transistor;

[0049] The gate of the fifth MOS transistor is connected to one end of the tenth inductor, the drain of the fifth MOS transistor is connected to one end of the ninth inductor, and the source of the fifth MOS transistor is grounded.

[0050] The gate of the sixth MOS transistor is connected to one end of the ninth inductor, the drain of the sixth MOS transistor is connected to one end of the tenth inductor, and the source of the sixth MOS transistor is grounded.

[0051] In a further embodiment of the present invention, the first inductor, the second inductor, the third inductor, the fourth inductor, the fifth inductor, and the sixth inductor constitute a first transformer; the seventh inductor and the eighth inductor constitute a second transformer; the first power supply voltage is connected downward from the center tap of the third inductor and the fourth inductor and is close to the eighth inductor, and the first transformer and the second transformer form an L-shaped layout.

[0052] This invention provides an injection-locked frequency multiplier circuit with an oscillator. The injection-locked frequency multiplier circuit includes: a differential-mode resonant cavity for generating a fundamental signal and a third harmonic signal; a first oscillator unit connected to the differential-mode resonant cavity, which provides negative resistance; an injection unit connected to the differential-mode resonant cavity, which converts the fundamental signal and the third harmonic signal into a third harmonic component; a fourth-order resonant cavity connected to the injection unit, which couples the third harmonic component to the output; and a second oscillator unit connected to the fourth-order resonant cavity, which provides negative resistance. This invention achieves third-harmonic output by injecting the fundamental signal generated by the differential-mode resonant cavity through the injection unit, directly enhancing the output of the generated third harmonic signal without the need for an additional capacitor array. Furthermore, the third harmonic component output through the injection unit is further coupled to the fourth-order resonant cavity, which can improve the phase noise performance and energy efficiency of the W-band local oscillator to meet the requirements of high-speed communication. Attached Figure Description

[0053] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0054] Figure 1 This is a block diagram of the injection-locked frequency multiplier circuit in one embodiment of the present invention.

[0055] Figure 2 This is a circuit diagram of an injection-locked frequency multiplier circuit in one embodiment of the present invention.

[0056] Figure 3 This is a circuit diagram of a differential resonant cavity in one embodiment of the present invention.

[0057] Figure 4 This is a circuit diagram of a common-mode resonant cavity in one embodiment of the present invention.

[0058] Figure 5This is a circuit diagram of a fourth-order resonant cavity in one embodiment of the present invention.

[0059] Figure 6 This is a simulation result diagram of the differential mode input impedance of the resonant cavity in one embodiment of the present invention.

[0060] Figure 7 This is a simulation result diagram of the common-mode input impedance in one embodiment of the present invention.

[0061] Figure 8 This is an inductor structure layout of the differential-mode resonant cavity and the common-mode resonant cavity in one embodiment of the present invention.

[0062] Figure 9 This is an inductor structure layout of a fourth-order resonant cavity in one embodiment of the present invention.

[0063] Figure 10 This is an impedance and phase curve diagram of the structure of the injection-locked frequency multiplier circuit in one embodiment of the present invention.

[0064] Figure 11 This is a frequency adjustment range curve of the structure of the injection-locked frequency multiplier circuit in one embodiment of the present invention.

[0065] Figure 12 This is a graph showing the phase noise variation with frequency at 100kHz, 1MHz, and 10MHz frequency offsets of the structure of the injection-locked frequency multiplier circuit in one embodiment of the present invention.

[0066] Figure 13 This is an output amplitude curve of the structure of the injection-locked frequency multiplier circuit in one embodiment of the present invention.

[0067] The following are the labels in the attached diagram: 1. Differential-mode resonant cavity; 2. First oscillator unit; 3. Injection unit; 4. Second oscillator unit; 5. Fourth-order resonant cavity; 6. Common-mode resonant cavity; 7. First metal layer; 8. Second metal layer; 9. First aluminum layer; 10. Third metal layer; 11. Fourth metal layer; 12. Second aluminum layer. Detailed Implementation

[0068] This invention provides an injection-locked frequency multiplier circuit with an oscillator. To make the objectives, technical solutions, and effects of this invention clearer and more explicit, the invention will be further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

[0069] In the implementation methods and claims, unless otherwise specified in the text, the terms "a," "an," "the," and "the" may also include plural forms. If the embodiments of the present invention involve descriptions of "first," "second," etc., such descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of those features.

[0070] It should be further understood that the term "comprising" as used in this specification means the presence of the stated features, integers, steps, operations, elements, and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. It should be understood that when an element is referred to as "connected" or "coupled" to another element, it can be directly connected or coupled to the other element, or there may be intermediate elements present. Furthermore, "connected" or "coupled" as used herein can include wireless connections or wireless coupling. The term "and / or" as used herein includes all or any of the units and all combinations thereof of one or more associatedly listed items.

[0071] It will be understood by those skilled in the art that, unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. It should also be understood that terms such as those defined in general dictionaries should be understood to have the same meaning as in the context of the prior art, and should not be interpreted in an idealized or overly formal sense unless specifically defined as herein.

[0072] Furthermore, the technical solutions of the various embodiments can be combined with each other, but only if they are feasible for those skilled in the art. If the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such combination of technical solutions does not exist and is not within the scope of protection claimed by this invention.

[0073] The inventors discovered that the rapid development of millimeter-wave multi-band wireless communication and point-to-point backhaul communication has placed new demands on the key module, the phase-locked loop (PLL). The high output efficiency of the W-band presents several design challenges and contradictions. The higher oscillation frequency of millimeter-wave voltage-controlled oscillators requires smaller capacitors, while the larger bandwidth requires a larger proportion of adjustable capacitors to the total capacitance, thus creating a conflict between bandwidth and operating frequency. The larger bandwidth necessitates a larger adjustable capacitor, leading to greater losses, which necessitates increasing the transconductance of active components, resulting in deterioration of phase noise. Simultaneously, greater losses reduce the quality factor of the resonant cavity, similarly worsening phase noise and power consumption.

[0074] To address the aforementioned technical problems, this invention provides an injection-locked frequency multiplier circuit with an oscillator. An F23-type oscillator with second and third harmonic extensions that do not require manual tuning is directly injected into the injection-locked third frequency multiplier. This optimizes the bandwidth and noise of the millimeter-wave oscillator while avoiding the low quality factor of the voltage-controlled oscillator with a low resonant cavity in the W-band. It effectively extracts the third harmonic and achieves high output efficiency in the W-band.

[0075] Please also refer to Figures 1 to 13 The present invention provides a preferred embodiment of an injection-locked frequency multiplier circuit with an oscillator.

[0076] In some embodiments, such as Figure 1 and Figure 2 As shown, this invention provides an injection-locked frequency multiplier circuit with an oscillator, comprising: a differential-mode resonant cavity 1, a first oscillator unit 2, an injection unit 3, a second oscillator unit 4, and a fourth-order resonant cavity 5. The differential-mode resonant cavity 1 generates a fundamental signal and a third harmonic signal; the first oscillator unit 2 is connected to the differential-mode resonant cavity 1 and provides negative resistance; the injection unit 3 is connected to the differential-mode resonant cavity 1 and converts the fundamental signal and the third harmonic signal into a third harmonic component; the second oscillator unit 4 is connected to the fourth-order resonant cavity 5 and provides negative resistance; the fourth-order resonant cavity 5 is connected between the second oscillator unit 4 and the injection unit 3 and couples the third harmonic component for output.

[0077] In this embodiment, the differential-mode resonant cavity 1 and the first oscillator unit 2 constitute an F23 type oscillator, and the injection unit 3, the second oscillator unit 4, and the fourth-order resonant cavity 5 constitute an injection-locked circuit. The differential-mode resonant cavity 1 can generate a fundamental signal and a third harmonic signal. The first oscillator unit 2 can provide negative resistance to maintain continuous oscillation of the oscillator. The second oscillator unit 4 can provide negative resistance, thereby enabling the injection-locked circuit to generate free oscillation even without an input signal. The signal output by the differential-mode resonant cavity 1 includes a fundamental signal and a third harmonic signal. The fundamental signal is converted into a third harmonic component after frequency doubling by the injection unit 3, while the third harmonic signal is directly injected and amplified by the injection unit 3. The third harmonic component generated by the injection unit 3 is further output by the fourth-order resonant cavity 5, which can improve phase noise performance. In this way, the third harmonic current component output by the injection unit 3 is the superposition effect of the fundamental signal and the third harmonic signal conversion, which can increase the injection current, improve the injection efficiency, and eliminate the need for an additional capacitor array. This improves the phase noise performance and energy efficiency of the W-band local oscillator, and realizes low power consumption and low noise local oscillator signal output to meet the needs of high-speed communication.

[0078] In some embodiments, such as Figure 2 and Figure 3 As shown, the differential mode resonant cavity 1 includes: a first inductor L1, a second inductor L2, a third inductor L3, a fourth inductor L4, a fifth inductor L5, a sixth inductor L6, a first capacitor C1, and a second capacitor C2. One end of the first inductor L1 is connected to one end of the second inductor L2, and the other end of the first inductor L1 is connected to the first oscillator unit 2. The other end of the second inductor L2 is also connected to the first oscillator unit 2. One end of the third inductor L3 is connected to one end of the fourth inductor L4, and the other end of the third inductor L3 is connected to both the first oscillator unit 2 and the injection unit 3. The other end of the fourth inductor L3 is also connected to both the first oscillator unit 2 and the injection unit 3. One end of the fifth inductor L5 is connected to one end of the sixth inductor L6. The first capacitor C1 is connected between the other ends of the fifth inductor L5 and the sixth inductor L6. The second inductor L2 is connected between the other ends of the first inductor L1 and the second inductor L2. The common terminal of the first inductor L1 and the second inductor L2 is connected to a first bias voltage VB1. The common terminal of the third inductor L3 and the fourth inductor L4 is connected to a first power supply voltage VDD. VCO1 .

[0079] In this embodiment, the first inductor L1, the second inductor L2, the third inductor L3, the fourth inductor L4, the fifth inductor L5, and the sixth inductor L6 constitute a first transformer. The first inductor L1, the second inductor L2, the third inductor L3, and the fourth inductor L4 are mutually coupled with a coupling coefficient equal to K12; the third inductor L3, the fourth inductor L4, the fifth inductor L5, and the sixth inductor L6 are mutually coupled with a coupling coefficient equal to K23; and the first inductor L1, the second inductor L2, the fifth inductor L5, and the sixth inductor L6 are mutually coupled with a coupling coefficient equal to K13. The first capacitor C1 is a gate capacitor, and the second capacitor C2 is a drain capacitor. The first transformer, the first capacitor C1, and the second capacitor C2 constitute the differential-mode resonant cavity 1. By rationally designing the coupling coefficient of the differential-mode resonant cavity 1, the first resonant point of the differential-mode resonant cavity 1 can be designed at the fundamental frequency of the oscillator, and the second and third resonant points of the differential-mode resonant cavity 1 can be designed near the third harmonic of the oscillator. That is, the input impedance ZIN has an impedance peak near the first harmonic and a broadened double-peak impedance near the third harmonic. There is no need for additional capacitor array to tune the impedance peak position, which prevents the noise caused by the low Q value of this part of the capacitor array and optimizes the phase noise.

[0080] Furthermore, the differential-mode resonant cavity 1 further includes: a third capacitor C3, a fourth capacitor C4, and a switched capacitor array; one end of the third capacitor C3 is connected to one end of the fourth capacitor C4, and the other end of the third capacitor C3 is connected to the other end of the first inductor L1; the other end of the fourth capacitor C4 is connected to the other end of the second inductor L2; the common terminal of the third capacitor C3 and the fourth capacitor C4 is connected to a first control voltage VC1; one end of the switched capacitor array Ca is connected to the other end of the first inductor L1, and the other end of the switched capacitor array Ca is connected to the other end of the second inductor L2.

[0081] In this embodiment, the third capacitor C3 and the fourth capacitor C4 are gate capacitors. By adding the third capacitor C3, the fourth capacitor C4, and the switched capacitor array Ca to the differential mode resonant cavity 1, the tuning range of the differential mode resonant cavity 1 can be widened. The third capacitor C3 and the fourth capacitor C4 are controlled by the first control voltage VC1.

[0082] In some embodiments, such as Figure 2As shown, the first oscillator unit 2 includes: a first MOS transistor M1 and a second MOS transistor M2; the gate of the first MOS transistor M1 is connected to the other end of the second inductor L2, the drain of the first MOS transistor M1 is connected to the other end of the third inductor L3, and the source of the first MOS transistor M1 is connected to the common-mode resonant cavity 6.

[0083] In this embodiment, the first MOSFET M1 and the second MOSFET M2 are cross-coupled, which can provide negative resistance to maintain the continuous oscillation of the oscillator.

[0084] In some embodiments, such as Figure 1 and Figure 2 As shown, the injection-locked frequency multiplier circuit also includes a common-mode resonant cavity 6, which is connected to the first oscillator unit 2. The common-mode resonant cavity 6 is used to extend the common-mode resonant bandwidth.

[0085] In some embodiments, such as Figure 2 and Figure 4 As shown, the common-mode resonant cavity 6 includes: a seventh inductor L7, an eighth inductor L8, a fifth capacitor C5, and a sixth capacitor C6. One end of the seventh inductor L7 is connected to one end of the eighth inductor L8 and the source of the second MOSFET M2; the other end of the seventh inductor L7 is connected to one end of the fifth capacitor C5, and the other end of the fifth capacitor C5 is grounded. One end of the eighth inductor L8 is also connected to the source of the first MOSFET M1, and the other end of the eighth inductor L8 is grounded. One end of the sixth capacitor C6 is connected to the source of the second MOSFET M2, and the other end of the sixth capacitor C6 is grounded.

[0086] In this embodiment, the seventh inductor L7 and the eighth inductor L8 constitute a second transformer, wherein the coupling coefficient between the seventh inductor L7 and the eighth inductor L8 is KCM. The second transformer, the fifth capacitor C5, and the sixth capacitor C6 constitute a common-mode resonant cavity 6, i.e., the head resonant cavity. By reasonably designing the coupling coefficient between the seventh inductor L7 and the eighth inductor L8, the common-mode resonant bandwidth can be extended without manual tuning of the second harmonic. In other words, a broadened double-peak input impedance can be achieved near the second harmonic, thereby improving phase noise performance.

[0087] In some embodiments, such as Figure 2As shown, the injection unit 3 includes: a seventh capacitor C7, an eighth capacitor C8, a first resistor R1, a second resistor R2, a third MOS transistor M3, and a fourth MOS transistor M4. In this configuration, one end of the seventh capacitor C7 is connected to the common terminal of the drain of the first MOSFET M1 and the other end of the third inductor L3, and the other end of the seventh capacitor C7 is connected to the gate of the third MOSFET M3; one end of the eighth capacitor C8 is connected to the common terminal of the drain of the second MOSFET M2 and the other end of the fourth inductor L4, and the other end of the eighth capacitor C8 is connected to the gate of the fourth MOSFET M4; one end of the first resistor R1 is connected to the second bias voltage VB2, and the other end of the first resistor R1 is connected to the gate of the third MOSFET M3; one end of the second resistor R2 is connected to the second bias voltage VB2, and the other end of the second resistor R2 is connected to the gate of the fourth MOSFET M4; the drain of the third MOSFET M3 is connected to the fourth-order resonant cavity 5, and the source of the third MOSFET M3 is grounded; the drain of the fourth MOSFET M4 is connected to the fourth-order resonant cavity 5, and the source of the fourth MOSFET M4 is grounded.

[0088] In this embodiment, the seventh capacitor C7 and the eighth capacitor C8 are gate capacitors, capable of isolating DC signals. The first resistor R1 and the second resistor R2 are gate resistors, capable of providing bias voltage for the input signals to the third MOSFET M3 and the fourth MOSFET M4. The third MOSFET M3 and the fourth MOSFET M4 serve as injection transistors, capable of converting the fundamental signal and the third harmonic signal into third harmonic current components and injecting them into the fourth-order resonant cavity 5.

[0089] In some embodiments, such as Figure 2 and Figure 5 As shown, the fourth-order resonant cavity 5 includes: a ninth inductor L9, a tenth inductor L10, an eleventh inductor L11, a twelfth inductor L12, a ninth capacitor C9, a tenth capacitor C10, an eleventh capacitor C11, and a twelfth capacitor C12. One end of the ninth inductor L9 is connected to the second oscillator unit 4, and one end of the tenth inductor L10 is also connected to the second oscillator unit 4. The common terminal of the other ends of the ninth inductor L9 and the tenth inductor L10 is connected to the second power supply voltage VDD. VCO2One end of the eleventh inductor L11 is connected to the drain of the third MOSFET M3, and the other end of the eleventh inductor L11 is connected to the third power supply voltage VDDinj; one end of the twelfth inductor L12 is connected to the drain of the fourth MOSFET M4, and the other end of the twelfth inductor L12 is connected to the third power supply voltage VDDinj; one end of the ninth capacitor C9 is connected to one end of the tenth capacitor C10, and the other end of the ninth capacitor C9 is connected to the second oscillator unit 4; the other end of the tenth capacitor C10 is connected to the second oscillator unit 4; the common terminal of the other end of the ninth capacitor C9 and one end of the tenth capacitor C10 is connected to the second control voltage VC2; one end of the eleventh capacitor C11 is connected to one end of the twelfth capacitor C12, and the other end of the eleventh capacitor C11 is connected to one end of the eleventh inductor L11, and the other end of the twelfth capacitor C12 is connected to the other end of the twelfth inductor L12.

[0090] In this embodiment, the ninth inductor L9, the tenth inductor L10, the eleventh inductor L11, and the twelfth inductor L12 constitute a third transformer, which forms a fourth-order resonant cavity 5. The coupling coefficient between the ninth inductor L9, the tenth inductor L10, and the eleventh inductor L11 and the twelfth inductor L12 is equal to KSP. In the design of the fourth-order resonant cavity 5, the two resonant points are designed near the third harmonic frequency to ensure that the injection-locked tripler oscillates freely near the third harmonic frequency. This results in a broadened double-peak input impedance near the third harmonic, achieving bandwidth expansion. The phase flattening near the third harmonic frequency also expands the locking range and ensures input-locked output enhancement of the third harmonic signal. The ninth capacitor C9, tenth capacitor C10, eleventh capacitor C11 and twelfth capacitor C12 can further widen the tuning range. When the injection range shifts due to changes in PVT (i.e., process, voltage, temperature), it can be compensated by fine-tuning the capacitors.

[0091] In some embodiments, such as Figure 2 As shown, the second oscillator unit 4 includes a fifth MOSFET M5 and a sixth MOSFET M6. The gate of the fifth MOSFET M5 is connected to one end of the tenth inductor L10, the drain of the fifth MOSFET M5 is connected to one end of the ninth inductor L9, and the source of the fifth MOSFET M5 is grounded. The gate of the sixth MOSFET M6 is connected to one end of the ninth inductor L9, the drain of the sixth MOSFET M6 is connected to one end of the tenth inductor L10, and the source of the sixth MOSFET M6 is grounded to VSS.

[0092] In this example, the fifth MOSFET M5 and the sixth MOSFET M6 are poorly coupled transistors, providing negative resistance, which allows the injection-locked circuit to oscillate freely even without an injection signal. Therefore, the third MOSFET M3, the fourth MOSFET M4, the fifth MOSFET M5, and the sixth MOSFET M6 are supplied with separate power supply voltages.

[0093] In some embodiments, such as Figure 2 and Figure 8 As shown, the ninth inductor L9, the tenth inductor L10, the eleventh inductor L11 and the twelfth inductor L12 constitute the third transformer; the third transformer is constructed from top to bottom through the first metal layer 7, the second metal layer 8 and the first aluminum layer 9.

[0094] In this embodiment, the transformer refers to an on-chip transformer, which typically consists of multiple turns of inductors. The current inside each turn of the inductor generates magnetic flux, and the magnetic flux between the turns is coupled, resulting in current changes. The inductors are composed of metal layers. By rationally designing the layout parameters such as the number of turns, linewidth, and spacing of the inductors, the mutual inductance and coupling coefficient, quality factor, parasitic parameters, and area between the inductors can be controlled to meet the requirements of specific RF modules. The coil of the third transformer is implemented using a first metal layer 7 (a metal layer under the TSMC 65nm process) and a first aluminum layer 9 (an aluminum metal layer under the TSMC 65nm process). This reduces the Q value and increases the lock-in range. By placing a second metal layer 8 between the first metal layer and the first aluminum layer, a smaller coupling coefficient KSP can be obtained, thereby achieving a flat in-band phase change and expanding the lock-in range.

[0095] In some embodiments, such as Figure 2 and Figure 8 As shown, the first inductor L1, the second inductor L2, the third inductor L3, the fourth inductor L4, the fifth inductor L5, and the sixth inductor L6 constitute the first transformer; the seventh inductor L7 and the eighth inductor L8 constitute the second transformer. The first power supply voltage VDD VCO1 The first transformer and the second transformer form an L-shaped configuration by tapping downwards from the center taps of the third inductor L3 and the fourth inductor L4, and connecting them close to the eighth inductor L8. This shortens the first power supply voltage VDD. VCO1 The return path of the voltage to ground can be optimized to improve phase noise. For example... Figure 9 As shown, the coils of the first transformer and the second transformer are composed of a third metal layer 10, a fourth metal layer 11 and a second aluminum layer 12.

[0096] The design principle of the injection-locked frequency multiplier circuit is explained below:

[0097] The first stage involves designing the first resonant point of the differential-mode resonant cavity at the target frequency of the oscillator, and designing the second and third resonant points near the third frequency of the oscillator. By simulating the input impedance, the inductance values ​​of the first inductor L1, second inductor L2, third inductor L3, fourth inductor L4, fifth inductor L5, and sixth inductor L6, as well as the capacitance values ​​of the first capacitor C1 and second capacitor C2, are determined. The coupling coefficients K12, K13, and K23 in the first transformer are also determined to achieve the effect of broadening the input impedance near the third frequency. Figure 6 As shown.

[0098] Figure 6 The simulation results of the differential-mode resonant cavity input impedance provided in the embodiments of the present invention can be found in [link to relevant documentation]. Figure 6 The resonant cavity composed of a transformer and a capacitor has high-order characteristics and can generate three resonant points. The first resonant point of the differential mode resonant cavity is designed at the fundamental frequency of the oscillator, 22.23-25.8 GHz, and the second and third resonant points are designed near the third frequency of the oscillator, 66.7-77.4 GHz.

[0099] Figure 7 The simulation results of the common-mode resonant cavity input impedance provided in the embodiments of the present invention can be found in [link to relevant documentation]. Figure 7 The common-mode resonant cavity of the oscillator also has high-order characteristics and can generate two resonant points. When designing the common-mode resonant cavity, the two resonant points of the common-mode resonant cavity are designed to be near the second frequency of the oscillator, 50 GHz.

[0100] Second stage: Based on the inductance, capacitance, and coupling coefficients mentioned above, draw the following diagram: Figure 8 and Figure 9 The inductor and capacitor layouts shown are used for post-simulation.

[0101] Figure 8 This is an inductor structure layout provided in an embodiment of the present invention; such as Figure 8 As shown. Between the first transformer and the second transformer, the supply voltage is connected downwards from the center tap of the third inductor L3 and the fourth inductor L4, close to the layout of the eighth inductor L8. The first transformer and the second transformer form an "L" shaped layout, which shortens the return path from VDD to VSS.

[0102] Figure 9 This is a layout diagram of a fourth-order resonant cavity inductor structure provided in an embodiment of the present invention. For example... Figure 9 As shown, the third transformer coil is implemented through the first metal layer and the first aluminum layer, which reduces the Q value and increases the locking range. The first metal layer and the first aluminum layer are separated by a second metal layer, which can obtain a smaller coupling coefficient KSP, thereby obtaining a flat in-band phase change.

[0103] Figure 10 These are the simulation results of the fourth-order input impedance and phase of the resonant cavity provided in the embodiments of the present invention. Figure 10 As shown, the two resonant points of the fourth-order resonant cavity are designed near the third harmonic frequency, ensuring that the injection-locked tripler oscillates freely near the third harmonic frequency. Near the third harmonic, there is a broadened double-peaked input impedance, achieving bandwidth extension. Phase flattening near the third harmonic frequency also extends the bandwidth. The locking range of the injection-locked tripler is 66.3-77 GHz, within which the phase is flat with only ±3° phase variation.

[0104] Figure 11 This is the frequency adjustment range curve of the injection-locked frequency multiplier circuit provided in the embodiment of the present invention. For example... Figure 11 As shown, continuous frequency adjustment from 22.23 to 25.8 GHz can be achieved.

[0105] Figure 12 The graphs show the phase noise versus frequency of the injection-locked frequency multiplier circuit provided in this embodiment of the invention at frequency offsets of 100kHz, 1MHz, and 10MHz. Figure 12 As shown, the lowest phase noise reaches 85.38 dBc / Hz at a frequency offset of 100 kHz, 109.76 dBc / Hz at a frequency offset of 1 MHz, and 130.84 dBc / Hz at a frequency offset of 10 MHz. Figure 13 This is the output amplitude curve of the injection-locked frequency multiplier circuit provided in the embodiment of the present invention. For example... Figure 13 As shown, the amplitude of the first harmonic at 25.5GHz is 550mV, the amplitude of the third harmonic is 200mV, and the third harmonic is injected and locked to output an amplitude of 400mV at 76.5GHz. The injected and locked frequency multiplier circuit can output the W-band with high energy efficiency.

[0106] In some embodiments, the present invention also provides a phase-locked loop, which includes the injection-locked frequency multiplier circuit as described above. Specific embodiments of the injection-locked frequency multiplier circuit are described in detail here.

[0107] In summary, the injection-locked frequency multiplier circuit with an oscillator provided by the present invention has the following beneficial effects:

[0108] By generating a wide input impedance peak near the third frequency through a transformer, the third harmonic is widened without tuning. This allows tuning only the fundamental frequency within a large frequency tuning range while maintaining a large third component amplitude, avoiding noise degradation caused by Q degradation, and reducing the conversion of noise into phase noise caused by additional capacitor tuning arrays.

[0109] In the design of the head resonator, the second transformer, the fifth capacitor, and the sixth capacitor form an F23 type head resonator. The head resonator is used to extend the common-mode resonant bandwidth, eliminating the need for manual tuning of the second harmonic and avoiding noise degradation caused by Q value deterioration. It has a broadened double-peak input impedance near the second harmonic, preventing the cross-coupled transistor from loading the energy storage circuit when entering the resonant region, and improving phase noise performance by suppressing flicker noise during up-conversion.

[0110] Transformer T1 and transformer T2 form an "L" shaped layout, which shortens the return path from VDD to VSS and optimizes phase noise;

[0111] The T3 turns of the transformer are achieved through M8 and AP respectively, which reduces the Q value and increases the locking range. M9 is separated from M8 and AP to obtain a smaller KSP value, obtain a flat in-band phase change, and expand the locking range.

[0112] The third harmonic output from the drain of the oscillator is directly injected into the injection-locked tripler, which increases the injection current and improves the injection efficiency.

[0113] The drain output of the oscillator contains the fundamental frequency signal and the third harmonic. The fundamental frequency signal is injected and locked to be multiplied for output, and the third harmonic is injected and locked to be directly amplified for output. The third harmonic of the F23 type VCO is extracted. The injection-locked third frequency multiplier can output the W-band local oscillator signal with high energy efficiency.

[0114] It should be understood that the application of the present invention is not limited to the examples above. Those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.

Claims

1. An injection-locked frequency multiplier circuit with an oscillator, characterized in that, include: Differential-mode resonant cavity used to generate fundamental and third harmonic signals; A first oscillator unit, connected to the differential-mode resonant cavity, is used to provide negative resistance; An injection unit is connected to the differential mode resonant cavity, and the injection unit is used to convert the fundamental signal and the third harmonic signal into third harmonic components; A fourth-order resonant cavity is connected to the injection unit and is used to couple the third harmonic component out. The second oscillator unit, connected to the fourth-order resonant cavity, is used to provide negative resistance; The differential mode resonant cavity includes: a first inductor, a second inductor, a third inductor, a fourth inductor, a fifth inductor, a sixth inductor, a first capacitor, and a second capacitor; One end of the first inductor is connected to one end of the second inductor, the other end of the first inductor is connected to the first oscillator unit, and the other end of the second inductor is connected to the first oscillator unit; One end of the third inductor is connected to one end of the fourth inductor, and the other end of the third inductor is connected to the first oscillator unit and the injection unit, respectively. The other end of the fourth inductor is connected to the first oscillator unit and the injection unit, respectively. One end of the fifth inductor is connected to one end of the sixth inductor; The first capacitor is connected between the other end of the fifth inductor and the other end of the sixth inductor; The second inductor is connected between the other end of the first inductor and the other end of the second inductor; The common terminal of the first inductor and the second inductor is connected to a first bias voltage; the common terminal of the third inductor and the fourth inductor is connected to a first power supply voltage.

2. The injection-locked frequency multiplier circuit with an oscillator according to claim 1, characterized in that, It also includes a common-mode resonant cavity, which is connected to the first oscillator unit and is used to extend the common-mode resonant bandwidth.

3. The injection-locked frequency multiplier circuit with an oscillator according to claim 2, characterized in that, Differential mode resonant cavity It also includes: a third capacitor, a fourth capacitor, and a switched capacitor array; One end of the third capacitor is connected to one end of the fourth capacitor, and the other end of the third capacitor is connected to the other end of the first inductor; The other end of the fourth capacitor is connected to the other end of the second inductor; The common terminal of the third capacitor and the fourth capacitor is connected to the first control voltage; One end of the switched capacitor array is connected to the other end of the first inductor, and the other end of the switched capacitor array is connected to the other end of the second inductor.

4. The injection-locked frequency multiplier circuit with an oscillator according to claim 3, characterized in that, The first oscillator unit includes: a first MOSFET and a second MOSFET; The gate of the first MOS transistor is connected to the other end of the second inductor, the drain of the first MOS transistor is connected to the other end of the third inductor, and the source of the first MOS transistor is connected to the common-mode resonant cavity.

5. The injection-locked frequency multiplier circuit with an oscillator according to claim 4, characterized in that, The common-mode resonant cavity includes: a seventh inductor, an eighth inductor, a fifth capacitor, and a sixth capacitor; wherein... One end of the seventh inductor is connected to one end of the eighth inductor and the source of the second MOS transistor, and the other end of the seventh inductor is connected to one end of the fifth capacitor, and the other end of the fifth capacitor is grounded. One end of the eighth inductor is also connected to the source of the first MOS transistor, and the other end of the eighth inductor is grounded; One end of the sixth capacitor is connected to the source of the second MOS transistor, and the other end of the sixth capacitor is grounded.

6. The injection-locked frequency multiplier circuit with an oscillator according to claim 4, characterized in that, The injection unit includes: a seventh capacitor, an eighth capacitor, a first resistor, a second resistor, a third MOSFET, and a fourth MOSFET; wherein, One end of the seventh capacitor is connected to the common terminal of the drain of the first MOS transistor and the other end of the third inductor, and the other end of the seventh capacitor is connected to the gate of the third MOS transistor. One end of the eighth capacitor is connected to the common terminal of the drain of the second MOS transistor and the other end of the fourth inductor, and the other end of the eighth capacitor is connected to the gate of the fourth MOS transistor. One end of the first resistor is connected to the second bias voltage, and the other end of the first resistor is connected to the gate of the third MOS transistor. One end of the second resistor is connected to a second bias voltage, and the other end of the second resistor is connected to the gate of the fourth MOS transistor. The drain of the third MOS transistor is connected to the fourth-order resonant cavity, and the source of the third MOS transistor is grounded. The drain of the fourth MOS transistor is connected to the fourth-order resonant cavity, and the source of the fourth MOS transistor is grounded.

7. The injection-locked frequency multiplier circuit with an oscillator according to claim 6, characterized in that, The fourth-order resonant cavity includes: a ninth inductor, a tenth inductor, an eleventh inductor, a twelfth inductor, a ninth capacitor, a tenth capacitor, an eleventh capacitor, and a twelfth capacitor; wherein, One end of the ninth inductor is connected to the second oscillator unit, one end of the tenth inductor is connected to the second oscillator unit, and the other end of the ninth inductor and the common terminal of the other end of the tenth inductor are connected to the second power supply voltage. One end of the eleventh inductor is connected to the drain of the third MOS transistor, and the other end of the eleventh inductor is connected to the third power supply voltage. One end of the twelfth inductor is connected to the drain of the fourth MOS transistor, and the other end of the twelfth inductor is connected to the third power supply voltage; One end of the ninth capacitor is connected to one end of the tenth capacitor, and the other end of the ninth capacitor is connected to the second oscillator unit; The other end of the tenth capacitor is connected to the second oscillator unit; The other end of the ninth capacitor and the common terminal of one end of the tenth capacitor are connected to the second control voltage; One end of the eleventh capacitor is connected to one end of the twelfth capacitor, the other end of the eleventh capacitor is connected to one end of the eleventh inductor, and the other end of the twelfth capacitor is connected to the other end of the twelfth inductor.

8. The injection-locked frequency multiplier circuit with an oscillator according to claim 7, characterized in that, The ninth inductor, the tenth inductor, the eleventh inductor, and the twelfth inductor constitute the third transformer; the third transformer is constructed from top to bottom through the first metal layer, the second metal layer, and the first aluminum layer.

9. The injection-locked frequency multiplier circuit with an oscillator according to claim 7, characterized in that, The second oscillator unit includes: a fifth MOSFET and a sixth MOSFET; The gate of the fifth MOS transistor is connected to one end of the tenth inductor, the drain of the fifth MOS transistor is connected to one end of the ninth inductor, and the source of the fifth MOS transistor is grounded. The gate of the sixth MOS transistor is connected to one end of the ninth inductor, the drain of the sixth MOS transistor is connected to one end of the tenth inductor, and the source of the sixth MOS transistor is grounded.

10. The injection-locked frequency multiplier circuit with an oscillator according to claim 5, characterized in that, The first inductor, the second inductor, the third inductor, the fourth inductor, the fifth inductor, and the sixth inductor constitute the first transformer; the seventh inductor and the eighth inductor constitute the second transformer; the first power supply voltage is connected downward from the center tap of the third inductor and the fourth inductor and is close to the eighth inductor, and the first transformer and the second transformer form an L-shaped layout.

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