A high linearity switching circuit and a control method thereof

Abstract

The application belongs to the technical field of analog integrated circuits, and discloses a high-linearity switching circuit and a control method thereof.The circuit comprises a voltage-boosting circuit, a battery voltage monitoring module, a comparator, a control module and a cross-coupled circuit, the power supply voltage is monitored, and the charge pump is started to boost when the voltage is lower than a preset value, so that a stable gate control voltage is provided for the switching tube, and the linearity of the switching tube working in a deep linear region is ensured;an intermittent monitoring and fast output voltage establishment mechanism is adopted, so that the system power consumption is significantly reduced, the battery life is prolonged, and the application is suitable for long-term working measurement systems such as sensors, flow meters and the like.The application has the advantages of high linearity, low power consumption, fast response speed and the like.

Description

Technical Field

[0001] This invention relates to the field of switch circuit design and control technology, and in particular to a high linearity switch circuit and its control method. Background Technology

[0002] Switching transistors are essential key components in modern electronic technology. Taking an NMOS switching transistor as an example, its sampling circuit is as follows: Figure 4 As shown, its on-resistance in the deep linear region is given by the following formula.

[0003]

[0004] Among them, C s For sampling capacitor, R on u is the on-resistance of the sampling switch. n C ox These are process parameters, where W / L is the pipe width-to-length ratio, and V... thn V is the threshold voltage of the tube. GS Vgate - Vin is the gate-source voltage, calculated by subtracting the input sampling signal from the switch gate voltage. To reduce the correlation between the transistor's on-resistance and the input voltage, and to improve the linearity of the switch, several common methods are as follows:

[0005] Increasing the width-to-length ratio of the switching transistor reduces the on-resistance, thereby reducing the impact of VGS on the switching linearity.

[0006] To ensure a sufficiently high VGS voltage, the on-resistance value is reduced, thereby minimizing the impact of VGS on switching linearity. There are two main methods for this:

[0007] (1) Bootstrapping switch, which bootstraps the gate voltage of the switching transistor to VDD+Vin through Charge Pump, so that VGS=VDD, which is large enough and independent of the input signal, thus improving the sampling accuracy.

[0008] (2) Boosting circuit, (e.g., patent CN108696118 A, e.g.) Figure 2 As shown, it generates an output voltage that is close to twice the input voltage through a charge pump circuit and a maximum voltage selection circuit. Then, it compares this voltage with the default voltage and outputs the larger one as the gate voltage to control the NMOS switch.

[0009] However, while increasing the aspect ratio of the switching transistor can reduce on-resistance and improve linearity, an excessively large aspect ratio can also increase layout area, coupling, charge injection, and clock feedthrough effects, thereby reducing sampling accuracy.

[0010] For multi-channel weak or small signal sampling systems, the design complexity of bootstrap switch schemes increases dramatically, which also increases the layout area and system power consumption.

[0011] For booster circuit solutions, such as Figure 2 In the voltage boosting circuit scheme shown, the power consumption is relatively high because it requires real-time comparison of the two voltage magnitudes. For measurement systems operating for extended periods, this will reduce their lifespan; for example... Figure 3 In the illustrated booster circuit scheme, the voltage is determined by the larger of the power supply voltage VDD2 output by the cross-coupled PMOS transistor and the booster circuit output voltage Vpa (node ​​Pa voltage). However, if the voltage difference between the two is not particularly large, when the output voltage VOUT is established close to or less than a threshold voltage that the cross-coupled PMOS transistor eventually stabilizes, subsequent P3 and P4 transistors will gradually enter the subthreshold or even cutoff region. Therefore, the output voltage VOUT will establish very slowly, reducing the system response speed and increasing the system's standby power consumption. Summary of the Invention

[0012] The purpose of this invention is to solve the problem of reduced battery voltage and decreased linearity of sampling switch over time in long-term operating systems (such as temperature, gas, and fluid flow meters).

[0013] The purpose of this invention is to monitor whether the power supply voltage is lower than a preset default value. If it is, a charge pump is activated to boost the voltage and output it, ensuring that the gate control voltage of the MOSFET meets the linearity requirements of the MOSFET switch. Simultaneously, the fast output voltage establishment circuit design and gap measurement system control process reduce system power consumption and improve lifespan.

[0014] To achieve the above objectives, the technical solution of the present invention is a high linearity switching circuit, which includes the following parts:

[0015] The boost circuit is connected to the power supply output and is mainly used to increase the output voltage when the power supply voltage is lower than a preset value.

[0016] The battery voltage monitoring module is connected to the cross-coupled circuit to monitor the power supply voltage in the cross-coupled circuit and output the monitoring voltage to the comparator.

[0017] The comparator receives the monitoring voltage output by the battery voltage monitoring module, compares the monitoring voltage with a reference voltage, and outputs the comparison result to the control module.

[0018] The control module generates control signals and clock signals based on the comparison results;

[0019] A cross-coupling circuit is used to quickly establish the output voltage and select the output power supply voltage or the boost circuit output voltage according to the control signal.

[0020] The battery voltage monitoring module is a resistor voltage divider circuit used to output a monitoring voltage that is proportional to the power supply voltage.

[0021] The positive input of the comparator is connected to the monitored voltage, and the negative input is connected to a preset reference voltage.

[0022] The control module generates control signals EN and ENB, as well as clock signals CLK1 and CLK2, based on the comparison results output by the comparator.

[0023] The cross-coupling circuit includes a first PMOS transistor (P3), a second PMOS transistor (P4), a third PMOS transistor (P5), a first NMOS transistor (N3), and a second NMOS transistor (N4), which are used to quickly establish the output voltage under the action of the control signal.

[0024] When the control signal EN is low and ENB is high, the cross-coupled circuit outputs power supply voltage VDD2; when the control signal EN is high and ENB is low, the output voltage of the boost circuit is output.

[0025] The control module shuts off the clock signal after the output voltage is established to reduce power consumption.

[0026] A control method for the aforementioned high linearity switching circuit includes the following steps:

[0027] Step 1: Monitor the power supply voltage and generate a monitoring voltage;

[0028] Step two: Compare the monitored voltage with the reference voltage and generate the comparison result;

[0029] Step 3: Generate control signals and clock signals based on the comparison results;

[0030] Step 4: Select the output power supply voltage or the boost circuit output voltage through the cross-coupling circuit;

[0031] Step 5: After the output voltage is established, turn off the monitoring and boosting circuit to save power.

[0032] The power supply voltage is monitored by a resistor voltage divider.

[0033] Compared with the prior art, the present invention has the following beneficial effects:

[0034] 1. The high linearity switch disclosed in this invention can be flexibly and accurately designed to receive the minimum gate control voltage of the switching transistor through a battery voltage detection circuit (such as a resistor voltage divider tap).

[0035] 2. This invention greatly saves system power consumption through intermittent monitoring;

[0036] 3. This invention accelerates the establishment of output voltage and system response through circuit design, shortens unnecessary waiting time, speeds up system response, and further saves power consumption. Attached Figure Description

[0037] Figure 1 This is a circuit diagram of a high linearity switching circuit according to the present invention;

[0038] Figure 2 This is a circuit diagram of a prior art booster circuit described in this invention;

[0039] Figure 3 This is a circuit diagram of a prior art booster circuit described in this invention;

[0040] Figure 4 This is a circuit diagram of the NMOS switching circuit described in this invention;

[0041] Figure 5 This is a control flowchart of a control method described in this invention;

[0042] Figure 6 This is the prior art described in this invention (red, VOUT). ori Waveform diagrams of the circuit of this invention (green, VOUT);

[0043] Figure 7 This is the prior art described in this invention (red, VOUT). ori A partial magnified view of the waveforms of the circuit of the present invention (green, VOUT);

[0044] Figure 8 The sampling output voltage Vsample described in this invention out Waveform diagram (green solid line). Detailed Implementation

[0045] The inventive points and embodiments of the present invention will now be described in detail with reference to the accompanying drawings:

[0046] The inventive point of this invention is as follows:

[0047] 1. The present invention can use the battery (power supply) voltage detection circuit (such as a resistor voltage divider tap) to accurately and flexibly design a circuit that can receive the minimum gate control voltage of the switching transistor according to the actual system design requirements.

[0048] 2. The intermittent monitoring and control process design of this invention greatly saves system power consumption;

[0049] 3. This invention features a PMOS cross-coupled circuit design that can quickly switch and establish the output voltage. Figure 3 Based on the cross-coupled circuit formed by transistors P3 and P4, a controlled module adds PMOS transistor P5, and NMOS transistors N3 and N4. When the control circuit selects the power supply voltage VDD2 as the output, the control circuit sets EN to low and ENB to high (VDD2), thus turning off N4 and turning on P5. The gate of P4 (node ​​Pa) is pulled low through N3, keeping P4 in a continuous conducting state and accelerating the establishment of the output voltage. Conversely, when the control circuit selects the boost circuit output, EN is set high (VDD2) and ENB is low (low level), thus turning off P5 and turning on N4. The gate of P3 (node ​​Pb) is pulled low through N4, keeping P3 in a continuous conducting state and accelerating the establishment of the output voltage.

[0050] Example 1;

[0051] A high linearity switching circuit, as described in this invention application, is a high linearity switching circuit (i.e., a switching transistor gate control voltage generation circuit) as follows: Figure 1 As shown, based on the boost circuit (Charge pump + cross-coupled PMOS), a battery voltage monitoring module, a comparator module, a control module, and a cross-coupled circuit for quickly establishing the output voltage are introduced. First, the battery voltage monitoring module monitors the input battery voltage VDD2 and outputs a voltage VMON proportional to VDD2. VMON is connected to the positive input of the comparator module, and the negative input is connected to a preset reference voltage VREF. The comparator compares and outputs the result CMP. CMP is used as the input signal to the control module. The control module then determines whether the battery voltage VDD2 is lower than a preset minimum battery voltage value based on the comparator result CMP, and generates corresponding control signals EN, ENB, and clock signals CLK1, CLK2, etc.

[0052] In this circuit, CLK1 and CLK2 are connected to the lower plates of capacitors C1 and C2 in the boost circuit, respectively. The output node Pa of the boost circuit is connected to the drains of transistors N3 and P3, and also to the gate of transistor P4. EN is used as the gate control voltage for transistors P5 and N4, and ENB is used as the gate control voltage for transistor N3. Through circuit design and control methods, even when the power supply voltage decreases over time, the design requirements for a high-linearity, low-power switching circuit can be met.

[0053] Example 2;

[0054] A control method, wherein the control flow for controlling the operation of a switching circuit is as follows: Figure 5 As shown;

[0055] Step 1: Initialization and battery voltage monitoring;

[0056] After the system is powered on, the battery voltage is monitored first. The power supply voltage monitoring circuit (such as a resistor voltage divider circuit) generates an output voltage VMON that is proportional to the battery voltage and compares it with the reference voltage VREF. The comparison result is then input to the control circuit.

[0057] Step 2: The control module makes decisions and outputs the gate control voltage of the switching transistor;

[0058] If the comparator output is high, it indicates that the battery voltage is higher than the preset value, and the boost circuit is not activated. At this time, the control circuit outputs remain at their default levels: control signal EN remains low; control signal ENB remains at the power supply voltage VDD2; clock output CLK1 remains high; and clock output CLK2 remains low. Meanwhile, transistor P5 is turned on, transistor N4 is turned off, and transistor N3 is turned on, pulling the voltage at node Pa to ground. Transistor P4 then turns on, and the output voltage VOUT is VDD2.

[0059] If the comparator output is low, it indicates that the battery voltage is lower than the preset value, and the boost circuit needs to be activated. At this time, the control circuit output signal EN is the power supply voltage VDD2, and ENB is low. CLK1 and CLK2 outputs are mutually inverted (non-overlapping) clock square wave signals; their high level represents VDD1, and their low level represents low voltage. At this time, transistor P5 is off, transistor N4 is on, and transistor N3 is off, pulling the node Pb voltage to ground, meaning the gate voltage of transistor P3 is at ground, thus turning on transistor P3. Simultaneously, CLK1 and CLK2 serve as input signals to the boost circuit. The voltage output from node Pa of the boost circuit (Charge Pump) is close to 2*VDD1, and the output voltage VOUT from transistor P3 is approximately 2*VDD1. The simulation waveform is as follows: Figure 6 and Figure 7 As shown. Once the output voltage has been established, turn off the clock to save power.

[0060] Here, the battery voltage detection circuit and comparator circuit are turned off after the control circuit samples the output result of the machine to save power.

[0061] Step 3: The sampling circuit begins operation;

[0062] by Figure 4Taking the load circuit shown as an example, after the gate control voltage VOUT of the switching transistor is established, the sampling switch enable signal sample_en can be set to a high level VDD2. This signal is then converted to VOUT via level shift and output to the NMOS switching transistor after passing through two inverters, serving as the gate voltage VOUT. The sampling circuit outputs Vsample_out (green, solid line). The simulated waveform is shown below. Figure 8 As shown.

[0063] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, the phrase "comprising an element defined as..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0064] The above technical solutions only embody the preferred technical solutions of the present invention. Any modifications that may be made by those skilled in the art to certain parts thereof embody the principles of the present invention and fall within the protection scope of the present invention.

Claims

1. A high linearity switching circuit, characterized in that, The circuit includes the following parts: A boost circuit is used to increase the output voltage when the power supply voltage is lower than a preset value. The battery voltage monitoring module is used to monitor the power supply voltage and output the monitored voltage. A comparator is used to compare the monitored voltage with a reference voltage and output the comparison result; The control module generates control signals and clock signals based on the comparison results; A cross-coupling circuit is used to quickly establish the output voltage and select the output power supply voltage or the boost circuit output voltage according to the control signal. The cross-coupling circuit includes a first PMOS transistor (P3), a second PMOS transistor (P4), a third PMOS transistor (P5), a first NMOS transistor (N3), and a second NMOS transistor (N4), which are used to quickly establish the output voltage under the action of the control signal; The cross-coupling circuit is based on the circuit composed of the first PMOS transistor (P3) and the second PMOS transistor (P4), with the addition of a third PMOS transistor (P5), a first NMOS transistor (N3), and a second NMOS transistor (N4) controlled by the control module. When the control module selects the power supply voltage VDD2 for output, the control module sets EN to low level and ENB to high level, thereby turning off the second NMOS transistor (N4) and turning on the third PMOS transistor (P5). The gate (node ​​Pa) of the second PMOS transistor (P4) is pulled low through the first NMOS transistor (N3), keeping the second PMOS transistor (P4) in a continuous conducting state and accelerating the establishment of the output voltage. Conversely, when the control module selects the boost circuit output, ... When EN is set to high (VDD2) and ENB is low, the third PMOS transistor (P5) is turned off and the second NMOS transistor (N4) is turned on. The gate (node ​​Pb) of the first PMOS transistor (P3) is pulled low through the second NMOS transistor (N4), so that the first PMOS transistor (P3) is always on, accelerating the establishment of the output voltage.

2. The switching circuit according to claim 1, characterized in that, The battery voltage monitoring module is a resistor voltage divider circuit used to output a monitoring voltage that is proportional to the power supply voltage.

3. The switching circuit according to claim 1, characterized in that, The positive input of the comparator is connected to the monitored voltage, and the negative input is connected to a preset reference voltage.

4. The switching circuit according to claim 1, characterized in that, The control module generates control signals EN and ENB, as well as clock signals CLK1 and CLK2, based on the comparison results output by the comparator.

5. The switching circuit according to claim 1, characterized in that, When the control signal EN is low and ENB is high, the cross-coupled circuit outputs power supply voltage VDD2; when the control signal EN is high and ENB is low, the output voltage of the boost circuit is output.

6. The switching circuit according to claim 1, characterized in that, The control module shuts off the clock signal after the output voltage is established to reduce power consumption.

7. A control method, characterized in that, This control method is capable of controlling the high linearity switching circuit according to any one of claims 1-6.

8. The control method according to claim 7, characterized in that, The method includes the following steps: Step 1: Monitor the power supply voltage and generate a monitoring voltage; Step two: Compare the monitored voltage with the reference voltage and generate the comparison result; Step 3: Generate control signals and clock signals based on the comparison results; Step 4: Select the output power supply voltage or the boost circuit output voltage through the cross-coupling circuit; Step 5: After the output voltage is established, turn off the monitoring and boosting circuit to save power.

9. The control method according to claim 7, characterized in that, The power supply voltage is monitored by a resistor voltage divider.

Images