IQ modulator bias voltage control system, computing device and laser radar

By generating perturbation signals using a photodetector and controller to adjust the bias voltage of the IQ modulator, the high cost problem in existing technologies is solved, and bias voltage control with simple structure and high efficiency is achieved.

CN121000302APending Publication Date: 2025-11-21HESAI TECH CO LTD
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Patent Information

Application Number
CN202410593681.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-05-13
Publication Date
2025-11-21

AI Technical Summary

Technical Problem

Existing IQ modulator bias voltage control systems are costly and difficult to effectively control the bias voltage of the IQ modulator to maintain it at the operating voltage.

Method used

The system, consisting of a photodetector, a bias voltage generator, and a controller, generates a perturbation signal and determines the bias voltage adjustment signal by detecting the electrical signal output by the IQ modulator, thereby achieving parallel adjustment of each bias voltage of the IQ modulator.

Benefits of technology

The structure of the IQ modulator bias voltage control system is simplified, the hardware requirements are reduced, the bias voltage adjustment efficiency is improved, and the cost is reduced.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present disclosure provides an IQ modulator bias voltage control system, a computing device and a laser radar, the IQ modulator bias voltage control system comprising: a photoelectric detector for detecting and outputting a first signal, the first signal being an electric signal obtained by converting a part of an optical signal output by an IQ modulator; the bias voltage generator is used for generating each bias voltage of the IQ modulator; and the controller is used for generating a first perturbation signal and a second perturbation signal, determining an adjustment signal of each bias voltage according to the first signal, the first perturbation signal and the second perturbation signal, adjusting each bias voltage by adopting the adjustment signal, and controlling the bias voltage generator to generate the adjusted bias voltage and transmit the adjusted bias voltage to the IQ modulator. According to the technical scheme, the bias voltage of the IQ modulator can be kept at the working voltage during modulation of the IQ modulator, and the cost of the control system is reduced.
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Description

Technical Field

[0001] This disclosure relates to the field of lidar, and more particularly to an IQ modulator bias voltage control system, a computing device, and lidar. Background Technology

[0002] Existing frequency-modulated continuous wave (FMCW) lidar emits multiple wavelengths of laser light for three-dimensional detection. Typically, in-phase and quadrature (IQ) modulators can simultaneously modulate the frequencies of multiple wavelengths. IQ modulators, made of lithium niobate, are highly sensitive to temperature and stress. The bias voltage of the IQ modulator changes in real time, causing variations in the frequency of the output optical signal. Therefore, controlling the IQ modulator to change its bias voltage in real time is crucial to maintaining the bias voltage at the operating voltage during modulation.

[0003] However, the control system for the bias voltage of the IQ modulator in the prior art is relatively expensive. Summary of the Invention

[0004] This disclosure enables the bias voltage of the IQ modulator to be maintained at the operating voltage during IQ modulation, and reduces the cost of the control system.

[0005] In a first aspect, embodiments of this disclosure provide an IQ modulator bias voltage control system, comprising: a photodetector for detecting and outputting a first signal, wherein the first signal is an electrical signal converted from a portion of the optical signal output by the IQ modulator; a bias voltage generator for generating various bias voltages of the IQ modulator; and a controller for generating a first perturbation signal and a second perturbation signal, determining an adjustment signal for each bias voltage based on the first signal, the first perturbation signal, and the second perturbation signal, adjusting each bias voltage using the adjustment signal, and controlling the bias voltage generator to generate the adjusted bias voltage and transmit it to the IQ modulator.

[0006] Optionally, the adjustment signal includes an adjustment direction and an adjustment magnitude, and the controller adjusts each bias voltage according to the adjustment direction and the adjustment magnitude.

[0007] Optionally, the frequencies of the first perturbation signal and the second perturbation signal are different. The controller determines the first amplitude and first phase of the signal in the first signal that has the same frequency as the first perturbation signal, the second amplitude and second phase of the signal in the first signal that has the same frequency as the second perturbation signal, and the third amplitude and third phase of the signal in the first signal that has the same frequency as the product signal of the first perturbation signal and the second perturbation signal.

[0008] Optionally, the controller includes: a first lock-in amplifier, the input of which is connected to the first signal and the first perturbation signal, and the output of which outputs the first amplitude and the first phase; a second lock-in amplifier, the input of which is connected to the first signal and the second perturbation signal, and the output of which outputs the second amplitude and the second phase; and a third lock-in amplifier, the input of which is connected to the first signal and the product of the first perturbation signal and the second perturbation signal, and the output of which outputs the third amplitude and the third phase.

[0009] Optionally, the controller includes: a first adjuster for adjusting a first bias voltage according to the first amplitude and the first phase, adjusting a second bias voltage according to the second amplitude and the second phase, and adjusting a third bias voltage according to the third amplitude and the third phase, wherein the first bias voltage, the second bias voltage, and the third bias voltage are bias voltages applied to the first sub-modulator, the second sub-modulator, and the third sub-modulator in the IQ modulator, respectively.

[0010] Optionally, the first regulator determines the adjustment direction of the first bias voltage based on the first phase and determines the adjustment amplitude of the first bias voltage as the first amplitude; the first regulator determines the adjustment direction of the second bias voltage based on the second phase and determines the adjustment amplitude of the second bias voltage as the second amplitude; the first regulator determines the adjustment direction of the third bias voltage based on the third phase and determines the adjustment amplitude of the third bias voltage as the third amplitude.

[0011] Optionally, the first lock-in amplifier determines the first I-channel signal and the first Q-channel signal after the first perturbation signal modulates the first signal, and determines the square root result of the sum of squares of the first I-channel signal and the first Q-channel signal as the first amplitude, and the phase difference between the first Q-channel signal and the first I-channel signal as the first phase; the second lock-in amplifier determines the second I-channel signal and the second Q-channel signal after the second perturbation signal modulates the first signal, and determines the square root result of the sum of squares of the second I-channel signal and the second Q-channel signal as the second amplitude, and the phase difference between the second Q-channel signal and the second I-channel signal as the second phase; the third lock-in amplifier determines the third I-channel signal and the third Q-channel signal after the product signal modulates the first signal, and determines the square root result of the sum of squares of the third I-channel signal and the third Q-channel signal as the third amplitude, and the phase difference between the third Q-channel signal and the third I-channel signal as the third phase.

[0012] Optionally, the controller includes: a second adjuster, configured to determine whether each bias voltage exceeds the output voltage range of the bias voltage generator, and adjust the bias voltage within the output voltage range when the bias voltage exceeds the output voltage range.

[0013] Optionally, the controller includes: the second regulator reducing the bias voltage by at least two half-wave voltages when the bias voltage exceeds the output voltage range and exceeds the target upper limit, or increasing the bias voltage by at least two half-wave voltages when the bias voltage exceeds the output voltage range but does not exceed the target upper limit.

[0014] Optionally, the photodetector includes: a photoelectric converter for converting a portion of the optical signal output by the IQ modulator into an electrical signal; an amplifier for amplifying the electrical signal; and a collector for acquiring the amplified electrical signal and outputting the first signal.

[0015] Optionally, the bias voltage generator is used to generate a first bias voltage, a second bias voltage, and a third bias voltage, and generates adjusted first bias voltage, second bias voltage, and third bias voltage based on the adjustment signal of the controller and transmits them to the IQ modulator.

[0016] Optionally, the controller includes: a perturbation signal generator for generating the first perturbation signal and the second perturbation signal; and a decoder for decoding a first reference sine signal and a first reference cosine signal of the first perturbation signal, a second reference sine signal and a second reference cosine signal of the second perturbation signal, and a third reference sine signal and a third reference cosine signal of the product signal, wherein the first reference sine signal and the first reference cosine signal are used to determine an adjustment signal for the first bias voltage, the second reference sine signal and the second reference cosine signal are used to determine an adjustment signal for the second bias voltage, and the third reference sine signal and the third reference cosine signal are used to determine an adjustment signal for the third bias voltage.

[0017] Secondly, this disclosure also discloses a computing device that includes the IQ modulator bias voltage control system.

[0018] Thirdly, this disclosure also discloses a lidar, which includes: a laser for generating an optical signal; an IQ modulator for modulating the frequency of the optical signal; and a bias voltage control system for the IQ modulator.

[0019] Compared with the prior art, the technical solutions of the embodiments of this disclosure have the following beneficial effects:

[0020] In this disclosed technical solution, the IQ modulator bias voltage control system includes a photodetector for detecting and outputting a first signal, which is an electrical signal converted from a portion of the IQ modulator's output optical signal; a bias voltage generator for generating various bias voltages of the IQ modulator; and a controller for generating a first perturbation signal and a second perturbation signal, determining adjustment signals for each bias voltage based on the first signal, the first perturbation signal, and the second perturbation signal, adjusting each bias voltage using the adjustment signals, and controlling the bias voltage generator to generate adjusted bias voltages that are transmitted to the IQ modulator. Compared with the prior art, in this disclosed technical solution, the IQ modulator bias voltage control system adjusts various bias voltages of the IQ modulator, wherein the first signal, converted from a portion of the IQ modulator's output optical signal, is combined with the perturbation signal to determine the adjustment signals for each bias voltage, and the adjustment signals are used to adjust each bias voltage in parallel. The technical solution disclosed herein enables the adjustment of each bias voltage of the IQ modulator by a controller, thereby simplifying the structure of the IQ modulator bias voltage control system, reducing the required hardware equipment, improving the adjustment efficiency of each bias voltage, and reducing costs.

[0021] Furthermore, the adjustment signal includes an adjustment direction and an adjustment amplitude, and the controller adjusts each bias voltage according to the adjustment direction and the adjustment amplitude. In the technical solution of this disclosure, the controller uses internal perturbation signals and externally input first signals for processing to adjust each bias voltage of the IQ modulator, avoiding the use of complex hardware devices, improving the compatibility of the IQ modulator bias voltage control system, and reducing costs. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of the structure of an IQ modulator in the prior art;

[0023] Figure 2 This is a schematic diagram of the output light intensity curve of an IQ modulator in the prior art;

[0024] Figure 3 This is a schematic diagram of the structure of an IQ modulator bias voltage control system provided in an embodiment of this disclosure;

[0025] Figure 4 This is a schematic diagram of the structure of a controller provided in an embodiment of this disclosure;

[0026] Figure 5 This is a schematic diagram of the specific structure of a lock-in amplifier provided in an embodiment of this disclosure;

[0027] Figure 6 This is a schematic diagram of another controller provided in an embodiment of this disclosure;

[0028] Figure 7 This is a schematic diagram of the structure of another controller provided in the embodiments of this disclosure;

[0029] Figure 8 This is a schematic diagram of another IQ modulator bias voltage control system provided in this embodiment of the present disclosure;

[0030] Figure 9 This is a schematic diagram of the structure of a lidar provided in an embodiment of this disclosure. Detailed Implementation

[0031] As described in the background section, the existing IQ modulator bias voltage control system is costly.

[0032] Specifically, refer to Figure 1The IQ modulator includes a Mach-Zehnder modulator (MZMI), a Mach-Zehnder modulator (MZMQ), and a phase modulator (MZMP). A bias voltage VI is applied to the DC bias terminal of the Mach-Zehnder modulator (MZMI), a bias voltage VQ is applied to the DC bias terminal of the Mach-Zehnder modulator (MZMQ), and a bias voltage VP is applied to the DC bias terminal of the phase modulator (MZMP). The input light is divided into two parts with equal power, which are respectively fed into the Mach-Zehnder modulators (MZMI and MZMQ) and then combined into a single output light beam by the phase modulator (MZMP).

[0033] Applying a certain bias voltage to the Mach-Zehnder modulators MZMI and MZMQ or the phase modulator MZMP causes the IQ modulator to modulate the input light. This operating state is... Figure 2 The output light intensity curve of the IQ modulator shown represents a point called the operating point, or operating voltage. With the output light intensity curve unchanged, changing the bias voltage alters the operating voltage of the IQ modulator.

[0034] When using an IQ modulator in an FMCW lidar, the three bias voltages V1, V2, and V3 are the aforementioned bias voltages VI, VQ, and VP, respectively. The three bias voltages V1, V2, and V3 of the IQ modulator are controlled at... Figure 2 The output intensity curve is shown with points N (Null), N (Quad), and Q (Quad). Points ±Q determine which sideband the output light selects. Point N represents the bias voltage with the lowest transmittance, point Q represents the bias voltage with the middle transmittance, and point P represents the bias voltage with the highest transmittance.

[0035] In FMCW lidar, when the IQ modulator is used for single-sideband modulation, the three bias voltages V1, V2, and V3 of the IQ modulator are controlled to remain at the operating voltage. Existing IQ modulator bias voltage control systems are complex in structure and expensive.

[0036] Compared with existing technologies, the IQ modulator bias voltage control system of this disclosure includes a photodetector for detecting and outputting a first signal, which is an electrical signal converted from a portion of the IQ modulator output optical signal; a bias voltage generator for generating various bias voltages of the IQ modulator; and a controller for generating a first perturbation signal and a second perturbation signal, determining adjustment signals for each bias voltage based on the first signal, the first perturbation signal, and the second perturbation signal, adjusting each bias voltage using the adjustment signals, and controlling the bias voltage generator to generate the adjusted bias voltage and transmit it to the IQ modulator. This disclosure employs different IQ modulator bias voltage control systems to adjust various bias voltages of the IQ modulator. The first signal, converted from a portion of the IQ modulator output optical signal, is combined with the perturbation signal to determine the adjustment signals for each bias voltage, and these adjustment signals are used to adjust each bias voltage in parallel. The technical solution disclosed herein enables the adjustment of each bias voltage of the IQ modulator by a controller, thereby simplifying the structure of the IQ modulator bias voltage control system, reducing the required hardware equipment, improving the adjustment efficiency of each bias voltage, and reducing costs.

[0037] In the embodiments of this disclosure, the IQ modulator may also be referred to as a dual parallel Mach-Zehnder modulator, a single-sideband modulator, a Quadrature Phase Shift Keying (QPSK) modulator, an Orthogonal Frequency Division Multiplexing (OFDM) modulator, a Quadrature Amplitude Modulation (QAM) modulator, etc., and this disclosure does not limit it in this way.

[0038] To make the above-mentioned objects, features and advantages of this disclosure more apparent and understandable, specific embodiments of this disclosure will be described in detail below with reference to the accompanying drawings.

[0039] Please refer to Figure 3 , Figure 3 A schematic diagram of the IQ modulator bias voltage control system 40 is shown.

[0040] In this embodiment of the disclosure, the IQ modulator bias voltage control system 40 can output a target bias voltage (also referred to as an adjusted bias voltage) to the IQ modulator to control each bias voltage in the IQ modulator 50 to remain at the operating voltage.

[0041] like Figure 3 As shown, the IQ modulator bias voltage control system 40 may include a photodetector 401, a bias voltage generator 402, and a controller 403.

[0042] The photodetector 401 can detect and output a first signal, which is an electrical signal converted from a portion of the optical signal output by the IQ modulator 50. The photodetector 401 can receive optical signals and convert them into electrical signals. Specifically, the first signal can be obtained by detecting a portion of the optical signal output by the IQ modulator 50 and converting it into an electrical signal, and then acquiring this electrical signal.

[0043] Continue to refer to Figure 3 The bias voltage generator 402 can generate various bias voltages of the IQ modulator 50. Taking the IQ modulator of the FMCW lidar as an example, the bias voltage generator 402 can generate the aforementioned three bias voltages V1, V2 and V3.

[0044] Specifically, the bias voltage generator 402 may include a digital-to-analog converter (DAC), which can generate the three bias voltages V1, V2, and V3 mentioned above. The output voltage range of the DAC is ±15V, which can meet the bias voltage range of the IQ modulator 50.

[0045] Specifically, the initial values ​​of the three bias voltages V1, V2, and V3 are 0.

[0046] The controller 403 can determine the adjustment signal for each bias voltage and adjust each bias voltage in parallel using the adjustment signal. In other words, the controller 403 completes the determination of the adjustment signal and the parallel adjustment of the bias voltage through an internal algorithm.

[0047] Specifically, the controller 403 can be a field-programmable gate array (FPGA). The photodetector 401 and the bias voltage generator 402 can communicate with the controller 403 via the Serial Peripheral Interface (SPI) protocol.

[0048] In some embodiments of this disclosure, the controller 403 may include a Direct Digital Synthesizer (DDS) for generating a first perturbation signal dither1 and a second perturbation signal dither2 with different frequencies. For example, the sampling frequency of the first perturbation signal dither1 is 1.2 kSps (Samples per Second, SPS), and the sampling frequency of the second perturbation signal dither2 is 1.8 kSps. The first perturbation signal dither1 is applied to a bias voltage V1, and the second perturbation signal dither2 is applied to a bias voltage V2.

[0049] In some embodiments of this disclosure, the controller 403 determines adjustment signals for each bias voltage based on a first signal, a first perturbation signal dither1, and a second perturbation signal dither2. Specifically, the adjustment signals may include adjustment direction and adjustment magnitude. Taking the generation of three bias voltages V1, V2, and V3 by the bias voltage generator 402 as an example, the adjustment signals may include the adjustment direction and adjustment magnitude of bias voltage V1, bias voltage V2, and bias voltage V3. The controller 403 adjusts each bias voltage according to its adjustment direction and adjustment magnitude.

[0050] In some embodiments of this disclosure, the controller 403 determines the first amplitude and first phase of the signal in the first signal that has the same frequency as the first perturbation signal dither1, the second amplitude and second phase of the signal in the first signal that has the same frequency as the second perturbation signal dither2, and the third amplitude and third phase of the signal in the first signal that has the same frequency as the product signal of the first perturbation signal dither1 and the second perturbation signal dither2.

[0051] Please refer to Figure 4 The controller 403 may include a first lock-in amplifier 4031, a second lock-in amplifier 4032, and a third lock-in amplifier 4033. The first lock-in amplifier 4031 receives a first signal and a first perturbation signal dither1 at its input, and outputs a first amplitude and a first phase. Correspondingly, the second lock-in amplifier 4032 receives the first signal and a second perturbation signal dither2 at its input, and outputs a second amplitude and a second phase. The third lock-in amplifier 4033 receives the first signal and the product of the first perturbation signal dither1 and the second perturbation signal dither2 at its input, and outputs a third amplitude and a third phase.

[0052] Specifically, the inputs to the first lock-in amplifier 4031 are the first signal and the reference sine and reference cosine signals of the first perturbation signal dither1, i.e., sin(dither1) and cos(dither1). Correspondingly, the inputs to the second lock-in amplifier 4032 are the first signal and the reference sine and reference cosine signals of the second perturbation signal dither2, i.e., sin(dither2) and cos(dither2). The inputs to the third lock-in amplifier 4033 are the first signal and the reference sine and reference cosine signals of the product of the first perturbation signal dither1 and the second perturbation signal dither2, i.e., sin(dither1×dither2) and cos(dither1×dither2).

[0053] Figure 5 A specific structure of a lock-in amplifier is shown.

[0054] In a lock-in amplifier, the first signal is multiplied by a reference sine signal and a reference cosine signal, respectively. After being filtered by a low-pass filter (LPF), the signal is split into two paths. One path is processed by the sum of squares and the square root to determine the intensity (i.e., signal amplitude) amp of the signal in the first signal that has the same frequency as the reference sine signal. The other path is processed by the arctangent function (arctan) to determine the phase theta of the signal in the first signal that has the same frequency as the reference sine signal.

[0055] Specifically, the first lock-in amplifier 4031 determines the first I-channel signal and the first Q-channel signal after the first perturbation signal dither1 modulates the first signal, and determines the square root of the sum of the squares of the first I-channel signal and the first Q-channel signal as the first amplitude, and the phase difference between the first Q-channel signal and the first I-channel signal as the first phase.

[0056] The second lock-in amplifier 4032 determines the second I-channel signal and the second Q-channel signal after the first signal is modulated by the second perturbation signal dither2, and determines the square root of the sum of the squares of the second I-channel signal and the second Q-channel signal as the second amplitude, and the phase difference between the second Q-channel signal and the second I-channel signal as the second phase.

[0057] The third lock-in amplifier 4033 determines the third I-channel signal and the third Q-channel signal after the first signal is modulated by the product signal of the first perturbation signal dither1 and the second perturbation signal dither2, and determines the square root of the sum of the squares of the third I-channel signal and the third Q-channel signal as the third amplitude, and the phase difference between the third Q-channel signal and the third I-channel signal as the third phase.

[0058] Continue to refer to Figure 3 and Figure 4 The controller 403 may include a first regulator 4034, which is coupled to a bias voltage generator 402. The first regulator 4034 generates adjustment signals for each bias voltage V1-V3, and the adjustment signals are transmitted to the bias voltage generator 402. The bias voltage generator 402 generates an adjusted first bias voltage V1 based on a first amplitude and a first phase of the adjustment signals, an adjusted second bias voltage V2 based on a second amplitude and a second phase of the adjustment signals, and an adjusted third bias voltage V3 based on a third amplitude and a third phase of the adjustment signals, wherein the first bias voltage V1, the second bias voltage V2, and the third bias voltage V3 are the bias voltages applied to the first sub-modulator, the second sub-modulator, and the third sub-modulator in the IQ modulator, respectively.

[0059] Among them, refer to Figure 1 The first sub-modulator includes a Mach-Zehnder modulator MZMI, the second sub-modulator includes a Mach-Zehnder modulator MZMQ, and the third sub-modulator includes a phase modulator MZMP.

[0060] In some embodiments of this disclosure, the adjustment signal of the first bias voltage V1, i.e., the adjustment amplitude and direction of the first bias voltage V1, can be determined by the first amplitude and the first phase. Correspondingly, the adjustment signal of the second bias voltage V2, i.e., the adjustment amplitude and direction of the second bias voltage V2, can be determined by the second amplitude and the second phase; and the adjustment signal of the third bias voltage V3, i.e., the adjustment amplitude and direction of the third bias voltage V3, can be determined by the third amplitude and the third phase.

[0061] Furthermore, the first regulator 4034 determines the adjustment direction of the first bias voltage V1 according to the first phase and the adjustment amplitude of the first bias voltage V1 according to the first amplitude. The first regulator 4034 determines the adjustment direction of the second bias voltage V2 according to the second phase and the adjustment amplitude of the second bias voltage V2 according to the second amplitude. The first regulator 4034 determines the adjustment direction of the third bias voltage V3 according to the third phase and the adjustment amplitude of the third bias voltage V3 according to the third amplitude.

[0062] Specifically, the first regulator 4034 determines that the adjustment direction of the first bias voltage V1 is decreasing when the first phase is 0 degrees, and determines that the adjustment direction of the first bias voltage V1 is increasing when the first phase is 180 degrees; the first regulator 4034 determines that the adjustment direction of the second bias voltage V2 is decreasing when the second phase is 0 degrees, and determines that the adjustment direction of the second bias voltage V2 is increasing when the second phase is 180 degrees; the first regulator 4034 determines that the adjustment direction of the third bias voltage V3 is decreasing when the third phase is 0 degrees, and determines that the adjustment direction of the third bias voltage V3 is increasing when the third phase is 180 degrees.

[0063] In some embodiments of this disclosure, please refer to Figure 6 The controller 403 may also include a second regulator 4035, which is used to determine whether each bias voltage V1-V3 exceeds the output voltage range of the bias voltage generator 402, and adjust the bias voltage V1-V3 to be within the output voltage range when the bias voltage V1-V3 exceeds the output voltage range.

[0064] As mentioned earlier, the output voltage range of the bias voltage generator 402 is ±15V to meet the bias voltage range of the IQ modulator 50. Specifically, the second regulator 4035 enables the bias voltage V1-V3 output by the bias voltage generator 402 to meet the bias voltage range of the IQ modulator 50, ensuring the normal operation of the IQ modulator 50.

[0065] Specifically, the second regulator 4035 reduces the bias voltage V1-V3 by at least two half-wave voltages when the bias voltage V1-V3 exceeds the output voltage range and the target upper limit, or increases the bias voltage V1-V3 by at least two half-wave voltages when the bias voltage V1-V3 exceeds the output voltage range but does not exceed the target upper limit.

[0066] Specifically, such as Figure 2 In the output intensity curve of the IQ modulator shown, the light intensity output by the modulator varies periodically. The half-wave voltage represents the bias voltage offset of the light intensity within half a variation period. Correspondingly, the two half-wave voltages represent the bias voltage offset of the light intensity within one variation period.

[0067] In some embodiments of this disclosure, the bias voltages V1-V3 can be adjusted by decreasing / increasing the bias voltages V1-V3 by at least two half-wave voltages using a controller. This satisfies the operating voltage range of the IQ modulator on the one hand, and ensures that the light intensity modulation effect of the IQ modulator remains unchanged on the other.

[0068] Specifically, please refer to Figure 7The controller 403 may also include a decoder 4036. The decoder 4036 is used to decode the first reference sine signal and the first reference cosine signal of the first perturbation signal, the second reference sine signal and the second reference cosine signal of the second perturbation signal, and the third reference sine signal and the third reference cosine signal of the product of the first perturbation signal and the second perturbation signal.

[0069] Specifically, the inputs to decoder 4036 are a first perturbation signal dither1 and a second perturbation signal dither2. Decoder 4036 outputs a first reference sine signal and a first reference cosine signal to a first lock-in amplifier 4031, a second reference sine signal and a second reference cosine signal to a second lock-in amplifier 4032, and a third reference sine signal and a third reference cosine signal to a third lock-in amplifier 4033.

[0070] In some embodiments of this disclosure, please refer to Figure 8 The photodetector 401 may include a photoelectric converter 4011, an amplifier 4012, and a collector 4013.

[0071] The photoelectric converter 4011 converts a portion of the optical signal output from the IQ modulator 50 into an electrical signal. The amplifier 4012 amplifies the electrical signal. The acquisition unit 4013 acquires the amplified electrical signal and outputs a first signal.

[0072] Specifically, the photoelectric converter 4011 can be a photodiode (PD), a silicon photomultiplier (SiPM), or a single photon avalanche diode (SPAD). The number of photoelectric converters 4011 can be one or more, and this disclosure does not limit this.

[0073] Specifically, amplifier 4012 can be a transimpedance amplifier.

[0074] More specifically, a portion of the optical signal output from the IQ modulator 50 can be converted into an electrical signal using a photodiode (PD) and a transimpedance amplifier (TIA), and then the first signal can be acquired by an analog-to-digital converter (ADC). For example, the optical signal output from the IQ modulator 50 is split by a beam splitter, and 5% of the output optical signal power is input to the PD. The PD performs photoelectric conversion to generate a current signal, which is then transmitted to the TIA. The TIA converts the current signal into a voltage signal and sends it to the ADC. The ADC acquires the voltage signal, performs analog-to-digital conversion, and generates a digital signal.

[0075] Continue to refer to Figure 8 The bias voltage generator 402 can generate a first bias voltage, a second bias voltage, and a third bias voltage, and generate adjusted first bias voltage, second bias voltage, and third bias voltage based on the adjustment signal of the controller 403, which are then transmitted to the IQ modulator 50.

[0076] Specifically, the controller 403 may include a perturbation signal generator 4037. The perturbation signal generator 4037 is used to generate a first perturbation signal dither1 and a second perturbation signal dither2. Specifically, the perturbation signal generator 4037 may be a DDS.

[0077] The bias voltage generator 402 is used to generate a first bias voltage V1, a second bias voltage V2 and a third bias voltage V3, and modulates the first bias voltage V1 with a first perturbation signal dither1, modulates the second bias voltage V2 with a second perturbation signal dither1, and modulates the third bias voltage V3 with the product signal of the first perturbation signal dither1 and the second perturbation signal dither2, wherein the first perturbation signal and the second perturbation signal are orthogonal or incoherent.

[0078] For more information on the working principle and operation mode of the IQ modulator bias voltage control system, please refer to [link / reference needed]. Figures 1 to 8 The relevant descriptions in the corresponding embodiments are not repeated here.

[0079] Please refer to Figure 9 This disclosure also discloses a lidar, which may include:

[0080] Laser 30 is used to generate optical signals;

[0081] IQ modulator 50 is used to modulate the frequency of an optical signal; wherein IQ modulator 50 outputs a modulation signal, which is used to modulate the frequency of the optical signal generated by laser 30.

[0082] The IQ modulator bias voltage control system 40 is used to provide bias voltages to the IQ modulator 50, so that the various bias voltages of the IQ modulator 50 are maintained at the operating voltage. For example, the IQ modulator bias voltage control system 40 can maintain the three bias voltages V1-V3 of the IQ modulator 50 at the operating voltage during single-sideband modulation.

[0083] In some embodiments of this disclosure, different IQ modulator bias voltage control systems are employed to adjust the various bias voltages of the IQ modulator. A first signal, obtained by converting a portion of the IQ modulator output optical signal, is combined with a perturbation signal to determine the adjustment signal for each bias voltage. These adjustment signals are then used to adjust the various bias voltages in parallel. This method allows the adjustment of the various bias voltages of the IQ modulator to be controlled by a controller, resulting in a simpler structure for the IQ modulator bias voltage control system, fewer required hardware components, improved adjustment efficiency, and reduced costs.

[0084] In specific implementations, the aforementioned IQ modulator bias voltage control system can be configured as a chip with voltage control function in a lidar or terminal device, such as a SOC (System-On-a-Chip), baseband chip, etc.; or correspond to a chip module with voltage control function in a lidar or terminal device; or correspond to a chip module with data processing function; or correspond to a lidar or terminal device.

[0085] Regarding the modules / units included in the various devices and products described in the above embodiments, they can be software modules / units, hardware modules / units, or a combination of both. For example, for various devices and products applied to or integrated into a chip, all of their modules / units can be implemented using hardware methods such as circuits, or at least some modules / units can be implemented using software programs that run on a processor integrated within the chip, while the remaining (if any) modules / units can be implemented using hardware methods such as circuits; for various devices and products applied to or integrated into a chip module, all of their modules / units can be implemented using hardware methods such as circuits, and different modules / units can be located in the same component (e.g., chip, circuit module, etc.) or different components of the chip module, or at least some modules / units can be implemented using hardware methods such as circuits. The components can be implemented using software programs that run on the processor integrated within the chip module. The remaining (if any) modules / units can be implemented using hardware methods such as circuits. For various devices and products applied to or integrated into the terminal, each of its components / units can be implemented using hardware methods such as circuits. Different modules / units can be located in the same component (e.g., chip, circuit module, etc.) or in different components within the terminal. Alternatively, at least some modules / units can be implemented using software programs that run on the processor integrated within the terminal, while the remaining (if any) modules / units can be implemented using hardware methods such as circuits.

[0086] This disclosure also discloses a storage medium, which is a computer-readable storage medium storing a computer program thereon. When the computer program is executed, it can perform the steps of the aforementioned method. The storage medium may include ROM, RAM, a magnetic disk, or an optical disk, etc. The storage medium may also include non-volatile memory or non-transitory memory, etc.

[0087] It should be understood that the term "and / or" in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this article indicates that the preceding and following related objects have an "or" relationship.

[0088] In this disclosure, "multiple" refers to two or more.

[0089] The descriptions of "first," "second," etc., appearing in the embodiments of this disclosure are for illustrative purposes and to distinguish the objects being described. They have no order and do not indicate any particular limitation on the number of devices in the embodiments of this disclosure, nor do they constitute any limitation on the embodiments of this disclosure.

[0090] The term "connection" in this disclosure refers to various connection methods, such as direct connection or indirect connection, to achieve communication between devices. This disclosure does not limit the scope of the term.

[0091] It should be understood that in the embodiments of this disclosure, the processor can be a central processing unit (CPU), or it can be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor.

[0092] It should also be understood that the memory in the embodiments of this disclosure can be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. The non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of random access memory (RAM) are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate synchronous DRAM (DDR SDRAM), enhanced synchronous DRAM (ESDRAM), synchronous linked DRAM (SLDRAM), and direct rambus RAM (DR RAM).

[0093] The above embodiments can be implemented, in whole or in part, by software, hardware, firmware, or any other combination thereof. When implemented using software, the above embodiments can be implemented, in whole or in part, as a computer program product. The computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer programs are loaded or executed on a computer, all or part of the processes or functions described in the embodiments of this disclosure are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired or wireless means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center containing one or more sets of available media. It should be understood that in the various embodiments of this disclosure, the sequence number of each process does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this disclosure.

[0094] In the several embodiments provided in this disclosure, it should be understood that the disclosed methods, apparatuses, and systems can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for example, the division of units is merely a logical functional division, and other division methods may exist in actual implementation; for example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces, and the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0095] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0096] Furthermore, the functional units in the various embodiments of this disclosure can be integrated into one processing unit, or each unit can be physically comprised separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or in the form of hardware plus software functional units.

[0097] The integrated unit implemented as a software functional unit described above can be stored in a computer-readable storage medium. This software functional unit, stored in a storage medium, includes several instructions to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to execute some steps of the methods described in the various embodiments of this disclosure.

[0098] While the above disclosure is provided, it is not limited thereto. Any person skilled in the art may make various alterations and modifications without departing from the spirit and scope of this disclosure; therefore, the scope of protection of this disclosure shall be determined by the scope defined in the claims.

Claims

1. A bias voltage control system for an IQ modulator, characterized in that, include: A photodetector is used to detect and output a first signal, which is an electrical signal converted from a portion of the optical signal output by the IQ modulator. A bias voltage generator is used to generate the various bias voltages of the IQ modulator; The controller is used to generate a first perturbation signal and a second perturbation signal, determine an adjustment signal for each bias voltage based on the first signal, the first perturbation signal and the second perturbation signal, adjust each bias voltage using the adjustment signal, and control the bias voltage generator to generate the adjusted bias voltage and transmit it to the IQ modulator.

2. The IQ modulator bias voltage control system according to claim 1, characterized in that, The adjustment signal includes an adjustment direction and an adjustment magnitude, and the controller adjusts each bias voltage according to the adjustment direction and the adjustment magnitude.

3. The IQ modulator bias voltage control system according to claim 1, characterized in that, The frequency of the first perturbation signal is different from the frequency of the second perturbation signal. The controller determines the first amplitude and first phase of the signal in the first signal that has the same frequency as the first perturbation signal, the second amplitude and second phase of the signal in the first signal that has the same frequency as the second perturbation signal, and the third amplitude and third phase of the signal in the first signal that has the same frequency as the product signal of the first perturbation signal and the second perturbation signal.

4. The IQ modulator bias voltage control system according to claim 3, characterized in that, The controller includes: A first lock-in amplifier is provided, wherein the input terminal of the first lock-in amplifier is connected to the first signal and the first perturbation signal, and the output terminal of the first lock-in amplifier outputs the first amplitude and the first phase. A second lock-in amplifier is provided, wherein the input terminal of the second lock-in amplifier is connected to the first signal and the second perturbation signal, and the output terminal of the second lock-in amplifier outputs the second amplitude and the second phase; The third lock-in amplifier has the first signal and the product of the first perturbation signal and the second perturbation signal connected to its input terminal, and the third amplitude and the third phase output from its output terminal.

5. The IQ modulator bias voltage control system according to claim 3, characterized in that, The controller includes: A first regulator is configured to adjust a first bias voltage according to the first amplitude and the first phase, adjust a second bias voltage according to the second amplitude and the second phase, and adjust a third bias voltage according to the third amplitude and the third phase, wherein the first bias voltage, the second bias voltage, and the third bias voltage are respectively bias voltages applied to the first sub-modulator, the second sub-modulator, and the third sub-modulator in the IQ modulator.

6. The IQ modulator bias voltage control system according to claim 5, characterized in that, The first regulator determines the adjustment direction of the first bias voltage based on the first phase and determines the adjustment amplitude of the first bias voltage as the first amplitude. The first regulator determines the adjustment direction of the second bias voltage based on the second phase and determines the adjustment amplitude of the second bias voltage as the second amplitude. The first regulator determines the adjustment direction of the third bias voltage based on the third phase and determines the adjustment amplitude of the third bias voltage as the third amplitude.

7. The IQ modulator bias voltage control system according to claim 4, characterized in that, The first lock-in amplifier determines the first I-channel signal and the first Q-channel signal after the first perturbation signal modulates the first signal, and determines the square root result of the sum of squares of the first I-channel signal and the first Q-channel signal as the first amplitude, and the phase difference between the first Q-channel signal and the first I-channel signal as the first phase; The second lock-in amplifier determines the second I-channel signal and the second Q-channel signal after the first signal is modulated with the second perturbation signal, and determines the square root result of the sum of squares of the second I-channel signal and the second Q-channel signal as the second amplitude, and the phase difference between the second Q-channel signal and the second I-channel signal as the second phase; The third lock-in amplifier determines the third I-channel signal and the third Q-channel signal after the first signal is modulated with the product signal, and determines the square root result of the sum of squares of the third I-channel signal and the third Q-channel signal as the third amplitude, and the phase difference between the third Q-channel signal and the third I-channel signal as the third phase.

8. The IQ modulator bias voltage control system according to claim 1, characterized in that, The controller includes: The second regulator is used to determine whether each bias voltage exceeds the output voltage range of the bias voltage generator, and adjusts the bias voltage to be within the output voltage range when the bias voltage exceeds the output voltage range.

9. The IQ modulator bias voltage control system according to claim 8, characterized in that, The controller includes: The second regulator reduces the bias voltage by at least two half-wave voltages when the bias voltage exceeds the output voltage range and exceeds the target upper limit, or increases the bias voltage by at least two half-wave voltages when the bias voltage exceeds the output voltage range but does not exceed the target upper limit.

10. The IQ modulator bias voltage control system according to claim 1, characterized in that, The photodetector includes: A photoelectric converter is used to convert a portion of the optical signal output by the IQ modulator into an electrical signal; An amplifier for amplifying the electrical signal; The data acquisition unit is used to acquire the amplified electrical signal and output the first signal.

11. The IQ modulator bias voltage control system according to claim 1, characterized in that, The bias voltage generator is used to generate a first bias voltage, a second bias voltage, and a third bias voltage, and to generate adjusted first bias voltage, second bias voltage, and third bias voltage based on the adjustment signal of the controller and transmit them to the IQ modulator.

12. The IQ modulator bias voltage control system according to claim 11, characterized in that, The controller includes: A perturbation signal generator is used to generate the first perturbation signal and the second perturbation signal; A decoder is used to decode a first reference sine signal and a first reference cosine signal of the first perturbation signal, a second reference sine signal and a second reference cosine signal of the second perturbation signal, and a third reference sine signal and a third reference cosine signal of the product of the first perturbation signal and the second perturbation signal. The first reference sine signal and the first reference cosine signal are used to determine the adjustment signal of the first bias voltage, the second reference sine signal and the second reference cosine signal are used to determine the adjustment signal of the second bias voltage, and the third reference sine signal and the third reference cosine signal are used to determine the adjustment signal of the third bias voltage.

13. A computing device, characterized in that, Includes the IQ modulator bias voltage control system according to any one of claims 1 to 12.

14. A lidar, characterized in that, include: Lasers are used to generate optical signals; An IQ modulator is used to modulate the frequency of the optical signal; The IQ modulator bias voltage control system according to any one of claims 1 to 12.

Citation Information

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