Low-cost heterojunction photoelectric detector capable of being produced in batches and preparation method thereof

Abstract

The invention relates to the technical field of photoelectric detection, in particular to a low-cost heterojunction photoelectric detector capable of being produced in batches and a preparation method thereof. The problems that an existing photoelectric detector is too high in manufacturing cost, complex in production process and difficult to produce on a large scale are solved. The technical scheme of the invention comprises an electrode layer, a light sensing region presented in a heterojunction form and a substrate from top to bottom, the method comprises the steps of 1, substrate processing; 2, preparing a heterojunction by adopting a hard mask sputtering technology; and step 3, completing the preparation of the electrode prepared by the hard mask evaporation process. According to the method, a hard mask evaporation process is adopted to prepare a top electrode, a mechanical finish machining technology is adopted, a welding positioning clamp and a guide rail are used for carrying out accurate positioning welding on a supporting back plate mask and a panel, and preparation of the mask plate is completed. The metal thin film can be directly deposited on the surface of the substrate, complex photoetching and etching steps are not needed, the preparation process can be greatly simplified, and time and cost are reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of photoelectric detection, in particular to a low-cost batch-produced heterojunction photoelectric detector and a preparation method thereof. BACKGROUND

[0002] In the preparation process of the photoelectric detector, photoresist imaging and device electrode etching processes need to use photolithography technology, which has the problems of complex production process and high cost. Therefore, reducing the preparation cost of the photoelectric detector is an important problem, and at the same time, to realize mass production, it is also necessary to solve the problems of repeatability, stability and consistency of the preparation process.

[0003] In the patent document with the application number "202311680153.0", a preparation method of a quantum dot enhanced two-dimensional semiconductor material photoelectric detector is disclosed. However, there are problems that the pore size of the microporous injection filter may be larger than the size of the carbon quantum dots, and the pore size of the dialysis bag may not match the size of the carbon quantum dots, so that part of the solution cannot be effectively filtered. At the same time, the use of microporous injection filters and dialysis bags requires certain operation skills and conditions. If the operation is not proper or the conditions are not suitable, it may result in poor filtering effect, even damage the filter or the bag, and increase the cost and time cost of the experiment. SUMMARY

[0004] To solve the problems of high preparation cost, complex production process and difficulty in mass production of existing photoelectric detectors, the present application provides a low-cost batch-produced heterojunction photoelectric detector and a preparation method thereof.

[0005] To overcome the problems existing in the prior art, the technical scheme adopted by the present application is as follows: a low-cost batch-produced heterojunction photoelectric detector, including an electrode layer from top to bottom, a light sensing area in the form of a heterojunction, and a substrate.

[0006] The substrate is silicon dioxide, quartz or sapphire.

[0007] The electrode layer is a metal electrode material or a transparent electrode material.

[0008] A preparation method of a low-cost batch-produced heterojunction photoelectric detector, the steps are as follows:

[0009] Step 1, substrate treatment;

[0010] Step 2, using hard mask sputtering technology to prepare a heterojunction

[0011] The heterojunction is prepared by using a hard mask sputtering technology, the substrate is placed in a mask plate, then the substrate is placed in a vacuum chamber and vacuum pumping and gas purification are carried out, high-purity sheet materials of required materials are prepared as target materials, after growth, another material is used, the substrate is rotated by 180°, and the above steps are repeated to complete the preparation of the heterojunction.

[0012] Step three, electrode preparation by a hard mask evaporation process.

[0013] Further, the specific method of step one is that: a silicon dioxide sheet is prepared as a substrate, and is cleaned by using alcohol and acetone cleaning solution respectively for ultrasonic cleaning for 10-15 min, then the cleaning solution is cleaned, and the cleaned substrate is placed in a clean environment, and is dried by using a nitrogen gun, so that the surface is clean and no water marks are left.

[0014] Further, in step two, when the air pressure in the vacuum chamber reaches 1x10 -3 Pa or below, the sputtering rate is kept at about 0.1-0.2 A / s for growth.

[0015] Further, the specific method of step three is that: the heterojunction prepared in step one is placed in a mask plate, and then is placed on a sample table of an evaporation device, high-purity block materials of required metal materials are prepared as target materials, when the air pressure in the device reaches 5x10 -4 Pa or below, the evaporation rate is controlled to be between 0.1-0.2 A / s, and a metal film with a thickness of 300-500 nm is uniformly deposited on the surface of the substrate to complete the preparation of the electrode.

[0016] Further, in step three, when the air pressure in the device reaches 5x10 -4 Pa or below, the evaporation rate is controlled to be between 0.1-0.2 A / s, and the substrate is deposited.

[0017] Further, the mask plate includes a support back plate and a mask panel, the support back plate and the mask panel are welded in one body, and a plurality of grooves are arranged in the support back plate and the mask panel in an array, and the size of the grooves is a square of 10.02x10.02 mm.

[0018] Further, in the mask panel pattern, the distance between the center point and the left edge is 4.8 mm, and there is a 0.2 mm offset from the center point of the silicon sheet, and the preparation of the heterojunction can be completed by two times of sputtering processes.

[0019] Further, in the mask panel pattern, the width of the line is 0.1 mm, which crosses the two sides of the heterojunction material, and the device performance test is carried out in the lead-out area.

[0020] Compared with the prior art, the advantages of the present application are:

[0021] ​​​1) The method of the present application uses a hard mask evaporation process to prepare the top electrode, uses mechanical finishing technology, and uses welding positioning clamps and guide rails to support the back plate mask and the panel for precise positioning welding, and completes the preparation of the mask plate. The metal thin film can be directly deposited on the surface of the substrate, without the need for complex photoetching and etching steps, which can greatly simplify the preparation process and reduce time and cost.

[0022] 2) The present application uses a hard mask sputtering process to replace the photoetching technology to prepare the heterojunction, which can be applied to various types of substrates and materials, including glass, silicon, polymers, etc.

[0023] 3) In order to realize mass production and industrial application, the hard mask evaporation process is easy to expand to large area preparation, which can prepare multiple devices or large area electrode structures on a larger substrate at the same time. Compared with the photoetching technology, it does not need additional photoresist, developer and etching materials, and also does not need expensive photoetching equipment and high-precision optical systems, which can greatly reduce the cost. BRIEF DESCRIPTION OF DRAWINGS

[0024] Figure 1 is a structural schematic diagram of a mask back plate;

[0025] Figure 2 is a structural schematic diagram of a heterojunction mask panel;

[0026] Figure 3 is a schematic diagram of a heterojunction mask panel pattern;

[0027] Figure 4 is a structural schematic diagram of an electrode mask panel;

[0028] Figure 5 is a schematic diagram of an electrode mask panel pattern; DETAILED DESCRIPTION

[0029] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.

[0030] Embodiment:

[0031] A low-cost batch-produced heterojunction photodetector includes an electrode layer from top to bottom, a light sensing area in the form of a heterojunction, and a substrate.

[0032] The substrate is silicon dioxide, and the electrode layer is a metal electrode material Cu.

[0033] A low-cost, mass-producible method for fabricating heterojunction photodetectors is as follows:

[0034] Step 1: Substrate Treatment

[0035] Prepare and clean a 10×10mm silicon dioxide wafer as a substrate. Use alcohol and acetone cleaning solutions for ultrasonic cleaning for 15 minutes respectively. After cleaning off the cleaning solution, rinse with deionized water or pure water. Place the cleaned substrate in a clean environment and blow it dry with a nitrogen gun to ensure that the surface is clean and free of watermarks.

[0036] Step 2: Fabrication of heterojunctions using hard mask sputtering technology

[0037] Place the substrate in Figure 2 The designed mask is then placed in a vacuum chamber where it is evacuated and the gas is purified, maintaining a vacuum level of 1×10⁻⁶. -3 Below Pa, high-purity MoS2 flakes were prepared as the target material and placed at a sputtering rate of [value missing]. The growth is carried out from left to right. After the growth is completed, SnS2 is used, and the substrate is rotated 180° to repeat the above operation steps to complete the preparation of the heterojunction.

[0038] Step 3: Hard mask evaporation process for electrode fabrication

[0039] The heterojunction prepared in the second step is placed in... Figure 4 The designed mask is then placed on the sample stage of the vapor deposition equipment. High-purity bulk Cu is prepared as the target material. When the gas pressure inside the equipment reaches 5 × 10⁻⁶, -4 When Pa is below, control the evaporation rate at Between these steps, a 500nm thick metal film is uniformly deposited on the substrate surface to complete the electrode fabrication.

[0040] Mask fabrication: Rigid mask plates are divided into... Figure 1 The support back plate shown Figure 2 and Figure 5 The mask panel shown is precisely positioned and welded to the support backplate using welding positioning fixtures and guide rails. To facilitate the placement and removal of silicon wafers, multiple grooves are arrayed in the support backplate and mask panel, each groove being a 10.02×10.02mm square.

[0041] Figure 3 The center point of the mask panel pattern is 4.8mm from the left edge and offset from the center point of the silicon wafer by 0.2mm. The heterojunction can be fabricated through two sputtering processes.

[0042] Figure 5 The mask panel pattern has a line width of 0.1 mm, spans both sides of the heterojunction material, and device performance testing is performed in the lead-out area.

[0043] In the foregoing description, numerous specific details are set forth to provide a thorough understanding of the present application. However, it will be understood by those skilled in the art that the present application can be practiced without the specific details.

[0044] The above merely provides the preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present application shall fall within the scope of protection of the present application.

Claims

1. A low-cost, batch-fabricable, heterojunction photodetector, characterized in that, The light sensing area is in the form of heterojunction and the substrate is silicon dioxide, quartz or sapphire. The electrode layer is a metal electrode material or a transparent electrode material. The steps are:

2. The method of claim 1, wherein the method is characterized by: Step one, substrate processing; Step two, heterojunction prepared by hard mask sputtering technology The substrate is placed in a mask plate, and then placed in a vacuum chamber and subjected to vacuum pumping and gas purification. High-purity sheet materials required as target materials are placed, and after growth, another material is used. The substrate is rotated 180°, and the above steps are repeated to complete the preparation of the heterojunction. Step three, electrode prepared by hard mask evaporation process. The specific method of step one is to prepare a silicon dioxide wafer as a substrate, and use alcohol and acetone cleaning solution for ultrasonic cleaning for 10-15 minutes, then clean the cleaning solution, and rinse with deionized water or pure water. The cleaned substrate is placed in a clean environment and dried with a nitrogen gun to ensure that the surface is clean and free of water marks.

3. The method of claim 2, wherein the method further comprises: In step two, the sputtering rate is kept at about 0.5 A / s when the pressure in the vacuum chamber reaches the following value.

4. The method of claim 2, wherein the method further comprises: The specific method of step three is to place the heterojunction prepared in step one in a mask plate, and then place it on the sample table of the evaporation equipment. High-purity block materials of the required metal materials are prepared as target materials. When the pressure in the equipment reaches the following value, the evaporation rate is controlled between 0.5 A / s and 1 A / s to deposit a 300-500 nm thick metal film on the substrate surface, completing the electrode preparation.

5. The method of claim 2, wherein the method is characterized by: In step three, when the pressure in the equipment reaches the following value, the evaporation rate is controlled between 0.5 A / s and 1 A / s to deposit a 300-500 nm thick metal film on the substrate surface, completing the electrode preparation.

6. The method of claim 5, wherein the method further comprises: The mask plate includes a support back plate and a mask panel, which are welded together. The support back plate and the mask panel are provided with a plurality of grooves in an array. The size of the grooves is a square of 10.02x10.02mm.

7. The method of claim 3, 4 or 6, wherein the method further comprises: The mask panel pattern has a point distance of 4.8mm from the left edge and a 0.2mm offset from the center of the silicon wafer. The heterojunction can be prepared by two sputtering processes.

8. The method of claim 7, wherein the method further comprises: The mask panel pattern has a line width of 0.1mm, which spans the two sides of the heterojunction material and performs device performance testing in the lead-out area.

9. The method of claim 7, wherein the method further comprises: ​

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