Short-circuit fault calculation method of multi-terminal flexible direct-current power transmission system and related product

Abstract

The invention relates to the technical field of direct-current power transmission, and provides a short-circuit fault calculation method of a multi-terminal flexible direct-current power transmission system and a related product. The method comprises the following steps: establishing equivalent circuit models of a direct-current power transmission system in different fault calculation stages according to the number of sub-modules of a modular multilevel converter sub-module, sub-module capacitance, bridge arm inductance and equivalent resistance when an insulated gate bipolar transistor in the sub-module is switched on; establishing a state space equation set corresponding to each equivalent circuit model; and solving the corresponding state space equation set in the time domain of each fault calculation stage to obtain the fault current time domain response of each fault calculation stage. According to the invention, the fault calculation efficiency can be effectively improved, and the accurate calculation of the fault current of the multi-terminal flexible DC power transmission system can be realized.

Description

Technical Field

[0001] This application relates to the field of DC power transmission technology, and in particular to a method for calculating short-circuit faults in a multi-terminal flexible DC power transmission system and related products. Background Technology

[0002] Multi-terminal flexible DC transmission technology based on Modular Multilevel Converters (MMCs) has broad application prospects in large-scale renewable energy grid integration, isolated power supply, and inter-regional power interconnection. However, the DC transmission lines of multi-terminal flexible DC transmission systems have large geographical spans and complex operating environments, resulting in a high risk of faults. After a DC line fault occurs, the capacitors in the converter station submodules rapidly release energy in a very short time (within milliseconds), causing a sudden surge in line current, which in turn severely impacts power electronic devices and critical equipment. In-depth research on the fault characteristics of multi-terminal flexible DC transmission systems and accurate calculation of short-circuit fault currents are not only important bases for system parameter design and equipment selection, but also provide a reference for DC line protection research.

[0003] After a DC system fault, the capacitors of the submodules within the MMC (Multi-Module Control) that are in the energized state discharge rapidly. In related technologies, the MMC is usually equivalent to an RLC (Resistor-Limited Circuit) model consisting of a resistor R, an inductor L, and a capacitor C connected in series. However, for multi-terminal flexible DC transmission systems, during a DC fault, multiple MMCs are coupled to each other, making fault calculation particularly complex and difficult to perform short-circuit fault calculations for multi-terminal flexible DC transmission systems. Summary of the Invention

[0004] This application provides a method and related products for calculating short-circuit faults in multi-terminal flexible DC transmission systems, which can effectively improve fault calculation efficiency and achieve accurate calculation of fault currents in multi-terminal flexible DC transmission systems.

[0005] In one aspect, this application provides a short-circuit fault calculation method for a multi-terminal flexible DC transmission system. The multi-terminal flexible DC transmission system has multiple converter stations, each bridge arm is connected in series with a modular multilevel converter submodule and a bridge arm inductor, and each converter station is interconnected via positive and negative DC lines and connected to a DC bus. A mechanical DC circuit breaker is configured at the DC bus. The method includes:

[0006] Based on the number of submodules, submodule capacitance, bridge arm inductance, and equivalent resistance of the insulated gate bipolar transistors (IGBTs) in the modular multilevel converter submodules when they are turned on, equivalent circuit models of the DC transmission system at different fault calculation stages are established, and state-space equation sets corresponding to each equivalent circuit model are established. The fault calculation stages include the first stage when the mechanical DC circuit breaker does not operate when a fault occurs in the DC transmission system, the second stage from the start of operation of the mechanical DC circuit breaker to the extinction of the arc, the third stage from the extinction of the arc to the operation of the surge arrester, and the fourth stage from the operation of the surge arrester to the decay of the fault current to 0.

[0007] Solve the corresponding state-space equations in the time domain for each fault calculation stage to obtain the time-domain response of the fault current for each fault calculation stage.

[0008] On the other hand, this application provides a short-circuit fault calculation device for a multi-terminal flexible DC transmission system. The multi-terminal flexible DC transmission system has multiple converter stations. Each bridge arm is connected in series with a modular multilevel converter submodule and a bridge arm inductor. Each converter station is interconnected via positive and negative DC lines and connected to a DC bus. A mechanical DC circuit breaker is configured at the DC bus. The device includes:

[0009] An equivalent circuit module is used to establish equivalent circuit models of the DC transmission system at different fault calculation stages based on the number of sub-modules, sub-module capacitance, bridge arm inductance, and equivalent resistance of the insulated gate bipolar transistors in the sub-modules when they are turned on, and to establish state-space equation sets corresponding to each equivalent circuit model. The fault calculation stages include a first stage when the mechanical DC circuit breaker does not operate when a fault occurs in the DC transmission system, a second stage from the start of operation of the mechanical DC circuit breaker to the extinction of the arc, a third stage from the extinction of the arc to the operation of the surge arrester, and a fourth stage from the operation of the surge arrester to the decay of the fault current to 0.

[0010] The fault current calculation module is used to solve the corresponding state-space equations in the time domain of each fault calculation stage to obtain the fault current time-domain response of each fault calculation stage.

[0011] In another aspect, this application also provides an electronic device, including: a processor, a memory, and a computer program stored in the memory and capable of running on the processor, wherein the computer program, when executed by the processor, implements the short-circuit fault calculation method for any of the multi-terminal flexible DC transmission systems described in the present invention.

[0012] In another aspect, this application also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the short-circuit fault calculation method for any of the multi-terminal flexible DC transmission systems described in the present invention.

[0013] In another aspect, this application also provides a computer program product containing instructions that, when run on a computer, cause the computer to execute the short-circuit fault calculation method for the multi-terminal flexible DC transmission system described in the above aspects.

[0014] This application provides a short-circuit fault calculation method and related products for multi-terminal flexible DC transmission systems. Based on the number of sub-modules, sub-module capacitance, bridge arm inductance, and equivalent resistance of the insulated-gate bipolar transistors (IGBTs) in the modular multilevel converter sub-modules when they are turned on, equivalent circuit models of the DC transmission system are established for different fault calculation stages. State-space equations corresponding to each equivalent circuit model are then established. The corresponding state-space equations are solved in the time domain at each fault calculation stage to obtain the time-domain response of the fault current at each stage. By combining the working principle of mechanical DC circuit breakers, the fault calculation of the entire DC transmission system is divided into four fault calculation stages. Simplified equivalent circuits and state-space equations for different fault calculation stages are established, allowing fault calculation to be performed directly in the time domain. This effectively improves fault calculation efficiency and enables accurate calculation of fault currents in multi-terminal flexible DC transmission systems. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of a multi-terminal flexible DC transmission system provided in an embodiment of this application;

[0016] Figure 2 This is a schematic diagram of a bipolar fault five-terminal flexible DC transmission system provided in an embodiment of this application;

[0017] Figure 3 This is a flowchart illustrating the steps of a short-circuit fault calculation method for a multi-terminal flexible DC transmission system provided in an embodiment of this application.

[0018] Figure 4 This is a schematic diagram of the fault equivalent circuit model for the first stage provided in the embodiments of this application;

[0019] Figure 5 This is a simplified fault equivalent circuit model diagram of the first stage provided in the embodiments of this application;

[0020] Figure 6 This is a schematic diagram of the simplified fault equivalent circuit model provided in the second stage of this application embodiment;

[0021] Figure 7This is a simplified fault equivalent circuit model diagram of the third stage provided in the embodiments of this application;

[0022] Figure 8 This is a simplified fault equivalent circuit model diagram of the fourth stage provided in the embodiments of this application;

[0023] Figure 9 This is a schematic diagram of the overall calculation process provided in the embodiments of this application;

[0024] Figure 10 When a fault occurs at the MMC output point as provided in the embodiments of this application, I... 0f A diagram showing the comparison between simulated and calculated values;

[0025] Figure 11 This is the line mid-section fault I provided in the embodiments of this application. 0f A diagram showing the comparison between simulated and calculated values;

[0026] Figure 12 When a fault occurs at 1 / 3 of the distance from the busbar at the end of the line, as provided in the embodiments of this application, I... 0f A diagram showing the comparison between simulated and calculated values;

[0027] Figure 13 This is a structural block diagram of a short-circuit fault calculation device for a multi-terminal flexible DC transmission system provided in an embodiment of this application;

[0028] Figure 14 This is a structural block diagram of an electronic device provided in an embodiment of this application;

[0029] Figure 15 This is a structural block diagram of a computer-readable storage medium provided in an embodiment of this application. Detailed Implementation

[0030] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0031] For multi-terminal flexible DC transmission systems, the coupling between multiple MMCs during DC faults makes fault calculation particularly complex. In related technologies, fault current calculation methods for multi-terminal flexible DC transmission systems mainly include frequency domain methods and time domain methods.

[0032] For the frequency domain method, as one example, the non-faulty region of the DC system can be equivalently processed to obtain the analytical expression of the faulty line current in the complex frequency domain, and the time-domain value of the fault current can be obtained through the inverse Laplace transform. However, this method cannot calculate the fault current of the non-faulty line. As another example, the node admittance matrix of the entire DC system in the complex frequency domain can be established, and the faulty branch can be equivalently treated as a current source to solve the fault current of the entire DC system in the complex frequency domain. Finally, the time-domain value of the fault current can be obtained through the numerical inverse Laplace transform. However, when the switching action of power electronic equipment causes multiple changes in the state of the DC system, the fault calculation in the complex frequency domain is quite complicated.

[0033] For the time-domain method, for example, an equivalent circuit model of the entire system can be established based on the topology of the multi-terminal flexible DC transmission system, and a system of differential equations can be written in the time domain and solved numerically. Furthermore, the calculation of DC system short-circuit faults after the fault current limiter is put into operation can be considered, or the calculation of DC system short-circuit faults after the fault current limiter and the hybrid DC circuit breaker are operated can be considered simultaneously.

[0034] The aforementioned fault calculation methods still have certain limitations in practical applications. For example, for the complex frequency domain method, due to the numerous devices and complex topology of multi-terminal flexible DC transmission systems, the complex frequency domain expression of fault current is often very complex. The calculation efficiency and accuracy are highly dependent on algorithms such as numerical inverse Laplace transform and vector fitting. Furthermore, when the switching actions of power electronic equipment cause multiple changes in the DC system state, fault calculation in the complex frequency domain becomes even more complex. For the time domain method, the short-circuit fault calculation methods in related technologies consider switching events such as DC fault occurrence, current limiter operation, and hybrid DC circuit breaker operation, but have not yet deeply considered the short-circuit fault calculation after the operation of mechanical DC circuit breakers. Compared with hybrid DC circuit breakers, mechanical DC circuit breakers have lower equipment costs, but their operation process is more complex.

[0035] This application embodiment, by combining the working principle of mechanical DC circuit breakers, divides the fault calculation of the entire DC transmission system into four fault calculation stages, establishes simplified equivalent circuits and state-space equations for the DC transmission system in different fault calculation stages, and directly performs fault calculations in the time domain. While effectively improving the fault calculation efficiency, it can achieve accurate calculation of fault currents in multi-terminal flexible DC transmission systems.

[0036] Specifically, refer to Figure 1This illustration shows a schematic diagram of a multi-terminal flexible DC transmission system provided in an embodiment of this application. Specifically, it is a multi-terminal flexible DC transmission system based on MMC, that is, a system with MMC as the core unit, and the system topology can adopt a radial network architecture. It typically involves multiple converter stations, each of which can adopt a three-phase six-arm topology. Each arm can be connected in series with an MMC submodule and an arm inductor. Each converter station can be interconnected and connected to a DC bus via positive and negative DC lines. A mechanical DC circuit breaker is typically configured at the DC bus.

[0037] Taking a five-terminal flexible DC transmission system as an example, such as Figure 1 As shown, the five converter stations (GE1, GE2, GE3, GE4 and GE5) all adopt a three-phase six-arm topology. Each arm is connected in series with an MMC submodule and an arm inductor. Among them, each MMC submodule (MMC1, MMC2, MMC3, MMC4 and MMC5) adopts a half-bridge submodule. The DC side of the MMC is connected to the DC line through a current-limiting inductor. Each converter station is interconnected through positive and negative DC lines and connected to the DC bus to form a symmetrical radial network topology.

[0038] Optionally, a mechanical DC circuit breaker can also be configured at the DC bus. The mechanical DC circuit breaker can respond to the fault current and trigger the blocking logic within 2~5ms to work with the bridge arm inductor to suppress the rise rate of the short-circuit current.

[0039] For example, such as Figure 1 The mechanical DC circuit breaker shown is a mechanical DC circuit breaker circuit structure with an auxiliary commutation branch. Specifically, it can solve the problem of arcs being difficult to extinguish in DC circuits due to the lack of a natural zero-crossing point through the synergistic effect of the commutation branch composed of mechanical switch CB, capacitor C0, inductor L0 and diode.

[0040] The extinction of the electric arc helps ensure the complete disconnection of the DC circuit in the event of a fault. During normal operation, the mechanical switch CB is closed, carrying the rated current of the DC circuit. However, in the event of a fault, the circuit needs to be disconnected. Since the DC arc lacks a natural zero-crossing point, it is difficult to extinguish, requiring the assistance of an auxiliary commutation branch. This commutation branch creates the condition for the mechanical switch CB to cross the current to zero, allowing the arc to extinguish. Specifically, as the mechanical switch CB begins to open, a DC arc is generated between the contacts. At this time, the pre-charged capacitor C0 discharges through the inductor L0 and the diode into the arc gap of the mechanical switch CB, forming a commutation current in the opposite direction to the original DC current. This commutation current, combined with the original DC current, gradually reduces the total current to zero, achieving the effect of extinguishing the arc.

[0041] Reference Figure 2This diagram illustrates a bipolar fault five-terminal flexible DC transmission system according to an embodiment of this application. It is assumed that a bipolar fault occurs on line 1 from MMC1 to the DC bus, with the fault point being n. f The embodiments of this application can perform fault calculations on flexible DC transmission systems that experience bipolar faults.

[0042] Specifically, refer to Figure 3 The diagram illustrates a flowchart of a short-circuit fault calculation method for a multi-terminal flexible DC transmission system according to an embodiment of this application, which may specifically include the following steps:

[0043] Step S301: Based on the number of sub-modules, sub-module capacitance, bridge arm inductance, and equivalent resistance of the insulated gate bipolar transistor in the sub-module when it is turned on, establish the equivalent circuit model of the DC transmission system at different fault calculation stages.

[0044] In the embodiments of this application, simplified equivalent circuits and state-space equations of the DC transmission system at different fault calculation stages are established to provide a computational basis for fault calculation at each fault calculation stage.

[0045] Specifically, by combining the working principle of mechanical DC circuit breakers, the fault calculation of the entire DC transmission system can be divided into four fault calculation stages. Based on the divided fault calculation stages, staged fault calculations can be performed to address the shortcomings of multi-terminal DC system fault calculations that do not fully consider the operation of mechanical DC circuit breakers.

[0046] For example, the fault calculation phase may include a first phase in which the mechanical DC circuit breaker does not operate when a fault occurs in the DC transmission system, a second phase in which the mechanical DC circuit breaker starts operating until the arc is extinguished, a third phase in which the arc is extinguished until the surge arrester operates, and a fourth phase in which the surge arrester operates until the fault current decays to 0.

[0047] Specifically, if a fault exists between the target modular multilevel converter submodule and the DC bus, the line from the target modular multilevel converter submodule to the DC bus is considered a faulty line, while the lines from non-target modular multilevel converter submodules to the DC bus are considered non-faulty lines. The non-target modular multilevel converter submodules are all other modular multilevel converter submodules besides the target modular multilevel converter. For example... Figure 2 As shown, the target modular multilevel converter submodule can be MMC1, meaning the line from MMC1 to the DC bus is a faulty line; the other modular multilevel converter submodules besides the target modular multilevel converter submodule are MMC2~MMC5, meaning the lines from MMC2, MMC3, MMC4 and MMC5 to the DC bus are non-faulty lines.

[0048] In one embodiment of this application, the equivalent circuit model of the first stage can be constructed first, and the equivalent circuit models of the second, third and fourth stages can be obtained by changing the equivalent circuit model of the first stage.

[0049] Optionally, in the first stage, for faulty lines, the line from the target modular multilevel converter (MMC) submodule to the fault point can be equivalently represented as a first branch consisting of an equivalent resistance of the first resistance value and a bridge arm inductance of the first inductance value connected in series; and the line from the fault point to the DC bus can be equivalently represented as a second branch consisting of an equivalent resistance of the second resistance value and a line inductance of the second inductance value connected in series. For non-faulty lines, the non-target MMC submodule is equivalently represented as a branch consisting of each submodule capacitor, each bridge arm inductance, and each equivalent resistance connected in series. The first and second branches can be referred to as faulty branches, and the equivalent circuit model for the first stage can be constructed from the faulty branches and the branches equivalent to the non-faulty lines. Here, the bridge arm inductance refers to the inductance on the bridge arm within the MMC internal structure. Since there is no MMC between the second branch (i.e., from the fault point to the DC bus), there is no bridge arm inductance; the inductance present is the equivalent line inductance of the original DC line.

[0050] Optionally, the construction of the equivalent circuit model in the second stage is as follows: in the equivalent circuit model of the first stage, the capacitance of the mechanical DC circuit breaker on the positive and negative DC lines is equal to the first capacitance value, and the inductance of the mechanical DC circuit breaker is equal to the third inductance value. Then, the branch formed by the series connection of the equivalent capacitance and inductance of the mechanical DC circuit breaker on the fault line is connected in parallel with the second branch to obtain the equivalent circuit model of the second stage.

[0051] Optionally, the construction of the equivalent circuit model for the third stage is achieved by connecting the capacitors and inductors of the mechanical DC circuit breakers on the positive and negative DC lines in series with the second branch, based on the equivalent circuit model of the first stage, to obtain the equivalent circuit model of the third stage.

[0052] Optionally, the construction of the equivalent circuit model for the fourth stage is achieved by connecting the surge arrester and the second branch in series on the equivalent circuit model for the first stage to obtain the equivalent circuit model for the fourth stage.

[0053] Step S302: Establish the state-space equation set corresponding to each equivalent circuit model.

[0054] In one embodiment of this application, the state-space equation set of the first stage can be established first. The state-space equation sets of the second, third and fourth stages can be obtained by modifying the state-space equation set of the first stage or the previous stage according to the changes in the equivalent circuit model corresponding to each stage.

[0055] Specifically, the target modular multilevel converter sub-module and non-target modular multilevel converter sub-modules, i.e., all modular multilevel converter sub-modules, can be obtained, along with the loop formed by the fault branch. Then, based on the circuit topology of the loop, the relationship between the voltages of each capacitor in the loop is obtained, resulting in a multi-order voltage relationship matrix. The number of rows in the multi-order voltage relationship matrix is ​​the same as the number of loops, and the number of columns in the multi-order voltage relationship matrix is ​​the same as the number of capacitors in the loop. At this point, the equivalent resistance matrix, equivalent inductance matrix, and equivalent capacitance matrix of the loop can be obtained. Finally, based on the multi-order voltage relationship matrix, equivalent resistance matrix, equivalent inductance matrix, and equivalent capacitance matrix, the state-space equation set for the first stage is established.

[0056] Optionally, the establishment of the state-space equations for the second stage is based on the circuit breaker capacitor discharge circuit on the positive and negative DC lines, and is obtained by modifying the multi-order voltage relationship matrix, equivalent resistance matrix, equivalent inductance matrix and equivalent capacitance matrix in the state-space equations for the first stage.

[0057] Optionally, the establishment of the state-space equations for the third stage is based on the series connection of the capacitors and inductors of the mechanical DC circuit breakers on the positive and negative DC lines, and is obtained by modifying the multi-order voltage relationship matrix, equivalent resistance matrix, and equivalent inductance matrix in the state-space equations for the second stage.

[0058] Optionally, the establishment of the state-space equations for the fourth stage is based on the series connection of surge arresters, and is obtained by modifying the state-space equations for the first stage. The multi-order voltage relationship matrix, equivalent resistance matrix, equivalent inductance matrix, and equivalent capacitance matrix in the state-space equations for the fourth stage are the same as those in the first stage.

[0059] Step S303: Solve the corresponding state-space equations in the time domain of each fault calculation stage to obtain the time-domain response of the fault current in each fault calculation stage.

[0060] In this embodiment, the DC fault current is calculated quickly and accurately by solving a set of equations, providing a powerful analytical tool for system parameter design, equipment selection, and protection research. Since the fault calculation is carried out directly in the time domain, the efficiency of fault calculation is effectively improved, and the fault current of multi-terminal flexible DC transmission system can be accurately calculated.

[0061] Optionally, the state-space equations of the first stage can be solved to obtain the time-domain response of the fault current of the DC transmission system from the occurrence of a bipolar fault to a preset first time threshold; the state-space equations of the second stage can be solved to obtain the time-domain response of the fault current of the DC transmission system from the preset first time threshold to a preset second time threshold; the state-space equations of the third stage can be solved to obtain the time-domain response of the fault current of the DC transmission system from the preset second time threshold to a preset third time threshold; and the state-space equations of the fourth stage can be solved to obtain the time-domain response of the fault current of the DC transmission system from the third time threshold to a preset fourth time threshold.

[0062] Among them, the occurrence of a bipolar fault in the DC transmission system can be t0. The preset first time threshold (i.e., t1) is used to indicate the moment when the mechanical DC circuit breaker starts to operate; the preset second time threshold (i.e., t2) is used to indicate the moment when the arc is extinguished; the preset third time threshold (i.e., t3) is used to indicate the moment when the voltage across the capacitor and inductor of the mechanical DC circuit breaker is greater than the preset voltage threshold; and the preset fourth time threshold (i.e., t4) is used to indicate the moment when the fault current decays to 0.

[0063] In some embodiments of this application, the short-circuit fault calculation is described as follows, taking into account the specific equivalent circuit models and state-space equations for each fault calculation stage:

[0064] Based on such Figure 2 The bipolar fault shown refers to a bipolar fault occurring on line 1 from MMC1 to the DC bus, with the fault point being n. f To simplify and improve computational efficiency during fault calculation, the following parameters can be used: the number of MMC submodules N, the submodule capacitance C, and the bridge arm inductance L. arm The equivalent resistance R when the IGBT (Insulated Gate Bipolar Transistor) in the submodule is turned on on MMC is equivalent to RLC model.

[0065] For example, for an n-terminal flexible DC transmission system, MMC can be used. j and MMC j Current-limiting inductor L at the outlet m Series connection is equivalent to R eqj L eqj C eqj (where j = 1, 2, 3…n):

[0066] (1)

[0067] MMC j The equivalent of line j to the straight busbar is R. j0 Lj0 For example, there exists R. 10 L 10， This represents the equivalent resistance and equivalent inductance of line 1 from MMC1 to the bus. Assume line 1 from MMC1 to the bus is at fault point n. f If there is a fault, then R 10 L 10 It can be divided into two parts, including the equivalent resistance and equivalent inductance of the line between MMC1 and the fault point, which are R and R, respectively. 1f and L 1f The equivalent resistance and equivalent inductance of the line between the fault point and the bus are R, respectively. 0f and L 0f And satisfy the following relationship:

[0068] (2)

[0069] It should be noted that the equivalent resistance R of line j j0 With inductor L j0 These pertain to DC line parameters. For a given DC system, the DC line parameters are known and determined. In the embodiments of this application, R... j0 With L j0 It can be a known quantity.

[0070] Assume the transition resistance at the fault point is R. f On line 1, from MMC1 to fault point n f If the ratio of the distance to the total length of line 1 is x, then the equivalent resistance and inductance before and after the fault point of line 1 can be:

[0071] (3)

[0072] Based on the operating characteristics of mechanical circuit breakers, the fault calculation is divided into four stages, and a simplified equivalent circuit model is constructed based on the system topology in each stage.

[0073] In the first stage, before the MMC lockout and before the mechanical circuit breaker operates at time t1, the circuit breaker switch CB is closed, the thyristor has no trigger pulse, and the fault current flows through the original line. At this time, the fault equivalent circuit model for the first stage can be as follows: Figure 4 As shown in the diagram. In this fault equivalent circuit, the MMC connected to the faulty line is designated MMC1, and the remaining MMCs are arbitrarily numbered, sequentially designated MMC2 to MMC3. n Connect to MMC j The DC line connected to the DC bus is denoted as line j. MMC j Equivalent to R eqj L eqj and C eqj A branch consisting of series connections; the positive and negative terminals of line j are both equivalent to R.j0 and L j0 Branches formed in series; specifically, for line 1, the line between MMC1 and the fault point is equivalent to R. 1f and L 1f Branches connected in series; the line between the fault point and the busbar is of equal value R. 0f and L 0f Branches formed by series connection.

[0074] Optionally, by using the MMC of the non-faulty lines, i.e., lines 2 to 5. j When connected in series with the resistance and inductance parameters of line j, it is equivalent to R jj L jj This can further simplify the fault equivalent model.

[0075] (4)

[0076] Based on the state-space method, when a bipolar fault occurs in an n-terminal system, it can be simplified into n loops. The simplified fault equivalent circuit model can be as follows: Figure 5 As shown. The MMC connected to the faulty line is designated MMC1, and the remaining MMCs can be arbitrarily numbered; the loop formed by MMC1 and the faulty branch is designated loop 1, and the loop formed by MMC2 and the faulty branch is designated loop 2. k With MMC k-1 The resulting loop is denoted as loop k (k≥3). The current reference direction for loops 1 and 2 is from the MMC to the fault point; the current reference direction for loop k is from the MMC. k To MMC k-1 .

[0077] For example, the n×1 order capacitor-voltage matrix U can be listed separately. C The n×1 order loop current matrix I, and the n×1 order capacitor current matrix I flowing through the capacitor. C .

[0078] (5)

[0079] Based on the circuit topology, the voltage relationships between the capacitors are obtained, resulting in an n×n voltage relationship matrix A. The number of rows in matrix A is the same as the number of loops, and the number of columns is the same as the number of capacitors. In matrix A, the first row and first column are both 1, and the remaining columns are both 0; the second row and second column are both 1, and the remaining columns are both 0; the k-th row and k-th column are both 1, and the (k-1)-th column is -1.

[0080] (6)

[0081] The n×n equivalent resistance matrix R, the n×n equivalent inductance matrix L, and the n×n equivalent capacitance matrix C are shown in the following equations. Where, the diagonal element R... ii L ii Let R represent the total resistance and total inductance of loop i, respectively. The remaining elements R... ij This indicates that loop i and loop j share the resistance and inductance of the line. When the loop current I... i with I j When the directions are the same, it is R. ij When the loop currents are in opposite directions, it is -R. ij When there is no shared line, R ij The value is 0. The diagonal elements of the capacitance matrix C represent the various MMCs. n The reciprocal of the equivalent capacitance, with all other elements being 0.

[0082] (7)

[0083] With the fault occurrence time t0 as t0, the capacitor voltage U C Initial value U in the first stage Ct0 Let the vector be a column vector, and the j-th element be equal to MMC. j DC voltage U just before the fault occurred dcj Flowing through C eqj Current I cj Initial value I in the first stage Cjt0 It can be the j-th loop current I j0 Negative numbers.

[0084] (8)

[0085] The initial value of the loop current in loop 1 is the line current I before the fault. 10 The initial value of the loop current I in loop j jt0 It equals the sum of the line currents from line j to line n before the fault.

[0086] (9)

[0087] The system state-space equations for the first stage are established as follows:

[0088] (10)

[0089] Substituting into equations (5) and (7), and based on the initial values ​​given in equations (8) to (9) at time t0, the fault current from the occurrence of a fault in the DC system to the start of operation of the mechanical DC circuit breaker at time t1 can be calculated, and the capacitor voltage value U at time t1 can also be obtained. Ct1 Line current value I t1 and capacitor current value I Ct1 .

[0090] In the second stage, the mechanical DC circuit breaker operates from the start until the arc is extinguished. At time t1, the circuit breaker operates, and switch CB begins to open. However, due to the presence of the arc, the line cannot be completely disconnected immediately. At this time, a trigger pulse is used to turn on the thyristor, and the circuit breaker capacitor and switch CB form a discharge circuit, generating current. Until time t2, when the current flowing through the capacitor equals the fault current of the faulty line, the current flowing through switch CB becomes zero, that is, the arc is extinguished, and the switch is completely disconnected. The equivalent values ​​of the circuit breaker capacitor and inductance are C0 and L0, respectively. The upper and lower structures are symmetrical, and the capacitor voltages are equal.

[0091] The simplified fault equivalent circuit model in the second stage can be as follows: Figure 6 As shown. According to the network topology, by adding two loops, namely the circuit breaker capacitor discharge loops on the positive and negative lines, the matrix of the first stage can be modified, which is represented as the capacitor voltage matrix U. C Add two elements U C0 The loop current matrix I is increased by two elements I. n+1 I n+2 Capacitor current matrix I c Add element i cn+1 i cn+2 That is, it can be corrected to:

[0092] (11)

[0093] The voltage relationship matrix is ​​corrected to an (n+2)×(n+2) order matrix, where the loop voltages of loop n and loop n+1 are both capacitor voltages U. c0 The corrected relation matrix A increases by two rows and two columns, with the new elements on the diagonal being 1 and the rest being 0, as shown in the following formula:

[0094] (12)

[0095] The equivalent resistance matrix R is updated with two rows and two columns, and all new elements are 0; the equivalent inductance matrix L is updated with two rows and two columns, and the new element on the diagonal is L0, while the rest are 0; the equivalent capacitance matrix is ​​updated with two rows and two columns, and the new element on the diagonal is 1 / C0, while the rest are 0.

[0096] (13)

[0097] The relationship between capacitor current and loop current is: i c1 i cn With the newly added capacitor current element i c(n+1) and i c(n+2) They are I1 and I respectively n and the new circuit current I (n+1) and I(n+2) The negative value of i cj For I j+1 minus I j (1 < j < n).

[0098] (14)

[0099] The matrix equation can be written as follows:

[0100] (15)

[0101] At this moment, the initial values ​​of the capacitor voltage, the initial value of the loop current, and the initial value of the capacitor current in loops 1 to 5 are respectively the values ​​of U at time t1 when the first stage ends. Ct1 I t1 and I ct1 The initial voltage values ​​of the capacitors in loops n+1 and n+2 are equal to the initial voltage U of the internal capacitors of the mechanical DC circuit breaker. c0 Capacitor current i c（n+1） i c（n+2） The initial value is 0, and the loop current I of loops (n+1) and (n+2) is... n+1 I n+2 The initial value is also 0.

[0102] Substituting the initial values ​​of voltage and current into equation (14), the current in each loop is calculated. When the current in the circuit breaker capacitor discharge loop, i.e., I0, is the same as the current in loop 2, I2, the current flowing through the switch is 0, i.e., the switch is completely open, and stage two ends. The time at this point is recorded as t2. The time-domain response of the fault current in stage two, i.e., from t1 to t2, is obtained, and the capacitor voltage U at time t2 is also obtained. ct2 , loop current I t2 Capacitor current I Ct2 .

[0103] The third stage is from the extinction of the arc to the operation of the surge arrester. At time t2, after the switch is completely open, it's equivalent to the circuit breaker's capacitor and inductor being directly connected to the line. Current flows through this branch, and capacitor C0 continues to discharge and be reverse-charged until the voltage across the circuit breaker rises to the operating voltage of the surge arrester MOV (Metal Oxide Varistor, the core component for overvoltage protection), which is 1.5 times the line's rated voltage U. N When the MOV circuit turns on, the fault current is transferred to the MOV branch, which is called time t3. The circuit breaker capacitors and inductors of the positive and negative lines are equivalently connected in series. The simplified fault equivalent circuit model for the third stage can be shown as follows: Figure 7 As shown.

[0104] At this point, due to the series connection of the two circuit breaker capacitors at the positive and negative terminals, the capacitor voltage matrix and capacitor current matrix in stage three are equal to the capacitor voltage matrix and capacitor current matrix in stage two. The number of loops returns to n, and the (n+1)th and (n+2)th rows of the loop current matrix are deleted.

[0105] (16)

[0106] The circuit voltage of loop 2 changes due to the series insertion of the circuit breaker capacitor. The capacitor voltage relationship matrix A is corrected to (n+2)×n order. Rows (n+1) and (n+2) are deleted, and the elements in the (n+1)th and (n+2)th columns of the second row become 1.

[0107] (17)

[0108] Since the circuit breaker has no series resistor, the resistance matrix in each circuit is the same as the resistance matrix in stage one. That is, the resistance matrix in stage two is obtained by deleting the (n+1)th row, (n+2)th row, (n+1)th column, and (n+2)th column, resulting in an n×n order. The inductance matrix is ​​also obtained by deleting the (n+1)th row, (n+2)th row, and (n+1)th column, and (n+2)th column. However, the series inductance in circuit two is changed, that is, 2L0 is added to the second row and second column of the inductance matrix. Since the size and number of capacitors have not changed compared to stage two, the capacitor matrix is ​​the same as the capacitor matrix in stage two.

[0109] (18)

[0110] The relationship between the capacitor current flowing through capacitor C0 and the loop current is corrected as follows:

[0111] (19)

[0112] The remaining capacitor current I C The relationship with the loop current remains unchanged, as shown in equation (14).

[0113] The matrix equation remains as follows:

[0114] (20)

[0115] Capacitor voltage U C Loop current I, capacitor current I c The initial value for stage three is the capacitor voltage U calculated at time t2. Ct2 , loop current value I t2 and capacitor current I ct2 .

[0116] Substitute the voltage and current matrices into the matrix equations, and calculate the current and capacitor voltage of each loop based on the initial values ​​of voltage and current. Simultaneously, calculate the magnitude U of the voltage across the circuit breaker capacitor and inductor. B :

[0117] (twenty one)

[0118] WhenU B Size equal to 1.5U N Let this moment be t3. We can obtain the time-domain response curve of the fault current from time t2 to t3, and the capacitor voltage value U at time t3. Ct3 , loop current value I t3 and the capacitor current value I at this time ct3 .

[0119] In the fourth stage, the surge arrester operates until the current decays to zero. The fault current in the DC line flows through the MOV, gradually decreasing and reaching zero at time t4, thus isolating the fault. The simplified fault equivalent circuit model for the fourth stage can be described as follows: Figure 8 As shown.

[0120] The voltage across a single surge arrester is 1.5U. N U N The voltage at which the positive or negative line is grounded is the rated voltage. At this point, the capacitor voltage matrix, loop current matrix, capacitor current matrix, relationship matrix, resistance matrix, inductance matrix, and capacitance matrix are all the same as in stage one. However, the loop voltage in loop two changes, and the original state-space equations are corrected as follows:

[0121] (twenty two)

[0122] The various voltage and current U in this equation C 、I、I c The initial values ​​are the values ​​U obtained at time t3. Ct3 I t3 I ct3 Substituting this into the equation, we can obtain the time-domain response of the fault current in stage four.

[0123] Reference Figure 9 The diagram illustrates the overall computational process provided in the embodiments of this application.

[0124] After a bipolar fault occurs in a DC transmission system, if the fault occurrence time is less than a preset first time threshold, the current fault calculation stage enters the first stage. At this time, the voltage and current matrix equations can be constructed and solved, and the voltage U of each capacitor at time t1 can be recorded. cj With loop current I jSpecifically, the fault current from the occurrence of a fault in the DC system to the start of operation of the mechanical DC circuit breaker at time t1 is calculated, and the capacitor voltage value U at time t1 is also obtained. Ct1 Line current value I t1 and capacitor current value I Ct1 .

[0125] If the fault occurrence time reaches the preset first time threshold, and the capacitor discharge circuit current of the mechanical DC circuit breaker is less than the preset circuit current, i.e., the circuit current of circuit 2, then the current fault calculation stage enters the second stage, which is characterized by the circuit breaker capacitor being close to the discharge stage when the switch CB is not completely open. At this time, the voltage and current matrix equation can be corrected and solved, and the voltage U of each capacitor can be recorded. cj With loop current I j Specifically, the time-domain response of the fault current in stage two, from time t1 to t2, is obtained, and the capacitor voltage U at time t2 is also obtained. ct2 , loop current I t2 Capacitor current I Ct2 .

[0126] If the capacitor discharge circuit current of the mechanical DC circuit breaker reaches the preset circuit current, and the absolute value of the voltage across the capacitor and inductor of the mechanical DC circuit breaker is less than a preset voltage threshold, the preset voltage threshold can be, for example, 1.5U. N , that is |U c0 +L0dI2 / d t |<1.5U N Then the current fault calculation stage enters the third stage, specifically characterized by the complete disconnection of switch CB and the circuit breaker capacitors and inductors being connected in series with the line. At this point, the voltage and current matrix equations can be corrected and solved, and the voltage U of each capacitor can be recorded. cj With loop current I j Specifically, the fault current time-domain response curve from time t2 to t3 was obtained, as well as the capacitor voltage value U at time t3. Ct3 , loop current value I t3 and the capacitor current value I at this time ct3 .

[0127] If the absolute value of the voltage across the capacitor and inductor of a mechanical DC circuit breaker reaches a preset voltage threshold, i.e., |U c0 +L0dI2 / d t ≥1.5U N If the loop current of the preset circuit is greater than 0, then the current fault calculation stage enters the fourth stage, which is the stage where the surge arrester MOV is inserted into the circuit. At this time, the voltage and current matrix equations can be corrected and solved, and the voltage U of each capacitor can be recorded. cj With loop current I j Specifically, the time-domain response of the fault current in stage four is obtained.

[0128] In the fourth stage, the capacitors and inductors can be considered as removed circuits, and the voltage across them is no longer evaluated. If the loop current of the preset circuit is less than or equal to 0, it indicates that the fault current has dropped to 0, and the calculation process ends.

[0129] Optionally, a platform such as PSCAD / EMTDC can be built. Figure 1 The five-terminal flexible DC transmission system shown adopts a unipolar symmetrical connection method. A circuit breaker is installed near the busbar with an operating time of 3ms. To study the most severe fault conditions, the line fault current under metallic fault conditions is simulated and verified.

[0130] The parameters of the converter station, line, and circuit breaker are shown in Tables 1 to 3 below:

[0131] Table 1 Converter station parameters

[0132]

[0133] Table 2 Line Parameters

[0134]

[0135] Table 3 Circuit Breaker Parameters

[0136]

[0137] To verify the accuracy of the above calculation method, a fault was set on line 2. When a metallic fault occurred at the MMC2 outlet, the simulated value and the calculated value of the fault line current were compared as follows: Figure 10 As shown. Figure 10 As shown, the circuit breaker tripped 3ms after the fault, the fault current reached a maximum of 10.28kA at around 4.11ms, and dropped to 0 at around 11.55ms.

[0138] When a metallic fault occurs in the middle section of the line where MMC2 is located, the simulated value and the calculated value of the fault line current can be compared as follows: Figure 11 As shown. Figure 11 As shown, the circuit breaker tripped 3ms after the fault, the fault current reached a maximum of 14.23kA 3.8ms after the fault, and dropped to 0 at around 10.75ms.

[0139] When a metallic fault occurs at the end of the line where MMC2 is located, at a distance of 1 / 3 from the busbar, the simulated value and the calculated value of the fault line current can be compared as follows: Figure 12 As shown. Figure 12 As shown, the circuit breaker tripped 3ms after the fault, the fault current reached a maximum of 16.56kA at 3.7ms, and dropped to 0 at around 10.43ms.

[0140] The error comparison of the peak fault current under the above three operating conditions is shown in Table 4 below:

[0141] Table 4 Comparison of peak current errors between simulation and calculation methods

[0142]

[0143] In this embodiment, the frequency domain method is complex in converting fault current from the complex frequency domain to the time domain, and is highly dependent on related algorithms. Furthermore, the fault calculation in the complex frequency domain becomes even more complex when the switching actions of power electronic devices cause multiple changes in the DC system state. This embodiment can directly perform fault calculation in the time domain, thus avoiding the aforementioned problems. Moreover, existing time domain methods consider switching events such as DC fault occurrence, current limiter operation, and hybrid DC circuit breaker operation, but do not deeply consider short-circuit fault calculation after mechanical DC circuit breaker operation. Compared to hybrid DC circuit breakers, mechanical DC circuit breakers have lower equipment costs, but their operation process is more complex. This embodiment, by combining the working principle of mechanical DC circuit breakers, divides the fault calculation of the entire DC system into four stages, establishing simplified equivalent circuits and state-space equations for the DC system at different stages. This effectively improves fault calculation efficiency while achieving accurate calculation of fault current in multi-terminal DC systems.

[0144] It should be noted that the short-circuit calculation method provided in this application embodiment is not only applicable to the calculation of bipolar short-circuit faults in symmetrical unipolar DC systems, but also, through extension, applicable to the calculation of bipolar short-circuit faults and unipolar ground faults in symmetrical bipolar DC systems. In this respect, this application embodiment does not impose any limitations.

[0145] In this embodiment, by combining the working principle of mechanical DC circuit breakers, the fault calculation of the entire DC transmission system is divided into four fault calculation stages. Simplified equivalent circuits and state-space equations of the DC transmission system in different fault calculation stages are established, and fault calculation is carried out directly in the time domain. While effectively improving the fault calculation efficiency, it can realize the accurate calculation of fault current of multi-terminal flexible DC transmission system.

[0146] It should be noted that, for the sake of simplicity, the method embodiments are all described as a series of actions. However, those skilled in the art should understand that the embodiments of this application are not limited to the described order of actions, because according to the embodiments of this application, some steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also understand that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily required by the embodiments of this application.

[0147] Reference Figure 13This diagram illustrates a structural block diagram of a short-circuit fault calculation device for a multi-terminal flexible DC transmission system according to an embodiment of this application. The multi-terminal flexible DC transmission system involves multiple converter stations, each employing a three-phase six-arm topology. Each arm is connected in series with a modular multilevel converter submodule and an arm inductor. Each converter station is interconnected and connected to a DC bus via positive and negative DC lines. A mechanical DC circuit breaker is configured at the DC bus, which may specifically include the following modules:

[0148] Equivalent circuit module 1301 is used to establish equivalent circuit models of the DC transmission system at different fault calculation stages based on the number of sub-modules, sub-module capacitance, bridge arm inductance, and equivalent resistance of the insulated gate bipolar transistors in the sub-modules when they are turned on, and to establish the state space equation set corresponding to each equivalent circuit model. The fault calculation stages include the first stage when the mechanical DC circuit breaker does not operate when a fault occurs in the DC transmission system, the second stage from the start of operation of the mechanical DC circuit breaker to the extinction of the arc, the third stage from the extinction of the arc to the operation of the surge arrester, and the fourth stage from the operation of the surge arrester to the decay of the fault current to 0.

[0149] The fault current calculation module 1302 is used to solve the corresponding state-space equations in the time domain of each fault calculation stage to obtain the fault current time domain response of each fault calculation stage.

[0150] In some embodiments of this application, the equivalent circuit module 1301 may include the following sub-modules:

[0151] An equivalent circuit model construction submodule is used to define the line from the target modular multilevel converter submodule to the DC bus as a faulty line if a fault exists at the point between the target modular multilevel converter submodule and the DC bus. Lines from other modular multilevel converter submodules (excluding the target submodule) to the DC bus are considered non-faulty lines. In the first stage, for faulty lines, the line from the target modular multilevel converter submodule to the fault point is equivalent to a first branch consisting of an equivalent resistance of the first resistance value and a bridge arm inductance of the first inductance value connected in series. A second branch is also defined, consisting of an equivalent resistance of the second resistance value and a line inductance of the second inductance value connected in series. The first and second branches are considered faulty branches. For non-faulty lines, other modular multilevel converter submodules (excluding the target submodule) are equivalent to branches consisting of each submodule capacitor, each bridge arm inductor, and each equivalent resistance connected in series. The equivalent circuit model for the first stage is constructed from the branches equivalent to the faulty and non-faulty lines.

[0152] In some embodiments of this application, the equivalent circuit model construction submodule is further used to, in the first stage equivalent circuit model, equate the capacitance of the mechanical DC circuit breaker on the positive and negative DC lines to a first capacitance value, and equate the inductance of the mechanical DC circuit breaker to a third inductance value; connect the branch formed by the series connection of the equivalent capacitance and inductance of the mechanical DC circuit breaker on the fault line with the second branch in parallel to obtain the second stage equivalent circuit model; in the first stage equivalent circuit model, connect the capacitance and inductance of the mechanical DC circuit breaker on the positive and negative DC lines with the second branch in series to obtain the third stage equivalent circuit model; and in the first stage equivalent circuit model, connect the surge arrester with the second branch in series to obtain the fourth stage equivalent circuit model.

[0153] In some embodiments of this application, the equivalent circuit module 1301 may include the following sub-modules:

[0154] A state-space equations establishment submodule is used to obtain the loop formed by the target modular multilevel converter submodule and other modular multilevel converter submodules besides the target modular multilevel converter, and the fault branch; the relationship between the voltages of each capacitor is obtained according to the circuit topology of the loop, resulting in a multi-order voltage relationship matrix; the number of rows in the multi-order voltage relationship matrix is ​​the same as the number of loops, and the number of columns in the multi-order voltage relationship matrix is ​​the same as the number of capacitors in the loop; the equivalent resistance matrix, equivalent inductance matrix, and equivalent capacitance matrix of the loop are obtained; based on the multi-order voltage relationship matrix, equivalent resistance matrix, equivalent inductance matrix, and equivalent capacitance matrix, the first-stage state-space equations are established.

[0155] In some embodiments of this application, the state-space equation set establishment submodule is further used to modify the multi-order voltage relationship matrix, equivalent resistance matrix, equivalent inductance matrix, and equivalent capacitance matrix in the state-space equation set of the first stage based on the circuit breaker capacitor discharge circuit on the positive and negative DC lines, to obtain the state-space equation set of the second stage; based on the series connection of the capacitor and inductor of the mechanical DC circuit breaker on the positive and negative DC lines, modify the multi-order voltage relationship matrix, equivalent resistance matrix, and equivalent inductance matrix in the state-space equation set of the second stage, to obtain the state-space equation set of the third stage; based on the series connection of the surge arrester, modify the state-space equation set of the first stage, to obtain the state-space equation set of the fourth stage; wherein, the multi-order voltage relationship matrix, equivalent resistance matrix, equivalent inductance matrix, and equivalent capacitance matrix in the state-space equation set of the fourth stage are the same as those in the first stage.

[0156] In some embodiments of this application, the fault current calculation module 1302 may include the following sub-modules:

[0157] The fault current time-domain response solving submodule is used to solve the state-space equations for the first stage, obtaining the fault current time-domain response of the DC transmission system from the occurrence of a bipolar fault to a preset first time threshold; solve the state-space equations for the second stage, obtaining the fault current time-domain response of the DC transmission system from the preset first time threshold to a preset second time threshold; solve the state-space equations for the third stage, obtaining the fault current time-domain response of the DC transmission system from the preset second time threshold to a preset third time threshold; and solve the state-space equations for the fourth stage, obtaining the fault current time-domain response of the DC transmission system from the third time threshold to a preset fourth time threshold. The preset first time threshold indicates the moment when the mechanical DC circuit breaker begins to operate; the preset second time threshold indicates the moment when the arc is extinguished; the preset third time threshold indicates the moment when the voltage across the capacitor and inductor of the mechanical DC circuit breaker is greater than a preset voltage threshold; and the preset fourth time threshold indicates the moment when the fault current decays to zero.

[0158] In this embodiment, by combining the working principle of mechanical DC circuit breakers, the fault calculation of the entire DC transmission system is divided into four fault calculation stages. Simplified equivalent circuits and state-space equations of the DC transmission system in different fault calculation stages are established, and fault calculation is carried out directly in the time domain. While effectively improving the fault calculation efficiency, it can realize the accurate calculation of fault current of multi-terminal flexible DC transmission system.

[0159] As the device embodiment is basically similar to the method embodiment, the description is relatively simple, and relevant parts can be found in the description of the method embodiment.

[0160] This application also provides an electronic device, see embodiments thereof. Figure 14 The provided electronic device 1400 includes a memory 1410, a processor 1420, and a computer program 1411 stored in the memory 1410 and capable of running on the processor 1420. When the computer program 1411 is executed by the processor, it implements the various processes of the above-described embodiment of the short-circuit fault calculation method for multi-terminal flexible DC transmission system and can achieve the same technical effect. To avoid repetition, it will not be described again here.

[0161] This application also provides a computer-readable storage medium, see embodiments thereof. Figure 15 The computer-readable storage medium 1500 provided stores a computer program 1411. When the computer program 1411 is executed by the processor, it implements the various processes of the above-described embodiment of the short-circuit fault calculation method for multi-terminal flexible DC transmission system and can achieve the same technical effect. To avoid repetition, it will not be described again here.

[0162] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0163] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of the embodiments of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments described herein can be implemented in an order other than that illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or modules is not necessarily limited to those steps or modules explicitly listed, but may include other steps or modules not explicitly listed or inherent to these processes, methods, products, or devices. The division of modules in the embodiments of this application is merely a logical division; in actual applications, there may be other division methods. For example, multiple modules may be combined into or integrated into another system, or some features may be ignored or not performed. Additionally, the shown or discussed mutual coupling or direct coupling or communication connection may be through some interface, and the indirect coupling or communication connection between modules may be electrical or other similar forms, none of which are limited in the embodiments of this application. Furthermore, the modules or sub-modules described as separate components may or may not be physically separated, may or may not be physical modules, or may be distributed among multiple circuit modules. Some or all of the modules may be selected according to actual needs to achieve the purpose of the embodiments of this application.

[0164] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0165] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and modules described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0166] In the embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of modules is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple modules or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be indirect coupling or communication connection through some interfaces, apparatuses, or modules, and may be electrical, mechanical, or other forms.

[0167] The modules described as separate components may or may not be physically separate. The components shown as modules may or may not be physical modules; that is, they may be located in one place or distributed across multiple network modules. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0168] Furthermore, the functional modules in the various embodiments of this application can be integrated into one processing module, or each module can exist physically separately, or two or more modules can be integrated into one module. The integrated module can be implemented in hardware or as a software functional module. If the integrated module is implemented as a software functional module and sold or used as an independent product, it can be stored in a computer-readable storage medium.

[0169] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented in software, it can be implemented, in whole or in part, as a computer program product.

[0170] The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, Digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium may be any available medium that a computer can store or a data storage device such as a server or data center that integrates one or more available media. The available medium may be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., a solid-state drive (SSD)).

[0171] This application describes embodiments with reference to flowchart illustrations and / or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of this application. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing terminal device to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal device, generate instructions for implementing the flowchart illustrations. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0172] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing terminal device to operate in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The functions specified in one or more boxes; these computer program instructions may also be loaded onto a computer or other programmable data processing terminal equipment to cause a series of operational steps to be performed on the computer or other programmable terminal equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable terminal equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0173] Although preferred embodiments of the present application have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of the embodiments of the present application.

[0174] Finally, it should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties. Furthermore, the collection, use and processing of the relevant data must comply with the relevant laws, regulations and standards of the relevant countries and regions, and corresponding operation portals are provided for users to choose to authorize or refuse.

[0175] The technical solutions provided in the embodiments of this application have been described in detail above. Specific examples have been used in the embodiments of this application to illustrate the principles and implementation methods of the embodiments of this application. The description of the above embodiments is only for the purpose of helping to understand the methods and core ideas of the embodiments of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the embodiments of this application. Therefore, the content of this specification should not be construed as a limitation on the embodiments of this application.

Claims

1. A method for calculating short-circuit faults in a multi-terminal flexible DC transmission system, characterized in that, The multi-terminal flexible DC transmission system has multiple converter stations. Each bridge arm is connected in series with a modular multilevel converter submodule and a bridge arm inductor. Each converter station is interconnected via positive and negative DC lines and connected to a DC bus. A mechanical DC circuit breaker is installed at the DC bus. The method includes: Based on the number of submodules, submodule capacitance, bridge arm inductance, and equivalent resistance of the insulated gate bipolar transistors (IGBTs) in the modular multilevel converter submodules when they are turned on, equivalent circuit models of the DC transmission system at different fault calculation stages are established, and state-space equation sets corresponding to each equivalent circuit model are established. The fault calculation stages include the first stage when the mechanical DC circuit breaker does not operate when a fault occurs in the DC transmission system, the second stage from when the mechanical DC circuit breaker starts operating until the arc is extinguished, the third stage from when the arc is extinguished until the surge arrester operates, and the fourth stage from when the surge arrester operates until the fault current decays to 0. Solve the corresponding state-space equations in the time domain for each fault calculation stage to obtain the time-domain response of the fault current for each fault calculation stage.

2. The method according to claim 1, characterized in that, The process of establishing equivalent circuit models of the DC transmission system at different fault calculation stages based on the number of submodules, submodule capacitance, bridge arm inductance, and equivalent resistance of the insulated-gate bipolar transistors (IGBTs) in the submodules of the modular multilevel converter submodule includes: If a fault exists between the target modular multilevel converter submodule and the DC bus, the line from the target modular multilevel converter submodule to the DC bus is a faulty line. Among the submodules, the lines from non-target modular multilevel converter submodules to the DC bus are non-faulty lines. The non-target modular multilevel converter submodules are other modular multilevel converter submodules besides the target modular multilevel converter. In the first stage, for the faulty line, the line between the target modular multilevel converter submodule and the fault point is equivalent to a first branch consisting of an equivalent resistance of a first resistance value and a bridge arm inductance of a first inductance value connected in series; and the line between the fault point and the DC bus is equivalent to a second branch consisting of an equivalent resistance of a second resistance value and a line inductance of a second inductance value connected in series; the first branch and the second branch are faulty branches; For the non-faulty lines, the other modular multilevel converter sub-modules, except for the target modular multilevel converter, are equivalent to branches composed of each sub-module capacitor, each bridge arm inductor, and each equivalent resistor connected in series. The equivalent circuit model for the first stage is constructed by the faulty branch and the equivalent branch of the non-faulty line.

3. The method according to claim 2, characterized in that, The establishment of equivalent circuit models of the DC transmission system at different fault calculation stages also includes: In the equivalent circuit model of the first stage, the capacitance of the mechanical DC circuit breaker on the positive and negative DC lines is equal to the first capacitance value, and the inductance of the mechanical DC circuit breaker is equal to the third inductance value; the branch formed by the series connection of the equivalent capacitance and inductance of the mechanical DC circuit breaker on the fault line is connected in parallel with the second branch to obtain the equivalent circuit model of the second stage. In the equivalent circuit model of the first stage, the capacitance and inductance of the mechanical DC circuit breaker on the positive and negative DC lines are connected in series with the second branch to obtain the equivalent circuit model of the third stage. Based on the equivalent circuit model of the first stage, the surge arrester is connected in series with the second branch to obtain the equivalent circuit model of the fourth stage.

4. The method according to claim 2, characterized in that, The establishment of the state-space equation set corresponding to each equivalent circuit model includes: Obtain the loop formed by the modular multilevel converter submodule and the faulty branch; The relationship between the voltages of each capacitor in the circuit is obtained based on the circuit topology of the circuit, resulting in a multi-order voltage relationship matrix; the number of rows in the multi-order voltage relationship matrix is ​​the same as the number of circuits, and the number of columns in the multi-order voltage relationship matrix is ​​the same as the number of capacitors in the circuit; Obtain the equivalent resistance matrix, equivalent inductance matrix, and equivalent capacitance matrix of the circuit; Based on the multi-order voltage relationship matrix, the effective resistance matrix, the equivalent inductance matrix, and the equivalent capacitance matrix, the state-space equation set for the first stage is established.

5. The method according to claim 4, characterized in that, The process of establishing the state-space equation set corresponding to each equivalent circuit model also includes: Based on the circuit breaker capacitor discharge circuit on the positive and negative DC lines, the multi-order voltage relationship matrix, equivalent resistance matrix, equivalent inductance matrix and equivalent capacitance matrix in the state space equation set of the first stage are corrected to obtain the state space equation set of the second stage. Based on the series connection of the capacitor and inductor of the mechanical DC circuit breaker on the positive and negative DC lines, the multi-order voltage relationship matrix, equivalent resistance matrix and equivalent inductance matrix in the state space equation set of the second stage are corrected to obtain the state space equation set of the third stage. Based on the series connection of the surge arresters, the state space equations of the first stage are modified to obtain the state space equations of the fourth stage; wherein, the multi-order voltage relationship matrix, equivalent resistance matrix, equivalent inductance matrix and equivalent capacitance matrix in the state space equations of the fourth stage are the same as those in the first stage.

6. The method according to claim 1, characterized in that, The method further includes: After a bipolar fault occurs in the DC transmission system, if the fault occurrence time is less than a preset first time threshold, the current fault calculation stage enters the first stage. If the fault occurrence time period reaches the preset first time threshold, and the capacitor discharge circuit current of the mechanical DC circuit breaker is less than the circuit current of the preset circuit, then the current fault calculation stage enters the second stage; the preset first time threshold is used to indicate the moment when the mechanical DC circuit breaker starts to operate. If the capacitor discharge circuit current of the mechanical DC circuit breaker reaches the circuit current of the preset circuit, and the absolute value of the voltage across the capacitor and inductor of the mechanical DC circuit breaker is less than the preset voltage threshold, then the current fault calculation stage enters the third stage. If the absolute value of the voltage across the capacitor and inductor of the mechanical DC circuit breaker reaches the preset voltage threshold, and the loop current of the preset circuit is greater than 0, then the current fault calculation stage enters the fourth stage. If the loop current of the preset loop is less than or equal to 0, the calculation process ends.

7. The method according to claim 6, characterized in that, The step of solving the corresponding state-space equations in the time domain at each fault calculation stage to obtain the fault current time-domain response at each fault calculation stage includes: Solve the state-space equations of the first stage to obtain the fault current time-domain response of the DC transmission system from the occurrence of a bipolar fault to the preset first time threshold; Solving the state-space equations of the second stage yields the fault current time-domain response of the DC transmission system from the preset first time threshold to the preset second time threshold; the preset second time threshold is used to indicate the moment when the arc is extinguished. Solving the state-space equations of the third stage yields the fault current time-domain response of the DC transmission system from the preset second time threshold to the preset third time threshold; the preset third time threshold is used to indicate the moment when the voltage across the capacitor and inductor of the mechanical DC circuit breaker is greater than a preset voltage threshold. Solve the state-space equations of the fourth stage to obtain the fault current time-domain response of the DC transmission system from the third time threshold to the preset fourth time threshold; the preset fourth time threshold is used to indicate the moment when the fault current decays to 0.

8. A short-circuit fault calculation device for a multi-terminal flexible DC transmission system, characterized in that, The multi-terminal flexible DC transmission system has multiple converter stations. Each bridge arm is connected in series with a modular multilevel converter submodule and a bridge arm inductor. Each converter station is interconnected via positive and negative DC lines and connected to a DC bus. A mechanical DC circuit breaker is installed at the DC bus. The device includes: An equivalent circuit module is used to establish equivalent circuit models of the DC transmission system at different fault calculation stages based on the number of sub-modules, sub-module capacitance, bridge arm inductance, and equivalent resistance of the insulated gate bipolar transistors in the sub-modules when they are turned on, and to establish state-space equation sets corresponding to each equivalent circuit model. The fault calculation stages include a first stage when the mechanical DC circuit breaker does not operate when a fault occurs in the DC transmission system, a second stage from the start of operation of the mechanical DC circuit breaker to the extinction of the arc, a third stage from the extinction of the arc to the operation of the surge arrester, and a fourth stage from the operation of the surge arrester to the decay of the fault current to 0. The fault current calculation module is used to solve the corresponding state-space equations in the time domain of each fault calculation stage to obtain the fault current time-domain response of each fault calculation stage.

9. An electronic device, characterized in that, include: A processor, a memory, and a computer program stored in the memory and capable of running on the processor, wherein the computer program, when executed by the processor, implements the short-circuit fault calculation method for the multi-terminal flexible DC transmission system as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, A computer program is stored on the computer-readable storage medium, which, when executed by a processor, implements the short-circuit fault calculation method for the multi-terminal flexible DC transmission system as described in any one of claims 1 to 7.

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