A black start scenario-oriented energy storage PCS fast response control system

Abstract

The application discloses a kind of black start scene-oriented energy storage PCS fast response control system, it is related to electric control technical field, system includes: black start trigger judging module, target reconstruction and sequence component decomposition module and black start stable maintenance module;Wherein, black start trigger judging module is with the set sampling interval continuous collection three-phase voltage sequence and three-phase current sequence, the time of black start trigger is recorded as black start starting point;Target reconstruction and sequence component decomposition module after judging black start trigger, complete the time alignment of three-phase voltage sequence and three-phase current sequence, and the voltage reconstruction is guided mapping as three-phase voltage target sequence;Black start stable maintenance module when the nominal line voltage effective value of three-phase voltage target sequence meets the set steady condition, it is transferred into steady state template execution phase, until external power supply meets the set criterion condition.The application significantly improves the response speed of black start process, current control accuracy and voltage quality.

Description

Technical Field

[0001] This invention belongs to the field of large-scale power grid intelligent dispatching systems and relates to the field of electrical control technology, and in particular to a fast response control system for energy storage PCS for black start scenarios. Background Technology

[0002] In modern power system operation, black start is a process of gradually restoring system operation by relying on specific power supply units and control strategies when the power grid is completely de-energized and external power sources are unavailable. With the rapid growth of the proportion of renewable energy and the widespread deployment of large-scale energy storage systems in grid regulation, energy storage-based black start technology has gradually become an important direction for research and engineering applications. Energy storage systems have the characteristics of rapid start-up and shutdown, bidirectional power regulation, and fast response speed. They can start independently when the external power grid is de-energized, and provide stable voltage and frequency output through the power conversion system (PCS) to provide starting conditions for critical loads, communication systems, and some generator sets, thereby guiding the gradual restoration of the power grid. However, in the black start scenario, because the system is completely isolated, key operating quantities such as voltage, frequency, and current lack external references, and the load characteristics and the equivalent impedance of the power grid are unknown before startup, which poses significant challenges to the startup and control of the energy storage PCS.

[0003] Most existing black-start technologies based on energy storage rely on a constant voltage and frequency control strategy. This means that upon detecting a power outage in the external grid, the power control system (PCS) directly outputs the target voltage and frequency according to a preset target. However, in practical engineering, this strategy presents two significant problems. First, there is the risk of current surges. In the initial stage of a black start, the electrical system at the connection point may contain numerous static loads, inductive components, and long-distance transmission lines. Directly applying the target voltage can lead to excessively large instantaneous current peaks, triggering PCS protection or damaging power devices. Second, there is the risk of dynamic instability. Without an external synchronization source, the PCS needs to simultaneously establish voltage amplitude and phase references. If the establishment process is too rapid or phase balancing is insufficient, it can easily cause output voltage oscillations or even loss of control. Summary of the Invention

[0004] The purpose of this invention is to provide a fast-response control system for energy storage PCS in black-start scenarios. Through the coordinated operation of a black-start trigger determination module, a target reconstruction and sequence component decomposition module, and a black-start stability maintenance module, it achieves dynamic control of the entire process—voltage ramp-up, phase balancing, amplitude equalization, and current limiting constraints—under a unified time reference. This system can quickly and safely establish a stable three-phase voltage output when the external power source fails, and maintain system observability and operational stability under current-limiting priority conditions until the external power source is restored. Compared to existing technologies, this system significantly improves the response speed, current control accuracy, and voltage quality during the black-start process, and possesses strong adaptability and reliability for engineering applications.

[0005] To address the aforementioned technical problems, this invention provides a rapid response control system for energy storage PCS (Power Control System) in black-start scenarios, comprising: a black-start trigger determination module, a target reconstruction and sequence component decomposition module, and a black-start stability maintenance module. The black-start trigger determination module continuously acquires three-phase voltage and current sequences at a set sampling interval and confirms whether a black start has been triggered. If a black start is confirmed, the trigger time is recorded as the black-start start point. After determining that a black start has been triggered, the target reconstruction and sequence component decomposition module aligns the three-phase voltage and current sequences in time. Under a unified time reference, it establishes current-limiting constraints based on the current response caused by voltage changes, and generates the voltage guide for black start in a step-by-step manner, progressively reconstructing it with current limiting as the primary condition. When a single step or cumulative step may exceed the limit, incremental downsampling and silent step insertion are used to avoid current limiting violations. Subsequently, the aligned three-phase voltage sequence is decomposed into zero-sequence, positive-sequence, and negative-sequence components. Zero-sequence elimination is performed, and phase and amplitude balancing is performed according to the positive and negative sequences. The reconstructed voltage guide is mapped to a three-phase voltage target sequence, which contains three-phase voltage targets arranged in time steps. Finally, the three-phase voltage target sequence is frozen and executed in time sequence. When the nominal line voltage effective value of the three-phase voltage target sequence meets the set steady-state conditions, the black-start stability maintenance module enters the steady-state template execution stage. In subsequent time steps, the three-phase voltage target sequence is subjected to periodic micro-amplitude swings according to the preset steady-state template, and the current limiting priority is maintained until the external power supply meets the set criterion conditions.

[0006] Furthermore, the black-start trigger determination module confirms black-start triggering when the absolute value of any three-phase voltage sample in the three-phase voltage sequence sampled within 200 milliseconds is less than 1 volt and the frequency cannot be determined from the three-phase voltage sequence within 200 milliseconds; the sampling interval for the three-phase voltage sequence and the three-phase current sequence is from 100 microseconds to 500 microseconds.

[0007] Furthermore, the target reconstruction and sequence component decomposition module statistically analyzes the adjacent sampling time intervals of the three-phase voltage sequence and the three-phase current sequence within 50 milliseconds before and after the black start point, and takes the minimum value as the time step; with the black start point as the zero time, it generates continuous time indices forward according to this time step; at each time index, the sequence of any missing sample is filled with the nearest historical sample no later than that time index, so as to achieve time alignment between the three-phase voltage sequence and the three-phase current sequence.

[0008] Furthermore, the process of establishing current-limiting constraints in the target reconstruction and sequence component decomposition module includes: applying four step detections of the voltage target unit step size sequentially from time zero, each lasting 10 time steps, with a 5-time-step zero-increment interval inserted between adjacent step detections; recording the current peak changes of the three-phase current samples during each detection to form four sample pairs of voltage target unit step size and current peak changes; establishing a current-limiting mapping table based on the sample pairs: for any n voltage target unit step size voltage increments, extrapolating the current peak changes according to the proportion of the sample pairs, with the extrapolation based on the unit step size interval covered by the four step detections as the benchmark, and extrapolating equivalently to the boundary samples and applying saturation when exceeding the interval. Constraints: Read the current upper limit constant configured in the black start strategy, and calculate the safe single-step voltage increment and safe cumulative voltage increment from the current limiting mapping table. The safe single-step voltage increment is defined as the maximum voltage target unit step size that ensures the current peak change does not exceed the current upper limit constant. The safe cumulative voltage increment is defined as the maximum value of the total number of voltage target unit steps allowed within any 10 consecutive time steps when the cumulative current peak change calculated by the current limiting mapping table does not exceed the current upper limit constant. The voltage target unit step size is defined as the minimum discrete voltage increment simultaneously applied to the three-phase voltage target within a single time step. All increases and decreases of the three-phase voltage target are executed as integer multiples of this basic granularity.

[0009] Furthermore, the target reconstruction and order component decomposition module performs the order component decomposition process as follows: a 1-millisecond moving average is applied to the three-phase voltage samples 100 milliseconds after the black start to reduce high-frequency noise; the time difference between two consecutive zero-crossing points in any phase voltage where the sample continuously increases from negative to positive is used as the fundamental period estimate; at each time step, the arithmetic mean of the three-phase voltage samples is calculated to obtain the zero-sequence component; at each time step, the first phase forward sample, the second phase forward interpolation sample corresponding to 1 / 3 of the fundamental period estimate of the second phase, and the third phase forward interpolation sample corresponding to 2 / 3 of the fundamental period estimate of the third phase are taken. The three corresponding forward interpolation samples of the third phase are linearly interpolated according to the time distance when the shift position falls between two time steps. The positive sequence component is obtained by arithmetically averaging the first forward sample, the second forward interpolation sample, and the third forward interpolation sample. At each time step, the second backward interpolation sample corresponding to 1 / 3 of the estimated fundamental period of the second phase shift and the third backward interpolation sample corresponding to 2 / 3 of the estimated fundamental period of the third phase shift are taken. The negative sequence component is obtained by arithmetically averaging the first forward sample, the second backward interpolation sample, and the third backward interpolation sample.

[0010] Furthermore, within 50 milliseconds after the step detection ends, the target reconstruction and order component decomposition module calculates the peak-to-valley difference between the positive and negative order components during that time period, and then calculates the imbalance ratio, which is equal to the peak-to-valley difference of the negative order component during that time period divided by the peak-to-valley difference of the positive order component during that time period.

[0011] Furthermore, the target reconstruction and sequence component decomposition module sets the nominal line voltage effective value to 440 volts; starting from the next time step after the step detection ends, the three-phase voltage target is simultaneously increased by a safe single-step voltage increment at each time step, forming a monotonically increasing voltage guide; for any 10 consecutive time steps, if the cumulative safe single-step voltage increment exceeds the safe cumulative voltage increment, then starting from the last k steps of these 10 steps, the safe single-step voltage increment is set to zero in sequence, minimizing k to satisfy the cumulative constraint.

[0012] Furthermore, the target reconstruction and sequence component decomposition module generates the voltage guidance used for black start in a step-by-step manner and performs a progressive reconstruction process with current limiting as the primary condition. This process includes: scanning the voltage guidance in time sequence, estimating the current peak change caused by the voltage increment at each step by looking up the current limiting mapping table; if the current upper limit constant is exceeded, the voltage increment of the step is reduced to the maximum voltage target unit step size that does not exceed the current upper limit constant; for any window with a sliding window length of 10 steps, if the cumulative estimated current peak change exceeds the current upper limit constant, a silent step is inserted at the end of the window with a voltage increment of 0, and all subsequent time steps are extended by 1 step. This process is repeated until there are no more single-step or 10-step cumulative current limiting violations, resulting in a three-phase voltage target sequence.

[0013] Furthermore, if the imbalance ratio is not higher than 0.1, the three-phase voltage target sequence is frozen and executed sequentially; if it is higher than 0.1, the following balancing process is executed: using the fundamental period estimate as the phase reference: the second phase sequence in the three-phase voltage target sequence is set to 1 / 3 of the fundamental period estimate shifted backward from the first phase sequence, and the third phase sequence is set to 2 / 3 of the fundamental period estimate shifted backward from the first phase sequence; within a sliding window of 20 steps, the peak-to-valley difference of the first, second, and third phase sequences is calculated respectively; if the three If the difference between the maximum and minimum peak-valley difference in a phase is greater than twice the safe single-step voltage increment, then every 10 steps within this window, equal adjustments are made to both ends: the safe single-step voltage increment is increased for the phase with the smallest peak-valley difference, while the safe single-step voltage increment is decreased for the phase with the largest peak-valley difference, and the middle phase remains unchanged; if any adjustment causes the estimated current peak change based on the current limiting mapping table to exceed the upper limit constant of the current, then the adjustment is canceled and a silent step is inserted at that point; the three-phase voltage target sequence is frozen and executed in chronological order.

[0014] Furthermore, when the nominal line voltage effective value of the three-phase voltage target sequence reaches 440 volts and remains continuously for 1 second, the maintenance phase begins: the steady-state template is executed cyclically, with the steady-state template remaining unchanged for 50 consecutive steps, followed by 10 steps of three-segment micro-oscillations (up, down, and reset) based on a safe single-step voltage increment; after each completion of the steady-state template, it is checked whether the absolute value of any three-phase voltage sample in the three-phase voltage sequence sampled within 200 milliseconds is greater than 1 volt and whether the frequency can be determined from the three-phase voltage sequence within 200 milliseconds. If so, the black start process ends.

[0015] The present invention provides a fast response control system for energy storage PCS in black-start scenarios, which has the following advantages:

[0016] This invention establishes a unified time reference and data transmission mechanism among the black start trigger determination module, the target reconstruction and sequence component decomposition module, and the black start stability maintenance module, thereby achieving an organic combination of voltage ramp-up, phase balancing, amplitude equalization, and current limiting constraints throughout the black start process, which has significant beneficial effects.

[0017] First, this invention introduces a dual-condition detection based on voltage amplitude and frequency determination in the black-start triggering stage, which can quickly and accurately identify the start-up timing when the external power supply is completely failed and there is no fundamental reference, effectively avoiding false triggering caused by transient drops or measurement errors.

[0018] Secondly, in the target reconstruction stage, by aligning the three-phase voltage sequence and the three-phase current sequence and using step detection to establish a current limiting mapping table, a double-layer voltage increment constraint of safe single step and safe cumulative is formed, so that the voltage guidance always maintains the priority of first current limiting in the step generation and gradual reconstruction process, preventing instantaneous overshoot and multi-step superposition of limits, while supporting adaptive adjustment during operation.

[0019] Furthermore, the sequence component decomposition process can extract zero-sequence, positive-sequence, and negative-sequence components in real time during voltage ramp-up, and perform phase and amplitude balancing when necessary based on the unbalance ratio, ensuring that the three-phase voltage target sequence can maintain good symmetry and stability during the dynamic establishment phase.

[0020] Finally, during the stable maintenance phase, the present invention introduces periodic micro-amplitude oscillations through a steady-state template to maintain output observability and system state detectability under current limiting constraints, thereby enabling timely identification of external power supply recovery conditions and safe termination of the black start process.

[0021] Compared with existing technologies, this invention not only significantly improves the start-up speed and current control accuracy of black start, but also maintains the voltage quality and operational safety of the system throughout the process. It has stronger adaptability and engineering feasibility, and can meet the high reliability and high stability requirements of energy storage PCS performing black start tasks in complex power grid environments. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0023] Figure 1 This is a schematic diagram of the system structure of the energy storage PCS fast response control system for black start scenarios provided in an embodiment of the present invention;

[0024] Figure 2 This is a schematic diagram illustrating the technical principle of the voltage reduction process provided in an embodiment of the present invention;

[0025] Figure 3 This is a schematic diagram illustrating the principle of the rate limiting mapping table query process provided in an embodiment of the present invention. Detailed Implementation

[0026] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0027] refer to Figure 1 A fast response control system for energy storage PCS for black start scenarios includes: a black start trigger determination module, a target reconstruction and sequence component decomposition module, and a black start stability maintenance module.

[0028] The black-start trigger determination module identifies power outages and the inability to establish a fundamental reference from an external power source by continuously observing the three-phase voltage and current sequences and utilizing time consistency and multi-source corroboration. Upon confirmation of this condition, it generates a black-start starting point for subsequent processing. Specifically, the black-start trigger determination module drives data acquisition at a set sampling interval. The three-phase voltage and current sequences are timestamped using a unified clock and written to a circular buffer, maintaining a historical window covering the time domain before and after the trigger.

[0029] To improve robustness, the input terminal performs amplitude limiting, descrambling, and short-window smoothing on the three-phase voltage sequence. Obvious outliers are replaced based on the temporal continuity of adjacent samples. For occasional lost samples, historical samples with the nearest index no later than the current time are temporarily retained to maintain sequence integrity. The black start trigger determination logic runs in a fixed-cycle real-time task, maintaining a state machine for monitoring, candidate selection, and confirmation within the task: During the monitoring phase, the module checks whether the absolute value of any three-phase voltage sample in the three-phase voltage sequence within the continuous observation window is continuously at an extremely low level and the frequency cannot be determined from the three-phase voltage sequence. At the same time, the near-zero stability characteristics of the three-phase current sequence are used as supporting evidence to distinguish between load drops, transient resonance, or measurement faults. When the above criteria are continuously met in time, the module enters the candidate phase and applies an anti-jitter strategy. By re-verifying the continuity of the indeterminate voltage and frequency, the static stability consistency of the three-phase current sequence, and the timing consistency of the input-side state quantities (such as disconnected state or diagnostic quantities of unavailable external power supply), if all are met, the black start point is marked at the current moment and the module enters the confirmation phase.

[0030] Upon entering the confirmation phase, the black-start trigger determination module freezes the three-phase voltage and current sequences for a preset duration before and after the black-start point. It then synchronizes the samples within this window, along with metadata such as the unified time reference and sampling interval, to the target reconstruction and sequence component decomposition module via memory sharing or a message queue. This ensures that the module can complete time alignment, establish current-limiting constraints, and perform subsequent voltage-guided reconstruction under the unified reference of the black-start point as time zero. To avoid false triggering, the black-start trigger determination module immediately cancels the candidate and returns to the monitoring state when it detects that the external power supply meets the set criteria or that the frequency can be stably determined from the three-phase voltage sequence at any time. Simultaneously, it records the event and count for operation and maintenance analysis. If a sensor malfunction, sampling link failure, or internal self-test failure is detected, a fault flag is output, triggering is stopped, and an alarm is reported.

[0031] The target reconstruction and sequence component decomposition module uses the black-start point as a unified time reference. It treats the response under the combined effects of unknown grid equivalent impedance, transformer leakage reactance, load abrupt changes, and measurement noise as a problem to be identified and constrained online. Through time alignment and data-driven current-limiting constraints, the module couples voltage-guided generation and three-phase imbalance suppression into the same time-domain framework. It forms a three-phase voltage target sequence in discrete time steps, freezes it, and executes it sequentially. Time alignment eliminates the impact of sampling jitter and channel delay on phase judgment and sequence component decomposition. The module selects samples covering the initial stage of the disturbance before and after the black-start point, defines the time step using the minimum sampling interval, and establishes a continuous time index based on this time step. For any missing sample, it performs historical sample filling at the nearest time no later than this time index, thus ensuring that the three-phase voltage sequence and the three-phase current sequence have the same discrete grid under a unified time reference. This discretization ensures that all subsequent current-limiting assessments and phase calculations have strict causality.

[0032] The current-limiting constraint does not rely on fixed device model parameters, but rather establishes an empirical mapping between the target voltage unit step size and the current peak change through step detection. This mapping reflects the equivalent sensitivity and saturation trend of the current black-start channel under small-range disturbances. Since the equivalent impedance and load characteristics of the external network are unknown during black-start, relying solely on offline parameters may lead to misjudgments. Online step detection can obtain the real-time input-output correspondence without introducing large disturbances. Subsequently, a current-limiting mapping table is formed through proportional extrapolation and boundary equivalent extrapolation. The purpose of introducing saturation constraints is to maintain a conservative estimate outside the sample pair coverage area and avoid overly optimistic current predictions in unknown regions. Based on this current-limiting mapping table, safe single-step voltage increment and safe cumulative voltage increment are defined. The former constrains the voltage change in a single time step from causing the current peak change to exceed the limit, while the latter constrains the cumulative effect of several consecutive time steps through a sliding window, thereby taking into account the peak aggregation risk caused by the device's primary current limiting and the dynamic superposition of thermal effects or filtering.

[0033] The generation of voltage guidance follows the principle of monotonically increasing and prioritizing primary current limiting. First, a nominal stepping trajectory is constructed with a safe single-step voltage increment. Then, in the gradual reconstruction, current limiting is checked for each step: when the single-step estimation shows that it may exceed the limit, the increment is reduced to decrease the voltage increment of that step. When the cumulative window evaluation shows that it may exceed the limit, a silent step is inserted at the end of the window and the subsequent time index is extended as a whole. The setting of the silent step is essentially a current throttling mechanism in the discrete time domain. Without destroying the established phase relationship and time alignment, the ramp-up time is extended to reduce the change of current peak. To ensure that the three-phase voltage target sequence has a frequency-independent phase consistency basis when entering subsequent stages, this module performs sequence component decomposition on the aligned three-phase voltage sequence, decomposing the observed three-phase voltage into zero-sequence, positive-sequence, and negative-sequence components. The zero-sequence is obtained by the arithmetic mean of the three phases and is subsequently eliminated to avoid generating invalid components in ungrounded or high-resistance grounded paths. The construction of the positive and negative sequences adopts the time-shift interpolation method based on the fundamental period estimation. By performing forward or backward interpolation of ±1 / 3 and ±2 / 3 of the fundamental period on the second and third phases in the time domain, the three phases are decoupled in the positive and negative sequence basis. The choice of time-shift interpolation avoids the leakage and window function sensitivity problems of frequency domain algorithms under short windows and low signal-to-noise ratios, while maintaining a consistent data structure with the previous time alignment.

[0034] The fundamental period estimation is derived from the joint criteria of zero-crossing and monotonicity within a short time window after the black-start initiation point. Its purpose is not to obtain high-precision frequency, but to provide a time scale sufficient for interpolation phase positioning, thereby reducing the sensitivity of sequence component decomposition to transient slip and harmonics. After obtaining the zero-sequence, positive-sequence, and negative-sequence components, the module uses the positive sequence as the phase and amplitude reference for voltage guidance, mapping the reconstructed voltage guidance into a three-phase voltage target sequence: the first phase serves as the reference phase, and the second and third phases are shifted backward by 1 / 3 and 2 / 3 of the fundamental period estimation, respectively, on the time axis to form a nominal three-phase phase relationship. At the same time, the peak-to-valley difference of the three phases is compared within a limited sliding window, and amplitude balancing is performed with the voltage target unit step size as the basic granularity.

[0035] The balancing strategy uses peak-to-valley difference as the amplitude representative for robustness against noise and non-sinusoidal components, avoiding reliance on instantaneous samples or estimations highly sensitive to frequency. The method of adjusting both ends by a fixed step size at regular intervals (a few time steps) gradually narrows the amplitude differences between the three phases without compromising time alignment and the effectiveness of the current-limiting mapping table. The middle phase remains unchanged, providing a fulcrum for balancing and preventing three-phase synchronous drift. All balancing actions are checked in real-time against the current-limiting mapping table. If any adjustment causes a potential exceedance of the current peak change in a single step or sliding window, the adjustment is revoked, and a silent step is inserted at that point, ensuring that current-limiting priority is maintained throughout the entire voltage-guided reconstruction and balancing process. Through this coupling mechanism, the target reconstruction and sequence component decomposition module, without pre-setting fixed network parameters, uses field data to establish and update current-limiting constraints, recursively generating voltage guidance that satisfies the constraints and has phase consistency in a step-by-step manner. Sequence component decomposition and zero-sequence elimination then complete phase and amplitude balancing, ultimately obtaining the three-phase voltage targets arranged by time steps, freezing them, and executing them sequentially. The module output also carries the achievement status of the nominal line voltage effective value, which is used to trigger the black start stability maintenance module to enter the steady-state template execution stage. Inside this module, the nominal line voltage effective value is not used to drive additional ramp logic, but serves as a progress indicator after the target reconstruction and balancing are completed, so as to avoid introducing unnecessary acceleration in the stage when the current limiting constraint is still triggered.

[0036] The black-start stability maintenance module receives the three-phase voltage target sequence output by the target reconstruction and sequence component decomposition module. Using the nominal line voltage RMS value and primary current limiting priority as core constraints, it achieves minute, verifiable, and traceable maintenance control of the three-phase voltage target sequence during the maintenance phase through the cyclic execution of a steady-state template, continuously judging the state transition when the external power supply meets the set criteria. Specifically, the module first monitors the nominal line voltage RMS value of the three-phase voltage target sequence. Only when this value reaches the system setting and remains continuously for 1 second does it transition from the transition state to the maintenance phase. Upon transition, the current three-phase voltage target sequence is frozen as the maintenance baseline, and the time axis continues to use the aforementioned unified time reference and discrete time steps. After entering the maintenance phase, the black-start stable maintenance module executes cyclically according to the steady-state template, which is defined as remaining unchanged for 50 consecutive steps. The following 10 steps are performed in three micro-oscillations: up, down, and reset, with a voltage increment of 1 safe single step. The micro-oscillations are performed around the maintenance baseline and discretized with the voltage target unit step size as the basic granularity. All increase and decrease actions call the current limiting mapping table to estimate and verify the current peak change accumulated in single step and sliding window. If the estimate of any step exceeds the upper limit current constant, the voltage increment of that step is reduced until it does not exceed the constraint. If the estimated current peak change accumulated in any 10-step window exceeds the upper limit current constant, a silent step is inserted at the end of the window and all subsequent time steps are postponed by 1 step to ensure that the priority of the first current limiting is continuously satisfied in the maintenance phase.

[0037] The micro-oscillation of the steady-state template is used to maintain the observability of the voltage and current response relationship, so that the applicability of the current limiting mapping table can be continuously verified within a small disturbance range. At the same time, it avoids the three-phase voltage target sequence from remaining unchanged for a long time, which would reduce the sensitivity to the identification of signs of external power supply access. In order to prevent slow drift caused by the superposition of micro-oscillations, the black-start stability maintenance module returns the three-phase voltage target sequence to the maintenance baseline in each template reset step, and performs threshold checks on the three-phase peak-to-valley difference and unbalance correlation quantity. If an abnormal upward trend is found, the amplitude of micro-oscillation in subsequent templates is reduced or the proportion of silent steps is increased to avoid unnecessary current peak changes in the stage before the external power supply meets the set criteria conditions. After each steady-state template cycle is completed, the black-start stability maintenance module triggers a check to ensure that the external power supply meets the set criteria. The detection logic is based on the real-time sampling results of the input three-phase voltage sequence. If the absolute value of any three-phase voltage sample in the three-phase voltage sequence sampled within 200 milliseconds is greater than 1 volt and the frequency can be determined from the three-phase voltage sequence within 200 milliseconds, it is determined that the external power supply has established a usable fundamental reference and the black-start process ends. If the detection fails, the next steady-state template cycle is started directly without additional raising of the baseline, thereby avoiding the risk of exceeding the limit caused by continuous voltage increase in the waiting-to-parallel scenario. To ensure recoverability under abnormal conditions, the module continuously monitors status signals from the target reconstruction and sequence component decomposition module during the maintenance phase, including the validity flag of the current limiting mapping table, the consistency of the three-phase voltage target sequence timestamps, and the stability measure of the nominal line voltage RMS value. If an input inconsistency, sampling anomaly, or estimation non-convergence is detected, the micro-oscillation is paused and the baseline is maintained with silent steps. If necessary, it reverts to the template segment that remains unchanged for only 50 steps and waits for the upstream module to regain consistency before gradually resuming the micro-oscillation.

[0038] The black-start stability maintenance module outputs the current maintenance phase cycle count, the silent step insertion position in the most recent template, the current limiting verification margin for single steps and 10 steps, and the detection results of the external power supply meeting the set criteria conditions through a standardized interface for system monitoring and fault analysis. Internally, priority scheduling ensures that template stepping and current limiting verification are executed in a fixed order within the same discrete time step, with verification taking effect before implementation. This ensures that the three-phase voltage target sequence for each step has already met the current limiting priority and time base consistency before being issued. Considering that load switching and temporary imbalances may cause short-term disturbances in the black-start scenario, the black-start stability maintenance module reuses the fundamental period estimation of the aforementioned sequence component decomposition at the beginning of each template cycle to verify whether the phase and amplitude balance of the three-phase voltage target sequence remains within the allowable range. If a significant increase in imbalance is observed but the external power supply still does not meet the set criteria conditions, the micro-oscillation amplitude is reduced and the silent step ratio is increased to prioritize the safety margin of the current limiting constraint over phase fine-tuning.

[0039] Furthermore, the black-start trigger determination module continuously runs a sliding window detection according to a unified time base. A black-start trigger is confirmed when the absolute value of any three-phase voltage sample in the three-phase voltage sequence sampled within a continuous 200 milliseconds is less than 1 volt and the frequency cannot be determined from the three-phase voltage sequence within that 200 milliseconds. This determination simultaneously constrains two dimensions: amplitude and determineable frequency. The former indicates that the external power supply does not provide sufficient voltage support, and the latter indicates that the fundamental reference is missing. Both conditions, when met together, can effectively distinguish non-black-start situations such as transient drops, measurement glitches, or local resonance. The sampling interval for acquiring the three-phase voltage and current sequences ranges from 100 microseconds to 500 microseconds. Within this range, sufficient sample density can be formed within the 200-millisecond window for zero-crossing search, short-window smoothing, and continuity verification, while controlling communication and storage overhead to prevent impacting real-time performance.

[0040] In implementation, the module timestamps the three-phase voltage and current sequences at set sampling intervals and writes them into a circular buffer. It maintains a 200-millisecond observation window using a sliding method. Upon arrival of each new sample, it updates the maximum and minimum amplitude values ​​and zero-crossing candidates within the window and attempts to determine the frequency from the three-phase voltage sequence. When all samples within the window satisfy the condition that the absolute value of any three-phase voltage sample in the three-phase voltage sequence is less than 1 volt, and the frequency determination algorithm is unable to determine the frequency from the three-phase voltage sequence within that window, the current time is immediately recorded as the black start point, and the window data is frozen for use by subsequent target reconstruction and sequence component decomposition modules. To reduce the probability of false triggering, the module performs amplitude limiting and de-straining on the input. For occasional sample loss, it fills the gap with historical samples indexed no later than the current time to maintain sequence continuity. If a sensor self-check anomaly occurs, the determination process is paused, and an alarm is reported. The sampling interval is in the range of 100 microseconds to 500 microseconds, which makes the conclusions of zero-crossing search, amplitude statistics and frequency indeterminacy stable in the presence of noise. At the same time, it prepares a consistent discrete grid for subsequent time alignment, step detection and current limiting mapping under a unified time reference.

[0041] Furthermore, the target reconstruction and sequence component decomposition module immediately enters a continuous process of establishing time alignment and current limiting constraints after the black start point is confirmed. First, the module statistically analyzes the adjacent sampling time intervals of the three-phase voltage and current sequences within a 50-millisecond range before and after the black start point, taking the minimum value as the time step. Using the black start point as time zero, it generates continuous time indices forward from this time step. To ensure subsequent calculations are performed under a unified time reference, the module establishes a mapping table from indices to original timestamps, searching for the corresponding three-phase voltage and current sequence samples for each time index. When any sequence experiences sample loss or step jitter at a given time index, it performs historical sample filling no later than that time index to restore the sample integrity at that index. This process aims to unify the sampling jitter, transmission delay, and occasional sample loss from different channels onto a discrete time step grid, ensuring a one-to-one correspondence between the three-phase voltage and current sequences in the data structure. This guarantees that subsequent step detection, step generation of the three-phase voltage target, and sequence component decomposition all possess strict causality and replayability.

[0042] After time alignment, the module establishes current-limiting constraints under a unified time reference. The specific process is as follows: starting from time zero, four step probes of the target voltage unit step size are applied sequentially, each lasting 10 time steps, with a 5-time-step zero-increment interval inserted between adjacent step probes. The purpose of the step probe is to obtain the current response caused by voltage changes under small disturbances without altering the system topology, using the target voltage unit step size as the minimum excitation, enabling subsequent current-limiting assessments to be based on field data rather than static models. During each probe, the module records the current peak changes of the three-phase current samples, forming four sample pairs of target voltage unit step size and current peak changes. To improve robustness, the extraction of current peak changes uses time steps as boundaries, employing peak search within fixed start and end steps and comparing it with the nearest value of the baseline before the probe, thereby suppressing the influence of noise spikes and cross-segment drift on the sample pairs. After obtaining sample pairs, the module establishes a current-limiting mapping table based on the sample pairs: for any n voltage target unit step size voltage increments, the current peak change is extrapolated proportionally to the sample pairs. The extrapolation is based on the unit step size interval covered by four step detections. When the range is exceeded, the extrapolation is equivalent to the boundary samples and saturation constraints are applied to avoid overly optimistic estimates in intervals not covered by detection. Subsequently, the current upper limit constant configured in the black-start strategy is read, and the safe single-step voltage increment and safe cumulative voltage increment are calculated from the current-limiting mapping table accordingly. The safe single-step voltage increment is defined as the maximum number of voltage target unit steps that ensures the current peak change does not exceed the current upper limit constant. The safe cumulative voltage increment is defined as the maximum value of the total number of voltage target unit steps allowed within any 10 consecutive time steps when the cumulative current peak change calculated by the current-limiting mapping table does not exceed the current upper limit constant.

[0043] By simultaneously obtaining constraints at both single-step and cumulative scales, the module can limit both the instantaneous overshoot of a single time step and the peak accumulation after multiple time steps are superimposed. The voltage target unit step size is defined as the minimum discrete voltage increment simultaneously applied to the three-phase voltage target within a single time step. All increases and decreases in the three-phase voltage target are performed as integer multiples of this basic granularity. This definition allows step generation, current limiting verification, and subsequent silent step insertion to be performed at a uniform granularity, thereby ensuring the adaptation of the implementation path and the current limiting mapping table. To improve the verifiability and traceability of this process, the module records the time index, three-phase voltage sequence, and three-phase current sequence summary information at the start and end of each step detection. It also packages the sample pairs obtained from the four detections, the current limiting mapping table, and the safe single-step voltage increment and safe cumulative voltage increment derived from the current upper limit constant into a structured object within the session for subsequent voltage-guided step generation and progressive reconstruction. When the system needs to reduce the single-step voltage increment or insert a silent step within the sliding window in subsequent stages, the current limiting map table is used as the basis, and the estimated current peak change is compared with the current upper limit constant in real time. Considering that the external power supply has not yet met the set criteria during black start, the load and equivalent impedance may drift slowly. Before the steady-state template is executed, the module retains a verification channel for the current limiting map table. Once a deviation between the step detection and the actual response is detected to exceed the acceptable range, a mechanism to re-acquire sample pairs will be triggered and the current limiting map table will be updated. However, under no circumstances will the safety boundary defined by the current upper limit constant be exceeded.

[0044] Furthermore, after the black-start point is marked, the target reconstruction and sequence component decomposition module performs rigorous time-domain preprocessing and sequence component extraction on the three-phase voltage sequence. A 1-millisecond moving average is applied to the three-phase voltage samples 100 milliseconds after the black-start point to reduce high-frequency noise. The moving average is updated sequentially within a circular buffer with discrete time steps, ensuring that each time step corresponds to a set of three-phase voltage samples processed by the same window, thus providing a consistent data foundation for subsequent zero-crossing search and interpolation positioning. In any phase voltage, two adjacent zero-crossing points that transition from negative to positive and subsequently show a continuous increase in samples are searched. A joint criterion of sign flipping and local monotonicity is used; a zero-crossing point is only confirmed as valid if several consecutive samples maintain a non-decreasing trend after the zero-crossing, thus suppressing false zero-crossings caused by noise. The time difference between two adjacent valid zero-crossing points is used as the fundamental period estimate, and the corresponding time index interval is recorded to unify the management of time shift and discrete time steps during interpolation. At each time step, the zero-sequence component is obtained by arithmetically averaging the three-phase voltage samples. The zero-sequence component is directly derived from the simultaneous samples of the three phases and serves as the baseline for subsequent zero-sequence elimination and imbalance assessment.

[0045] To obtain the positive-sequence component, at each time step, the first corresponding forward sample, the second-phase forward interpolation sample corresponding to 1 / 3 of the estimated fundamental period of the second phase, and the third-phase forward interpolation sample corresponding to 2 / 3 of the estimated fundamental period of the third phase are taken. When the shift position falls between two time steps, linear interpolation is performed based on the time distance. The linear interpolation uses the two closest discrete samples before and after the shift, with the time distance as the weight, to ensure that the interpolation value is consistent with the unified time reference even for non-integer step shifts. The positive-sequence component is then obtained by arithmetic averaging the first corresponding forward sample, the second-phase forward interpolation sample, and the third-phase forward interpolation sample. This construction aligns the second and third phases forward along the time axis to the phase reference position of the first phase, thereby directly forming an approximately symmetrical distribution of the positive-sequence component in the time domain. To obtain the negative-sequence component, at each time step, the following samples are taken: the first equivalent forward sample, the second-phase backward interpolation sample corresponding to 1 / 3 of the estimated fundamental period shifted backward, and the third-phase backward interpolation sample corresponding to 2 / 3 of the estimated fundamental period shifted backward. Backward interpolation is also performed linearly between two adjacent time steps according to the time distance. The arithmetic mean of the first equivalent forward sample, the second-phase backward interpolation sample, and the third-phase backward interpolation sample is then used to obtain the negative-sequence component. This separation of forward and backward interpolation ensures that the positive-sequence and negative-sequence components are constructed independently at the same time step, avoiding phase aliasing before the frequency is fully stable and improving robustness within a short time window.

[0046] After the sequence component decomposition is completed, the module maintains the index of the zero-sequence component, positive-sequence component, and negative-sequence component consistent with the time step. Any further zero-sequence elimination and balancing are only performed on these components in units of time steps to ensure the coupling consistency with voltage-guided stepping and current-limiting verification. To measure the degree of imbalance and provide criteria for subsequent balancing and freezing strategies, the target reconstruction and sequence component decomposition module calculates the peak-to-valley difference between the positive-sequence component and the negative-sequence component within 50 milliseconds after the step detection ends, and then calculates the imbalance ratio, which is equal to the peak-to-valley difference of the negative-sequence component divided by the peak-to-valley difference of the positive-sequence component. The peak-to-valley difference is obtained from the difference between the largest and smallest samples within a fixed time step window. The window and time step are strictly correlated to avoid offset caused by cross-segment statistics. The imbalance ratio, as a dimensionless indicator, directly reflects the relative amplitude of the negative-sequence component relative to the positive-sequence component. When this value remains stable in a short time, it indicates that the consistency between the current-sequence component decomposition and the fundamental period estimation is good, and it is suitable to perform phase and amplitude balancing accordingly. When this value suddenly increases and exceeds the preset threshold, the time distance boundary conditions of the 1-millisecond moving average, zero-crossing validity, forward interpolation, and backward interpolation are checked first. If necessary, the fundamental period estimation is reconfirmed to ensure that the imbalance assessment is not affected by abnormal samples. The entire sequence component decomposition process consistently adheres to the constraints of a unified time base and discrete time steps. All interpolation, arithmetic mean, and peak-valley difference calculations are performed in units of time steps. This design ensures a clear one-to-one correspondence between the three-phase voltage samples, zero-sequence components, positive-sequence components, and negative-sequence components on the time axis. This facilitates coordination with voltage-guided reconstruction, current-limiting mapping verification, silent step insertion, and determination of the effective value of nominal line voltage in the fast response control system of energy storage PCS for black-start scenarios. It forms a closed-loop link from data preprocessing, fundamental period estimation, time-shift interpolation, sequence component extraction to unbalance ratio calculation, providing a traceable basis for subsequent phase and amplitude balancing and freezing of the three-phase voltage target sequence and executing it in chronological order.

[0047] Furthermore, after completing the step detection and current limiting mapping table construction, the target reconstruction and sequence component decomposition module manages the generation path of the three-phase voltage target using a unified time base and discrete time steps. First, it sets the nominal line voltage effective value to 440 volts, using this as the achievement marker for voltage guidance and a reference for external status output. Starting from the next time step after the step detection ends, a safe single-step voltage increment is simultaneously added to the three-phase voltage target at each time step, forming a monotonically increasing voltage guidance. This monotonicity ensures that the voltage target advances only towards the nominal line voltage effective value of 440 volts along the time step direction, without introducing additional current peak variation assessment uncertainties caused by round-trip adjustments. To suppress the peak aggregation effect caused by multi-step superposition, when the module performs rolling checks on any 10 consecutive time steps, if the cumulative safe single-step voltage increment exceeds the safe cumulative voltage increment, then starting from the last k steps of these 10 steps, the safe single-step voltage increment is set to zero sequentially, minimizing k to satisfy the cumulative constraint. The strategy of minimizing k ensures that the effective preceding time steps are not modified retrospectively, guaranteeing the replayability of voltage guidance and the consistency of the external interface. At the same time, necessary corrections are compressed at the end of the window to facilitate alignment with the time index of subsequent component decomposition.

[0048] Based on the aforementioned nominal trajectory, the module then generates the voltage guidance used for black start in a stepwise manner and progressively reconstructs it with current limiting as the primary condition. Specifically, it scans the voltage guidance in time sequence, and at each step, it looks up the current limiting mapping table to estimate the current peak change caused by the voltage increment of that step. If the current upper limit constant is exceeded, the voltage increment of that step is reduced to the maximum voltage target unit step size that does not exceed the current upper limit constant. This reduction action only takes effect in the current time step, which maintains the voltage target unit step size as an integer multiple of the basic granularity of the execution rule, and utilizes the local availability of the current limiting mapping table to avoid excessive conservatism. Thus, without disrupting the monotonically increasing trend, the single-step voltage increment and the first current limiting priority are always consistent. To control the risk of step-by-step superposition, the module simultaneously performs cumulative estimation on any window with a sliding window length of 10 steps. When the cumulative estimated current peak change exceeds the upper limit constant of the current, a silent step is inserted at the end of the window with a voltage increment of 0, and all subsequent time steps are postponed by one step. The silent step, as a current-throttling mechanism in the discrete time domain, dilutes the density of current peak changes within the short window by extending the rise time, while maintaining the synchronous advancement relationship of the three-phase voltage targets on the time axis. The combination of single-step downsizing and silent step insertion provides two layers of constraint channels for the step-by-step reconstruction: one layer for over-limit suppression of single steps, and the other layer for cumulative suppression of the 10-step window. Both use the current-limiting mapping table and the upper limit constant of the current as criteria, thereby ensuring that the implementation path with current limiting as the primary condition is interpretable and verifiable within the data-driven framework.

[0049] To mitigate the impact on the consistency of sequence component decomposition and phase and amplitude balancing during the gradual reconstruction process, the module only extends the time index during each silent step without altering the three-phase voltage target values ​​determined in the previous time step. This ensures that subsequent calculations based on the positive, negative, and zero sequences of the time step still correspond one-to-one with the index before freezing. When a single-step downsampling is triggered, the module simultaneously and equally downsampling the three-phase voltage targets for the same time step to maintain step consistency among the three phases and avoid introducing additional sources of imbalance during the gradual reconstruction phase. To ensure that the path to achieving a nominal line voltage effective value of 440 volts is transparent and controllable, the module maintains three types of records for each time step: the nominal voltage increment, the actual voltage increment after verification by the current-limiting mapping table, and a marker indicating whether it is a silent step. It also retains a margin for the cumulative estimated current peak change over any 10 consecutive time steps. These records are fixed and made available for querying when the three-phase voltage target sequence is generated. Considering that the external power supply may not meet the set criteria under black-start conditions, and the equivalent load and line impedance may change slowly, during the gradual reconfiguration process, whenever the deviation between the single-step estimate and the actual feedback is detected to be continuously increasing, the module prioritizes restoring the current-limiting margin by reducing the safe single-step voltage increment in subsequent time steps or increasing the silent step density, without retrospectively modifying the issued three-phase voltage target, in order to avoid impacting the unified time reference output by the upstream black-start trigger judgment module. When the voltage guidance still shows a scattered trend of single-step or 10-step cumulative current-limiting violations after multiple rounds of gradual reconfiguration, the module repeatedly executes single-step reduction and silent step insertion until single-step or 10-step cumulative current-limiting violations no longer occur, finally obtaining the three-phase voltage target sequence.

[0050] This three-phase voltage target sequence uses the voltage target unit step size as the basic granularity, is arranged by time step, and shares the same time index with the sequence component decomposition. It can be directly frozen and executed in chronological order. Simultaneously, the progress of achieving the nominal line voltage effective value of 440 volts is output to the black-start stability maintenance module for triggering subsequent steady-state templates. Throughout the generation process, all judgments, adjustments, and insertions are based on the current limiting mapping table and the current upper limit constant. Any modification to the voltage guidance is premised on prioritizing current limiting. Through the synergy of monotonically increasing, gradually reconstructing, and silent-step throttling, the voltage guidance can steadily approach the nominal line voltage effective value of 440 volts in time while remaining strictly controlled in the current dimension. To improve reliability, the module re-evaluates the cumulative estimated current peak change of the subsequent 10-step window after each silent step insertion, and inserts multiple silent steps continuously if necessary. Since the voltage increment of the silent step is 0, continuous insertion will not cause single-step over-limit risk; it will only exchange time for the recovery of the current limiting margin, thus ensuring that the evolution of the three-phase voltage target sequence is always on the safe side when the external power supply has not yet met the set criteria. Finally, when the three-phase voltage target sequence achieves and sustains a nominal line voltage of 440 volts during execution, its state will be taken over by the black-start stability maintenance module. The latter implements a steady-state template and micro-oscillation without changing the priority of the primary current limiting, while this module still monitors the consistency of the current limiting mapping table and the time index to ensure that when backtracking diagnosis is required in the later stages of the black-start process, all the details of the voltage guidance generated in a step-by-step manner and gradually reconstructed with current limiting as the primary condition can be fully reproduced.

[0051] Furthermore, after completing the sequence component decomposition and imbalance ratio calculation, the target reconstruction and sequence component decomposition module uses the imbalance ratio as the criterion for entering balancing or direct execution. When the imbalance ratio is not higher than 0.1, the three-phase voltage target sequence is frozen and executed in chronological order, enabling the subsequent black-start stability maintenance module to continue monitoring the nominal line voltage effective value and the primary current limiting priority constraint under a unified time reference. When the imbalance ratio is higher than 0.1, a joint process based on time-domain phase realignment and amplitude balancing is initiated, using the fundamental period estimation as the phase reference, to adjust the second phase of the three-phase voltage target sequence. The sequence is set to 1 / 3 of the estimated fundamental period of the first phase sequence shifted backward, and the third phase sequence is set to 2 / 3 of the estimated fundamental period of the first phase sequence shifted backward. Under this phase reference, the relative relationship of the three phases on the time axis is ensured to satisfy nominal symmetry. Then, within a sliding window of 20 steps, the peak-to-valley difference of the first, second, and third phase sequences is calculated respectively. The peak-to-valley difference, rather than the instantaneous sample, is used as the amplitude representative to resist interference from short-time noise and local non-sinusoidal components. When the difference between the maximum and minimum peak-to-valley difference of the three phases is detected to be greater than twice the safe single-step voltage increment, discrete processing is performed. The amplitude balancing operation involves making equal adjustments at both ends every 10 steps within the window: increasing the safe single-step voltage increment for the phase with the smallest peak-to-valley difference, and decreasing the safe single-step voltage increment for the phase with the largest peak-to-valley difference, while leaving the middle phase unchanged. This minimizes structural modifications to bring the three-phase amplitude distribution closer within the window and maintain the reference phase architecture. Each of these equal adjustments is checked with current limiting as the primary condition. Before taking effect, the current limiting mapping table is called to estimate the single-step current peak change at that time step and the cumulative estimated current peak change over 10 steps within the sliding window. If any adjustment results in a change based on the current limiting mapping table... If the cumulative estimated current peak change in a single step or 10 steps exceeds the upper limit constant of the current, the adjustment is canceled and a silent step is inserted at that point with a voltage increment of 0. The index of subsequent time steps is then shifted by 1 step to allow time for current limiting margin and ensure that the priority of current limiting is not exceeded. When the peak-to-valley difference within the window is improved to the point where the difference between the maximum and minimum peak-to-valley difference is no greater than twice the safe single-step voltage increment, or when consecutive attempts are canceled due to current limiting constraints, the sliding window is moved and the above detection and possible equal-amount adjustments are repeated to allow the balancing process to proceed segment by segment along the time axis without breaking the established index consistency and alignment relationship.

[0052] After balancing, the three-phase voltage target sequence is frozen and executed sequentially. The metadata of each adjustment and silent step insertion, its location, reason, and corresponding current limiting verification result are retained for querying by the black-start stability maintenance module and system monitoring. During execution, when the nominal line voltage RMS value of the three-phase voltage target sequence reaches 440 volts and remains constant for 1 second, the maintenance phase begins according to a predetermined process. The maintenance phase executes cyclically according to a steady-state template, which remains unchanged for 50 consecutive steps. The subsequent 10 steps involve a three-stage micro-oscillation of half-step up, down, and reset, with each safe single-step voltage increment. This micro-oscillation revolves around the frozen three-phase voltage target sequence and is strictly discretized with the voltage target unit step size as the basic granularity. All increases and decreases are checked step-by-step using a current limiting mapping table before taking effect. The current peak change verification of step 0 is performed. If the verification shows that it will exceed the current upper limit constant, the amplitude of this micro-oscillation is preferentially reduced in the current template. If necessary, the step or segment is set to a silent step to maintain the current limiting margin. In order to prevent the cumulative offset of micro-oscillation from causing the implicit imbalance to increase, the template reset step returns the three-phase voltage target sequence to the maintenance baseline. At the end of each template round, the three-phase peak-to-valley difference and imbalance correlation of the nearest window are quickly checked. If the situation continues to deteriorate, the micro-oscillation amplitude is reduced or the silent step ratio is increased in the next template round.

[0053] After each steady-state template is completed, the module triggers a detection that the external power supply meets the set criteria. It uses real-time sampled three-phase voltage sequences to verify whether the absolute value of any three-phase voltage sample in the three-phase voltage sequence is greater than 1 volt within 200 milliseconds and whether the frequency can be determined from the three-phase voltage sequence within 200 milliseconds. If the detection is true, the black start process is immediately terminated and control is transferred to the subsequent grid connection or the upper-level control strategy. If the detection is false, the module unconditionally enters the next round of steady-state templates, maintaining the small amplitude, periodicity and predictable oscillation of the three-phase voltage target sequence without raising the nominal line voltage effective value, so as to avoid introducing new over-limit risks before the external power supply meets the set criteria. The above-mentioned process, from the imbalance ratio criterion to phase reference realignment, peak-to-valley difference evaluation within the sliding window, equal adjustment and throttling of the silent step, sequence freezing execution, and then to the periodic micro-oscillation of the steady-state template after the nominal line voltage effective value is achieved and the cyclic detection of the external power supply meeting the set criterion conditions, constitutes a closed-loop process under the constraints of a unified time reference and current limiting mapping table. This allows the three-phase voltage target sequence to achieve phase and amplitude balancing through minimal necessary adjustments when imbalance is significant, and to maintain state observability and continuous compliance with current limiting constraints with a fixed-structure template after the nominal line voltage effective value of 440 volts is reached and stabilized, until the amplitude and frequency conditions are met within 200 milliseconds.

[0054] In this example, the system operates on a uniform time base, and the sampling interval is denoted as . (This indicates the sampling interval for acquiring the three-phase voltage and current sequences). In this example, we take... Time steps are recorded as (Represents the minimum discrete time interval used for time alignment and control stepping), the minimum adjacent sampling time interval counted within 50 milliseconds before and after the black start point is Therefore, take The time index is denoted as... (indicating the first) (each discrete time step), the discrete time is .

[0055] First, a black-start trigger determination is performed. Within a continuous 200-millisecond observation window, the absolute value of any three-phase voltage sample in the three-phase voltage sequence is less than 1 volt, and the frequency cannot be determined from the three-phase voltage sequence within the continuous 200-millisecond window; both conditions are simultaneously met. Symbolically, let... Let represent the instantaneous sample absolute values ​​of the three-phase voltages, then the triggering condition is written as: ,in For the starting point of the window, This indicates that the process of determining the frequency from the three-phase voltage sequence returns to empty. When both conditions are met, black start triggering is confirmed, and the moment of black start triggering is recorded as the black start starting point. (Right now ).

[0056] Entering the time alignment phase of the target reconstruction and ordinal component decomposition module. Taking the black start point as time zero, at... The minimum value of the adjacent sampling time interval in the range statistics is Based on this, the time step is defined. , and according to Generate a continuous time index forward. If at a certain... If missing samples exist in the three-phase voltage or current sequence, they are filled using historical samples with a time index no later than the specified time to achieve time alignment between the three-phase voltage and current sequences. Subsequently, current-limiting constraints are established. The target voltage unit step size is defined as... (This represents the minimum discrete voltage increment simultaneously applied to the three-phase voltage target within a single time step). In this example, we take... Starting from time zero, four step probes of voltage target unit step size are applied sequentially, each lasting 10 time steps (i.e., ... ), inserting a zero-increment interval of 5 time steps between two adjacent step detections (i.e. The current peak changes of the three-phase current samples were recorded during the four detection periods, resulting in four sample pairs. .definition For the first The current peak change (in amperes) caused by the step detection. Actual measured... .

[0057] To construct the current limiting mapping table, define the mapping coefficient from unit step size to current peak variation. (Representing the representative value of the current peak change caused by each unit step of the voltage target), take the median of the four ratios: Define the upper limit constant of current as... (This represents the maximum allowed rate limiting value in a single instance). In this example, we take... The unit step size of a safe single-step voltage increment is defined as follows: (representing the maximum allowable voltage target unit step size for a single time step), and the safe cumulative voltage increment is... (This represents the maximum number of allowed voltage target unit steps within any 10 consecutive time steps). Based on proportional extrapolation and saturation constraints, we have... .

[0058] Therefore, the upper limit of voltage rise per unit step is 16, corresponding to a voltage amplitude increment of... Then, a nominal voltage is generated for guidance. Definition For the first The target unit step size of the actual applied voltage (an integer, allowed to be positive, zero, or negative during the balancing / template stage) needs to satisfy both single-step and 10-step window constraints: Starting from the next time step after the step detection ends (step and interval together) Steps, time taken The strategy of simultaneously increasing the three-phase voltage target by a safe single-step voltage increment at each time step is first tried nominally. Then, a backtracking process is performed based on the 10-step cumulative constraint minimization. To facilitate execution and satisfy the cumulative constraint, this example uses a 10-step cycle, ensuring that the sum of unit step sizes is exactly [value missing] within each 10-step window. It is then divided into four steps of 4 units each, and six steps of 0 units each: This allocation satisfies the single-step constraint. And within each 10-step window The peak current variation is estimated using a current-limiting mapping table; a single-step estimate is... Therefore, this model contains incremental steps. 10-step window cumulative estimation No silent step needs to be inserted.

[0059] Definition of the first The target peak value of the phase voltage of the step is (Indicates the target peak amplitude of any one of the three phases, with equal amplitude in all three phases), initial value Its recursion is as follows: Definition of the first The nominal line voltage RMS value of the step is (Represents the effective value of the line voltage derived from the three-phase voltage target sequence), when three phases are symmetrical, there is The target nominal line voltage RMS value is defined as The peak phase voltage required to achieve the target is .

[0060] In the above stepping mode, the net increase in phase voltage peak value every 10 steps. .achieve At least A 10-step window, that is One time step. Considering step detection and interval co-location. Steps, totaling The time taken to reach the destination from step 1 is .

[0061] After this, the voltage target is maintained at its maximum, entering a phase where the nominal line voltage RMS value is continuously maintained. During and after the stepping phase, the aligned three-phase voltage sequence undergoes sequence component decomposition to assess imbalance. A 1-millisecond moving average is performed on the three-phase voltage samples 100 milliseconds after the black start, and the fundamental period is estimated based on two consecutive zero-crossing points where the samples continuously increase from negative to positive. (Represents the currently estimated fundamental period). Calculate the zero-sequence, positive-sequence, and negative-sequence components at each time step, and calculate the peak-to-valley difference of the positive-sequence component within 50 milliseconds after the step detection ends. Peak-valley difference with negative order components (Both represent the difference between the maximum and minimum values ​​of the corresponding components during that time period). The imbalance ratio is defined as... .

[0062] This example measured , Therefore Therefore, the balancing process is skipped, and the three-phase voltage target sequence is directly frozen and executed sequentially. After freezing, the three-phase equal amplitude and equal phase relationship is maintained, and the nominal line voltage effective value of the three-phase voltage target sequence is within... Step to reach and maintain According to the procedure, when the nominal line voltage RMS value of the three-phase voltage target sequence reaches... After maintaining this state for 1 second, the system enters the black start stability maintenance module. The timer is recorded as follows: (Indicates self) (duration from the date of achievement), when Then switch to the steady-state template for execution. The steady-state template remains unchanged for 50 consecutive steps, followed by 10 steps of micro-oscillation. To be consistent with the current limiting constraint, the micro-oscillation amplitude is half a safe single-step voltage increment. The number of half-amplitude unit steps is defined as... Corresponding to half-amplitude voltage Within each template cycle, let the relative step number within the template be... Define template injection sequence (Indicates the first in the template) The unit step increment applied to the three-phase voltage target (can be positive or negative) is used to satisfy the 10-step cumulative constraint. In this example, only two events are set in the 10-step micro-oscillation, and the remaining steps are set to 0: (The text abruptly ends here, likely due to an incomplete sentence or a formatting error.) Apply Unit step length, in the next segment Apply Unit step size, the rest Therefore, the total unit step size within any 10-step window is... The single-step limit is also satisfied. On the actual timeline, The sequence is flattened into a periodic sequence and superimposed onto the frozen three-phase voltage target sequence to obtain the unit step sequence for the maintenance phase. .

[0063] Corresponding single-step current peak variation estimation Accumulated over any 10 steps The current limiting priority is achieved in one step, without the need for a silent step. During the maintenance phase, after each steady-state template is completed, a detection is performed to ensure the external power supply meets the set criteria. The detection criteria are: the absolute value of any three-phase voltage sample in the three-phase voltage sequence sampled within 200 milliseconds is greater than 1 volt, and the frequency can be determined from the three-phase voltage sequence within 200 milliseconds. Let the detection window length be... The corresponding sample size is Point. In actual operation, approximately after entering the maintenance phase... At the location, within the detection window, the following conditions are met. ,in The detection window starts at a stable frequency of 50. Therefore, the external power supply is determined to meet the set criteria, ending the black boot process.

[0064] Figure 2 The diagram illustrates the technical implementation of the voltage reduction process. It details how, during black start-up, when the current peak change caused by the voltage increment exceeds the preset upper current limit constant, the system performs incremental voltage reduction to ensure strict adherence to current limiting constraints. Figure 2As shown, the horizontal axis represents the time step sequence, and the vertical axis represents the voltage increment value in volts. The dashed line in the figure represents the original voltage increment sequence, which exhibits a monotonically increasing trend, gradually increasing from 1 volt in the first time step to 20 volts in the sixth time step. The red dashed line marks the current upper limit constant baseline, set at 15 amperes. The solid line represents the voltage increment sequence after downsampling. The specific technical implementation process is as follows: The system scans the voltage guide sequence step by step in time sequence, and queries the current limiting mapping table at each time step to estimate the current peak change caused by the voltage increment of that step. When the system detects that the original voltage increment at the sixth time step is 20 volts, it finds through the current limiting mapping table that this increment will cause a current peak change of 25 amperes, exceeding the current upper limit constant of 15 amperes. At this time, the increment downsampling mechanism is triggered, reducing the voltage increment of that step from 20 volts to 15 volts to ensure that the corresponding current peak change does not exceed the current upper limit constant. The reduction magnitude is determined according to the following principles: The maximum target voltage unit step size, not exceeding the upper current limit constant, is found in the current limiting mapping table, and any voltage increments exceeding the limit are adjusted to this safe value. After the reduction, the voltage increment sequence of subsequent time steps continues normally, and the entire black start process proceeds stably under strict current limiting constraints. This technical solution effectively prevents potential damage to the system caused by current surges.

[0065] Figure 3 This paper details the technical implementation mechanism of the current limiting mapping table lookup process, a core technical step in estimating current peak changes in a black-start control system. In the figure, the horizontal axis represents the voltage target unit step size, and the vertical axis represents the corresponding current peak change, in amperes. The current limiting mapping table was established through four preliminary step detection experiments, forming a precise correspondence between voltage increments and current peak changes. Figure 3As shown, the mapping relationship exhibits a linear increasing characteristic, increasing from 1 unit voltage target step size corresponding to a 1 amp current peak change to 8 unit steps corresponding to a 30 amp current peak change. The query process employs a time-series scanning mechanism, with the following specific steps: First, the system sequentially accesses each time step in the voltage guidance sequence; second, it extracts the voltage increment value of the current time step; then, using this voltage increment as an input parameter, it queries the current limiting mapping table to obtain the corresponding estimated current peak change value. The figure shows three typical query examples: query point 1 inputs 3 unit steps and outputs a 5 amp current peak change; query point 2 inputs 6 unit steps and outputs a 20 amp current peak change; query point 3 inputs 4 unit steps and outputs a 10 amp current peak change. Each query operation achieves precise numerical correspondence through the intersection of vertical and horizontal dashed lines. This query mechanism supports real-time current peak change estimation, providing accurate technical basis for subsequent current limiting judgment and voltage increment adjustment. When the query results show that the current peak change exceeds the preset upper limit, the system immediately activates the corresponding current limiting protection measures to ensure the safety and stability of the black start process. The entire query process is characterized by fast response speed and high accuracy.

[0066] The present invention has been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of the invention. The descriptions of the embodiments above are merely for the purpose of helping to understand the method and core ideas of the present invention. It should be noted that those skilled in the art can make various improvements and modifications to the present invention without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of the present invention.

Claims

1. A fast-response control system for energy storage PCS in black-start scenarios, characterized in that, The system includes: a black-start trigger determination module, a target reconstruction and sequence component decomposition module, and a black-start stability maintenance module. The black-start trigger determination module continuously acquires three-phase voltage and current sequences at a set sampling interval and confirms whether a black start has been triggered. If a black start is confirmed, the trigger time is recorded as the black start starting point. After determining that a black start has been triggered, the target reconstruction and sequence component decomposition module aligns the three-phase voltage and current sequences in time. Under a unified time reference, it establishes current-limiting constraints based on the current response caused by voltage changes. The voltage guide used for black start is generated in a step-by-step manner and reconstructed gradually with current limiting as the primary condition. If a single step or cumulative step exceeds the limit, the module increases the threshold by adding... The current limiting is adjusted and a silent step is inserted to avoid current limiting violations; then the aligned three-phase voltage sequence is decomposed into sequence components to obtain zero-sequence, positive-sequence, and negative-sequence components, zero-sequence elimination is performed, and phase and amplitude balancing is performed according to the positive and negative sequences. The reconstructed voltage guide is mapped to a three-phase voltage target sequence, which contains three-phase voltage targets arranged in time steps; finally, the three-phase voltage target sequence is frozen and executed in time sequence; when the nominal line voltage effective value of the three-phase voltage target sequence meets the set steady-state conditions, the black-start stability maintenance module enters the steady-state template execution stage. In subsequent time steps, the three-phase voltage target sequence is subjected to periodic micro-amplitude swings according to the preset steady-state template, and the current limiting priority is maintained until the external power supply meets the set criterion conditions.

2. The fast response control system for energy storage PCS in black-start scenarios as described in claim 1, characterized in that, The black start trigger determination module confirms black start triggering when the absolute value of any three-phase voltage sample in the three-phase voltage sequence sampled within 200 milliseconds is less than 1 volt and the frequency cannot be determined from the three-phase voltage sequence within 200 milliseconds. The sampling interval for the three-phase voltage sequence and the three-phase current sequence is from 100 microseconds to 500 microseconds.

3. The fast response control system for energy storage PCS in black-start scenarios as described in claim 2, characterized in that, The target reconstruction and sequence component decomposition module counts the adjacent sampling time intervals of the three-phase voltage sequence and the three-phase current sequence within 50 milliseconds before and after the black start point, and takes the minimum value as the time step; with the black start point as the zero time, it generates continuous time indices forward according to the time step; at each time index, the sequence of any missing sample is filled with the nearest historical sample no later than the time index, so as to achieve time alignment between the three-phase voltage sequence and the three-phase current sequence.

4. The fast response control system for energy storage PCS in black-start scenarios as described in claim 3, characterized in that, The process of establishing current-limiting constraints in the target reconstruction and sequence component decomposition module includes: applying four step detections of the voltage target unit step size sequentially from time zero, each lasting 10 time steps, with a 5-time-step zero-increment interval inserted between adjacent step detections; recording the current peak changes of the three-phase current samples during each detection period to form sample pairs of the four voltage target unit step sizes and current peak changes; establishing a current-limiting mapping table based on the sample pairs: for any n voltage target unit step size voltage increments, extrapolating the current peak changes according to the proportion of the sample pairs, with the extrapolation based on the unit step size interval covered by the four step detections as the benchmark, and applying saturation constraints when exceeding the interval by equivalent extrapolation of boundary samples. The system reads the current upper limit constant configured in the black start strategy and calculates the safe single-step voltage increment and safe cumulative voltage increment from the current limiting mapping table. The safe single-step voltage increment is defined as the maximum number of voltage target unit steps that ensures the current peak change does not exceed the current upper limit constant. The safe cumulative voltage increment is defined as the maximum value of the total number of voltage target unit steps allowed within any 10 consecutive time steps when the cumulative current peak change calculated by the current limiting mapping table does not exceed the current upper limit constant. The voltage target unit step is defined as the minimum discrete voltage increment applied simultaneously to the three-phase voltage target within a single time step. All increases and decreases of the three-phase voltage target are executed as integer multiples of this basic granularity.

5. The fast response control system for energy storage PCS in black-start scenarios as described in claim 4, characterized in that, The target reconstruction and order component decomposition module performs the following order component decomposition process: A 1-millisecond moving average is applied to the three-phase voltage samples 100 milliseconds after the black start point to reduce high-frequency noise; the time difference between two consecutive zero-crossing points in any phase voltage where the sample continuously increases from negative to positive is used as the fundamental period estimate; at each time step, the arithmetic mean of the three-phase voltage samples is calculated to obtain the zero-sequence component; at each time step, the first phase forward interpolation sample, the second phase forward interpolation sample corresponding to 1 / 3 of the fundamental period estimate of the second phase, and the third phase forward interpolation sample corresponding to 2 / 3 of the fundamental period estimate of the third phase are taken. The corresponding third-phase forward interpolation sample is linearly interpolated according to the time distance when the shift position falls between two time steps. The positive-sequence component is obtained by arithmetically averaging the first-phase forward interpolation sample, the second-phase forward interpolation sample, and the third-phase forward interpolation sample. At each time step, the second-phase backward interpolation sample corresponding to 1 / 3 of the estimated fundamental period of the second-phase shift and the third-phase backward interpolation sample corresponding to 2 / 3 of the estimated fundamental period of the third-phase shift are taken. The negative-sequence component is obtained by arithmetically averaging the first-phase forward interpolation sample, the second-phase backward interpolation sample, and the third-phase backward interpolation sample.

6. The fast response control system for energy storage PCS in black-start scenarios as described in claim 5, characterized in that, Within 50 milliseconds after the step detection ends, the target reconstruction and sequence component decomposition module calculates the peak-to-valley difference between the positive and negative sequence components during that time period, and then calculates the imbalance ratio, which is equal to the peak-to-valley difference of the negative sequence component during that time period divided by the peak-to-valley difference of the positive sequence component during that time period.

7. The fast response control system for energy storage PCS in black-start scenarios as described in claim 6, characterized in that, The target reconstruction and sequence component decomposition module sets the nominal line voltage effective value to 440 volts. Starting from the next time step after the step detection ends, the three-phase voltage target is simultaneously increased by a safe single-step voltage increment at each time step, forming a monotonically increasing voltage guide. For any 10 consecutive time steps, if the cumulative safe single-step voltage increment exceeds the safe cumulative voltage increment, then starting from the last k steps of these 10 steps, the safe single-step voltage increment is set to zero in sequence to minimize k and satisfy the cumulative constraint.

8. The fast response control system for energy storage PCS in black-start scenarios as described in claim 7, characterized in that, The target reconstruction and sequence component decomposition module generates the voltage guide used for black start in a step-by-step manner and performs a progressive reconstruction process with current limiting as the primary condition. This process includes: scanning the voltage guide in time sequence, estimating the current peak change caused by the voltage increment at each step by looking up the current limiting mapping table; if the current upper limit constant is exceeded, the voltage increment of the step is reduced to the maximum voltage target unit step size that does not exceed the current upper limit constant; for any window with a sliding window length of 10 steps, if the cumulative estimated current peak change exceeds the current upper limit constant, a silent step with a voltage increment of 0 is inserted at the end of the window, and all subsequent time steps are extended by 1 step. This process is repeated until there are no more single-step or 10-step cumulative current limiting violations, resulting in the three-phase voltage target sequence.

9. The fast response control system for energy storage PCS in black-start scenarios as described in claim 8, characterized in that, If the imbalance ratio is not higher than 0.1, freeze the three-phase voltage target sequence and execute it in chronological order; if it is higher than 0.1, perform the following balancing process: using the fundamental period estimate as the phase reference: set the second phase sequence in the three-phase voltage target sequence to 1 / 3 of the fundamental period estimate shifted backward from the first phase sequence, and set the third phase sequence to 2 / 3 of the fundamental period estimate shifted backward from the first phase sequence; within a sliding window of 20 steps, calculate the peak-valley difference of the first phase sequence, the second phase sequence, and the third phase sequence respectively; if the difference between the largest and smallest peak-valley difference in the three phases is greater than twice the safe single-step voltage increment, then make equal adjustments to both ends every 10 steps in this window: increase the safe single-step voltage increment for the phase with the smallest peak-valley difference, and decrease the safe single-step voltage increment from the phase with the largest peak-valley difference, while keeping the middle phase unchanged; if any adjustment causes the single-step or 10-step cumulative estimated current peak change based on the current limiting mapping table to exceed the upper limit constant of the current, then cancel the adjustment and insert a silent step at that point; freeze the three-phase voltage target sequence and execute it in chronological order.

10. The fast response control system for energy storage PCS in black-start scenarios as described in claim 9, characterized in that, When the nominal line voltage RMS value of the three-phase voltage target sequence reaches 440 volts and remains so for 1 second, the maintenance phase begins: the steady-state template is executed cyclically, with the steady-state template remaining unchanged for 50 consecutive steps, followed by 10 steps of three-segment micro-oscillations (up, down, and reset) based on a safe single-step voltage increment; after each completion of the steady-state template, it is checked whether the absolute value of any three-phase voltage sample in the three-phase voltage sequence is greater than 1 volt within 200 milliseconds and whether the frequency can be determined from the three-phase voltage sequence within 200 milliseconds. If so, the black start process ends.

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