Power tube detection circuit and motor control system

Abstract

The invention discloses a power tube detection circuit and a motor control system, and relates to the field of electronic power, and the power tube detection circuit comprises a comparator, a motor and a control module. The input end of the comparator is connected with the output end of a target phase in the motor, the reference end of the comparator is connected with a preset reference voltage, the output end of the comparator is connected with the control module, the control module is connected with the input end of the target phase, and the target phase is any phase in the motor; and the control module is also used for continuously monitoring the output end of the comparator after sending a turn-on signal to the upper power tube of the target phase and delaying a preset duration, and generating an interrupt signal to interrupt the operation of the motor when the upper power tube of the target phase is turned on and the output end of the comparator is monitored to output a low level. The technical problems that power tube detection is low in reliability and slow in response are solved.

Description

Technical Field

[0001] This application relates to the field of electronic power technology, and in particular to power transistor detection circuits and motor control systems. Background Technology

[0002] In the field of motor drive control, the reliable operation of power transistors directly affects the stability of the motor system. To ensure the stability of motor operation, it is necessary to detect the state of the power transistor in the motor. Currently, the detection of the power transistor is usually implemented using code, for example, by sampling the output of the power transistor a fixed number of times through a software loop. However, the software loop method not only has a low sampling frequency but is also prone to delays, making it difficult to capture abnormal states of the power transistor in a timely manner. Therefore, current technology suffers from low reliability and slow response in power transistor detection.

[0003] The above content is only used to help understand the technical solutions of the embodiments of this application, and does not represent an admission that the above content is prior art. Summary of the Invention

[0004] The main objective of this application is to provide a power transistor detection circuit and a motor control system, which aims to solve the technical problem of low reliability in power transistor detection.

[0005] To achieve the above objectives, this application provides a power transistor detection circuit, which includes a comparator, a motor, and a control module.

[0006] The input terminal of the comparator is connected to the output terminal of the target phase in the motor, the reference terminal of the comparator is connected to a preset reference voltage, the output terminal of the comparator is connected to the control module, and the control module is connected to the input terminal of the target phase, wherein the target phase is any phase in the motor;

[0007] The control module is also used to send an on signal to the upper power transistor of the target phase and, after a preset delay, continuously monitor the output of the comparator, and generate an interrupt signal to interrupt the motor operation when the upper power transistor of the target phase is turned on and the output of the comparator is detected to be low.

[0008] In one embodiment, the power transistor detection circuit includes an AND gate disposed between the output of the comparator and the control module. The AND gate includes a first input and a sampling control terminal. The first input of the AND gate is connected to the output of the comparator, and the output of the AND gate is connected to the control module.

[0009] When the sampling control terminal of the AND gate is high, the control module monitors the output terminal of the comparator connected to the target; when the sampling control terminal is low, the control module stops monitoring the output terminal of the comparator connected to the target.

[0010] In one embodiment, when the control module sends an on signal to the upper power transistor of the target phase, the sampling control terminal is at a low level for a preset duration during which the upper power transistor receives the on signal, and after the preset duration, the sampling control terminal jumps to a high level, so that the control module can monitor the output of the comparator after the preset duration of sending the on signal to the upper power transistor of the target phase.

[0011] When the control module sends a turn-off signal to the power transistor of the target phase, the sampling control terminal switches to a low level.

[0012] In one embodiment, the power transistor detection circuit further includes a reference selector, wherein a first reference input terminal of the reference selector is connected to the half-bus voltage of the motor, and a second reference input terminal of the reference selector is connected to the three-phase common point voltage of the motor.

[0013] The output of the reference selector is connected to the reference terminal of the comparator.

[0014] In one embodiment, the reference selector further includes a selection terminal. When the selection terminal of the reference selector is at a high level, the reference selector outputs the half-bus voltage to the reference terminal of the comparator, and the preset reference voltage is the half-bus voltage.

[0015] When the selection terminal is at a low level, the reference terminal selector outputs the three-phase common point voltage to the reference terminal of the comparator, and the preset reference voltage is the three-phase common point voltage.

[0016] In one embodiment, when the voltage at the reference terminal of the comparator is half the bus voltage, the sampling control terminal of the AND gate is at a high level from the end of the preset time when the upper power transistor of the target phase is turned on until the moment when the upper power transistor receives the turn-off signal.

[0017] In one embodiment, when the voltage at the reference terminal of the comparator is the three-phase common point voltage, the sampling control terminal is at a low level during a preset interference period after the upper power transistor of the target phase is turned on for a preset duration. The sampling control terminal is at a high level from the end of the preset duration to the start of the preset interference period, and from the end of the preset interference period to the moment when the upper power transistor receives the turn-off signal.

[0018] The preset interference period is the period during which the control signal received by the power transistor of each phase of the motor is at a high level.

[0019] In one embodiment, the power transistor detection circuit further includes a filtering module, the input of which is connected to the output of the comparator, and the output of which is connected to the first input of the AND gate in the power transistor detection circuit.

[0020] In one embodiment, the power transistor detection circuit includes multiple comparators and multiple AND gates. The output of each phase of the motor is connected to the input of a comparator, the output of each comparator is connected to the first input of an AND gate, and the output of each AND gate is connected to a control module.

[0021] In addition, to achieve the above objectives, embodiments of this application also provide a motor control system, including the power transistor detection circuit described above.

[0022] The one or more technical solutions proposed in this application have at least the following technical effects: By connecting the input terminal of a comparator to the output terminal of the target phase in the motor and the reference terminal of the comparator to a preset reference voltage, the voltage output from the target phase can be compared with the preset reference voltage to determine whether the voltage at the target phase output terminal is abnormal. The output of the comparator is directly connected to the control module, which facilitates continuous monitoring of the comparator output terminal by the control module. Specifically, the control module can continuously monitor the comparator output terminal after sending an on signal to the upper power transistor of the target phase for a preset duration, thereby continuously monitoring whether the upper power transistor of the target phase is abnormal, rather than detecting through software loops or limited frequency detection. This application can continuously monitor after the upper power transistor of the target phase is turned on for a preset duration, improving the reliability of power transistor detection and facilitating the timely generation of an interrupt signal to stop motor operation when the upper power transistor is abnormal. In addition, since there is a ringing effect for a very short period of time when the upper power transistor is turned on, which can cause the output of the upper power transistor to be unstable, this application will continue to detect the power transistor after a preset time after the upper power transistor sends the turn-on signal, thereby improving the reliability of the power transistor detection. Attached Figure Description

[0023] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with those of this application and, together with the specification, serve to explain the principles of the embodiments of this application.

[0024] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0025] Figure 1 This is a circuit connection diagram of one embodiment of the power transistor detection circuit of this application;

[0026] Figure 2 This is a schematic diagram of the power transistor detection circuit including AND gates in an embodiment of this application;

[0027] Figure 3 This is a schematic diagram of the circuit connection of the power transistor detection circuit including the reference selector in an embodiment of this application;

[0028] Figure 4 This is a schematic diagram of the circuit connection of the power transistor detection circuit including the filter module in an embodiment of this application;

[0029] Figure 5 This is a schematic diagram showing the circuit connections of the motor phases to the corresponding comparators, filter modules, and AND gates in the power transistor detection circuit of this application embodiment.

[0030] Figure 6 This is a schematic diagram of the control signals corresponding to each phase of the motor in the power transistor detection circuit of this application embodiment, and the waveforms of the sampling control terminals corresponding to each phase of the motor when the preset reference voltage is the three-phase common point voltage;

[0031] Figure 7 This is a schematic diagram of the control signal of any phase of the motor and the corresponding sampling control terminal waveform in the power transistor detection circuit of this application when the preset reference voltage is half bus voltage.

[0032] Explanation of icon numbers:

[0033] 100, Control Module; 200, Comparator; 300, Motor; Mx, Output of Target Phase; CD, Preset Reference Voltage; R1, Input of Comparator; R2, Reference of Comparator; CMPx_out, Output of Comparator; 400, AND Gate; SAMx, Sampling Control Terminal; FLTx, First Input of AND Gate; 500, Reference Terminal Selector; COM, Three-Phase Common Point Voltage; VCC / 2, Half-Bus Voltage; PMD, Selection Terminal; 600, Filter Module; MU, U-Phase Voltage in Motor; MV, V-Phase Voltage in Motor; MW, W-Phase Voltage in Motor; 200W, Comparator Connected to W-Phase in Motor; 200V, Comparator Connected to V-Phase in Motor; 200U, Comparator Connected to U-Phase in Motor; CMPU_out, Output of Comparator Connected to U-Phase in Motor ;CMPV_out, the output of the comparator connected to phase V in the motor; CMPW_out, the output of the comparator connected to phase W in the motor; 600W, the filter module corresponding to phase W in the motor; 600V, the filter module corresponding to phase V in the motor; 600U, the filter module corresponding to phase U in the motor; 400W, the AND gate corresponding to phase W in the motor; 400V, the AND gate corresponding to phase V in the motor; 400U, the AND gate corresponding to phase U in the motor; SAMW, the sampling control terminal corresponding to phase W in the motor; SAMV, the sampling control terminal corresponding to phase V in the motor; SAMU, the sampling control terminal corresponding to phase U in the motor; FLTW, the first input terminal of the AND gate corresponding to phase W in the motor; FLTV, the first input terminal of the AND gate corresponding to phase V in the motor; FLTU, the first input terminal of the AND gate corresponding to phase U in the motor.

[0034] The objectives, features, and advantages of the embodiments described in this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0035] It should be understood that the specific embodiments described herein are merely illustrative of the technical solutions of the embodiments of this application and are not intended to limit the embodiments of this application.

[0036] To better understand the technical solutions of the embodiments of this application, a detailed description will be provided below in conjunction with the accompanying drawings and specific implementation methods.

[0037] In the field of motor drive control, the reliable operation of power transistors directly affects the stability of the motor system. To ensure the stability of motor operation, it is necessary to detect the state of the upper transistor in the motor. Currently, the detection of the upper transistor is usually implemented using code. Existing methods use software to sample via loop statements, sampling a fixed number of times after the upper transistor is turned on. This sampling frequency is low and can only capture a very short period of time immediately after the upper transistor is turned on. When the duty cycle of the upper transistor output is large, the state of the power transistor in the subsequent stages cannot be effectively monitored. Furthermore, sampling via loop statements suffers from delays and slow response, and can only detect the state at the moment of sampling, failing to monitor the state of the power transistor at other times, thus reducing the reliability of power transistor detection.

[0038] To address this issue, this embodiment provides a power transistor detection circuit. By connecting the input of a comparator to the output of the target phase in the motor and the reference of the comparator to a preset reference voltage, the voltage output of the target phase can be compared with the preset reference voltage to determine if the voltage at the target phase output is abnormal. The comparator output is directly connected to the control module, facilitating continuous monitoring of the comparator output. Specifically, after a preset duration of sending an on-signal to the power transistor of the target phase, the control module can continuously monitor the comparator output, enabling continuous monitoring of whether the power transistor of the target phase is abnormal. This is not achieved through software looping or limited-frequency detection. This embodiment allows for continuous monitoring after the preset on-time of the power transistor, improving the reliability of power transistor detection and facilitating the timely generation of an interrupt signal to stop motor operation when the power transistor malfunctions. Furthermore, since the upper power transistor experiences a ringing effect for a very short period after being turned on, which can cause instability in its output, this embodiment of the application continuously detects the power transistor after a preset duration following the upper power transistor sending its turn-on signal, thereby improving the reliability of power transistor detection. Moreover, since detection does not require software loop statements, the code can be made more concise.

[0039] Based on this, embodiments of this application provide a power transistor detection circuit, referring to... Figure 1 , Figure 1 This is a schematic diagram of a power transistor detection circuit according to an embodiment of this application. The power transistor detection circuit includes: a comparator 200, a motor 300, and a control module 100;

[0040] The input terminal R1 of the comparator is connected to the output terminal Mx of the target phase in the motor 300, the reference terminal R2 of the comparator is connected to the preset reference voltage CD, and the output terminal CMPx_out of the comparator is connected to the control module 100. The control module 100 is connected to the input terminal of the target phase, wherein the target phase is any phase in the motor 300.

[0041] The control module 100 is also used to continuously monitor the output terminal CMPx_out of the comparator after sending an on signal to the upper power transistor of the target phase and delaying for a preset time, and generate an interrupt signal to interrupt the operation of the motor 300 when the upper power transistor of the target phase is turned on and the output terminal of the comparator 200 is detected to be low.

[0042] It should be noted that the input terminal R1 of the comparator is connected to the output terminal Mx of the target phase in the motor 300. The target phase can be any phase in the motor 300. The motor 300 can be a three-phase motor 300. In other embodiments, the motor 300 can also be a two-phase motor 300, etc. This embodiment does not impose specific limitations on this. In this embodiment, the output terminal of each phase in the motor 300 can be connected to a comparator 200. Different comparators 200 are connected to different phases. The number of target phase output terminals Mx connected to the input terminal R1 of the same comparator is 1. It can be understood that the power transistor detection circuit can include multiple comparators 200, and the number of comparators 200 can be the same as the number of phases in the motor 300.

[0043] The comparator's reference terminal R2 can be connected to a preset reference voltage CD. Comparator 200 can then compare the preset reference voltage CD with the voltage at the target phase output to determine if the target phase output voltage is abnormal. When the target phase's high-power transistor is on, the voltage at the target phase output will be greater than the preset reference voltage CD, at which point comparator 200 will output a high level. When the target phase's high-power transistor is off, the voltage at the target phase output will be less than the voltage at the preset reference terminal, at which point comparator 200 will output a low level. The preset reference voltage CD can be determined based on actual conditions; this embodiment does not impose specific limitations on it.

[0044] The comparator's output terminal CMPx_out is connected to the control module 100. The control module 100 can be connected to the input terminal of the target phase. The control module 100 can send control signals to the target phase to control the switching state of the upper power transistor in the target phase. For example, the control signal can include an upper power transistor turn-on signal and an upper power transistor turn-off signal. The turn-on signal can control the upper power transistor to turn on, and the turn-off signal can control the upper power transistor to turn off.

[0045] After a preset duration of sending an on signal to the upper power transistor of the target phase, the control module 100 can continuously monitor the comparator output CMPx_out. The preset duration can be set based on actual conditions. The purpose of setting the preset duration is mainly to avoid monitoring the output of the upper power transistor when ringing occurs, thus preventing accidental interruption of the motor 300. The preset duration can be the duration of the ringing effect of the upper power transistor. If the preset reference voltage CD is different, the process by which the control module 100 continuously monitors the comparator output CMPx_out after the preset on duration of the target phase's upper power transistor will differ. For example, the continuous monitoring process could be continuous monitoring of a first time period, starting from the end of the preset duration until the target phase's upper power transistor receives the off signal; or continuous monitoring of a second and third time period, where the second time period starts from the end of the preset duration until the start of a preset interference period; and the third time period starts from the end of the preset interference period until the target phase's upper power transistor receives the off signal. The preset interference period refers to the period when all three-phase power transistors are turned on. During this time, if the preset reference voltage CD is the three-phase common point voltage, the comparator output CMPx_out will be unstable. Therefore, when the comparator output CMPx_out is unstable, the control module 100 will not monitor it, thus avoiding misjudgment. The comparator input is positive, and the comparator reference is negative. In this embodiment, when the control module sends a switch control signal to the target phase's power transistor, it also sends a switch control signal to the lower power transistor. The switch control signal has two states: high and low, corresponding to the power transistor being turned on and off, respectively. The power transistor can be either the upper or lower power transistor.

[0046] After the target phase's upper power transistor receives the turn-on signal, the voltage output by the target phase will be greater than the preset reference voltage CD, so comparator 200 will output a high level. If the control module 100 detects this when the upper power transistor is turned on, and the comparator 200 outputs a low level, it indicates that the upper power transistor is abnormal. The control module 100 will then generate an interrupt signal to stop the operation of motor 300, ensuring the reliability of motor 300 operation. Furthermore, since this application can continuously monitor the state of the upper power transistor when it is turned on, it also facilitates improved monitoring reliability, enabling timely detection of upper power transistor abnormalities and thus improving the reliability of power transistor detection.

[0047] In this embodiment, the input terminal R1 of the comparator is connected to the output terminal Mx of the target phase in the motor 300, and the reference terminal R2 of the comparator is connected to a preset reference voltage CD. This allows the comparator 200 to compare the voltage output of the target phase with the preset reference voltage CD to determine if the voltage at the target phase output is abnormal. The output of the comparator 200 is directly connected to the control module 100, facilitating continuous monitoring of the comparator's output terminal CMPx_out by the control module 100. Specifically, after a preset duration of sending an on-signal to the upper power transistor of the target phase, the control module 100 can continuously monitor the comparator's output terminal CMPx_out, thereby continuously monitoring whether the upper power transistor of the target phase is abnormal, rather than detecting it through software loops or limited-frequency detection. This embodiment allows for continuous monitoring after the preset on-time of the upper power transistor of the target phase, improving the reliability of power transistor detection and facilitating the timely generation of an interrupt signal to stop the operation of the motor 300 when the upper power transistor is abnormal. In addition, since there is a ringing effect for a very short period of time when the upper power transistor is turned on, which can cause the output of the upper power transistor to be unstable, this embodiment of the application will continue to detect the power transistor after a preset time after the upper power transistor sends the turn-on signal, thereby improving the reliability of the power transistor detection.

[0048] In one feasible embodiment, please refer to Figure 2 The power transistor detection circuit includes an AND gate 400 disposed between the output terminal of comparator 200 and control module 100. The AND gate 400 includes a first input terminal and a sampling control terminal SAMx. The first input terminal FLTx of the AND gate is connected to the output terminal CMPx_out of the comparator, and the output terminal of the AND gate 400 is connected to control module 100.

[0049] When the sampling control terminal SAMx of AND gate 400 is high, the control module 100 monitors the output terminal CMPx_out of the comparator connected to the target. When the sampling control terminal SAMx is low, the control module 100 stops monitoring the output terminal CMPx_out of the comparator connected to the target.

[0050] It should be noted that AND gate 400 can be used to filter out invalid signals at the output of comparator 200 to prevent the control module 100 from detecting invalid signals and causing an accidental interruption of motor 300. AND gate 400 can be placed between the control module 100 and the output of comparator 200. When the sampling control terminal SAMx is low, the control module 100 will stop monitoring the output CMPx_out of the comparator connected to the target; when the sampling control terminal SAMx is high, the control module 100 will monitor the output CMPx_out of the comparator connected to the target. The level state of the sampling control terminal SAMx is determined by the control module 100 based on the control signal of the target phase in the motor 300. Therefore, when the sampling control terminal SAMx corresponding to the target is low, the control module 100 does not monitor the output terminal CMPx_out of the comparator corresponding to the target. When the sampling control terminal SAMx corresponding to the target is high, the control module 100 can monitor the output terminal CMPx_out of the comparator corresponding to the target. Furthermore, if the output terminal of the comparator 200 is detected to be low when the sampling control terminal SAMx is high, it indicates that the power transistor of the target phase corresponding to the output terminal of the comparator 200 is abnormal, and the operation of the motor 300 needs to be interrupted.

[0051] After the target transistor's power transistor has been turned on for a preset duration, the sampling control terminal SAMx will switch to a high level, which allows the control module 100 to continuously monitor the output terminal CMPx_out of the comparator connected to the target phase, so as to continuously monitor whether the target phase's power transistor is abnormal.

[0052] It should also be noted that AND gate 400 will only output a high level when both the first input terminal and the sampling control terminal SAMx are high, and AND gate 400 will output a low level when the first output terminal and / or the sampling control terminal SAMx are low.

[0053] The invalid signals filtered out by AND gate 400 may include the signals output by comparator 200 within a preset period of time after the upper power transistor is turned on.

[0054] In one feasible embodiment, when the control module 100 sends an on signal to the power transistor of the target phase, the sampling control terminal SAMx is at a low level for a preset duration after the power transistor receives the on signal. After the preset duration, the sampling control terminal SAMx jumps to a high level so that the control module 100 can monitor the output terminal CMPx_out of the comparator after the preset duration of sending the on signal to the power transistor of the target phase.

[0055] When the control module 100 sends a turn-off signal to the power transistor of the target phase, the sampling control terminal SAMx jumps to a low level.

[0056] It should be noted that the sampling control terminal SAMx remains low for a preset duration after the upper power transistor receives the turn-on signal. After the preset duration, SAMx will transition to a high level. At this time, the control module 100 will monitor the signal output from the comparator terminal, thus facilitating continuous monitoring of whether the upper power transistor is abnormal. When the control module 100 sends a turn-off signal to the upper power transistor of the target phase, it indicates that the upper power transistor is turned off. In this case, the upper power transistor does not need to be monitored, and the sampling control terminal SAMx will also transition to a low level. Consequently, the control module 100 will not monitor the turned-off upper power transistor, thereby saving the operating resources of the control module 100.

[0057] In one feasible embodiment, please refer to Figure 3 The power transistor detection circuit also includes a reference selector 500. The first reference input terminal of the reference selector 500 is connected to the half bus voltage VCC / 2 of the motor 300, and the second reference input terminal of the reference selector 500 is connected to the three-phase common point voltage COM of the motor 300.

[0058] The output of the reference selector 500 is connected to the reference terminal R2 of the comparator.

[0059] It should be noted that the reference selector 500 can be used to select different reference voltages. The reference selector 500 also includes a selection terminal PMD. When the level state of the selection terminal PMD is different, the preset reference voltage CD connected to the reference terminal of the comparator 200 will also be different.

[0060] The preset reference voltage CD can be either half the bus voltage VCC / 2 or the three-phase common point voltage. The half bus voltage VCC / 2 is half the bus voltage corresponding to motor 300, and the three-phase common point voltage is the voltage at the common terminal of the three phases in motor 300. The output of the reference selector 500 is connected to the reference terminal R2 of the comparator. When the level state of the selection terminal PMD is different, the voltage output by the reference selector 500 will also be different. The level state of the selection terminal PMD can be 0 or 1, which can be determined based on the actual situation; this embodiment does not impose a specific limitation on this. Furthermore, by flexibly adjusting the preset reference voltage, the range of the sampling time can be flexibly selected.

[0061] In one feasible embodiment, the reference selector 500 further includes a selection terminal PMD. When the selection terminal PMD of the reference selector 500 is at a high level, the reference selector 500 outputs the half bus voltage VCC / 2 to the reference terminal R2 of the comparator, and the preset reference voltage CD is the half bus voltage VCC / 2.

[0062] When the selector terminal PMD is at a low level, the reference selector 500 outputs the three-phase common point voltage to the reference terminal R2 of the comparator, with the preset reference voltage CD being the three-phase common point voltage.

[0063] It should be noted that when the selector terminal PMD is at a high level, the voltage output by the selector terminal 500 is half the bus voltage VCC / 2, and the preset reference voltage CD of the comparator 200 is half the bus voltage VCC / 2. When the selector terminal PMD is at a low level, the voltage output by the selector terminal 500 is the three-phase common point voltage, and the preset reference voltage CD of the comparator 200 is the three-phase common point voltage.

[0064] This embodiment improves the application range and flexibility of the power transistor detection circuit by setting a reference selector 500 in the power transistor detection circuit, thereby enabling the selection of a suitable preset reference voltage CD based on the actual situation.

[0065] In one feasible embodiment, when the voltage at the reference terminal R2 of the comparator is half the bus voltage VCC / 2, the sampling control terminal SAMx of the AND gate 400 is at a high level from the end of the preset time when the upper power transistor of the target phase is turned on to the moment when the upper power transistor receives the turn-off signal.

[0066] In a feasible embodiment, when the voltage of the reference terminal R2 of the comparator is the three-phase common point voltage, the sampling control terminal SAMx is at a low level during a preset interference period after the upper power transistor of the target phase is turned on for a preset duration, and the sampling control terminal SAMx is at a high level from the end of the preset duration to the beginning of the preset interference period, and from the end of the preset interference period to the moment when the upper power transistor receives the turn-off signal.

[0067] The preset interference period is the period during which the control signal received by the power transistor of each phase in motor 300 is at a high level.

[0068] It should be noted that the monitoring period of the control module 100 after the upper power transistor is turned on varies depending on the preset reference voltage CD. Specifically, when the preset reference voltage CD is half bus voltage VCC / 2, the sampling control terminal SAMx is at a high level from the time the upper power transistor of the target phase is turned on for the preset duration until the upper power transistor receives the turn-off signal. That is, the control module 100 continuously monitors the output terminal CMPx_out of the comparator connected to the target phase from the time the upper power transistor is turned on for the preset duration until the upper power transistor is turned off, thereby continuously monitoring the upper power transistor of the target phase.

[0069] When the preset reference voltage CD is the three-phase common point voltage, it is at a low level for a preset duration after the upper power transistor is turned on and during the preset interference period. That is, after the upper power transistor is turned on for a preset duration, the control module 100 will not monitor the upper power transistor of the target phase for a period of time before the upper power transistor is turned off. In other words, the upper power transistor of the target phase will not be monitored during the preset interference period.

[0070] The preset interference period refers to the period during which the control signal received by the upper power transistor of each phase in motor 300 is at a high level. This means that the preset interference period is the period when the upper power transistor is turned on and motor 300 outputs a zero vector. A zero vector output means that the control signals of all three phases of motor 300 are 1, i.e., high level. The control signals include on and off signals. The on signal is high level, and the off signal is low level. When the control signal is high level, the upper power transistor is in the on state. When the control signal received by the upper power transistor of each phase in motor 300 is high, it means that the output voltage of each phase in motor 300 will be close to the bus voltage VCC. At this time, the preset reference voltage CD is the three-phase common point voltage. When the output voltage of each phase in motor 300 is close to VCC, the voltage at the reference terminal and the voltage at the input terminal of comparator 200 are close, and the output of comparator 200 will be unstable, which may easily lead to misjudgment by control module 100. Therefore, during the preset interference period, control module 100 does not monitor the output of comparator 200 to avoid misjudgment. In addition to the preset duration of the upper power transistor being turned on and the preset interference period, the upper power transistor is continuously monitored during the remaining time when the upper power transistor is turned on, so as to improve the reliability of power transistor detection.

[0071] Therefore, when the preset reference voltage CD is the three-phase common point voltage, during the preset interference period after the target phase's upper power transistor is turned on for a preset duration, the sampling control terminal SAMx is at a low level; from the end of the preset duration to the beginning of the preset interference period, and from the end of the preset interference period to the moment the upper power transistor receives the turn-off signal, the sampling control terminal SAMx is at a high level. This allows the control module 100 to continuously monitor the turned-on upper power transistor while avoiding periods of unstable output from the comparator 200, thus improving the accuracy of power transistor detection.

[0072] In one feasible embodiment, please refer to Figure 4 The power transistor detection circuit also includes a filter module 600. The input terminal of the filter module 600 is connected to the output terminal CMPx_out of the comparator, and the output terminal of the filter module 600 is connected to the first input terminal FLTx of the AND gate in the power transistor detection circuit.

[0073] It should be noted that the filter module 600 is used to filter out interference signals, which can prevent misjudgments caused by interference and avoid response lag caused by excessive filtering. The filter module 600 can be set between the output of the comparator 200 and the first input FLTx of the AND gate.

[0074] In one feasible embodiment, please refer to Figure 5 The power transistor detection circuit includes multiple comparators 200 and multiple AND gates 400. The output of each phase of the motor 300 is connected to the input R1 of the comparator. The output CMPx_out of each comparator is connected to the first input FLTx of the AND gate. The output of each AND gate 400 is connected to the control module 100.

[0075] It should be noted that the power detection circuit may include multiple comparators 200 and multiple AND gates 400. The number of comparators 200 and the number of AND gates 400 may be the same. The number of comparators 200 may also be the same as the number of phases in the motor 300. For example, the number of comparators 200 may be 3, the number of AND gates 400 may be 3, and the motor 300 may be a three-phase motor 300, etc. This embodiment does not make specific limitations in this regard.

[0076] In this embodiment, the output terminal of each phase of the motor 300 is connected to the input terminal R1 of a comparator. Different comparators 200 are connected to different phases. The output terminal CMPx_out of each comparator is connected to the first input terminal FLTx of an AND gate. Each comparator 200 corresponds one-to-one with an AND gate 400, and each AND gate 400 has its own corresponding sampling control terminal SAMx. Due to different phases, the level state of the sampling control terminal SAMx may also be different at the same time. The output terminal of each AND gate 400 is connected to the control module 100. The reference terminal R2 of each comparator is connected to a preset reference voltage CD. The preset reference voltage CD connected to the reference terminals R2 of the three phases of the same motor 300 is the same; for example, it is the three-phase common point voltage or the half-bus voltage VCC / 2, etc. For example, it can also refer to... Figure 4 , Figure 4 The diagram shows the circuit connection diagram of any phase of motor 300, including comparator 200, filter module 600, and AND gate 400.

[0077] exist Figure 5 The image shows the comparators, filter modules, and AND gates connected to the output terminals of each phase of the motor. For example, Figure 5In this context, MU refers to the output voltage of phase U in the motor, MV refers to the output voltage of phase V, and MW refers to the output voltage of phase W. 200W is the comparator connected to phase W in the motor; 200V is the comparator connected to phase V; 200U is the comparator connected to phase U; CMPU_out is the output of the comparator connected to phase U; CMPV_out is the output of the comparator connected to phase V; and CMPW_out is the output of the comparator connected to phase W.

[0078] 600W is the filter module corresponding to W in the motor, 600V is the filter module corresponding to V in the motor, and 600U is the filter module corresponding to U in the motor; 400W is the AND gate corresponding to W in the motor, 400V is the AND gate corresponding to V in the motor, and 400U is the AND gate corresponding to U in the motor; SAMW is the sampling control terminal corresponding to W in the motor, SAMV is the sampling control terminal corresponding to V in the motor, and SAMU is the sampling control terminal corresponding to U in the motor; FLTW is the first input terminal of the AND gate corresponding to W in the motor; FLTV is the first input terminal of the AND gate corresponding to V in the motor; and FLTU is the first input terminal of the AND gate corresponding to U in the motor. Figure 5 As can be seen, the corresponding sampling control terminals are different, the comparators are different, and the AND gates are also different. Each AND gate can be connected to the control module, and different comparators can be connected to the same reference terminal comparator. In other embodiments, the reference terminals of different comparators can also be connected to separate reference terminal comparators, but the preset reference voltages of the corresponding comparison terminals in the same motor need to be consistent.

[0079] To better understand this embodiment, please refer to Figure 6 and Figure 7 , Figure 6 These are the control signals corresponding to each phase of the motor, and waveform diagrams of the sampling control terminals corresponding to each phase of the motor when the preset reference voltage is the three-phase common point voltage. Figure 7 This is a waveform diagram of the control signal of any phase of the motor and the corresponding sampling control terminal when the preset reference voltage is half the bus voltage in the power transistor detection circuit. Figure 6 and Figure 7 CLK in the code is the reference clock signal for the motor. Figure 6 and Figure 7 t1 in the text refers to the preset duration. Figure 6 t2 in the equation represents the preset interference period.

[0080] Reference Figure 6 , Figure 6In the diagram, UH represents the control signal for phase U of the motor, VH represents the control signal for phase V of the motor, and WH represents the control signal for phase W of the motor. These control signals are used to control the switching state of the upper power transistor. A high level control signal indicates that the upper power transistor is on, and a low level control signal indicates that the upper power transistor is off. SAMU is the sampling control terminal corresponding to phase U of the motor. Figure 6 In the diagram, the waveform corresponding to SAMU jumps to a high level after a duration of t1 when UH transitions to a high level, and then jumps to a low level when UH, VH, and WH are all high. When UH is still high and VH and WH are not both high, the sampling control terminal corresponding to UH can jump to a high level again. When UH jumps to a low level, it also jumps to a low level. Therefore, during the conduction of the upper power transistor of phase U, the control module does not monitor the comparator corresponding to U during the t1 and t2 periods. When UH is high, and except during the t1 and t2 periods, the control module will monitor the output terminal of the comparator corresponding to U.

[0081] The waveform corresponding to SAMV transitions to a high level after a duration of t1 when VH transitions to a high level, and then transitions to a low level when VH, VH+, and WH are all high. If VH is still high, and VH and WH are not both high, the sampling control terminal corresponding to VH can transition to a high level again. It also transitions to a low level simultaneously with VH. Therefore, during the conduction of the upper power transistor of phase V, the control module does not monitor the comparator corresponding to V during time periods t1 and t2. However, when VH is high, and except during time periods t1 and t2, the control module monitors the output of the comparator corresponding to V. Figure 6 In this context, WH represents a brief high level, while SAMW corresponds to a low level. This means that the control module will not monitor the output of the comparator corresponding to W. Figure 6 The waveform shown is one example. In other embodiments, there may be cases where one or two phases are not sampled, meaning the control module may not monitor any one or two phases. For example, when VH is high, the waveform corresponding to SAMV may also be low, and / or when UH is high, the waveform corresponding to SAMU may also be low. This embodiment does not specifically limit this. For the target phase in the motor, the target phase can be any phase. The level state of the sampling control terminal of the target phase is determined based on the control signal of the target phase and the zero vector of the motor. The zero vector of the motor indicates that the control signals of all three phases in the motor are either all high or all low.

[0082] Refer to Figure 7 , Figure 7xH and SAMx in the motor can be any corresponding control signal and sampling control terminal. When the preset reference voltage is half bus voltage, when the control signal jumps to a high level and lasts for t1, the sampling control terminal SAMx will be at a high level, and will also jump to a low level until the control signal jumps to a low level.

[0083] The power transistor abnormal state detection process in this embodiment can be as follows: the comparator CMPx continuously compares the voltage output of phase x with a preset reference voltage. The output of the comparator is sent to a filter module to filter out glitches. The control module uses the turn-on signal of the upper transistor in phase x as a reference and continuously samples the output of the filter module after a preset delay of t (because there is a ringing effect in the short time after the power transistor is turned on, which may cause the comparator to misjudge. The length of the preset delay is affected by factors such as voltage, output power, and power transistor). If the preset reference voltage at the reference terminal of the comparator is VCC / 2, sampling ends when the upper transistor in phase x is turned off, that is, the control module ends monitoring when the upper transistor in phase x is turned off; if the preset reference voltage at the reference terminal of the comparator is the COM point voltage, the output signal of the comparator is not sampled when the motor is at zero vector, but sampling continues at other times. That is, the control module does not monitor the output of the comparator when the motor is at zero vector, but can monitor it for the remaining time after the upper transistor is turned on for the preset delay. Phase x can be any phase in the motor. The control module will perform the above detection process on each phase of the motor. Once the sampling result of any phase does not meet expectations, an interrupt signal will be triggered immediately. For example, when the corresponding sampling control terminal is high and the corresponding comparator output terminal is detected to be low, a terminal signal will be triggered.

[0084] For example, when the upper transistor of phase x is turned on, and after a preset delay of t1, the output of the phase x comparator is detected. Normally, when the upper transistor (upper power transistor) is on and the lower transistor is off, the phase x voltage is approximately VCC, greater than the COM voltage, and the comparator output remains continuously high. If the upper transistor output fails at this time, causing the phase x voltage to drop, the control module detects a low level, considers the upper transistor output abnormal, immediately triggers an interrupt, and initiates protection.

[0085] For example, when the upper transistor of phase x is turned on, and after a preset delay of t1, the output of the phase x comparator is detected. As in the example above, under normal conditions, the upper transistor is on and the lower transistor is off, and the comparator should output a continuous high level. If the lower transistor is abnormally turned off at this time, the upper and lower transistors are connected, the phase x voltage is pulled to ground, the control module detects the low level, immediately triggers an interrupt, and initiates the protection action.

[0086] The motor control system provided in this application adopts the power transistor detection circuit in the above embodiments, aiming to solve the technical problem of low reliability of power transistor detection. Compared with the prior art, the beneficial effects of the motor control system provided in this application are the same as those of the power transistor detection circuit provided in the above embodiments, and will not be repeated here.

[0087] The above are merely preferred embodiments of the present application and do not limit the patent scope of the present application. Any equivalent structural or procedural transformations made using the description and drawings of the present application, or direct or indirect applications in other related technical fields, are similarly included within the patent processing scope of the present application.

Claims

1. A power transistor detection circuit, characterized in that, The power transistor detection circuit includes: a comparator, a motor, and a control module; The input terminal of the comparator is connected to the output terminal of the target phase in the motor, the reference terminal of the comparator is connected to a preset reference voltage, the output terminal of the comparator is connected to the control module, and the control module is connected to the input terminal of the target phase, wherein the target phase is any phase in the motor; The control module is also used to send an on signal to the upper power transistor of the target phase and, after a preset delay, continuously monitor the output of the comparator, and generate an interrupt signal to interrupt the motor operation when the upper power transistor of the target phase is turned on and the output of the comparator is detected to be low.

2. The power transistor detection circuit as described in claim 1, characterized in that, The power transistor detection circuit includes an AND gate disposed between the output of the comparator and the control module. The AND gate includes a first input and a sampling control terminal. The first input of the AND gate is connected to the output of the comparator, and the output of the AND gate is connected to the control module. When the sampling control terminal of the AND gate is high, the control module monitors the output terminal of the comparator connected to the target; when the sampling control terminal is low, the control module stops monitoring the output terminal of the comparator connected to the target.

3. The power transistor detection circuit as described in claim 2, characterized in that, When the control module sends an on signal to the power transistor of the target phase, the sampling control terminal is at a low level for a preset duration after the power transistor receives the on signal. After the preset duration, the sampling control terminal jumps to a high level so that the control module can monitor the output of the comparator after the preset duration of sending the on signal to the power transistor of the target phase. When the control module sends a turn-off signal to the power transistor of the target phase, the sampling control terminal switches to a low level.

4. The power transistor detection circuit as described in claim 1, characterized in that, The power transistor detection circuit also includes a reference terminal selector. The first reference input terminal of the reference terminal selector is connected to the half bus voltage of the motor, and the second reference input terminal of the reference terminal selector is connected to the three-phase common point voltage of the motor. The output of the reference selector is connected to the reference terminal of the comparator.

5. The power transistor detection circuit as described in claim 4, characterized in that, The reference selector also includes a selection terminal. When the selection terminal of the reference selector is at a high level, the reference selector outputs the half bus voltage to the reference terminal of the comparator. The preset reference voltage is the half bus voltage. When the selection terminal is at a low level, the reference terminal selector outputs the three-phase common point voltage to the reference terminal of the comparator, and the preset reference voltage is the three-phase common point voltage.

6. The power transistor detection circuit as described in any one of claims 1-5, characterized in that, When the voltage at the reference terminal of the comparator is half the bus voltage, the sampling control terminal of the AND gate is at a high level from the end of the preset time when the upper power transistor of the target phase is turned on until the moment when the upper power transistor receives the turn-off signal.

7. The power transistor detection circuit as described in any one of claims 1-5, characterized in that, When the voltage at the reference terminal of the comparator is the three-phase common point voltage, the sampling control terminal is at a low level during a preset interference period after the upper power transistor of the target phase is turned on for a preset duration. The sampling control terminal is at a high level from the end of the preset duration to the start of the preset interference period, and from the end of the preset interference period to the moment when the upper power transistor receives the turn-off signal. The preset interference period is the period during which the control signal received by the power transistor of each phase of the motor is at a high level.

8. The power transistor detection circuit as described in claim 1, characterized in that, The power transistor detection circuit also includes a filtering module. The input of the filtering module is connected to the output of the comparator, and the output of the filtering module is connected to the first input of the AND gate in the power transistor detection circuit.

9. The power transistor detection circuit as described in claim 1, characterized in that, The power transistor detection circuit includes multiple comparators and multiple AND gates. The output of each phase of the motor is connected to the input of a comparator, the output of each comparator is connected to the first input of an AND gate, and the output of each AND gate is connected to a control module.

10. A motor control system, characterized in that, The motor includes a power transistor detection circuit as described in any one of claims 1-9.

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