Metal grid line structure and preparation method of solar cell

Abstract

The invention relates to the field of photovoltaic technology, in particular to a metal grid line structure and a preparation method of a solar cell. The metal grid line structure can be arranged on a heterojunction solar cell. The metal grid line structure comprises a contact layer and a replacement layer which are arranged in a stacked mode, the contact layer is used for being arranged on the metal seed layer, the replacement layer is used for at least partially forming a metal protection layer, in the thickness direction of the metal grid line structure, the section porosity of the contact layer is a1, the section porosity of the replacement layer is a2, and a1 is smaller than a2. The porosity of the inner section of the contact layer is smaller, and the density is higher, so that the binding force between the contact layer and the copper seed layer is effectively improved. The section porosity of the replacement layer is larger, so that the interior of the replacement layer is of a loose, porous and rough structure, combination and diffusion of tin are facilitated, and the thickness of the tin protection layer can be increased. Therefore, the oxidation resistance of the tin protection layer can be improved, the oxidation of the copper grid line due to high temperature is reduced, and the electrical property of the copper grid line is ensured.

Description

Technical Field

[0001] This application relates to the field of photovoltaic technology, and in particular to a metal grid structure and a method for fabricating solar cells. Background Technology

[0002] In the photovoltaic technology field, copper interconnect solar cell technology is gradually replacing screen printing technology in the fabrication of HJT (Heterojunction) solar cells. The main steps of copper interconnect solar cell technology include: preparing an amorphous silicon layer and a transparent conductive layer on a textured silicon substrate; then preparing a copper seed layer on the transparent conductive layer for conductivity; electroplating copper grid lines on the copper seed layer; subsequently, using chemical tin plating to deposit a tin protective layer on the copper grid lines; and finally, performing a light injection step on the solar cell. However, in the light injection process, the high temperature causes the copper grid lines to oxidize, thereby reducing the electrical performance of the solar cell and affecting its reliability. Summary of the Invention

[0003] Therefore, it is necessary to provide a metal grid structure and a method for fabricating solar cells to address the problem that the copper grid lines are oxidized during the light injection process because the tin protective layer cannot completely isolate the high temperature of the light injection process, thereby reducing the electrical performance of the solar cells and affecting their reliability.

[0004] In a first aspect, a metal grid structure includes a contact layer and a displacement layer stacked together. The contact layer is disposed on a metal seed layer, and the displacement layer is used to at least partially form a metal protective layer. Along the thickness direction of the metal grid structure, the cross-sectional porosity of the contact layer is a1, and the cross-sectional porosity of the displacement layer is a2, satisfying that a1 < a2.

[0005] In one embodiment,

[0006] a1 is 3 per cm 2 ~4 pieces / cm 2 ;

[0007] And / or, a2 is 7 per cm 2 ~10 pieces / cm 2 ;

[0008] And / or, the thickness of the contact layer is 1μm~2μm;

[0009] And / or, the thickness of the replacement layer is 3μm~4μm.

[0010] In one embodiment, the metal grid structure further includes a buffer layer, which is disposed between the contact layer and the replacement layer along the thickness direction of the metal grid structure. The cross-sectional porosity of the buffer layer is a3, satisfying a1 > a3.

[0011] In one embodiment, a3 is 1 unit / cm. 2 ~2 pieces / cm 2 ;

[0012] And / or, the thickness of the buffer layer is 5μm~7μm.

[0013] Secondly, a method for preparing a solar cell includes the following steps:

[0014] Pre-processing: Providing solar cell precursors;

[0015] Electroplating: Electroplating the solar cell precursor to form a metal grid structure, the metal grid structure being as described in the first aspect.

[0016] In one embodiment, the first step is electroplating: a contact layer is prepared by electroplating on the solar cell precursor; the second step is electroplating: a replacement layer is prepared by electroplating on the contact layer.

[0017] In one embodiment,

[0018] The current density for the first electroplating step is 9 A / dm. 2 ~10A / dm 2 ;

[0019] And / or, the electroplating time of the first electroplating step is 50s~60s;

[0020] And / or, the current density of the second electroplating step is 13 A / dm². 2 ~14A / dm 2 ;

[0021] And / or, the electroplating time for the second step is 50s~60s;

[0022] And / or, the thickness of the metal protective layer on the replacement layer is 400nm~450nm.

[0023] In one embodiment, the electroplating step further includes: between the first electroplating step and the second electroplating step, electroplating a buffer layer on the contact layer.

[0024] In one embodiment,

[0025] The current density for electroplating the buffer layer is 5 A / dm³. 2 ~6A / dm2 ;

[0026] And / or, the electroplating time for preparing the buffer layer is 230s~240s;

[0027] And / or, the step of electroplating to prepare the buffer layer is a continuous electroplating process with the first electroplating step and the second electroplating step.

[0028] In one embodiment,

[0029] In the electroplating step, an electroplating solution comprising copper ions and sulfuric acid is used for electroplating, wherein the concentration of copper ions is 120 g / L to 150 g / L and the concentration of sulfuric acid is 40 g / L to 60 g / L.

[0030] In one embodiment,

[0031] Following the electroplating step, the following steps are also included:

[0032] Chemical plating: The metal grid structure is chemically plated to form a metal protective layer;

[0033] Post-processing: Light injection yields solar cells.

[0034] In one embodiment,

[0035] In the electroplating step, an electroplating solution containing tin ions and methanesulfonic acid is used for electroplating, wherein the concentration of tin ions is 10g / L~50g / L and the concentration of methanesulfonic acid is 100g / L~300g / L.

[0036] And / or, in the electroplating step, the electroplating temperature is 40℃~55℃;

[0037] And / or, in the electroplating step, the electroplating time is 1 min to 1.5 min.

[0038] In one embodiment,

[0039] The preprocessing step includes the following steps:

[0040] Provide silicon substrate;

[0041] Amorphous silicon layers are fabricated on the front and back sides of the silicon substrate, respectively;

[0042] A transparent conductive layer is formed on the side of the amorphous silicon layer that is opposite to the silicon substrate;

[0043] A metal seed layer is prepared on the side of the transparent conductive layer that is opposite to the silicon substrate;

[0044] A patterned photosensitive adhesive layer is prepared on the side of the metal seed layer facing away from the silicon substrate, forming the solar cell precursor.

[0045] In one embodiment, the electroplating step and the chemical plating step further include: performing a film removal and etch-back process to remove the patterned photosensitive adhesive layer and the metal seed layer not covered by the metal grid structure.

[0046] The aforementioned metal grid structure utilizes a contact layer with a small cross-sectional porosity. The high density of this contact layer ensures good contact with the metal seed layer, guaranteeing the bonding strength of the metal grid structure. By incorporating a replacement layer with a larger cross-sectional porosity, creating a loose, porous, and rough internal structure, more active reaction sites and electric field concentration sites are provided during the electroless plating process. This facilitates tin bonding and diffusion, increasing the bonding strength between the tin protective layer and the replacement layer, thereby increasing the thickness of the tin protective layer. This improves the oxidation resistance of the tin protective layer, reduces the oxidation of the copper grid lines due to high temperatures, and ensures the electrical performance of the metal grid lines. Attached Figure Description

[0047] Figure 1 This is a cross-sectional view of the heterojunction solar cell provided in Example 1.

[0048] Figure 2 for Figure 1 Enlarged view of point A in the middle.

[0049] Figure 3 for Figure 1 Enlarged view of point B in the middle.

[0050] Figure 4 This is a flowchart illustrating a method for fabricating a solar cell, as provided in an embodiment of this application.

[0051] Figure 5 This is a microscopic morphology diagram of a heterojunction solar cell provided in Embodiment 1 of this application.

[0052] Figure 6 The image shows the microstructure of a heterojunction solar cell provided for Comparative Example 1.

[0053] Explanation of reference numerals in the attached figures: 100, heterojunction solar cell; 1, N-type silicon wafer; 21, first intrinsic amorphous silicon layer; 22, second intrinsic amorphous silicon layer; 31, N-type doped amorphous silicon layer; 32, P-type doped amorphous silicon layer; 41, first transparent conductive layer; 42, second transparent conductive layer; 51, first copper seed layer; 52, second copper seed layer; 61, first copper grid line; 611, first contact layer; 612, first buffer layer; 613, first replacement layer; 62, second copper grid line; 621, second contact layer; 622, second buffer layer; 623, second replacement layer; 71, first tin protection layer; 72, second tin protection layer. Detailed Implementation

[0054] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application are described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a thorough understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0055] In heterojunction solar cells fabricated using copper interconnect solar cell technology, high-temperature oxidation of the copper grid lines occurs during the light injection process, leading to a decrease in the photoelectric performance of the solar cell. The applicant's research revealed that the primary cause of copper grid line oxidation is an excessively thin tin protective layer that cannot completely isolate the high temperatures generated during light injection.

[0056] Based on the above problems, in a first aspect, embodiments of this application provide a metal grid structure that can be disposed on a heterojunction solar cell. The metal grid structure includes a contact layer and a replacement layer stacked together. The contact layer is disposed on a metal seed layer, and the replacement layer is used to at least partially form a metal protective layer. Along the thickness direction of the metal grid structure, the cross-sectional porosity of the contact layer is a1, and the cross-sectional porosity of the replacement layer is a2, satisfying a1 < a2. The smaller cross-sectional porosity of the contact layer results in higher density, effectively improving the bonding force between the contact layer and the copper seed layer. The larger cross-sectional porosity of the replacement layer creates a loose, porous, and rough internal structure, providing more active reaction sites and electric field concentration sites during the electroplating step, facilitating tin bonding and diffusion, thereby increasing the thickness of the tin protective layer and increasing the bonding force between the tin protective layer and the replacement layer. This improves the oxidation resistance of the tin protective layer, reduces oxidation of the metal grid structure due to high temperatures, and ensures the electrical performance of the metal grid structure.

[0057] In some embodiments, the metal grid structure further includes a buffer layer. Along the thickness direction of the metal grid structure, the buffer layer is disposed between the contact layer and the replacement layer. The cross-sectional porosity of the buffer layer is a3, satisfying a1 > a3. The cross-sectional porosity of the buffer layer is less than that of the contact layer. Providing a buffer layer to facilitate the transition between the contact layer and the replacement layer increases the bonding force between them and reduces the likelihood of metal grid wire detachment or peeling.

[0058] Optionally, the metal grid structure can be copper grid lines or copper-silver grid lines, etc. The material for preparing the metal seed layer can be copper, nickel, copper-nickel alloy, titanium, or tungsten, etc. The metal protective layer can be a tin protective layer or a zinc protective layer. This application uses copper grid lines, a copper seed layer, and a tin protective layer as examples to specifically illustrate the solution of this application.

[0059] Secondly, embodiments of this application provide a method for preparing a solar cell, including a pretreatment step, an electroplating step, a chemical plating step, and a posttreatment step.

[0060] In some embodiments, the pretreatment steps include providing a silicon substrate; preparing an amorphous silicon layer on a front side and a back side of the silicon substrate; preparing a transparent conductive layer on the side of the amorphous silicon layer facing away from the silicon substrate; preparing a metal seed layer on the side of the transparent conductive layer facing away from the silicon substrate; and preparing a photosensitive adhesive layer on the side of the metal seed layer facing away from the silicon substrate, the photosensitive adhesive layer having a groove, at least a portion of the metal seed layer being exposed in the groove, to form a solar cell precursor.

[0061] In the step of providing the silicon substrate, the silicon substrate may optionally be an N-type silicon wafer or a P-type silicon wafer that has undergone texturing. N-type silicon wafers are preferred because they are primarily phosphorus-doped and do not contain boron-oxygen complexes or boron-iron complexes as found in P-type monocrystalline silicon, thus reducing light-induced degradation.

[0062] Texturing N-type silicon wafers creates pyramid structures on both the front and back sides. This process removes surface contaminants and impurities, eliminates mechanical damage layers, increases light incidence while reducing light reflection, and improves the power generation efficiency of solar cells. The height of the pyramid structure ranges from 2μm to 8μm. It can be any value within this range, such as 2μm, 3μm, 5μm, 6μm, or 8μm.

[0063] In the step of fabricating amorphous silicon layers on the front and back sides of a silicon substrate, specifically, the amorphous silicon layers include an intrinsic amorphous silicon layer and a doped amorphous silicon layer. The intrinsic amorphous silicon layer is used to hydrogenate dangling bonds, reduce surface defects, improve interface passivation, and thus increase the open-circuit voltage of the solar cell, thereby improving the photoelectric conversion efficiency. The doped amorphous silicon layer is used to form a PN junction.

[0064] After texturing, a first intrinsic amorphous silicon layer and an N-type doped amorphous silicon layer are formed on the front side of the N-type silicon wafer, with the first intrinsic amorphous silicon layer located between the N-type silicon wafer and the N-type doped amorphous silicon layer. A second intrinsic amorphous silicon layer and a P-type doped amorphous silicon layer are formed on the back side of the N-type silicon wafer, with the second intrinsic amorphous silicon layer located between the N-type silicon wafer and the P-type doped amorphous silicon layer.

[0065] Optionally, the intrinsic amorphous silicon layer and doped amorphous silicon layer on the front and back sides of the N-type silicon wafer can be prepared by plasma-enhanced chemical vapor deposition or reactive plasma deposition.

[0066] The thickness of the first intrinsic amorphous silicon layer is 3nm to 6nm, and its thickness can be any value within the above range, such as 3nm, 4nm, 5nm, 6nm, etc. The thickness of the second intrinsic amorphous silicon layer is 3nm to 9nm, and its thickness can be any value within the above range, such as 3nm, 5nm, 7nm, 9nm, etc.

[0067] The thickness of the N-type doped amorphous silicon layer is 5 nm to 10 nm, and its thickness can be any value within this range, such as 5 nm, 6 nm, 7 nm, 8 nm, 9 nm, 10 nm, etc. The N-type doped amorphous silicon layer can be phosphorus-doped or other N-type doped materials. The thickness of the P-type doped amorphous silicon layer is 5 nm to 15 nm, and its thickness can be any value within this range, such as 5 nm, 8 nm, 10 nm, 13 nm, 15 nm, etc. The P-type doped amorphous silicon layer can be boron-doped or other P-type doped materials.

[0068] In the step of fabricating a transparent conductive layer on the side of the amorphous silicon layer facing away from the silicon substrate, a first transparent conductive layer is fabricated on the side of the N-type doped amorphous silicon layer facing away from the N-type silicon wafer, and a second transparent conductive layer is fabricated on the side of the P-type doped amorphous silicon layer facing away from the N-type silicon wafer. Because the intrinsic amorphous silicon layer has a disordered crystal structure, low carrier mobility, and poor lateral conductivity, it is not conducive to the collection of photogenerated carriers. Therefore, a transparent conductive layer needs to be deposited on the doped amorphous silicon layer to collect carriers vertically and transport them to the electrodes. Additionally, the transparent conductive layer can also reduce light reflection.

[0069] Optionally, the first and second transparent conductive layers may comprise one or more combinations of indium tin oxide, tungsten-doped indium oxide, cesium-doped indium oxide, tin oxide, cadmium-doped zinc oxide, cadmium-aluminum-doped zinc oxide, and zinc oxide. Optionally, the first and second transparent conductive layers may be prepared by magnetron sputtering, reactive plasma deposition, or physical vapor deposition.

[0070] The thickness of the first transparent conductive layer can be 90nm to 110nm, and its thickness can be any value within the above range, such as 90nm, 95nm, 100nm, 105nm, 110nm, etc. The thickness of the second transparent conductive layer can be 90nm to 110nm, and its thickness can be any value within the above range, such as 90nm, 95nm, 100nm, 105nm, 110nm, etc.

[0071] In the step of fabricating a metal seed layer on the side of the transparent conductive layer facing away from the silicon substrate, a first copper seed layer is fabricated on the side of the first transparent conductive layer facing away from the N-type silicon wafer, and a second copper seed layer is fabricated on the side of the second transparent conductive layer facing away from the N-type silicon wafer. Because the adhesion of the copper grid structure to the transparent conductive layer is poor, making the electrodes prone to detachment, copper seed layers are fabricated between the copper grid lines and the transparent conductive layer on both the front and back sides of the N-type silicon wafer to improve electrode contact.

[0072] Optionally, the first copper seed layer and the second copper seed layer can be prepared by methods such as physical vapor deposition, chemical vapor deposition, spraying, or printing. The thickness of the first copper seed layer and the second copper seed layer is 100 nm to 200 nm, and the thickness can be any value within the above range, such as 100 nm, 120 nm, 140 nm, 160 nm, 180 nm, 200 nm, etc.

[0073] In the step of forming a solar cell precursor by preparing a photosensitive adhesive layer on the side of a metal seed layer facing away from the silicon substrate, the photosensitive adhesive layer having grooves, with at least a portion of the metal seed layer exposed in the grooves, a first photosensitive adhesive layer is prepared on the side of a first copper seed layer facing away from the N-type silicon wafer, and a second photosensitive adhesive layer is prepared on the side of a second copper seed layer facing away from the N-type silicon wafer. The materials used for the first and second photosensitive adhesive layers can be dry film materials, photoresists, or wet film inks.

[0074] The thickness of the first photosensitive adhesive layer and the second photosensitive adhesive layer is 10μm to 14μm. For example, the thickness of the first photosensitive adhesive layer and the second photosensitive adhesive layer can be any value within the above range, such as 10μm, 11μm, 12μm, 13μm, 14μm, etc.

[0075] Laser printing is performed on the first and second photosensitive emulsion layers to form grid lines. The grid lines are then developed to remove the photosensitive emulsion at the grid line locations, creating grooves to form the solar cell precursor. The grid line locations refer to the positions where copper grid lines will subsequently be formed. Printing the grid lines involves using a laser to print a specific pattern onto the first and second photosensitive emulsion layers. The laser energy is 150mJ to 190mJ, for example, any value within this range, such as 150mJ, 160mJ, 170mJ, 180mJ, or 190mJ. The development process uses an alkaline solution (e.g., a sodium carbonate solution with a concentration of 9g / L to 12g / L, for example, any value within this range, such as 9g / L, 10g / L, 11g / L, or 12g / L) to dissolve and remove the photosensitive emulsion in the grid line area. After development, the remaining first and second photosensitive layers can expose portions of the first and second copper seed layers, respectively. Subsequently, through an electroplating step, first copper grid lines and second copper grid lines can be formed on the exposed first and second copper seed layers, respectively.

[0076] Furthermore, before electroplating to form the copper grid lines, an edge-wrapping step is usually performed to wrap the four sides and corners of the solar cell precursor with protective adhesive. The thickness of the protective adhesive is 8μm to 14μm. The thickness of the protective adhesive can be any value within the above range, such as 8μm, 9μm, 10μm, 11μm, 12μm, 13μm, 14μm, etc.

[0077] In some embodiments, during the electroplating step, the solar cell precursor is electroplated to form a metal grid structure, which is a copper grid structure. The copper grid line located on the first copper seed layer is the first copper grid line, and the copper grid line located on the second copper seed layer is the second copper grid line. The first copper grid line includes a first contact layer, a first buffer layer, and a first replacement layer, and the second copper grid line includes a second contact layer, a second buffer layer, and a second replacement layer. Since the preparation methods of the first copper grid line layer and the second copper grid line layer are the same, they will be described together.

[0078] In some embodiments, during the electroplating step, an electroplating solution comprising copper ions and sulfuric acid is used, wherein the copper ion concentration is 120 g / L to 150 g / L, and the sulfuric acid concentration is 40 g / L to 60 g / L. Using an electroplating solution within the above concentration range allows for the formation of specific copper grid structures at different current densities, facilitating control of the structural morphology of the contact layer, buffer layer, and displacement layer, achieving different cross-sectional porosity and density. For example, the copper ion concentration can be any value within the above range, such as 120 g / L, 125 g / L, 130 g / L, 135 g / L, 140 g / L, 145 g / L, 150 g / L, etc. The sulfuric acid concentration can be any value within the above range, such as 40 g / L, 45 g / L, 50 g / L, 55 g / L, 60 g / L, etc.

[0079] In some embodiments, the electroplating steps include a first electroplating step and a second electroplating step. The first electroplating step involves electroplating a contact layer on the solar cell precursor; the second electroplating step involves electroplating a replacement layer on the contact layer. The contact layer is used to form a good contact with the copper seed layer; the replacement layer is used to form a good contact with the subsequently prepared tin protective layer and increases the thickness of the tin protective layer to improve its high-temperature insulation effect and reduce the oxidation of the copper grid lines due to high temperatures during subsequent light injection processing.

[0080] In some embodiments, the current density of the first electroplating step is 9 A / dm². 2 ~10A / dm 2Because the copper seed layer prepared by physical vapor deposition is relatively thin, typically between 100nm and 200nm, its thickness continues to decrease during subsequent processes such as photosensitive layer preparation, laser patterning, and development and grooving. This further increases the difficulty of contacting the copper grid lines with the seed layer. Higher current densities within this range promote the formation of more copper crystals within the same plating time, allowing more copper to contact the seed layer and resulting in a denser contact layer. This effectively improves the adhesion between the contact layer and the seed layer. Furthermore, using a high current density within this range for the first plating step can shorten the plating process time for the copper grid lines, thereby reducing process costs. Current densities below or above this range in the first plating step will reduce or even prevent the adhesion between the contact layer and the seed layer.

[0081] For example, the current density of the first electroplating step can be any value within the above range, such as 9 A / dm². 2 9.1A / dm 2 9.2A / dm 2 9.3A / dm 2 9.4A / dm 2 9.5A / dm 2 9.6A / dm 2 9.7A / dm 2 9.8A / dm 2 9.9A / dm 2 10A / dm 2 wait.

[0082] In some embodiments, the electroplating time for the first electroplating step is 50s to 60s. Electroplating times within this range ensure the plating thickness of the contact layer, thereby guaranteeing the adhesion between the contact layer and the copper seed layer, and saving process time for electroplating the copper gate lines, thus reducing process costs. For example, the electroplating time for the first electroplating step can be any value within the above range, such as 50s, 51s, 52s, 53s, 54s, 55s, 56s, 57s, 58s, 59s, 60s, etc.

[0083] In some embodiments, the thickness of the contact layer is 1μm to 2μm, which ensures good contact with the copper seed layer. Exemplarily, the thickness of the contact layer can be any value within the above range, such as 1μm, 1.1μm, 1.2μm, 1.3μm, 1.4μm, 1.5μm, 1.6μm, 1.7μm, 1.8μm, 1.9μm, 2μm, etc.

[0084] In some embodiments, the cross-sectional porosity of the contact layer along the thickness direction of the copper grid line is a1, where a1 is 3 porosities / cm. 2~4 pieces / cm 2 For example, the cross-sectional porosity of the contact layer can be any value within the above range, such as 3 porosities / cm. 2 3.1 pieces / cm 2 3.2 pieces / cm 2 3.3 pieces / cm 2 3.4 pieces / cm 2 3.5 pieces / cm 2 3.6 pieces / cm 2 3.7 pieces / cm 2 3.8 pieces / cm 2 3.9 pieces / cm 2 4 per cm 2 wait.

[0085] In some embodiments, the current density of the second electroplating step is 13 A / dm². 2 ~14A / dm 2 The second electroplating step uses a higher current density than the first. Unlike the first step, this higher current density promotes copper crystal growth, increasing the copper particle size and creating more unevenness and gaps between the crystal particles. This results in a more porous, loose, and rough internal structure in the replacement layer. Consequently, during the electroplating process, the replacement layer provides more active reaction sites and electric field concentration sites, facilitating tin bonding and diffusion. This increases the adhesion between the tin protective layer and the replacement layer, thus increasing the thickness of the tin protective layer. Excessive current density in the second electroplating step can cause the replacement layer to burn, while insufficient current density cannot guarantee the formation of enough pores to increase the thickness of the tin protective layer.

[0086] For example, the current density in the second electroplating step can be any value within the above range, such as 13 A / dm². 2 13.1A / dm 2 13.2A / dm 2 13.3A / dm 2 13.4A / dm 2 13.5A / dm 2 13.6A / dm 2 13.7A / dm 2 13.8A / dm 2 13.9A / dm 2 14A / dm 2 wait.

[0087] In some embodiments, the electroplating time for the second step is 50s to 60s. A shorter electroplating time within this range ensures that the replacement layer structure becomes loose, porous, and rough, while avoiding over-plating and burning. It also further reduces the process time for electroplating the copper grid lines, thus lowering process costs. For example, the electroplating time for the second step can be any value within the above range, such as 50s, 51s, 52s, 53s, 54s, 55s, 56s, 57s, 58s, 59s, 60s, etc.

[0088] In some embodiments, the thickness of the replacement layer is 3μm to 4μm. Since a stripping and etching process is required after the electroplating step and before the chemical plating step, the replacement layer will undergo some etching during this process, resulting in a loss of thickness. Setting the thickness of the replacement layer within the aforementioned range ensures that a thickness margin is maintained after the stripping and etching process, guaranteeing the bonding of the tin protective layer and the thickness of the tin protective layer. Exemplarily, the thickness of the replacement layer can be any value within the aforementioned range, such as 3μm, 3.1μm, 3.2μm, 3.3μm, 3.4μm, 3.5μm, 3.6μm, 3.7μm, 3.8μm, 3.9μm, 4μm, etc.

[0089] In some embodiments, the cross-sectional porosity of the replacement layer along the thickness direction of the copper grid lines is a2, where a2 is 7 porosities / cm. 2 ~10 pieces / cm 2 Below the aforementioned range, the thickness of the tin protective layer cannot be increased; above the aforementioned range, it is detrimental to the contact between the replacement layer and other layer structures. For example, the cross-sectional porosity of the replacement layer can be any value within the aforementioned range, such as 7 porosity / cm². 2 7.4 per cm 2 7.8 pieces / cm 2 8.2 pieces / cm 2 8.6 pieces / cm 2 9 per cm 2 9.4 pieces / cm 2 9.8 pieces / cm 2 10 pieces / cm 2 wait.

[0090] In some embodiments, in order to ensure the contact between the contact layer and the replacement layer and the thickness of the copper grid line, the electroplating step further includes preparing a buffer layer by electroplating on the contact layer between the first electroplating step and the second electroplating step.

[0091] In some embodiments, the current density for electroplating the buffer layer is 5 A / dm². 2 ~6A / dm 2After the contact layer is formed, a lower current density is used to refine the electroplating copper grid line process, reduce the porosity inside the buffer layer, and increase the density of the buffer layer, thereby ensuring good contact between the contact layer and the replacement layer and enabling a good transition between them.

[0092] For example, the current density for electroplating the buffer layer can be any value within the above range, such as 5 A / dm². 2 5.1A / dm 2 5.2A / dm 2 5.3A / dm 2 5.4A / dm 2 5.5A / dm 2 5.6A / dm 2 5.7A / dm 2 5.8A / dm 2 5.9A / dm 2 6A / dm 2 wait.

[0093] In some embodiments, the electroplating time for preparing the buffer layer is 230s to 240s; this electroplating time ensures sufficient time for copper crystals to form, thereby ensuring the density of the buffer layer. For example, the electroplating time for preparing the buffer layer can be any value within the above range, such as 230s, 231s, 232s, 233s, 234s, 235s, 236s, 237s, 238s, 239s, 240s, etc.

[0094] In some embodiments, the thickness of the buffer layer is 5 μm to 7 μm. The thickness of the buffer layer within this range ensures contact between the contact layer and the replacement layer, as well as the thickness of the copper gate lines. For example, the thickness of the buffer layer can be any value within the above range, such as 5 μm, 5.2 μm, 5.4 μm, 5.6 μm, 5.8 μm, 6 μm, 6.2 μm, 6.4 μm, 6.6 μm, 6.8 μm, 7 μm, etc.

[0095] In some embodiments, the cross-sectional porosity of the buffer layer along the thickness direction of the copper grid line is a3, satisfying a3 = 1 porosity / cm. 2 ~2 pieces / cm 2 The lower porosity results in a higher internal density of the buffer layer, which is beneficial for improving the bonding strength between the buffer layer and the contact and replacement layers. For example, the cross-sectional porosity of the contact layer can be any value within the aforementioned range, such as 1 porosity / cm². 2 1.1 pieces / cm 2 1.2 pieces / cm 2 1.3 pieces / cm 2 1.4 pieces / cm2 1.5 pieces / cm 2 1.6 pieces / cm 2 1.7 pieces / cm 2 1.8 pieces / cm 2 1.9 pieces / cm 2 2 per cm 2 wait.

[0096] In some embodiments, the step of electroplating to prepare the buffer layer is a continuous electroplating process with the first and second electroplating steps. In other words, the buffer layer is prepared immediately after the first electroplating step, and the second electroplating step is performed immediately after the buffer layer is prepared.

[0097] In some embodiments, after the electroplating step and before the electroless plating step, a stripping and etching process is performed to remove the remaining photosensitive adhesive layer and the metal seed layer not covered by the metal gate structure. In other words, the remaining first and second photosensitive adhesive layers, the first copper seed layer not covered by the first copper gate, and the second copper seed layer not covered by the second copper gate are removed. It should be noted that in related technologies, the stripping and etching process is performed after the electroless plating step. This arrangement can affect the tin protective layer, causing it to be etched to a certain extent, which is detrimental to increasing the thickness of the tin protective layer.

[0098] Removal refers to removing the remaining photosensitive emulsion layer and the protective adhesive from the edge-wrapping step using an alkaline solution (e.g., a sodium hydroxide solution with a concentration of 10 g / L to 20 g / L). Re-etching refers to removing the copper seed layer not covered by the copper grid lines by immersion in a re-etching solution (e.g., a mixture of sulfuric acid with a concentration of 9 g / L to 11 g / L and hydrogen peroxide with a concentration of 14 g / L to 15 g / L). For example, the concentration of the sodium hydroxide solution can be any value within the above range, such as 10 g / L, 12 g / L, 14 g / L, 16 g / L, 18 g / L, 20 g / L, etc. The concentration of sulfuric acid can be any value within the above range, such as 9 g / L, 10 g / L, 11 g / L, etc. The concentration of hydrogen peroxide can be any value within the above range, such as 14 g / L, 14.5 g / L, 15 g / L, etc.

[0099] In some embodiments, a chemical plating step is performed to chemically plate the metal grid structure to form a protective metal layer. The chemical tin plating process utilizes a coordinating agent to compensate for the potential difference between copper and tin, allowing the tin in the plating solution to displace the copper from the copper grid, rather than forming an additional tin layer on the copper grid. Due to this reaction mechanism, as tin gradually replaces copper, tin crystals form a dense crystalline structure on the copper grid, making the formed tin layer act as a barrier, preventing tin ions in the plating solution from continuing to contact the copper grid, thus making it difficult to increase the tin layer thickness. Therefore, by setting a displacement layer with a larger cross-sectional porosity, the interior of the copper grid can be made into a loose, porous, and rough structure, thereby increasing the thickness of the tin protective layer.

[0100] It should be noted that during the actual electroplating process, the contact layer, buffer layer, and displacement layer all come into contact with the tin plating solution. Therefore, a tin protective layer will be formed in part of the contact layer, buffer layer, and displacement layer, so that the top and peripheral surfaces of the copper grid line can be protected by the tin protective layer. The tin protective layer on the top surface of the copper grid line is relatively thick and plays a key role in high-temperature oxidation resistance.

[0101] In some embodiments, during the electroless plating step, a tin plating solution comprising tin ions and methanesulfonic acid is used, wherein the tin ion concentration is 10 g / L to 50 g / L and the methanesulfonic acid concentration is 100 g / L to 300 g / L. Using a tin plating solution within the above concentration range can increase the thickness of the tin protective layer and improve the adhesion between the tin protective layer and the replacement layer. For example, the tin ion concentration can be any value within the above range, such as 10 g / L, 20 g / L, 30 g / L, 40 g / L, 50 g / L, etc. The methanesulfonic acid concentration can be any value within the above range, such as 100 g / L, 150 g / L, 200 g / L, 250 g / L, 300 g / L, etc.

[0102] In some embodiments, the electroplating temperature is 40°C to 55°C during the electroplating step. Using an electroplating solution within the above temperature range can increase the thickness of the tin protective layer and improve the adhesion between the tin protective layer and the replacement layer. For example, the electroplating temperature can be any value within the above range, such as 40°C, 42°C, 45°C, 47°C, 50°C, 52°C, 55°C, etc.

[0103] In some embodiments, the plating time in the electroless plating step is 1 min to 1.5 min; using electroless tin solution within the above time range for electroless plating can increase the thickness of the tin protective layer and improve the adhesion between the tin protective layer and the replacement layer. For example, the plating time can be any value within the above range, such as 1 min, 1.2 min, 1.3 min, 1.4 min, 1.5 min, etc.

[0104] In some embodiments, the thickness of the metal protective layer formed by the replacement layer is 400nm to 450nm. In other words, the thickness of the tin protective layer on top of the copper gate line is 400nm to 450nm. The thickness of the metal protective layer after the electroless plating step is within the above range, which can completely isolate the high temperature in the subsequent photoinjection step, preventing the internal copper gate line from being oxidized and ensuring the electrical performance and reliability of the copper gate line. For example, the thickness of the metal protective layer can be any value within the above range, such as 400nm, 410nm, 420nm, 430nm, 440nm, 450nm, etc.

[0105] It is important to emphasize that the tin protective layer prepared without step-by-step electroplating is only about 120nm thick, which will cause 100% failure of the solar cell during the light injection step. By using step-by-step electroplating and controlling the formation of a copper grid structure with specific cross-sectional porosity in each electroplating step, the thickness of the tin protective layer can be increased by more than 2 times, and the number of solar cells with copper grid oxidation due to light injection can be reduced to 0%.

[0106] In some embodiments, a post-processing light injection is performed after the electroplating step to obtain the solar cell. Light injection can generate a high concentration of charge carriers inside the cell and reduce recombination centers, thereby improving the photoelectric performance of the solar cell.

[0107] In some embodiments, the light injection temperature is 200°C to 220°C. The light injection time is 60s to 120s. Exemplarily, the light injection temperature can be any value within the above range, such as 200°C, 205°C, 210°C, 215°C, 220°C, etc. The light injection time can be any value within the above range, such as 60s, 70s, 80s, 90s, 100s, 110s, 120s, etc.

[0108] The solution of this application will be described in detail below with specific embodiments and comparative examples:

[0109] Example 1

[0110] Example 1 provides a method for fabricating a heterojunction solar cell 100, comprising the following steps:

[0111] A silicon substrate is provided, which is a texturized N-type silicon wafer 1, and the pyramid height of the N-type silicon wafer 1 is 2μm.

[0112] Amorphous silicon layers were fabricated on the front and back sides of a silicon substrate using plasma-enhanced chemical vapor deposition. The amorphous silicon layers include a first intrinsic amorphous silicon layer 21 and an N-type doped amorphous silicon layer 31 stacked on the front side, and a second intrinsic amorphous silicon layer 22 and a P-type doped amorphous silicon layer 32 stacked on the back side. The thickness of the first intrinsic amorphous silicon layer 21 is 4 nm; the thickness of the second intrinsic amorphous silicon layer 22 is 4 nm; the thickness of the N-type doped amorphous silicon layer 31 is 10 nm; and the thickness of the P-type doped amorphous silicon layer 32 is 10 nm.

[0113] A first transparent conductive layer 41 is prepared on an N-type doped amorphous silicon layer 31 by physical vapor deposition, and a second transparent conductive layer 42 is prepared on a P-type doped amorphous silicon layer 32. Both the first transparent conductive layer 41 and the second transparent conductive layer 42 are indium tin oxide layers with a thickness of 100 nm.

[0114] A first copper seed layer 51 is prepared on a first transparent conductive layer 41 by physical vapor deposition, and a second copper seed layer 52 is prepared on a second transparent conductive layer 42. The thickness of the first copper seed layer 51 and the second copper seed layer 52 is 150 nm.

[0115] A first photoresist layer and a second photoresist layer, each with a thickness of 12 μm, are prepared on the first copper seed layer 51 and the second copper seed layer 52, respectively. A 170 mJ laser is used to print grid lines, and a sodium carbonate solution with a concentration of 10 g / L is used for development to create grooves in the photoresist layer, exposing at least a portion of the metal seed layer to the grooves, in order to form a solar cell precursor.

[0116] The four sides and corners of the solar cell precursor are wrapped with protective adhesive, and the thickness of the protective adhesive is 12μm.

[0117] Fabrication of the first copper gate line 61 and the second copper gate line 62: A first contact layer 611 and a second contact layer 621 are respectively fabricated on the first copper seed layer 51 and the second copper seed layer 52 located within the slot, with a current density of 9 A / dm. 2 The electroplating time is 50 seconds. Next, electroplating is performed on the first contact layer 611 and the second contact layer 621 to prepare the first buffer layer 612 and the second buffer layer 622, respectively, with a current density of 5 A / dm². 2 The electroplating time was 230 seconds. Next, the first replacement layer 613 and the second replacement layer 623 were electroplated onto the first buffer layer 612 and the second buffer layer 622, with a current density of 13 A / dm³. 2 The electroplating time was 50 seconds. The copper ion concentration in the electroplating solution was 120 g / L, and the sulfuric acid concentration was 40 g / L. The cross-sectional porosity of the first contact layer 611 was 3 pores / cm. 2 The cross-sectional porosity of the first buffer layer 612 is 1 porosity / cm. 2 The cross-sectional porosity of the first replacement layer 613 is 7 cells / cm.2 The thickness of the first contact layer 611 is 1 μm; the thickness of the first buffer layer 612 is 5 μm; and the thickness of the first replacement layer 613 is 3 μm.

[0118] The film removal and back etching process is performed. A sodium hydroxide solution with a concentration of 10 g / L is used to remove the remaining first photosensitive layer, the remaining second photosensitive layer, and the protective adhesive from the edge wrapping step. A mixture of sulfuric acid with a concentration of 10 g / L and hydrogen peroxide with a concentration of 15 g / L is used to soak and remove the first copper seed layer 51 and the second copper seed layer 52 that are not covered by the first copper grid line 61 and the second copper grid line 62.

[0119] The first copper grid line 61 and the second copper grid line 62 are electroplated to form the first tin protective layer 71 and the second tin protective layer 72, respectively. The tin ion concentration in the electroplating solution is 10 g / L, the methanesulfonic acid concentration is 100 g / L, the electroplating temperature is 40℃, and the electroplating time is 1 min.

[0120] A solar cell is obtained by light injection at a temperature of 200°C and a time of 60 seconds.

[0121] Example 1 provides a heterojunction solar cell 100, which is prepared by the above-described preparation method.

[0122] Example 2

[0123] The difference between the preparation method in Example 2 and that in Example 1 is that the current density in the first electroplating step is 10 A / dm². 2 The electroplating time for the first step is 60 seconds. The porosity of the first contact layer cross-section is 4 cells / cm. 2 The cross-sectional porosity of the first buffer layer is 2 cells / cm. 2 The cross-sectional porosity of the first replacement layer is 10 cells / cm. 2 The thickness of the first contact layer is 2 μm; the thickness of the first buffer layer is 7 μm; and the thickness of the first replacement layer is 4 μm. Example 2 provides a heterojunction solar cell prepared by the above method.

[0124] Example 3

[0125] The difference between the preparation method in Example 3 and Example 1 is that the current density for the second electroplating step is 14 A / dm³. 2 The second electroplating step has a current-time of 60 seconds. The cross-sectional porosity of the first contact layer is 3.5 cells / cm. 2 The cross-sectional porosity of the first buffer layer is 1.5 porosities / cm. 2 The cross-sectional porosity of the first replacement layer is 8 porosities / cm. 2The thickness of the first contact layer is 1.5 μm; the thickness of the first buffer layer is 6 μm; and the thickness of the first replacement layer is 3.5 μm. Example 3 provides a heterojunction solar cell prepared by the above method.

[0126] Example 4

[0127] The difference between the preparation method in Example 4 and Example 1 is that the current density for electroplating the buffer layer is 6 A / dm³. 2 The electroplating time for the buffer layer was 240 seconds. The cross-sectional porosity of the first contact layer was 3.2 cells / cm². 2 The cross-sectional porosity of the first buffer layer is 1.8 porosities / cm. 2 The cross-sectional porosity of the first replacement layer is 7.5 porosities / cm². 2 The thickness of the first contact layer is 1.8 μm; the thickness of the first buffer layer is 5.5 μm; and the thickness of the first replacement layer is 3.2 μm. Example 4 provides a heterojunction solar cell prepared by the above method.

[0128] Example 5

[0129] The difference between the preparation method of Example 5 and Example 1 is that the buffer layer is not prepared by electroplating.

[0130] Comparative Example 1

[0131] The difference between the preparation method of Comparative Example 1 and Example 1 is that Comparative Example 1 uses a one-step electroplating process to prepare the copper grid wires, with a current density of 5 A / dm². 2 No contact layer or replacement layer was formed. Comparative Example 1 provides a heterojunction solar cell prepared by the above-described method.

[0132] Comparative Example 2

[0133] Comparative Example 2 provides a heterojunction solar cell. The difference between the heterojunction solar cell of Comparative Example 2 and the heterojunction solar cell of Example 1 is that the cross-sectional porosity of the first replacement layer of Comparative Example 2 is smaller than that of the cross-sectional porosity of the first contact layer.

[0134] test

[0135] Each copper grid line of the heterojunction solar cells provided in Examples 1 to 4, as well as Comparative Examples 1 and 2, was sliced ​​multiple times. The microstructure of each slice was observed, and the thickness of the first tin protective layer on the top surface of the copper grid line layer on the front side of the N-type silicon wafer was measured. A microscopic schematic diagram of a certain slice obtained in Example 1 is shown below. Figure 4 As shown; a microscopic schematic diagram of a certain cross-section obtained in Comparative Example 1 is shown below. Figure 5 As shown.

[0136] Table 1. Thickness of the first tin protective layer in each embodiment and comparative example.

[0137]

[0138] Results Analysis

[0139] As can be seen from Table 1, Examples 1 to 4 use a step-by-step electroplating process to form copper grid lines, resulting in contact layers, buffer layers, and displacement layers with varying cross-sectional porosity. Compared to Comparative Example 1, which uses a direct one-step electroplating process to form copper grid lines, this significantly increases the thickness of the tin protective layer. Figure 4 It can also be seen that the tin protective layer thickness in Example 1 can reach 424.3 nm, while Figure 5 The thickness of the tin protective layer in Comparative Example 1 is only 127.3 nm.

[0140] Compared to Example 5, Example 1 adds an electroplated buffer layer, which can increase the thickness of the tin protective layer and further improve the oxidation resistance of the heterojunction cell.

[0141] Compared to Comparative Example 2, the cross-sectional porosity of the replacement layer in Example 1 is greater than that of the contact layer, while the cross-sectional porosity of the replacement layer in Comparative Example 2 is less than that of the contact layer. As a result, the copper grid lines in Comparative Example 2 cannot bond with a sufficient thickness of tin ions during electroplating, thus resulting in a thinner tin layer, which is not conducive to high-temperature oxidation resistance.

[0142] In the description of this application, it should be understood that if terms such as "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" appear, these terms indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0143] Furthermore, where the terms "first" and "second" appear, these terms are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined with "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, where the term "multiple" appears, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0144] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0145] In this application, unless otherwise expressly specified and limited, the use of descriptions such as "above" or "below" the second feature indicates that the first and second features are in direct contact or indirect contact via an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. Similarly, "below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0146] It should be noted that if an element is referred to as being "fixed to" or "set on" another element, it can be directly on the other element or there may be an intervening element. If an element is considered to be "connected to" another element, it can be directly connected to the other element or there may be an intervening element. If so, the terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used in this application are for illustrative purposes only and do not represent the only possible implementation.

[0147] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0148] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A metal grid line structure, characterized by, The metal gate line structure comprises a contact layer and a replacement layer arranged in a stack, the contact layer is arranged on a metal seed layer, and the replacement layer is used to at least partially form a metal protective layer; along the thickness direction of the metal gate line structure, the cross-sectional porosity of the contact layer is a1, and the cross-sectional porosity of the replacement layer is a2, and a1 < a2 is satisfied.

2. The metal gate line structure according to claim 1, wherein the thickness of the contact layer is 1 μm to 2 μm; and / or the thickness of the replacement layer is 3 μm to 4 μm. a1 is 3 / cm 2 a2 is 4 / cm 2 ; and / or a2 is 7 / cm 2 10 / cm 2 ; The metal gate line structure further comprises a buffer layer arranged between the contact layer and the replacement layer along the thickness direction of the metal gate line structure, and the cross-sectional porosity of the buffer layer is a3, and a1 > a3 is satisfied.

4. The metal gate line structure according to claim 3, wherein the thickness of the buffer layer is 5 μm to 7 μm.

3. The metal gate line structure of claim 1, wherein, The method comprises the following steps: Pre-treatment: providing a solar cell precursor; a3 is 1 per cm 2 a2 is 2 per cm 2 ; Electroplating: electroplating the solar cell precursor to form a metal gate line structure, wherein the metal gate line structure is the metal gate line structure according to any one of claims 1 to 4.

5. A method for producing a solar cell, characterized by The electroplating step comprises: First step of electroplating: electroplating to prepare a contact layer on the solar cell precursor; Second step of electroplating: electroplating to prepare a replacement layer on the contact layer.

6. The production method according to claim 5, wherein 7. The preparation method according to claim 6, wherein the electroplating time of the first step of electroplating is 50 s to 60 s; and / or the electroplating time of the second step of electroplating is 50 s to 60 s; and / or the thickness of the metal protective layer on the replacement layer is 400 nm to 450 nm. The electroplating step further comprises: between the first step of electroplating and the second step of electroplating, electroplating to prepare a buffer layer on the contact layer.

9. The preparation method according to claim 8, wherein the electroplating time for preparing the buffer layer is 230 s to 240 s; and / or the step of electroplating to prepare the buffer layer is continuous electroplating with the first step of electroplating and the second step of electroplating. In the electroplating step, a plating solution comprising copper ions and sulfuric acid is used for electroplating, wherein the concentration of copper ions is 120 g / L to 150 g / L, and the concentration of sulfuric acid is 40 g / L to 60 g / L. The current density for the first step of electroplating is 9 A / dm 2 10 A / dm 2 ; After the electroplating step, the following steps are further included: and / or the second step plating has a current density of 13 A / dm 2 14 A / dm 2 ; Plating: plating the metal gate line structure to form a metal protective layer; Post-treatment: photo-injection to obtain a solar cell.

8. The preparation method according to claim 6, characterized in that, In the plating step, a tin plating solution comprising tin ions and methyl sulfonic acid is used for plating, wherein the concentration of tin ions is 10 g / L to 50 g / L, and the concentration of methyl sulfonic acid is 100 g / L to 300 g / L; And / or, in the plating step, the plating temperature is 40 ℃ to 55 ℃; The current density for electroplating the buffer layer is 5 A / dm 2 6 A / dm 2 ; And / or, in the plating step, the plating time is 1 min to 1.5 min. The pre-treatment step comprises the following steps:

10. The method of manufacture according to any one of claims 6 to 9, wherein, Providing a silicon substrate; 11. The method of making according to any one of claims 6 to 9, wherein, Preparing an amorphous silicon layer on the front side and the back side of the silicon substrate, respectively; Preparing a transparent conductive layer on the side of the amorphous silicon layer away from the silicon substrate; ​ 12. The method of claim 11, wherein, ​ ​ ​ 13. The method of making according to any one of claims 6 to 9, wherein, ​ ​ ​ ​ A metal seed layer is prepared on the side of the transparent conductive layer away from the silicon substrate; A patterned photosensitive glue layer is prepared on the side of the metal seed layer away from the silicon substrate, forming the solar cell precursor.

14. The method of claim 13, wherein, The electroplating step and the electroless plating step further comprise: performing a film-removing and re-etching treatment to remove the patterned photosensitive glue layer and the metal seed layer not covered by the metal grid structure.

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