Array antenna unit and reconfigurable intelligent metasurface
By designing a reconfigurable smart metasurface with array antenna elements and PIN diode connections, the limitations of existing technologies in terms of application scenarios and low efficiency are solved. This achieves broadband tunable absorption and stable reflection, expanding the scope of applications, especially showing great potential in radar stealth and deception technologies.
Patent Information
- Application Number
- CN202511304620.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-12
- Publication Date
- 2025-12-02
AI Technical Summary
Existing reconfigurable smart metasurfaces suffer from limitations in application scenarios and low efficiency in electromagnetic wave modulation and RCS reduction. In particular, DOA estimation is required when the direction of incoming waves is unknown or changes, and existing scattering methods are time-consuming and resource-intensive.
An array antenna unit was designed, including an upper patch, a dielectric substrate, a metal ground plane, a sector capacitor, and a metallized via. These are connected by PIN diodes to form a reconfigurable smart metasurface. Combined with a dipole antenna and slot loading, the unit achieves switching between reflection and absorption modes. The variable resistance of the PIN diodes enables adjustable absorption.
The bandwidth has been expanded, the stability of the device under oblique incidence has been improved, and broadband adjustable absorption capability has been achieved. It has good potential for radar stealth and deception technology applications and can flexibly adjust the RCS reduction effect under different incident angles.
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Figure CN121055046A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of electromagnetic information technology, and in particular to an array antenna unit and a reconfigurable smart metasurface. Background Technology
[0002] Over the past decade, the electronics and information industry has developed rapidly, and the electromagnetic environment has become increasingly complex and volatile. Reconfigurable intelligent (RIS) metasurfaces can achieve exceptionally flexible tuning of electromagnetic waves by altering the electromagnetic properties of the array. RIS utilizes tunable active devices such as PIN diodes, varactor diodes, transistors, and amplifiers to achieve wavefront modulation of electromagnetic waves, including beam scanning, polarization conversion, RCS reduction, and even time-domain modulation. This flexible modulation of electromagnetic waves has led to the widespread application of RIS in satellite communications, radar detection, and channel enhancement. Currently, the mainstream antenna RCS reduction method using RIS involves scattering electromagnetic waves through random coding or checkerboard coding, deflecting the reflected beam, or forming multiple beams to achieve RCS reduction. Essentially, this does not dissipate energy but rather scatters the electromagnetic waves into free space. In practical scenarios, finding the corresponding scattering phase codebook distribution requires on-site optimization, which is very time-consuming. On the other hand, most existing methods for RCS reduction using scattering are typically for monostatic or bistatic RCS. If the direction of arrival is unknown or changes, DOA estimation is still required to calculate a more suitable phase codebook distribution. Although scattering-based RCS reduction methods are effective, their application is limited by the aforementioned constraints. Summary of the Invention
[0003] The present invention aims to at least partially solve one of the technical problems in the above-mentioned technologies, and to this end, proposes an array antenna element, comprising: The stacked components are: an upper patch, an upper half of a first dielectric substrate, a lower half of a first dielectric substrate, a metal ground plane, a PP layer, a sector capacitor, a second dielectric substrate, and two metallized vias penetrating each stacked layer. One of the two metallized vias is connected to the sector capacitor and forms an isolation with the metal ground plane, while the other is connected to the metal ground plane; Both metallized vias connect the upper patch, the upper half of the first dielectric substrate, the lower half of the first dielectric substrate, the PP layer, and the second dielectric substrate. The upper patch consists of two metal patches connected by PIN diodes, and the two metal patches are respectively connected to two metallized vias.
[0004] Furthermore, the metal patch constituting the upper patch is rectangular, and the side of the metal patch closest to the PIN diode is symmetrically provided with a pair of narrow rectangular slots, and the side of the metal patch furthest from the PIN diode is provided with a wide rectangular slot in the center.
[0005] Furthermore, the metal floor and the isolated metallized through-hole are provided with circular grooves.
[0006] Furthermore, the upper half of the first dielectric substrate and / or the lower half of the first dielectric substrate are Rogers RT / duroid5880 laminates.
[0007] Furthermore, the thickness of the upper half of the first dielectric substrate and / or the lower half of the first dielectric substrate is 4 mm, the dielectric constant is 2.2, and the loss tangent is 0.001.
[0008] Furthermore, the PP layer is Rogers RO4450 prepreg with a thickness of 0.1 mm.
[0009] Furthermore, the second dielectric substrate is made of FR-4 specification material.
[0010] Furthermore, the second dielectric substrate has a thickness of 0.8 mm, a dielectric constant of 4.4, and a loss tangent of 0.02.
[0011] Furthermore, the upper half of the first dielectric plate, the lower half of the first dielectric plate, the metal floor, the PP layer, and the second dielectric plate have the same axial cross-sectional dimensions and are all square with rounded inner corners.
[0012] This application also proposes a reconfigurable smart metasurface, which is composed of a plurality of the above-described array antenna elements.
[0013] Compared with the prior art, the beneficial effects of the present invention are: The multifunctional smart metasurface disclosed in this invention features switchable reflection and absorption modes, derived from a broadband dipole antenna. To further expand the bandwidth and maintain device stability under oblique incidence, this application introduces two pairs of slits. Additionally, pin diodes loaded between the dipole arms contribute to improved 1-bit resolution, while the variable resistance of the pin diodes in their switched state allows for adjustable absorption modes. The multifunctional reconfigurable metasurface proposed in this application possesses additional broadband tunable absorption capabilities, demonstrating significant application potential in radar stealth and deception technologies.
[0014] Other features and advantages of the invention will be set forth in the following description, and will be apparent in part from the description, or may be learned by practicing the invention. The objects and other advantages of the invention can be realized and obtained by means of the structures particularly pointed out in the written description and the accompanying drawings. The technical solutions of the invention will be further described below with reference to the accompanying drawings and embodiments. Attached Figure Description
[0015] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used in conjunction with embodiments of the invention to explain the invention and do not constitute a limitation thereof. In the drawings: Figure 1 The provided embodiment shows a three-dimensional structural diagram of the array antenna unit; Figure 2 The image shows a three-dimensional side view of the array antenna unit as provided in the embodiment. Figure 3 The above and below views of the array antenna unit are provided in the embodiment. Figure 4 This is a schematic diagram of a reconfigurable smart metasurface provided in an embodiment; Figure 5(a) is a graph showing the adjustable absorption performance of the reconfigurable smart metasurface under 0-degree incident wave, as given in the embodiment. Figure 5(b) shows the adjustable absorption performance curve of the reconfigurable smart metasurface under 15-degree incident wave, as given in the embodiment. Figure 5(c) is a graph showing the adjustable absorption performance of the reconfigurable smart metasurface under 30-degree incident wave, as given in the embodiment. Figure 6(a) shows the beam scanning pattern of the reconfigurable smart metasurface at 7 GHz given in the embodiment; Figure 6(b) shows the beam scanning pattern of the reconfigurable smart metasurface at 8 GHz as given in the embodiment; Figure 6(c) shows the beam scanning pattern of the reconfigurable smart metasurface at 10 GHz as given in the embodiment; Figure 6(d) shows the beam scanning pattern of the reconfigurable smart metasurface at 12.3 GHz given in the embodiment; Reference numerals: 1. Upper layer patch; 2. Upper half of the first dielectric substrate; 3. Lower half of the first dielectric substrate; 4. Metal ground plane; 5. PP layer; 6. Second dielectric substrate; 7. PIN diode; 8. Fan-shaped capacitor; 9. Metallized via; 10. Circular slot; 11. Narrow-sided rectangular slot; 12. Wide-sided rectangular slot. Detailed Implementation
[0016] The present invention will be described below with reference to the accompanying drawings. The preferred embodiments described herein are for illustration and explanation only and are not intended to limit the present invention.
[0017] Figures 1-3 This is a schematic diagram of an array antenna element provided by the present invention, wherein, Figure 1 This is a three-dimensional structural diagram of the array antenna element provided in this invention. Figure 2 This is a side view of the array antenna element provided in this application. Figure 3 The above and below views of the array antenna element provided in this application are shown. The array antenna element includes: The upper layer patch 1, the upper half of the first dielectric substrate 2, the lower half of the first dielectric substrate 3, the metal ground plane 4, the PP layer 5, the sector capacitor 8, the second dielectric substrate 6, and two metallized vias 9 penetrating each stacked layer are stacked in sequence. One of the two metallized vias 9 is connected to the sector capacitor 8 and forms an isolation with the metal ground plane 4, while the other is connected to the metal ground plane 4. Both metallized vias 9 are connected to the upper patch 1, the upper half of the first dielectric substrate 2, the lower half of the first dielectric substrate 3, the PP layer 5, and the second dielectric substrate 6; The upper patch 1 consists of two metal patches connected by PIN diodes 7, and the two metal patches are respectively connected to two metallized vias 9.
[0018] Furthermore, the metal patch constituting the upper patch 1 is rectangular, and a pair of narrow rectangular slots 11 are symmetrically provided on the side of the metal patch close to the PIN diode 7, and a wide rectangular slot 12 is provided in the center on the side of the metal patch away from the PIN diode 7.
[0019] According to some embodiments of this application, the upper patch 1 is a pair of square metal patches with slots. There are 3 pairs of slots on the metal patches to expand the unit bandwidth and maintain the stable electrical performance of the array antenna unit under oblique incidence. A PIN diode is soldered in the middle of the pair of metal patches to realize the reconfigurable performance of the array antenna unit.
[0020] According to some embodiments of this application, the upper patch 1 of the array antenna unit is derived from a dipole and uses only one PIN diode. This PIN diode is loaded at the feed port position when the dipole is used as a radiating antenna. Specifically, the cathode of the PIN diode is connected to the metal patch above the fan-shaped capacitor 8, and the anode of the PIN diode is connected to another metal patch. DC feeding is achieved through two metallized vias 9 in conjunction with the lowest layer's DC bias line. One metallized via 9 is connected to the metal ground plane 4 and has the same DC voltage as the metal ground plane 4. The other metallized via 9 is isolated from the metal ground plane 4 and is DC fed through the feed line located at the bottom layer. The diode's off and on states provide a 180° reflection phase difference for the unit. When the diode is under a small forward current bias, it is in the variable resistance region, providing the unit with adjustable absorption capability. The fan-shaped isolation capacitor 8 is located between the pp layer 5 and the second dielectric substrate 6 to reduce the influence of DC signals on RF signals over a wide bandwidth. Furthermore, the presence of the fan-shaped capacitor 8 short-circuits the RF current to ground, ensuring that both metallized vias 9 are connected to ground for RF signals, thus maintaining structural symmetry. The DC bias line is located at the bottom layer of the structure, below the metal ground plane 4, preventing the dense array of bias lines from affecting the electromagnetic characteristics of the structure.
[0021] According to some embodiments of this application, the overall size of the upper patch 1 is 10.7mm × 6.2mm, the width of the narrow rectangular slot 11 is 0.5mm and the length is 2.2mm; the width of the wide rectangular slot 12 is 1.5mm and the length is 1mm; the radius of the metallized via 9 is 0.25mm; and the radius of the fan-shaped short-circuit capacitor 8 is 3mm.
[0022] Furthermore, the metal floor 4 and the isolated metallized through-hole 9 are provided with circular grooves 10.
[0023] According to some embodiments of this application, the metal floor 4 is a rectangular metal sheet with a circular groove 10 on it, which is coaxial with the metallized through hole 9. The circular groove 10 is used to prevent the metallized through hole 9 from short-circuiting with the metal floor 4.
[0024] Furthermore, the upper half 2 and / or the lower half 3 of the first dielectric substrate are Rogers RT / duroid5880 laminates.
[0025] Furthermore, the thickness of the upper half 2 and / or the lower half 3 of the first dielectric substrate is 4 mm, the dielectric constant is 2.2, and the loss tangent is 0.001.
[0026] Furthermore, PP layer 5 is Rogers RO4450 prepreg with a thickness of 0.1mm.
[0027] Furthermore, the second dielectric plate 6 is made of FR-4 specification material.
[0028] Furthermore, the second dielectric substrate 6 has a thickness of 0.8 mm, a dielectric constant of 4.4, and a loss tangent of 0.02.
[0029] According to some embodiments of this application, the first dielectric substrate (composed of the upper half 2 and the lower half 3 of the first dielectric substrate) is a Rogers 5880 substrate with a thickness of 4mm, a dielectric constant of 2.2, and a loss tangent of 0.001; the PP layer 5 is a Rogers 4450 substrate with a thickness of 0.1mm; and the second dielectric substrate 6 is an FR-4 substrate with a thickness of 0.8mm, a dielectric constant of 4.4, and a loss tangent of 0.02. In this embodiment, the first dielectric substrate is divided into upper and lower parts because a custom thickness of 4mm is relatively expensive. To control costs, the upper and lower parts of the first dielectric substrate are manufactured by splitting them.
[0030] Furthermore, the axial cross-sectional dimensions of the upper half 2 of the first dielectric plate, the lower half 3 of the first dielectric plate, the metal floor 4, the PP layer 5, and the second dielectric plate 6 are the same and are all squares with rounded inner corners.
[0031] According to some embodiments of this application, in order to avoid affecting the overall electromagnetic characteristics of the unit, we do not use PP with a large difference in dielectric constant from the first dielectric board to bond its upper and lower parts. Instead, a quarter-cylinder is cut out at each of the four corners of the unit, and after processing, the whole unit is fixed with M2.5 nylon screws. The 0.8 mm thick second dielectric board 6 can prevent the PCB board from bending excessively due to processing reasons during the processing.
[0032] This application also proposes a reconfigurable smart metasurface, which is composed of several of the above-mentioned array antenna elements.
[0033] Figure 4 The schematic diagram of the 16×16 reconfigurable smart metasurface (composed of 256 array antenna elements as described above) given in this embodiment is shown in Figures 5(a)-(c). The reconfigurable smart metasurface antenna of this embodiment exhibits adjustable RCS reduction capability under different forward DC bias currents. Within the 6.8 GHz-14 GHz frequency band, the RCS reduction can be flexibly adjusted from -1 dB to -10 dB. The 10 dB RCS reduction bandwidth is 75%. The maximum RCS reduction reaches -20 dB at 12 GHz. Stable adjustable absorption capability is observed under both 15° and 30° oblique incidence conditions.
[0034] Figures 6(a)-6(d) show the scanning patterns of the reconfigurable smart metasurface given in the above embodiments at 7 GHz, 8 GHz, 10 GHz, and 12.3 GHz, respectively. Based on Figures 6(a)-6(d), it is easy to see that the reconfigurable smart metasurface given in this embodiment has good beam scanning performance in the broadband.
[0035] The working principle of the above technical solution is as follows: When the reflective RIS modulates electromagnetic waves in space, the metasurface first receives the electromagnetic waves, modulates them according to its own electromagnetic resonance characteristics, and reflects them back into free space. Based on the reciprocity of antenna transmission and reception, the broadband metasurface unit design is transformed into a broadband antenna design. We design the broadband unit based on a dipole antenna. By using a slot loading method, the input impedance of the dipole is balanced, thus broadening the bandwidth. The broadband dipole receives the electromagnetic waves and directly performs open-circuit or short-circuit reflection at the original antenna feed port, which is equivalent to an infinitely short transmission line with an open or short circuit at the end, introducing a 180° phase difference. This also avoids the loss caused by the transmission line to a certain extent. Since the structure given in this application itself receives the electromagnetic waves at the port for operation, it is also possible to choose not to reflect them and instead lose the electromagnetic waves to achieve the purpose of wave absorption. Since PIN diodes can be used as variable resistors under forward bias current excitation within a certain range, adjustable absorption function can be achieved by using a control circuit to make the diodes work under different forward bias currents. At this time, the forward bias current on each unit is the same.
[0036] It is obvious that those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.
Claims
1. An array antenna element, characterized in that, include: The upper layer patch (1), the upper half of the first dielectric substrate (2), the lower half of the first dielectric substrate (3), the metal ground plane (4), the PP layer (5), the fan-shaped capacitor (8), the second dielectric substrate (6), and two metallized vias (9) penetrating each stacked layer are stacked in sequence. One of the two metallized through holes (9) is connected to the sector capacitor (8) and forms an isolation with the metal ground plate (4), while the other is connected to the metal ground plate (4). The two metallized through holes (9) are connected to the upper patch (1), the upper half of the first dielectric substrate (2), the lower half of the first dielectric substrate (3), the PP layer (5) and the second dielectric substrate (6); The upper patch (1) consists of two metal patches connected by PIN diodes (7), and the two metal patches are respectively connected to two metallized through holes (9).
2. The array antenna unit as described in claim 1, characterized in that, The metal patch constituting the upper patch (1) is rectangular. A pair of narrow rectangular slots (11) are symmetrically provided on the side of the metal patch close to the PIN diode (7), and a wide rectangular slot (12) is provided in the center on the side of the metal patch away from the PIN diode (7).
3. The array antenna unit as described in claim 1, characterized in that, The metal floor (4) and the isolated metallized through hole (9) are provided with a circular groove (10).
4. The array antenna unit as described in claim 1, characterized in that, The upper half (2) of the first medium plate and / or the lower half (3) of the first medium plate are Rogers RT / duroid5880 laminates.
5. The array antenna unit as described in claim 4, characterized in that, The thickness of the upper half (2) and / or the lower half (3) of the first dielectric plate is 4 mm, the dielectric constant is 2.2, and the loss tangent is 0.
001.
6. The array antenna unit as described in claim 1, characterized in that, The PP layer (5) is Rogers RO4450 prepreg with a thickness of 0.1 mm.
7. The array antenna unit as described in claim 1, characterized in that, The second medium plate (6) is made of FR-4 specification material.
8. The array antenna unit as described in claim 7, characterized in that, The second dielectric substrate (6) has a thickness of 0.8 mm, a dielectric constant of 4.4, and a loss tangent of 0.
02.
9. The array antenna element as described in any one of claims 1-7, characterized in that, The upper half (2) of the first dielectric plate, the lower half (3) of the first dielectric plate, the metal floor (4), the PP layer (5) and the second dielectric plate (6) have the same axial cross-sectional dimensions and are all square with rounded inner corners.
10. A reconfigurable smart metasurface, characterized in that, The reconfigurable smart metasurface is composed of several array antenna elements as described in any one of claims 1-9.
Citation Information
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